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Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / media / video / gspca / ov534_9.c
blobfbfa02affa132908d02feceebac5b06ab44c9292
1 /*
2 * ov534-ov9xxx gspca driver
3 *
4 * Copyright (C) 2009-2011 Jean-Francois Moine http://moinejf.free.fr
5 * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
6 * Copyright (C) 2008 Jim Paris <jim@jtan.com>
7 *
8 * Based on a prototype written by Mark Ferrell <majortrips@gmail.com>
9 * USB protocol reverse engineered by Jim Paris <jim@jtan.com>
10 * https://jim.sh/svn/jim/devl/playstation/ps3/eye/test/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28
29 #define MODULE_NAME "ov534_9"
30
31 #include "gspca.h"
32
33 #define OV534_REG_ADDRESS 0xf1 /* sensor address */
34 #define OV534_REG_SUBADDR 0xf2
35 #define OV534_REG_WRITE 0xf3
36 #define OV534_REG_READ 0xf4
37 #define OV534_REG_OPERATION 0xf5
38 #define OV534_REG_STATUS 0xf6
39
40 #define OV534_OP_WRITE_3 0x37
41 #define OV534_OP_WRITE_2 0x33
42 #define OV534_OP_READ_2 0xf9
43
44 #define CTRL_TIMEOUT 500
45
46 MODULE_AUTHOR("Jean-Francois Moine <moinejf@free.fr>");
47 MODULE_DESCRIPTION("GSPCA/OV534_9 USB Camera Driver");
48 MODULE_LICENSE("GPL");
49
50 /* controls */
51 enum e_ctrl {
52 BRIGHTNESS,
53 CONTRAST,
54 AUTOGAIN,
55 EXPOSURE,
56 SHARPNESS,
57 SATUR,
58 LIGHTFREQ,
59 NCTRLS /* number of controls */
60 };
61
62 /* specific webcam descriptor */
63 struct sd {
64 struct gspca_dev gspca_dev; /* !! must be the first item */
65 struct gspca_ctrl ctrls[NCTRLS];
66 __u32 last_pts;
67 u8 last_fid;
68
69 u8 sensor;
70 };
71 enum sensors {
72 SENSOR_OV965x, /* ov9657 */
73 SENSOR_OV971x, /* ov9712 */
74 SENSOR_OV562x, /* ov5621 */
75 NSENSORS
76 };
77
78 /* V4L2 controls supported by the driver */
79 static void setbrightness(struct gspca_dev *gspca_dev);
80 static void setcontrast(struct gspca_dev *gspca_dev);
81 static void setautogain(struct gspca_dev *gspca_dev);
82 static void setexposure(struct gspca_dev *gspca_dev);
83 static void setsharpness(struct gspca_dev *gspca_dev);
84 static void setsatur(struct gspca_dev *gspca_dev);
85 static void setlightfreq(struct gspca_dev *gspca_dev);
86
87 static const struct ctrl sd_ctrls[NCTRLS] = {
88 [BRIGHTNESS] = {
89 {
90 .id = V4L2_CID_BRIGHTNESS,
91 .type = V4L2_CTRL_TYPE_INTEGER,
92 .name = "Brightness",
93 .minimum = 0,
94 .maximum = 15,
95 .step = 1,
96 .default_value = 7
97 },
98 .set_control = setbrightness
99 },
100 [CONTRAST] = {
101 {
102 .id = V4L2_CID_CONTRAST,
103 .type = V4L2_CTRL_TYPE_INTEGER,
104 .name = "Contrast",
105 .minimum = 0,
106 .maximum = 15,
107 .step = 1,
108 .default_value = 3
109 },
110 .set_control = setcontrast
111 },
112 [AUTOGAIN] = {
113 {
114 .id = V4L2_CID_AUTOGAIN,
115 .type = V4L2_CTRL_TYPE_BOOLEAN,
116 .name = "Autogain",
117 .minimum = 0,
118 .maximum = 1,
119 .step = 1,
120 #define AUTOGAIN_DEF 1
121 .default_value = AUTOGAIN_DEF,
122 },
123 .set_control = setautogain
124 },
125 [EXPOSURE] = {
126 {
127 .id = V4L2_CID_EXPOSURE,
128 .type = V4L2_CTRL_TYPE_INTEGER,
129 .name = "Exposure",
130 .minimum = 0,
131 .maximum = 3,
132 .step = 1,
133 .default_value = 0
134 },
135 .set_control = setexposure
136 },
137 [SHARPNESS] = {
138 {
139 .id = V4L2_CID_SHARPNESS,
140 .type = V4L2_CTRL_TYPE_INTEGER,
141 .name = "Sharpness",
142 .minimum = -1, /* -1 = auto */
143 .maximum = 4,
144 .step = 1,
145 .default_value = -1
146 },
147 .set_control = setsharpness
148 },
149 [SATUR] = {
150 {
151 .id = V4L2_CID_SATURATION,
152 .type = V4L2_CTRL_TYPE_INTEGER,
153 .name = "Saturation",
154 .minimum = 0,
155 .maximum = 4,
156 .step = 1,
157 .default_value = 2
158 },
159 .set_control = setsatur
160 },
161 [LIGHTFREQ] = {
162 {
163 .id = V4L2_CID_POWER_LINE_FREQUENCY,
164 .type = V4L2_CTRL_TYPE_MENU,
165 .name = "Light frequency filter",
166 .minimum = 0,
167 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
168 .step = 1,
169 .default_value = 0
170 },
171 .set_control = setlightfreq
172 },
173 };
174
175 static const struct v4l2_pix_format ov965x_mode[] = {
176 #define QVGA_MODE 0
177 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
178 .bytesperline = 320,
179 .sizeimage = 320 * 240 * 3 / 8 + 590,
180 .colorspace = V4L2_COLORSPACE_JPEG},
181 #define VGA_MODE 1
182 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
183 .bytesperline = 640,
184 .sizeimage = 640 * 480 * 3 / 8 + 590,
185 .colorspace = V4L2_COLORSPACE_JPEG},
186 #define SVGA_MODE 2
187 {800, 600, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
188 .bytesperline = 800,
189 .sizeimage = 800 * 600 * 3 / 8 + 590,
190 .colorspace = V4L2_COLORSPACE_JPEG},
191 #define XGA_MODE 3
192 {1024, 768, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
193 .bytesperline = 1024,
194 .sizeimage = 1024 * 768 * 3 / 8 + 590,
195 .colorspace = V4L2_COLORSPACE_JPEG},
196 #define SXGA_MODE 4
197 {1280, 1024, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
198 .bytesperline = 1280,
199 .sizeimage = 1280 * 1024 * 3 / 8 + 590,
200 .colorspace = V4L2_COLORSPACE_JPEG},
201 };
202
203 static const struct v4l2_pix_format ov971x_mode[] = {
204 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
205 .bytesperline = 640,
206 .sizeimage = 640 * 480,
207 .colorspace = V4L2_COLORSPACE_SRGB
208 }
209 };
210
211 static const struct v4l2_pix_format ov562x_mode[] = {
212 {2592, 1680, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
213 .bytesperline = 2592,
214 .sizeimage = 2592 * 1680,
215 .colorspace = V4L2_COLORSPACE_SRGB
216 }
217 };
218
219 static const u8 bridge_init[][2] = {
220 {0x88, 0xf8},
221 {0x89, 0xff},
222 {0x76, 0x03},
223 {0x92, 0x03},
224 {0x95, 0x10},
225 {0xe2, 0x00},
226 {0xe7, 0x3e},
227 {0x8d, 0x1c},
228 {0x8e, 0x00},
229 {0x8f, 0x00},
230 {0x1f, 0x00},
231 {0xc3, 0xf9},
232 {0x89, 0xff},
233 {0x88, 0xf8},
234 {0x76, 0x03},
235 {0x92, 0x01},
236 {0x93, 0x18},
237 {0x1c, 0x0a},
238 {0x1d, 0x48},
239 {0xc0, 0x50},
240 {0xc1, 0x3c},
241 {0x34, 0x05},
242 {0xc2, 0x0c},
243 {0xc3, 0xf9},
244 {0x34, 0x05},
245 {0xe7, 0x2e},
246 {0x31, 0xf9},
247 {0x35, 0x02},
248 {0xd9, 0x10},
249 {0x25, 0x42},
250 {0x94, 0x11},
251 };
252
253 static const u8 ov965x_init[][2] = {
254 {0x12, 0x80}, /* com7 - SSCB reset */
255 {0x00, 0x00}, /* gain */
256 {0x01, 0x80}, /* blue */
257 {0x02, 0x80}, /* red */
258 {0x03, 0x1b}, /* vref */
259 {0x04, 0x03}, /* com1 - exposure low bits */
260 {0x0b, 0x57}, /* ver */
261 {0x0e, 0x61}, /* com5 */
262 {0x0f, 0x42}, /* com6 */
263 {0x11, 0x00}, /* clkrc */
264 {0x12, 0x02}, /* com7 - 15fps VGA YUYV */
265 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
266 {0x14, 0x28}, /* com9 */
267 {0x16, 0x24}, /* reg16 */
268 {0x17, 0x1d}, /* hstart*/
269 {0x18, 0xbd}, /* hstop */
270 {0x19, 0x01}, /* vstrt */
271 {0x1a, 0x81}, /* vstop*/
272 {0x1e, 0x04}, /* mvfp */
273 {0x24, 0x3c}, /* aew */
274 {0x25, 0x36}, /* aeb */
275 {0x26, 0x71}, /* vpt */
276 {0x27, 0x08}, /* bbias */
277 {0x28, 0x08}, /* gbbias */
278 {0x29, 0x15}, /* gr com */
279 {0x2a, 0x00}, /* exhch */
280 {0x2b, 0x00}, /* exhcl */
281 {0x2c, 0x08}, /* rbias */
282 {0x32, 0xff}, /* href */
283 {0x33, 0x00}, /* chlf */
284 {0x34, 0x3f}, /* aref1 */
285 {0x35, 0x00}, /* aref2 */
286 {0x36, 0xf8}, /* aref3 */
287 {0x38, 0x72}, /* adc2 */
288 {0x39, 0x57}, /* aref4 */
289 {0x3a, 0x80}, /* tslb - yuyv */
290 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
291 {0x3d, 0x99}, /* com13 */
292 {0x3f, 0xc1}, /* edge */
293 {0x40, 0xc0}, /* com15 */
294 {0x41, 0x40}, /* com16 */
295 {0x42, 0xc0}, /* com17 */
296 {0x43, 0x0a}, /* rsvd */
297 {0x44, 0xf0},
298 {0x45, 0x46},
299 {0x46, 0x62},
300 {0x47, 0x2a},
301 {0x48, 0x3c},
302 {0x4a, 0xfc},
303 {0x4b, 0xfc},
304 {0x4c, 0x7f},
305 {0x4d, 0x7f},
306 {0x4e, 0x7f},
307 {0x4f, 0x98}, /* matrix */
308 {0x50, 0x98},
309 {0x51, 0x00},
310 {0x52, 0x28},
311 {0x53, 0x70},
312 {0x54, 0x98},
313 {0x58, 0x1a}, /* matrix coef sign */
314 {0x59, 0x85}, /* AWB control */
315 {0x5a, 0xa9},
316 {0x5b, 0x64},
317 {0x5c, 0x84},
318 {0x5d, 0x53},
319 {0x5e, 0x0e},
320 {0x5f, 0xf0}, /* AWB blue limit */
321 {0x60, 0xf0}, /* AWB red limit */
322 {0x61, 0xf0}, /* AWB green limit */
323 {0x62, 0x00}, /* lcc1 */
324 {0x63, 0x00}, /* lcc2 */
325 {0x64, 0x02}, /* lcc3 */
326 {0x65, 0x16}, /* lcc4 */
327 {0x66, 0x01}, /* lcc5 */
328 {0x69, 0x02}, /* hv */
329 {0x6b, 0x5a}, /* dbvl */
330 {0x6c, 0x04},
331 {0x6d, 0x55},
332 {0x6e, 0x00},
333 {0x6f, 0x9d},
334 {0x70, 0x21}, /* dnsth */
335 {0x71, 0x78},
336 {0x72, 0x00}, /* poidx */
337 {0x73, 0x01}, /* pckdv */
338 {0x74, 0x3a}, /* xindx */
339 {0x75, 0x35}, /* yindx */
340 {0x76, 0x01},
341 {0x77, 0x02},
342 {0x7a, 0x12}, /* gamma curve */
343 {0x7b, 0x08},
344 {0x7c, 0x16},
345 {0x7d, 0x30},
346 {0x7e, 0x5e},
347 {0x7f, 0x72},
348 {0x80, 0x82},
349 {0x81, 0x8e},
350 {0x82, 0x9a},
351 {0x83, 0xa4},
352 {0x84, 0xac},
353 {0x85, 0xb8},
354 {0x86, 0xc3},
355 {0x87, 0xd6},
356 {0x88, 0xe6},
357 {0x89, 0xf2},
358 {0x8a, 0x03},
359 {0x8c, 0x89}, /* com19 */
360 {0x14, 0x28}, /* com9 */
361 {0x90, 0x7d},
362 {0x91, 0x7b},
363 {0x9d, 0x03}, /* lcc6 */
364 {0x9e, 0x04}, /* lcc7 */
365 {0x9f, 0x7a},
366 {0xa0, 0x79},
367 {0xa1, 0x40}, /* aechm */
368 {0xa4, 0x50}, /* com21 */
369 {0xa5, 0x68}, /* com26 */
370 {0xa6, 0x4a}, /* AWB green */
371 {0xa8, 0xc1}, /* refa8 */
372 {0xa9, 0xef}, /* refa9 */
373 {0xaa, 0x92},
374 {0xab, 0x04},
375 {0xac, 0x80}, /* black level control */
376 {0xad, 0x80},
377 {0xae, 0x80},
378 {0xaf, 0x80},
379 {0xb2, 0xf2},
380 {0xb3, 0x20},
381 {0xb4, 0x20}, /* ctrlb4 */
382 {0xb5, 0x00},
383 {0xb6, 0xaf},
384 {0xbb, 0xae},
385 {0xbc, 0x7f}, /* ADC channel offsets */
386 {0xdb, 0x7f},
387 {0xbe, 0x7f},
388 {0xbf, 0x7f},
389 {0xc0, 0xe2},
390 {0xc1, 0xc0},
391 {0xc2, 0x01},
392 {0xc3, 0x4e},
393 {0xc6, 0x85},
394 {0xc7, 0x80}, /* com24 */
395 {0xc9, 0xe0},
396 {0xca, 0xe8},
397 {0xcb, 0xf0},
398 {0xcc, 0xd8},
399 {0xcd, 0xf1},
400 {0x4f, 0x98}, /* matrix */
401 {0x50, 0x98},
402 {0x51, 0x00},
403 {0x52, 0x28},
404 {0x53, 0x70},
405 {0x54, 0x98},
406 {0x58, 0x1a},
407 {0xff, 0x41}, /* read 41, write ff 00 */
408 {0x41, 0x40}, /* com16 */
409
410 {0xc5, 0x03}, /* 60 Hz banding filter */
411 {0x6a, 0x02}, /* 50 Hz banding filter */
412
413 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
414 {0x36, 0xfa}, /* aref3 */
415 {0x69, 0x0a}, /* hv */
416 {0x8c, 0x89}, /* com22 */
417 {0x14, 0x28}, /* com9 */
418 {0x3e, 0x0c},
419 {0x41, 0x40}, /* com16 */
420 {0x72, 0x00},
421 {0x73, 0x00},
422 {0x74, 0x3a},
423 {0x75, 0x35},
424 {0x76, 0x01},
425 {0xc7, 0x80},
426 {0x03, 0x12}, /* vref */
427 {0x17, 0x16}, /* hstart */
428 {0x18, 0x02}, /* hstop */
429 {0x19, 0x01}, /* vstrt */
430 {0x1a, 0x3d}, /* vstop */
431 {0x32, 0xff}, /* href */
432 {0xc0, 0xaa},
433 };
434
435 static const u8 bridge_init_2[][2] = {
436 {0x94, 0xaa},
437 {0xf1, 0x60},
438 {0xe5, 0x04},
439 {0xc0, 0x50},
440 {0xc1, 0x3c},
441 {0x8c, 0x00},
442 {0x8d, 0x1c},
443 {0x34, 0x05},
444
445 {0xc2, 0x0c},
446 {0xc3, 0xf9},
447 {0xda, 0x01},
448 {0x50, 0x00},
449 {0x51, 0xa0},
450 {0x52, 0x3c},
451 {0x53, 0x00},
452 {0x54, 0x00},
453 {0x55, 0x00},
454 {0x57, 0x00},
455 {0x5c, 0x00},
456 {0x5a, 0xa0},
457 {0x5b, 0x78},
458 {0x35, 0x02},
459 {0xd9, 0x10},
460 {0x94, 0x11},
461 };
462
463 static const u8 ov965x_init_2[][2] = {
464 {0x3b, 0xc4},
465 {0x1e, 0x04}, /* mvfp */
466 {0x13, 0xe0}, /* com8 */
467 {0x00, 0x00}, /* gain */
468 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
469 {0x11, 0x03}, /* clkrc */
470 {0x6b, 0x5a}, /* dblv */
471 {0x6a, 0x05},
472 {0xc5, 0x07},
473 {0xa2, 0x4b},
474 {0xa3, 0x3e},
475 {0x2d, 0x00},
476 {0xff, 0x42}, /* read 42, write ff 00 */
477 {0x42, 0xc0}, /* com17 */
478 {0x2d, 0x00},
479 {0xff, 0x42}, /* read 42, write ff 00 */
480 {0x42, 0xc1}, /* com17 */
481 /* sharpness */
482 {0x3f, 0x01},
483 {0xff, 0x42}, /* read 42, write ff 00 */
484 {0x42, 0xc1}, /* com17 */
485 /* saturation */
486 {0x4f, 0x98}, /* matrix */
487 {0x50, 0x98},
488 {0x51, 0x00},
489 {0x52, 0x28},
490 {0x53, 0x70},
491 {0x54, 0x98},
492 {0x58, 0x1a},
493 {0xff, 0x41}, /* read 41, write ff 00 */
494 {0x41, 0x40}, /* com16 */
495 /* contrast */
496 {0x56, 0x40},
497 /* brightness */
498 {0x55, 0x8f},
499 /* expo */
500 {0x10, 0x25}, /* aech - exposure high bits */
501 {0xff, 0x13}, /* read 13, write ff 00 */
502 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
503 };
504
505 static const u8 ov971x_init[][2] = {
506 {0x12, 0x80},
507 {0x09, 0x10},
508 {0x1e, 0x07},
509 {0x5f, 0x18},
510 {0x69, 0x04},
511 {0x65, 0x2a},
512 {0x68, 0x0a},
513 {0x39, 0x28},
514 {0x4d, 0x90},
515 {0xc1, 0x80},
516 {0x0c, 0x30},
517 {0x6d, 0x02},
518 {0x96, 0xf1},
519 {0xbc, 0x68},
520 {0x12, 0x00},
521 {0x3b, 0x00},
522 {0x97, 0x80},
523 {0x17, 0x25},
524 {0x18, 0xa2},
525 {0x19, 0x01},
526 {0x1a, 0xca},
527 {0x03, 0x0a},
528 {0x32, 0x07},
529 {0x98, 0x40}, /*{0x98, 0x00},*/
530 {0x99, 0xA0}, /*{0x99, 0x00},*/
531 {0x9a, 0x01}, /*{0x9a, 0x00},*/
532 {0x57, 0x00},
533 {0x58, 0x78}, /*{0x58, 0xc8},*/
534 {0x59, 0x50}, /*{0x59, 0xa0},*/
535 {0x4c, 0x13},
536 {0x4b, 0x36},
537 {0x3d, 0x3c},
538 {0x3e, 0x03},
539 {0xbd, 0x50}, /*{0xbd, 0xa0},*/
540 {0xbe, 0x78}, /*{0xbe, 0xc8},*/
541 {0x4e, 0x55},
542 {0x4f, 0x55},
543 {0x50, 0x55},
544 {0x51, 0x55},
545 {0x24, 0x55},
546 {0x25, 0x40},
547 {0x26, 0xa1},
548 {0x5c, 0x59},
549 {0x5d, 0x00},
550 {0x11, 0x00},
551 {0x2a, 0x98},
552 {0x2b, 0x06},
553 {0x2d, 0x00},
554 {0x2e, 0x00},
555 {0x13, 0xa5},
556 {0x14, 0x40},
557 {0x4a, 0x00},
558 {0x49, 0xce},
559 {0x22, 0x03},
560 {0x09, 0x00}
561 };
562
563 static const u8 ov965x_start_1_vga[][2] = { /* same for qvga */
564 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
565 {0x36, 0xfa}, /* aref3 */
566 {0x69, 0x0a}, /* hv */
567 {0x8c, 0x89}, /* com22 */
568 {0x14, 0x28}, /* com9 */
569 {0x3e, 0x0c}, /* com14 */
570 {0x41, 0x40}, /* com16 */
571 {0x72, 0x00},
572 {0x73, 0x00},
573 {0x74, 0x3a},
574 {0x75, 0x35},
575 {0x76, 0x01},
576 {0xc7, 0x80}, /* com24 */
577 {0x03, 0x12}, /* vref */
578 {0x17, 0x16}, /* hstart */
579 {0x18, 0x02}, /* hstop */
580 {0x19, 0x01}, /* vstrt */
581 {0x1a, 0x3d}, /* vstop */
582 {0x32, 0xff}, /* href */
583 {0xc0, 0xaa},
584 };
585
586 static const u8 ov965x_start_1_svga[][2] = {
587 {0x12, 0x02}, /* com7 - YUYV - VGA 15 full resolution */
588 {0x36, 0xf8}, /* aref3 */
589 {0x69, 0x02}, /* hv */
590 {0x8c, 0x0d}, /* com22 */
591 {0x3e, 0x0c}, /* com14 */
592 {0x41, 0x40}, /* com16 */
593 {0x72, 0x00},
594 {0x73, 0x01},
595 {0x74, 0x3a},
596 {0x75, 0x35},
597 {0x76, 0x01},
598 {0xc7, 0x80}, /* com24 */
599 {0x03, 0x1b}, /* vref */
600 {0x17, 0x1d}, /* hstart */
601 {0x18, 0xbd}, /* hstop */
602 {0x19, 0x01}, /* vstrt */
603 {0x1a, 0x81}, /* vstop */
604 {0x32, 0xff}, /* href */
605 {0xc0, 0xe2},
606 };
607
608 static const u8 ov965x_start_1_xga[][2] = {
609 {0x12, 0x02}, /* com7 */
610 {0x36, 0xf8}, /* aref3 */
611 {0x69, 0x02}, /* hv */
612 {0x8c, 0x89}, /* com22 */
613 {0x14, 0x28}, /* com9 */
614 {0x3e, 0x0c}, /* com14 */
615 {0x41, 0x40}, /* com16 */
616 {0x72, 0x00},
617 {0x73, 0x01},
618 {0x74, 0x3a},
619 {0x75, 0x35},
620 {0x76, 0x01},
621 {0xc7, 0x80}, /* com24 */
622 {0x03, 0x1b}, /* vref */
623 {0x17, 0x1d}, /* hstart */
624 {0x18, 0xbd}, /* hstop */
625 {0x19, 0x01}, /* vstrt */
626 {0x1a, 0x81}, /* vstop */
627 {0x32, 0xff}, /* href */
628 {0xc0, 0xe2},
629 };
630
631 static const u8 ov965x_start_1_sxga[][2] = {
632 {0x12, 0x02}, /* com7 */
633 {0x36, 0xf8}, /* aref3 */
634 {0x69, 0x02}, /* hv */
635 {0x8c, 0x89}, /* com22 */
636 {0x14, 0x28}, /* com9 */
637 {0x3e, 0x0c}, /* com14 */
638 {0x41, 0x40}, /* com16 */
639 {0x72, 0x00},
640 {0x73, 0x01},
641 {0x74, 0x3a},
642 {0x75, 0x35},
643 {0x76, 0x01},
644 {0xc7, 0x80}, /* com24 */
645 {0x03, 0x1b}, /* vref */
646 {0x17, 0x1d}, /* hstart */
647 {0x18, 0x02}, /* hstop */
648 {0x19, 0x01}, /* vstrt */
649 {0x1a, 0x81}, /* vstop */
650 {0x32, 0xff}, /* href */
651 {0xc0, 0xe2},
652 };
653
654 static const u8 bridge_start_qvga[][2] = {
655 {0x94, 0xaa},
656 {0xf1, 0x60},
657 {0xe5, 0x04},
658 {0xc0, 0x50},
659 {0xc1, 0x3c},
660 {0x8c, 0x00},
661 {0x8d, 0x1c},
662 {0x34, 0x05},
663
664 {0xc2, 0x4c},
665 {0xc3, 0xf9},
666 {0xda, 0x00},
667 {0x50, 0x00},
668 {0x51, 0xa0},
669 {0x52, 0x78},
670 {0x53, 0x00},
671 {0x54, 0x00},
672 {0x55, 0x00},
673 {0x57, 0x00},
674 {0x5c, 0x00},
675 {0x5a, 0x50},
676 {0x5b, 0x3c},
677 {0x35, 0x02},
678 {0xd9, 0x10},
679 {0x94, 0x11},
680 };
681
682 static const u8 bridge_start_vga[][2] = {
683 {0x94, 0xaa},
684 {0xf1, 0x60},
685 {0xe5, 0x04},
686 {0xc0, 0x50},
687 {0xc1, 0x3c},
688 {0x8c, 0x00},
689 {0x8d, 0x1c},
690 {0x34, 0x05},
691 {0xc2, 0x0c},
692 {0xc3, 0xf9},
693 {0xda, 0x01},
694 {0x50, 0x00},
695 {0x51, 0xa0},
696 {0x52, 0x3c},
697 {0x53, 0x00},
698 {0x54, 0x00},
699 {0x55, 0x00},
700 {0x57, 0x00},
701 {0x5c, 0x00},
702 {0x5a, 0xa0},
703 {0x5b, 0x78},
704 {0x35, 0x02},
705 {0xd9, 0x10},
706 {0x94, 0x11},
707 };
708
709 static const u8 bridge_start_svga[][2] = {
710 {0x94, 0xaa},
711 {0xf1, 0x60},
712 {0xe5, 0x04},
713 {0xc0, 0xa0},
714 {0xc1, 0x80},
715 {0x8c, 0x00},
716 {0x8d, 0x1c},
717 {0x34, 0x05},
718 {0xc2, 0x4c},
719 {0xc3, 0xf9},
720 {0x50, 0x00},
721 {0x51, 0x40},
722 {0x52, 0x00},
723 {0x53, 0x00},
724 {0x54, 0x00},
725 {0x55, 0x88},
726 {0x57, 0x00},
727 {0x5c, 0x00},
728 {0x5a, 0xc8},
729 {0x5b, 0x96},
730 {0x35, 0x02},
731 {0xd9, 0x10},
732 {0xda, 0x00},
733 {0x94, 0x11},
734 };
735
736 static const u8 bridge_start_xga[][2] = {
737 {0x94, 0xaa},
738 {0xf1, 0x60},
739 {0xe5, 0x04},
740 {0xc0, 0xa0},
741 {0xc1, 0x80},
742 {0x8c, 0x00},
743 {0x8d, 0x1c},
744 {0x34, 0x05},
745 {0xc2, 0x4c},
746 {0xc3, 0xf9},
747 {0x50, 0x00},
748 {0x51, 0x40},
749 {0x52, 0x00},
750 {0x53, 0x00},
751 {0x54, 0x00},
752 {0x55, 0x88},
753 {0x57, 0x00},
754 {0x5c, 0x01},
755 {0x5a, 0x00},
756 {0x5b, 0xc0},
757 {0x35, 0x02},
758 {0xd9, 0x10},
759 {0xda, 0x01},
760 {0x94, 0x11},
761 };
762
763 static const u8 bridge_start_sxga[][2] = {
764 {0x94, 0xaa},
765 {0xf1, 0x60},
766 {0xe5, 0x04},
767 {0xc0, 0xa0},
768 {0xc1, 0x80},
769 {0x8c, 0x00},
770 {0x8d, 0x1c},
771 {0x34, 0x05},
772 {0xc2, 0x0c},
773 {0xc3, 0xf9},
774 {0xda, 0x00},
775 {0x35, 0x02},
776 {0xd9, 0x10},
777 {0x94, 0x11},
778 };
779
780 static const u8 ov965x_start_2_qvga[][2] = {
781 {0x3b, 0xe4}, /* com11 - night mode 1/4 frame rate */
782 {0x1e, 0x04}, /* mvfp */
783 {0x13, 0xe0}, /* com8 */
784 {0x00, 0x00},
785 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
786 {0x11, 0x01}, /* clkrc */
787 {0x6b, 0x5a}, /* dblv */
788 {0x6a, 0x02}, /* 50 Hz banding filter */
789 {0xc5, 0x03}, /* 60 Hz banding filter */
790 {0xa2, 0x96}, /* bd50 */
791 {0xa3, 0x7d}, /* bd60 */
792
793 {0xff, 0x13}, /* read 13, write ff 00 */
794 {0x13, 0xe7},
795 {0x3a, 0x80}, /* tslb - yuyv */
796 };
797
798 static const u8 ov965x_start_2_vga[][2] = {
799 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
800 {0x1e, 0x04}, /* mvfp */
801 {0x13, 0xe0}, /* com8 */
802 {0x00, 0x00},
803 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
804 {0x11, 0x03}, /* clkrc */
805 {0x6b, 0x5a}, /* dblv */
806 {0x6a, 0x05}, /* 50 Hz banding filter */
807 {0xc5, 0x07}, /* 60 Hz banding filter */
808 {0xa2, 0x4b}, /* bd50 */
809 {0xa3, 0x3e}, /* bd60 */
810
811 {0x2d, 0x00}, /* advfl */
812 };
813
814 static const u8 ov965x_start_2_svga[][2] = { /* same for xga */
815 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
816 {0x1e, 0x04}, /* mvfp */
817 {0x13, 0xe0}, /* com8 */
818 {0x00, 0x00},
819 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
820 {0x11, 0x01}, /* clkrc */
821 {0x6b, 0x5a}, /* dblv */
822 {0x6a, 0x0c}, /* 50 Hz banding filter */
823 {0xc5, 0x0f}, /* 60 Hz banding filter */
824 {0xa2, 0x4e}, /* bd50 */
825 {0xa3, 0x41}, /* bd60 */
826 };
827
828 static const u8 ov965x_start_2_sxga[][2] = {
829 {0x13, 0xe0}, /* com8 */
830 {0x00, 0x00},
831 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
832 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
833 {0x1e, 0x04}, /* mvfp */
834 {0x11, 0x01}, /* clkrc */
835 {0x6b, 0x5a}, /* dblv */
836 {0x6a, 0x0c}, /* 50 Hz banding filter */
837 {0xc5, 0x0f}, /* 60 Hz banding filter */
838 {0xa2, 0x4e}, /* bd50 */
839 {0xa3, 0x41}, /* bd60 */
840 };
841
842 static const u8 ov562x_init[][2] = {
843 {0x88, 0x20},
844 {0x89, 0x0a},
845 {0x8a, 0x90},
846 {0x8b, 0x06},
847 {0x8c, 0x01},
848 {0x8d, 0x10},
849 {0x1c, 0x00},
850 {0x1d, 0x48},
851 {0x1d, 0x00},
852 {0x1d, 0xff},
853 {0x1c, 0x0a},
854 {0x1d, 0x2e},
855 {0x1d, 0x1e},
856 };
857
858 static const u8 ov562x_init_2[][2] = {
859 {0x12, 0x80},
860 {0x11, 0x41},
861 {0x13, 0x00},
862 {0x10, 0x1e},
863 {0x3b, 0x07},
864 {0x5b, 0x40},
865 {0x39, 0x07},
866 {0x53, 0x02},
867 {0x54, 0x60},
868 {0x04, 0x20},
869 {0x27, 0x04},
870 {0x3d, 0x40},
871 {0x36, 0x00},
872 {0xc5, 0x04},
873 {0x4e, 0x00},
874 {0x4f, 0x93},
875 {0x50, 0x7b},
876 {0xca, 0x0c},
877 {0xcb, 0x0f},
878 {0x39, 0x07},
879 {0x4a, 0x10},
880 {0x3e, 0x0a},
881 {0x3d, 0x00},
882 {0x0c, 0x38},
883 {0x38, 0x90},
884 {0x46, 0x30},
885 {0x4f, 0x93},
886 {0x50, 0x7b},
887 {0xab, 0x00},
888 {0xca, 0x0c},
889 {0xcb, 0x0f},
890 {0x37, 0x02},
891 {0x44, 0x48},
892 {0x8d, 0x44},
893 {0x2a, 0x00},
894 {0x2b, 0x00},
895 {0x32, 0x00},
896 {0x38, 0x90},
897 {0x53, 0x02},
898 {0x54, 0x60},
899 {0x12, 0x00},
900 {0x17, 0x12},
901 {0x18, 0xb4},
902 {0x19, 0x0c},
903 {0x1a, 0xf4},
904 {0x03, 0x4a},
905 {0x89, 0x20},
906 {0x83, 0x80},
907 {0xb7, 0x9d},
908 {0xb6, 0x11},
909 {0xb5, 0x55},
910 {0xb4, 0x00},
911 {0xa9, 0xf0},
912 {0xa8, 0x0a},
913 {0xb8, 0xf0},
914 {0xb9, 0xf0},
915 {0xba, 0xf0},
916 {0x81, 0x07},
917 {0x63, 0x44},
918 {0x13, 0xc7},
919 {0x14, 0x60},
920 {0x33, 0x75},
921 {0x2c, 0x00},
922 {0x09, 0x00},
923 {0x35, 0x30},
924 {0x27, 0x04},
925 {0x3c, 0x07},
926 {0x3a, 0x0a},
927 {0x3b, 0x07},
928 {0x01, 0x40},
929 {0x02, 0x40},
930 {0x16, 0x40},
931 {0x52, 0xb0},
932 {0x51, 0x83},
933 {0x21, 0xbb},
934 {0x22, 0x10},
935 {0x23, 0x03},
936 {0x35, 0x38},
937 {0x20, 0x90},
938 {0x28, 0x30},
939 {0x73, 0xe1},
940 {0x6c, 0x00},
941 {0x6d, 0x80},
942 {0x6e, 0x00},
943 {0x70, 0x04},
944 {0x71, 0x00},
945 {0x8d, 0x04},
946 {0x64, 0x00},
947 {0x65, 0x00},
948 {0x66, 0x00},
949 {0x67, 0x00},
950 {0x68, 0x00},
951 {0x69, 0x00},
952 {0x6a, 0x00},
953 {0x6b, 0x00},
954 {0x71, 0x94},
955 {0x74, 0x20},
956 {0x80, 0x09},
957 {0x85, 0xc0},
958 };
959
960 static void reg_w_i(struct gspca_dev *gspca_dev, u16 reg, u8 val)
961 {
962 struct usb_device *udev = gspca_dev->dev;
963 int ret;
964
965 if (gspca_dev->usb_err < 0)
966 return;
967 gspca_dev->usb_buf[0] = val;
968 ret = usb_control_msg(udev,
969 usb_sndctrlpipe(udev, 0),
970 0x01,
971 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
972 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
973 if (ret < 0) {
974 pr_err("reg_w failed %d\n", ret);
975 gspca_dev->usb_err = ret;
976 }
977 }
978
979 static void reg_w(struct gspca_dev *gspca_dev, u16 reg, u8 val)
980 {
981 PDEBUG(D_USBO, "reg_w [%04x] = %02x", reg, val);
982 reg_w_i(gspca_dev, reg, val);
983 }
984
985 static u8 reg_r(struct gspca_dev *gspca_dev, u16 reg)
986 {
987 struct usb_device *udev = gspca_dev->dev;
988 int ret;
989
990 if (gspca_dev->usb_err < 0)
991 return 0;
992 ret = usb_control_msg(udev,
993 usb_rcvctrlpipe(udev, 0),
994 0x01,
995 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
996 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
997 PDEBUG(D_USBI, "reg_r [%04x] -> %02x", reg, gspca_dev->usb_buf[0]);
998 if (ret < 0) {
999 pr_err("reg_r err %d\n", ret);
1000 gspca_dev->usb_err = ret;
1001 }
1002 return gspca_dev->usb_buf[0];
1003 }
1004
1005 static int sccb_check_status(struct gspca_dev *gspca_dev)
1006 {
1007 u8 data;
1008 int i;
1009
1010 for (i = 0; i < 5; i++) {
1011 data = reg_r(gspca_dev, OV534_REG_STATUS);
1012
1013 switch (data) {
1014 case 0x00:
1015 return 1;
1016 case 0x04:
1017 return 0;
1018 case 0x03:
1019 break;
1020 default:
1021 PDEBUG(D_USBI|D_USBO,
1022 "sccb status 0x%02x, attempt %d/5",
1023 data, i + 1);
1024 }
1025 }
1026 return 0;
1027 }
1028
1029 static void sccb_write(struct gspca_dev *gspca_dev, u8 reg, u8 val)
1030 {
1031 PDEBUG(D_USBO, "sccb_write [%02x] = %02x", reg, val);
1032 reg_w_i(gspca_dev, OV534_REG_SUBADDR, reg);
1033 reg_w_i(gspca_dev, OV534_REG_WRITE, val);
1034 reg_w_i(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
1035
1036 if (!sccb_check_status(gspca_dev))
1037 pr_err("sccb_write failed\n");
1038 }
1039
1040 static u8 sccb_read(struct gspca_dev *gspca_dev, u16 reg)
1041 {
1042 reg_w(gspca_dev, OV534_REG_SUBADDR, reg);
1043 reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
1044 if (!sccb_check_status(gspca_dev))
1045 pr_err("sccb_read failed 1\n");
1046
1047 reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
1048 if (!sccb_check_status(gspca_dev))
1049 pr_err("sccb_read failed 2\n");
1050
1051 return reg_r(gspca_dev, OV534_REG_READ);
1052 }
1053
1054 /* output a bridge sequence (reg - val) */
1055 static void reg_w_array(struct gspca_dev *gspca_dev,
1056 const u8 (*data)[2], int len)
1057 {
1058 while (--len >= 0) {
1059 reg_w(gspca_dev, (*data)[0], (*data)[1]);
1060 data++;
1061 }
1062 }
1063
1064 /* output a sensor sequence (reg - val) */
1065 static void sccb_w_array(struct gspca_dev *gspca_dev,
1066 const u8 (*data)[2], int len)
1067 {
1068 while (--len >= 0) {
1069 if ((*data)[0] != 0xff) {
1070 sccb_write(gspca_dev, (*data)[0], (*data)[1]);
1071 } else {
1072 sccb_read(gspca_dev, (*data)[1]);
1073 sccb_write(gspca_dev, 0xff, 0x00);
1074 }
1075 data++;
1076 }
1077 }
1078
1079 /* Two bits control LED: 0x21 bit 7 and 0x23 bit 7.
1080 * (direction and output)? */
1081 static void set_led(struct gspca_dev *gspca_dev, int status)
1082 {
1083 u8 data;
1084
1085 PDEBUG(D_CONF, "led status: %d", status);
1086
1087 data = reg_r(gspca_dev, 0x21);
1088 data |= 0x80;
1089 reg_w(gspca_dev, 0x21, data);
1090
1091 data = reg_r(gspca_dev, 0x23);
1092 if (status)
1093 data |= 0x80;
1094 else
1095 data &= ~0x80;
1096
1097 reg_w(gspca_dev, 0x23, data);
1098
1099 if (!status) {
1100 data = reg_r(gspca_dev, 0x21);
1101 data &= ~0x80;
1102 reg_w(gspca_dev, 0x21, data);
1103 }
1104 }
1105
1106 static void setbrightness(struct gspca_dev *gspca_dev)
1107 {
1108 struct sd *sd = (struct sd *) gspca_dev;
1109 u8 val;
1110
1111 if (gspca_dev->ctrl_dis & (1 << BRIGHTNESS))
1112 return;
1113 val = sd->ctrls[BRIGHTNESS].val;
1114 if (val < 8)
1115 val = 15 - val; /* f .. 8 */
1116 else
1117 val = val - 8; /* 0 .. 7 */
1118 sccb_write(gspca_dev, 0x55, /* brtn - brightness adjustment */
1119 0x0f | (val << 4));
1120 }
1121
1122 static void setcontrast(struct gspca_dev *gspca_dev)
1123 {
1124 struct sd *sd = (struct sd *) gspca_dev;
1125
1126 if (gspca_dev->ctrl_dis & (1 << CONTRAST))
1127 return;
1128 sccb_write(gspca_dev, 0x56, /* cnst1 - contrast 1 ctrl coeff */
1129 sd->ctrls[CONTRAST].val << 4);
1130 }
1131
1132 static void setautogain(struct gspca_dev *gspca_dev)
1133 {
1134 struct sd *sd = (struct sd *) gspca_dev;
1135 u8 val;
1136
1137 if (gspca_dev->ctrl_dis & (1 << AUTOGAIN))
1138 return;
1139 /*fixme: should adjust agc/awb/aec by different controls */
1140 val = sccb_read(gspca_dev, 0x13); /* com8 */
1141 sccb_write(gspca_dev, 0xff, 0x00);
1142 if (sd->ctrls[AUTOGAIN].val)
1143 val |= 0x05; /* agc & aec */
1144 else
1145 val &= 0xfa;
1146 sccb_write(gspca_dev, 0x13, val);
1147 }
1148
1149 static void setexposure(struct gspca_dev *gspca_dev)
1150 {
1151 struct sd *sd = (struct sd *) gspca_dev;
1152 u8 val;
1153 static const u8 expo[4] = {0x00, 0x25, 0x38, 0x5e};
1154
1155 if (gspca_dev->ctrl_dis & (1 << EXPOSURE))
1156 return;
1157 sccb_write(gspca_dev, 0x10, /* aec[9:2] */
1158 expo[sd->ctrls[EXPOSURE].val]);
1159
1160 val = sccb_read(gspca_dev, 0x13); /* com8 */
1161 sccb_write(gspca_dev, 0xff, 0x00);
1162 sccb_write(gspca_dev, 0x13, val);
1163
1164 val = sccb_read(gspca_dev, 0xa1); /* aech */
1165 sccb_write(gspca_dev, 0xff, 0x00);
1166 sccb_write(gspca_dev, 0xa1, val & 0xe0); /* aec[15:10] = 0 */
1167 }
1168
1169 static void setsharpness(struct gspca_dev *gspca_dev)
1170 {
1171 struct sd *sd = (struct sd *) gspca_dev;
1172 s8 val;
1173
1174 if (gspca_dev->ctrl_dis & (1 << SHARPNESS))
1175 return;
1176 val = sd->ctrls[SHARPNESS].val;
1177 if (val < 0) { /* auto */
1178 val = sccb_read(gspca_dev, 0x42); /* com17 */
1179 sccb_write(gspca_dev, 0xff, 0x00);
1180 sccb_write(gspca_dev, 0x42, val | 0x40);
1181 /* Edge enhancement strength auto adjust */
1182 return;
1183 }
1184 if (val != 0)
1185 val = 1 << (val - 1);
1186 sccb_write(gspca_dev, 0x3f, /* edge - edge enhance. factor */
1187 val);
1188 val = sccb_read(gspca_dev, 0x42); /* com17 */
1189 sccb_write(gspca_dev, 0xff, 0x00);
1190 sccb_write(gspca_dev, 0x42, val & 0xbf);
1191 }
1192
1193 static void setsatur(struct gspca_dev *gspca_dev)
1194 {
1195 struct sd *sd = (struct sd *) gspca_dev;
1196 u8 val1, val2, val3;
1197 static const u8 matrix[5][2] = {
1198 {0x14, 0x38},
1199 {0x1e, 0x54},
1200 {0x28, 0x70},
1201 {0x32, 0x8c},
1202 {0x48, 0x90}
1203 };
1204
1205 if (gspca_dev->ctrl_dis & (1 << SATUR))
1206 return;
1207 val1 = matrix[sd->ctrls[SATUR].val][0];
1208 val2 = matrix[sd->ctrls[SATUR].val][1];
1209 val3 = val1 + val2;
1210 sccb_write(gspca_dev, 0x4f, val3); /* matrix coeff */
1211 sccb_write(gspca_dev, 0x50, val3);
1212 sccb_write(gspca_dev, 0x51, 0x00);
1213 sccb_write(gspca_dev, 0x52, val1);
1214 sccb_write(gspca_dev, 0x53, val2);
1215 sccb_write(gspca_dev, 0x54, val3);
1216 sccb_write(gspca_dev, 0x58, 0x1a); /* mtxs - coeff signs */
1217
1218 val1 = sccb_read(gspca_dev, 0x41); /* com16 */
1219 sccb_write(gspca_dev, 0xff, 0x00);
1220 sccb_write(gspca_dev, 0x41, val1);
1221 }
1222
1223 static void setlightfreq(struct gspca_dev *gspca_dev)
1224 {
1225 struct sd *sd = (struct sd *) gspca_dev;
1226 u8 val;
1227
1228 if (gspca_dev->ctrl_dis & (1 << LIGHTFREQ))
1229 return;
1230 val = sccb_read(gspca_dev, 0x13); /* com8 */
1231 sccb_write(gspca_dev, 0xff, 0x00);
1232 if (sd->ctrls[LIGHTFREQ].val == 0) {
1233 sccb_write(gspca_dev, 0x13, val & 0xdf);
1234 return;
1235 }
1236 sccb_write(gspca_dev, 0x13, val | 0x20);
1237
1238 val = sccb_read(gspca_dev, 0x42); /* com17 */
1239 sccb_write(gspca_dev, 0xff, 0x00);
1240 if (sd->ctrls[LIGHTFREQ].val == 1)
1241 val |= 0x01;
1242 else
1243 val &= 0xfe;
1244 sccb_write(gspca_dev, 0x42, val);
1245 }
1246
1247 /* this function is called at probe time */
1248 static int sd_config(struct gspca_dev *gspca_dev,
1249 const struct usb_device_id *id)
1250 {
1251 struct sd *sd = (struct sd *) gspca_dev;
1252
1253 gspca_dev->cam.ctrls = sd->ctrls;
1254
1255 #if AUTOGAIN_DEF != 0
1256 gspca_dev->ctrl_inac |= (1 << EXPOSURE);
1257 #endif
1258 return 0;
1259 }
1260
1261 /* this function is called at probe and resume time */
1262 static int sd_init(struct gspca_dev *gspca_dev)
1263 {
1264 struct sd *sd = (struct sd *) gspca_dev;
1265 u16 sensor_id;
1266
1267 /* reset bridge */
1268 reg_w(gspca_dev, 0xe7, 0x3a);
1269 reg_w(gspca_dev, 0xe0, 0x08);
1270 msleep(100);
1271
1272 /* initialize the sensor address */
1273 reg_w(gspca_dev, OV534_REG_ADDRESS, 0x60);
1274
1275 /* reset sensor */
1276 sccb_write(gspca_dev, 0x12, 0x80);
1277 msleep(10);
1278
1279 /* probe the sensor */
1280 sccb_read(gspca_dev, 0x0a);
1281 sensor_id = sccb_read(gspca_dev, 0x0a) << 8;
1282 sccb_read(gspca_dev, 0x0b);
1283 sensor_id |= sccb_read(gspca_dev, 0x0b);
1284 PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id);
1285
1286 /* initialize */
1287 if ((sensor_id & 0xfff0) == 0x9650) {
1288 sd->sensor = SENSOR_OV965x;
1289
1290 gspca_dev->cam.cam_mode = ov965x_mode;
1291 gspca_dev->cam.nmodes = ARRAY_SIZE(ov965x_mode);
1292
1293 reg_w_array(gspca_dev, bridge_init,
1294 ARRAY_SIZE(bridge_init));
1295 sccb_w_array(gspca_dev, ov965x_init,
1296 ARRAY_SIZE(ov965x_init));
1297 reg_w_array(gspca_dev, bridge_init_2,
1298 ARRAY_SIZE(bridge_init_2));
1299 sccb_w_array(gspca_dev, ov965x_init_2,
1300 ARRAY_SIZE(ov965x_init_2));
1301 reg_w(gspca_dev, 0xe0, 0x00);
1302 reg_w(gspca_dev, 0xe0, 0x01);
1303 set_led(gspca_dev, 0);
1304 reg_w(gspca_dev, 0xe0, 0x00);
1305 } else if ((sensor_id & 0xfff0) == 0x9710) {
1306 const char *p;
1307 int l;
1308
1309 sd->sensor = SENSOR_OV971x;
1310
1311 gspca_dev->cam.cam_mode = ov971x_mode;
1312 gspca_dev->cam.nmodes = ARRAY_SIZE(ov971x_mode);
1313
1314 /* no control yet */
1315 gspca_dev->ctrl_dis = (1 << NCTRLS) - 1;
1316
1317 gspca_dev->cam.bulk = 1;
1318 gspca_dev->cam.bulk_size = 16384;
1319 gspca_dev->cam.bulk_nurbs = 2;
1320
1321 sccb_w_array(gspca_dev, ov971x_init,
1322 ARRAY_SIZE(ov971x_init));
1323
1324 /* set video format on bridge processor */
1325 /* access bridge processor's video format registers at: 0x00 */
1326 reg_w(gspca_dev, 0x1c, 0x00);
1327 /*set register: 0x00 is 'RAW8', 0x40 is 'YUV422' (YUYV?)*/
1328 reg_w(gspca_dev, 0x1d, 0x00);
1329
1330 /* Will W. specific stuff
1331 * set VSYNC to
1332 * output (0x1f) if first webcam
1333 * input (0x17) if 2nd or 3rd webcam */
1334 p = video_device_node_name(&gspca_dev->vdev);
1335 l = strlen(p) - 1;
1336 if (p[l] == '0')
1337 reg_w(gspca_dev, 0x56, 0x1f);
1338 else
1339 reg_w(gspca_dev, 0x56, 0x17);
1340 } else if ((sensor_id & 0xfff0) == 0x5620) {
1341 sd->sensor = SENSOR_OV562x;
1342
1343 gspca_dev->cam.cam_mode = ov562x_mode;
1344 gspca_dev->cam.nmodes = ARRAY_SIZE(ov562x_mode);
1345
1346 reg_w_array(gspca_dev, ov562x_init,
1347 ARRAY_SIZE(ov562x_init));
1348 sccb_w_array(gspca_dev, ov562x_init_2,
1349 ARRAY_SIZE(ov562x_init_2));
1350 reg_w(gspca_dev, 0xe0, 0x00);
1351 } else {
1352 err("Unknown sensor %04x", sensor_id);
1353 return -EINVAL;
1354 }
1355
1356 return gspca_dev->usb_err;
1357 }
1358
1359 static int sd_start(struct gspca_dev *gspca_dev)
1360 {
1361 struct sd *sd = (struct sd *) gspca_dev;
1362
1363 if (sd->sensor == SENSOR_OV971x || sd->sensor == SENSOR_OV562x)
1364 return gspca_dev->usb_err;
1365 switch (gspca_dev->curr_mode) {
1366 case QVGA_MODE: /* 320x240 */
1367 sccb_w_array(gspca_dev, ov965x_start_1_vga,
1368 ARRAY_SIZE(ov965x_start_1_vga));
1369 reg_w_array(gspca_dev, bridge_start_qvga,
1370 ARRAY_SIZE(bridge_start_qvga));
1371 sccb_w_array(gspca_dev, ov965x_start_2_qvga,
1372 ARRAY_SIZE(ov965x_start_2_qvga));
1373 break;
1374 case VGA_MODE: /* 640x480 */
1375 sccb_w_array(gspca_dev, ov965x_start_1_vga,
1376 ARRAY_SIZE(ov965x_start_1_vga));
1377 reg_w_array(gspca_dev, bridge_start_vga,
1378 ARRAY_SIZE(bridge_start_vga));
1379 sccb_w_array(gspca_dev, ov965x_start_2_vga,
1380 ARRAY_SIZE(ov965x_start_2_vga));
1381 break;
1382 case SVGA_MODE: /* 800x600 */
1383 sccb_w_array(gspca_dev, ov965x_start_1_svga,
1384 ARRAY_SIZE(ov965x_start_1_svga));
1385 reg_w_array(gspca_dev, bridge_start_svga,
1386 ARRAY_SIZE(bridge_start_svga));
1387 sccb_w_array(gspca_dev, ov965x_start_2_svga,
1388 ARRAY_SIZE(ov965x_start_2_svga));
1389 break;
1390 case XGA_MODE: /* 1024x768 */
1391 sccb_w_array(gspca_dev, ov965x_start_1_xga,
1392 ARRAY_SIZE(ov965x_start_1_xga));
1393 reg_w_array(gspca_dev, bridge_start_xga,
1394 ARRAY_SIZE(bridge_start_xga));
1395 sccb_w_array(gspca_dev, ov965x_start_2_svga,
1396 ARRAY_SIZE(ov965x_start_2_svga));
1397 break;
1398 default:
1399 /* case SXGA_MODE: * 1280x1024 */
1400 sccb_w_array(gspca_dev, ov965x_start_1_sxga,
1401 ARRAY_SIZE(ov965x_start_1_sxga));
1402 reg_w_array(gspca_dev, bridge_start_sxga,
1403 ARRAY_SIZE(bridge_start_sxga));
1404 sccb_w_array(gspca_dev, ov965x_start_2_sxga,
1405 ARRAY_SIZE(ov965x_start_2_sxga));
1406 break;
1407 }
1408 setlightfreq(gspca_dev);
1409 setautogain(gspca_dev);
1410 setbrightness(gspca_dev);
1411 setcontrast(gspca_dev);
1412 setexposure(gspca_dev);
1413 setsharpness(gspca_dev);
1414 setsatur(gspca_dev);
1415
1416 reg_w(gspca_dev, 0xe0, 0x00);
1417 reg_w(gspca_dev, 0xe0, 0x00);
1418 set_led(gspca_dev, 1);
1419 return gspca_dev->usb_err;
1420 }
1421
1422 static void sd_stopN(struct gspca_dev *gspca_dev)
1423 {
1424 reg_w(gspca_dev, 0xe0, 0x01);
1425 set_led(gspca_dev, 0);
1426 reg_w(gspca_dev, 0xe0, 0x00);
1427 }
1428
1429 /* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */
1430 #define UVC_STREAM_EOH (1 << 7)
1431 #define UVC_STREAM_ERR (1 << 6)
1432 #define UVC_STREAM_STI (1 << 5)
1433 #define UVC_STREAM_RES (1 << 4)
1434 #define UVC_STREAM_SCR (1 << 3)
1435 #define UVC_STREAM_PTS (1 << 2)
1436 #define UVC_STREAM_EOF (1 << 1)
1437 #define UVC_STREAM_FID (1 << 0)
1438
1439 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1440 u8 *data, int len)
1441 {
1442 struct sd *sd = (struct sd *) gspca_dev;
1443 __u32 this_pts;
1444 u8 this_fid;
1445 int remaining_len = len;
1446 int payload_len;
1447
1448 payload_len = gspca_dev->cam.bulk ? 2048 : 2040;
1449 do {
1450 len = min(remaining_len, payload_len);
1451
1452 /* Payloads are prefixed with a UVC-style header. We
1453 consider a frame to start when the FID toggles, or the PTS
1454 changes. A frame ends when EOF is set, and we've received
1455 the correct number of bytes. */
1456
1457 /* Verify UVC header. Header length is always 12 */
1458 if (data[0] != 12 || len < 12) {
1459 PDEBUG(D_PACK, "bad header");
1460 goto discard;
1461 }
1462
1463 /* Check errors */
1464 if (data[1] & UVC_STREAM_ERR) {
1465 PDEBUG(D_PACK, "payload error");
1466 goto discard;
1467 }
1468
1469 /* Extract PTS and FID */
1470 if (!(data[1] & UVC_STREAM_PTS)) {
1471 PDEBUG(D_PACK, "PTS not present");
1472 goto discard;
1473 }
1474 this_pts = (data[5] << 24) | (data[4] << 16)
1475 | (data[3] << 8) | data[2];
1476 this_fid = data[1] & UVC_STREAM_FID;
1477
1478 /* If PTS or FID has changed, start a new frame. */
1479 if (this_pts != sd->last_pts || this_fid != sd->last_fid) {
1480 if (gspca_dev->last_packet_type == INTER_PACKET)
1481 gspca_frame_add(gspca_dev, LAST_PACKET,
1482 NULL, 0);
1483 sd->last_pts = this_pts;
1484 sd->last_fid = this_fid;
1485 gspca_frame_add(gspca_dev, FIRST_PACKET,
1486 data + 12, len - 12);
1487 /* If this packet is marked as EOF, end the frame */
1488 } else if (data[1] & UVC_STREAM_EOF) {
1489 sd->last_pts = 0;
1490 gspca_frame_add(gspca_dev, LAST_PACKET,
1491 data + 12, len - 12);
1492 } else {
1493
1494 /* Add the data from this payload */
1495 gspca_frame_add(gspca_dev, INTER_PACKET,
1496 data + 12, len - 12);
1497 }
1498
1499 /* Done this payload */
1500 goto scan_next;
1501
1502 discard:
1503 /* Discard data until a new frame starts. */
1504 gspca_dev->last_packet_type = DISCARD_PACKET;
1505
1506 scan_next:
1507 remaining_len -= len;
1508 data += len;
1509 } while (remaining_len > 0);
1510 }
1511
1512 static int sd_querymenu(struct gspca_dev *gspca_dev,
1513 struct v4l2_querymenu *menu)
1514 {
1515 switch (menu->id) {
1516 case V4L2_CID_POWER_LINE_FREQUENCY:
1517 switch (menu->index) {
1518 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
1519 strcpy((char *) menu->name, "NoFliker");
1520 return 0;
1521 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
1522 strcpy((char *) menu->name, "50 Hz");
1523 return 0;
1524 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
1525 strcpy((char *) menu->name, "60 Hz");
1526 return 0;
1527 }
1528 break;
1529 }
1530 return -EINVAL;
1531 }
1532
1533 /* sub-driver description */
1534 static const struct sd_desc sd_desc = {
1535 .name = MODULE_NAME,
1536 .ctrls = sd_ctrls,
1537 .nctrls = NCTRLS,
1538 .config = sd_config,
1539 .init = sd_init,
1540 .start = sd_start,
1541 .stopN = sd_stopN,
1542 .pkt_scan = sd_pkt_scan,
1543 .querymenu = sd_querymenu,
1544 };
1545
1546 /* -- module initialisation -- */
1547 static const struct usb_device_id device_table[] = {
1548 {USB_DEVICE(0x05a9, 0x8065)},
1549 {USB_DEVICE(0x06f8, 0x3003)},
1550 {USB_DEVICE(0x05a9, 0x1550)},
1551 {}
1552 };
1553
1554 MODULE_DEVICE_TABLE(usb, device_table);
1555
1556 /* -- device connect -- */
1557 static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id)
1558 {
1559 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
1560 THIS_MODULE);
1561 }
1562
1563 static struct usb_driver sd_driver = {
1564 .name = MODULE_NAME,
1565 .id_table = device_table,
1566 .probe = sd_probe,
1567 .disconnect = gspca_disconnect,
1568 #ifdef CONFIG_PM
1569 .suspend = gspca_suspend,
1570 .resume = gspca_resume,
1571 #endif
1572 };
1573
1574 module_usb_driver(sd_driver);