Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / media / video / gspca / se401.h
blob96d8ebf3cf595622d2547344b078586b63c3a19e
1 /*
2 * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver
4 * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com>
6 * Based on the v4l1 se401 driver which is:
8 * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org)
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #define SE401_REQ_GET_CAMERA_DESCRIPTOR 0x06
27 #define SE401_REQ_START_CONTINUOUS_CAPTURE 0x41
28 #define SE401_REQ_STOP_CONTINUOUS_CAPTURE 0x42
29 #define SE401_REQ_CAPTURE_FRAME 0x43
30 #define SE401_REQ_GET_BRT 0x44
31 #define SE401_REQ_SET_BRT 0x45
32 #define SE401_REQ_GET_WIDTH 0x4c
33 #define SE401_REQ_SET_WIDTH 0x4d
34 #define SE401_REQ_GET_HEIGHT 0x4e
35 #define SE401_REQ_SET_HEIGHT 0x4f
36 #define SE401_REQ_GET_OUTPUT_MODE 0x50
37 #define SE401_REQ_SET_OUTPUT_MODE 0x51
38 #define SE401_REQ_GET_EXT_FEATURE 0x52
39 #define SE401_REQ_SET_EXT_FEATURE 0x53
40 #define SE401_REQ_CAMERA_POWER 0x56
41 #define SE401_REQ_LED_CONTROL 0x57
42 #define SE401_REQ_BIOS 0xff
44 #define SE401_BIOS_READ 0x07
46 #define SE401_FORMAT_BAYER 0x40
48 /* Hyundai hv7131b registers
49 7121 and 7141 should be the same (haven't really checked...) */
50 /* Mode registers: */
51 #define HV7131_REG_MODE_A 0x00
52 #define HV7131_REG_MODE_B 0x01
53 #define HV7131_REG_MODE_C 0x02
54 /* Frame registers: */
55 #define HV7131_REG_FRSU 0x10
56 #define HV7131_REG_FRSL 0x11
57 #define HV7131_REG_FCSU 0x12
58 #define HV7131_REG_FCSL 0x13
59 #define HV7131_REG_FWHU 0x14
60 #define HV7131_REG_FWHL 0x15
61 #define HV7131_REG_FWWU 0x16
62 #define HV7131_REG_FWWL 0x17
63 /* Timing registers: */
64 #define HV7131_REG_THBU 0x20
65 #define HV7131_REG_THBL 0x21
66 #define HV7131_REG_TVBU 0x22
67 #define HV7131_REG_TVBL 0x23
68 #define HV7131_REG_TITU 0x25
69 #define HV7131_REG_TITM 0x26
70 #define HV7131_REG_TITL 0x27
71 #define HV7131_REG_TMCD 0x28
72 /* Adjust Registers: */
73 #define HV7131_REG_ARLV 0x30
74 #define HV7131_REG_ARCG 0x31
75 #define HV7131_REG_AGCG 0x32
76 #define HV7131_REG_ABCG 0x33
77 #define HV7131_REG_APBV 0x34
78 #define HV7131_REG_ASLP 0x54
79 /* Offset Registers: */
80 #define HV7131_REG_OFSR 0x50
81 #define HV7131_REG_OFSG 0x51
82 #define HV7131_REG_OFSB 0x52
83 /* REset level statistics registers: */
84 #define HV7131_REG_LOREFNOH 0x57
85 #define HV7131_REG_LOREFNOL 0x58
86 #define HV7131_REG_HIREFNOH 0x59
87 #define HV7131_REG_HIREFNOL 0x5a
89 /* se401 registers */
90 #define SE401_OPERATINGMODE 0x2000