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Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / media / video / omap3isp / isp.c
blob12d5f923e1d0fbf01ff18c08ce904cea53ab3fc4
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55 #include <asm/cacheflush.h>
56
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
69
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
72
73 #include "isp.h"
74 #include "ispreg.h"
75 #include "ispccdc.h"
76 #include "isppreview.h"
77 #include "ispresizer.h"
78 #include "ispcsi2.h"
79 #include "ispccp2.h"
80 #include "isph3a.h"
81 #include "isphist.h"
82
83 static unsigned int autoidle;
84 module_param(autoidle, int, 0444);
85 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87 static void isp_save_ctx(struct isp_device *isp);
88
89 static void isp_restore_ctx(struct isp_device *isp);
90
91 static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122 };
123
124 /* Structure for saving/restoring ISP module registers */
125 static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130 };
131
132 /*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142 void omap3isp_flush(struct isp_device *isp)
143 {
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146 }
147
148 /*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152 static void isp_enable_interrupts(struct isp_device *isp)
153 {
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169 }
170
171 /*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175 static void isp_disable_interrupts(struct isp_device *isp)
176 {
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178 }
179
180 /**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194 {
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
218 case ISP_XCLK_A:
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
225 case ISP_XCLK_B:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
232 case ISP_XCLK_NONE:
233 default:
234 omap3isp_put(isp);
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
237 return -EINVAL;
238 }
239
240 /* Do we go from stable whatever to clock? */
241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
242 omap3isp_get(isp);
243 /* Stopping the clock. */
244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
245 omap3isp_put(isp);
246
247 isp->xclk_divisor[xclksel - 1] = divisor;
248
249 omap3isp_put(isp);
250
251 return currentxclk;
252 }
253
254 /*
255 * isp_power_settings - Sysconfig settings, for Power Management.
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
258 *
259 * Sets the power settings for the ISP, and SBL bus.
260 */
261 static void isp_power_settings(struct isp_device *isp, int idle)
262 {
263 isp_reg_writel(isp,
264 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
265 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
266 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
267 ((isp->revision == ISP_REVISION_15_0) ?
268 ISP_SYSCONFIG_AUTOIDLE : 0),
269 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
270
271 if (isp->autoidle)
272 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
273 ISP_CTRL);
274 }
275
276 /*
277 * Configure the bridge and lane shifter. Valid inputs are
278 *
279 * CCDC_INPUT_PARALLEL: Parallel interface
280 * CCDC_INPUT_CSI2A: CSI2a receiver
281 * CCDC_INPUT_CCP2B: CCP2b receiver
282 * CCDC_INPUT_CSI2C: CSI2c receiver
283 *
284 * The bridge and lane shifter are configured according to the selected input
285 * and the ISP platform data.
286 */
287 void omap3isp_configure_bridge(struct isp_device *isp,
288 enum ccdc_input_entity input,
289 const struct isp_parallel_platform_data *pdata,
290 unsigned int shift)
291 {
292 u32 ispctrl_val;
293
294 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
295 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
297 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
299
300 switch (input) {
301 case CCDC_INPUT_PARALLEL:
302 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
303 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
304 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
305 shift += pdata->data_lane_shift * 2;
306 break;
307
308 case CCDC_INPUT_CSI2A:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
310 break;
311
312 case CCDC_INPUT_CCP2B:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
314 break;
315
316 case CCDC_INPUT_CSI2C:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
318 break;
319
320 default:
321 return;
322 }
323
324 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
325
326 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
327 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
328
329 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
330 }
331
332 /**
333 * isp_set_pixel_clock - Configures the ISP pixel clock
334 * @isp: OMAP3 ISP device
335 * @pixelclk: Average pixel clock in Hz
336 *
337 * Set the average pixel clock required by the sensor. The ISP will use the
338 * lowest possible memory bandwidth settings compatible with the clock.
339 **/
340 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
341 {
342 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
343 }
344
345 void omap3isp_hist_dma_done(struct isp_device *isp)
346 {
347 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
348 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
349 /* Histogram cannot be enabled in this frame anymore */
350 atomic_set(&isp->isp_hist.buf_err, 1);
351 dev_dbg(isp->dev, "hist: Out of synchronization with "
352 "CCDC. Ignoring next buffer.\n");
353 }
354 }
355
356 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
357 {
358 static const char *name[] = {
359 "CSIA_IRQ",
360 "res1",
361 "res2",
362 "CSIB_LCM_IRQ",
363 "CSIB_IRQ",
364 "res5",
365 "res6",
366 "res7",
367 "CCDC_VD0_IRQ",
368 "CCDC_VD1_IRQ",
369 "CCDC_VD2_IRQ",
370 "CCDC_ERR_IRQ",
371 "H3A_AF_DONE_IRQ",
372 "H3A_AWB_DONE_IRQ",
373 "res14",
374 "res15",
375 "HIST_DONE_IRQ",
376 "CCDC_LSC_DONE",
377 "CCDC_LSC_PREFETCH_COMPLETED",
378 "CCDC_LSC_PREFETCH_ERROR",
379 "PRV_DONE_IRQ",
380 "CBUFF_IRQ",
381 "res22",
382 "res23",
383 "RSZ_DONE_IRQ",
384 "OVF_IRQ",
385 "res26",
386 "res27",
387 "MMU_ERR_IRQ",
388 "OCP_ERR_IRQ",
389 "SEC_ERR_IRQ",
390 "HS_VS_IRQ",
391 };
392 int i;
393
394 dev_dbg(isp->dev, "ISP IRQ: ");
395
396 for (i = 0; i < ARRAY_SIZE(name); i++) {
397 if ((1 << i) & irqstatus)
398 printk(KERN_CONT "%s ", name[i]);
399 }
400 printk(KERN_CONT "\n");
401 }
402
403 static void isp_isr_sbl(struct isp_device *isp)
404 {
405 struct device *dev = isp->dev;
406 struct isp_pipeline *pipe;
407 u32 sbl_pcr;
408
409 /*
410 * Handle shared buffer logic overflows for video buffers.
411 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
412 */
413 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
414 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
415 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
416
417 if (sbl_pcr)
418 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
419
420 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
422 if (pipe != NULL)
423 pipe->error = true;
424 }
425
426 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
428 if (pipe != NULL)
429 pipe->error = true;
430 }
431
432 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
434 if (pipe != NULL)
435 pipe->error = true;
436 }
437
438 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
439 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
440 if (pipe != NULL)
441 pipe->error = true;
442 }
443
444 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
445 | ISPSBL_PCR_RSZ2_WBL_OVF
446 | ISPSBL_PCR_RSZ3_WBL_OVF
447 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
448 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
449 if (pipe != NULL)
450 pipe->error = true;
451 }
452
453 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
454 omap3isp_stat_sbl_overflow(&isp->isp_af);
455
456 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
457 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
458 }
459
460 /*
461 * isp_isr - Interrupt Service Routine for Camera ISP module.
462 * @irq: Not used currently.
463 * @_isp: Pointer to the OMAP3 ISP device
464 *
465 * Handles the corresponding callback if plugged in.
466 *
467 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
468 * IRQ wasn't handled.
469 */
470 static irqreturn_t isp_isr(int irq, void *_isp)
471 {
472 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
473 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
474 IRQ0STATUS_CCDC_VD0_IRQ |
475 IRQ0STATUS_CCDC_VD1_IRQ |
476 IRQ0STATUS_HS_VS_IRQ;
477 struct isp_device *isp = _isp;
478 u32 irqstatus;
479
480 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
481 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
482
483 isp_isr_sbl(isp);
484
485 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
486 omap3isp_csi2_isr(&isp->isp_csi2a);
487
488 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
489 omap3isp_ccp2_isr(&isp->isp_ccp2);
490
491 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
492 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
493 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
495 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
496 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
497 omap3isp_stat_isr_frame_sync(&isp->isp_af);
498 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
499 }
500
501 if (irqstatus & ccdc_events)
502 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
503
504 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
505 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
506 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
507 omap3isp_preview_isr(&isp->isp_prev);
508 }
509
510 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
511 omap3isp_resizer_isr(&isp->isp_res);
512
513 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_aewb);
515
516 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
517 omap3isp_stat_isr(&isp->isp_af);
518
519 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
520 omap3isp_stat_isr(&isp->isp_hist);
521
522 omap3isp_flush(isp);
523
524 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
525 isp_isr_dbg(isp, irqstatus);
526 #endif
527
528 return IRQ_HANDLED;
529 }
530
531 /* -----------------------------------------------------------------------------
532 * Pipeline power management
533 *
534 * Entities must be powered up when part of a pipeline that contains at least
535 * one open video device node.
536 *
537 * To achieve this use the entity use_count field to track the number of users.
538 * For entities corresponding to video device nodes the use_count field stores
539 * the users count of the node. For entities corresponding to subdevs the
540 * use_count field stores the total number of users of all video device nodes
541 * in the pipeline.
542 *
543 * The omap3isp_pipeline_pm_use() function must be called in the open() and
544 * close() handlers of video device nodes. It increments or decrements the use
545 * count of all subdev entities in the pipeline.
546 *
547 * To react to link management on powered pipelines, the link setup notification
548 * callback updates the use count of all entities in the source and sink sides
549 * of the link.
550 */
551
552 /*
553 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
554 * @entity: The entity
555 *
556 * Return the total number of users of all video device nodes in the pipeline.
557 */
558 static int isp_pipeline_pm_use_count(struct media_entity *entity)
559 {
560 struct media_entity_graph graph;
561 int use = 0;
562
563 media_entity_graph_walk_start(&graph, entity);
564
565 while ((entity = media_entity_graph_walk_next(&graph))) {
566 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
567 use += entity->use_count;
568 }
569
570 return use;
571 }
572
573 /*
574 * isp_pipeline_pm_power_one - Apply power change to an entity
575 * @entity: The entity
576 * @change: Use count change
577 *
578 * Change the entity use count by @change. If the entity is a subdev update its
579 * power state by calling the core::s_power operation when the use count goes
580 * from 0 to != 0 or from != 0 to 0.
581 *
582 * Return 0 on success or a negative error code on failure.
583 */
584 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
585 {
586 struct v4l2_subdev *subdev;
587 int ret;
588
589 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
590 ? media_entity_to_v4l2_subdev(entity) : NULL;
591
592 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
593 ret = v4l2_subdev_call(subdev, core, s_power, 1);
594 if (ret < 0 && ret != -ENOIOCTLCMD)
595 return ret;
596 }
597
598 entity->use_count += change;
599 WARN_ON(entity->use_count < 0);
600
601 if (entity->use_count == 0 && change < 0 && subdev != NULL)
602 v4l2_subdev_call(subdev, core, s_power, 0);
603
604 return 0;
605 }
606
607 /*
608 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
609 * @entity: The entity
610 * @change: Use count change
611 *
612 * Walk the pipeline to update the use count and the power state of all non-node
613 * entities.
614 *
615 * Return 0 on success or a negative error code on failure.
616 */
617 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
618 {
619 struct media_entity_graph graph;
620 struct media_entity *first = entity;
621 int ret = 0;
622
623 if (!change)
624 return 0;
625
626 media_entity_graph_walk_start(&graph, entity);
627
628 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
629 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
630 ret = isp_pipeline_pm_power_one(entity, change);
631
632 if (!ret)
633 return 0;
634
635 media_entity_graph_walk_start(&graph, first);
636
637 while ((first = media_entity_graph_walk_next(&graph))
638 && first != entity)
639 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
640 isp_pipeline_pm_power_one(first, -change);
641
642 return ret;
643 }
644
645 /*
646 * omap3isp_pipeline_pm_use - Update the use count of an entity
647 * @entity: The entity
648 * @use: Use (1) or stop using (0) the entity
649 *
650 * Update the use count of all entities in the pipeline and power entities on or
651 * off accordingly.
652 *
653 * Return 0 on success or a negative error code on failure. Powering entities
654 * off is assumed to never fail. No failure can occur when the use parameter is
655 * set to 0.
656 */
657 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
658 {
659 int change = use ? 1 : -1;
660 int ret;
661
662 mutex_lock(&entity->parent->graph_mutex);
663
664 /* Apply use count to node. */
665 entity->use_count += change;
666 WARN_ON(entity->use_count < 0);
667
668 /* Apply power change to connected non-nodes. */
669 ret = isp_pipeline_pm_power(entity, change);
670 if (ret < 0)
671 entity->use_count -= change;
672
673 mutex_unlock(&entity->parent->graph_mutex);
674
675 return ret;
676 }
677
678 /*
679 * isp_pipeline_link_notify - Link management notification callback
680 * @source: Pad at the start of the link
681 * @sink: Pad at the end of the link
682 * @flags: New link flags that will be applied
683 *
684 * React to link management on powered pipelines by updating the use count of
685 * all entities in the source and sink sides of the link. Entities are powered
686 * on or off accordingly.
687 *
688 * Return 0 on success or a negative error code on failure. Powering entities
689 * off is assumed to never fail. This function will not fail for disconnection
690 * events.
691 */
692 static int isp_pipeline_link_notify(struct media_pad *source,
693 struct media_pad *sink, u32 flags)
694 {
695 int source_use = isp_pipeline_pm_use_count(source->entity);
696 int sink_use = isp_pipeline_pm_use_count(sink->entity);
697 int ret;
698
699 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
700 /* Powering off entities is assumed to never fail. */
701 isp_pipeline_pm_power(source->entity, -sink_use);
702 isp_pipeline_pm_power(sink->entity, -source_use);
703 return 0;
704 }
705
706 ret = isp_pipeline_pm_power(source->entity, sink_use);
707 if (ret < 0)
708 return ret;
709
710 ret = isp_pipeline_pm_power(sink->entity, source_use);
711 if (ret < 0)
712 isp_pipeline_pm_power(source->entity, -sink_use);
713
714 return ret;
715 }
716
717 /* -----------------------------------------------------------------------------
718 * Pipeline stream management
719 */
720
721 /*
722 * isp_pipeline_enable - Enable streaming on a pipeline
723 * @pipe: ISP pipeline
724 * @mode: Stream mode (single shot or continuous)
725 *
726 * Walk the entities chain starting at the pipeline output video node and start
727 * all modules in the chain in the given mode.
728 *
729 * Return 0 if successful, or the return value of the failed video::s_stream
730 * operation otherwise.
731 */
732 static int isp_pipeline_enable(struct isp_pipeline *pipe,
733 enum isp_pipeline_stream_state mode)
734 {
735 struct isp_device *isp = pipe->output->isp;
736 struct media_entity *entity;
737 struct media_pad *pad;
738 struct v4l2_subdev *subdev;
739 unsigned long flags;
740 int ret;
741
742 spin_lock_irqsave(&pipe->lock, flags);
743 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
744 spin_unlock_irqrestore(&pipe->lock, flags);
745
746 pipe->do_propagation = false;
747
748 entity = &pipe->output->video.entity;
749 while (1) {
750 pad = &entity->pads[0];
751 if (!(pad->flags & MEDIA_PAD_FL_SINK))
752 break;
753
754 pad = media_entity_remote_source(pad);
755 if (pad == NULL ||
756 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
757 break;
758
759 entity = pad->entity;
760 subdev = media_entity_to_v4l2_subdev(entity);
761
762 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
763 if (ret < 0 && ret != -ENOIOCTLCMD)
764 return ret;
765
766 if (subdev == &isp->isp_ccdc.subdev) {
767 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
768 s_stream, mode);
769 v4l2_subdev_call(&isp->isp_af.subdev, video,
770 s_stream, mode);
771 v4l2_subdev_call(&isp->isp_hist.subdev, video,
772 s_stream, mode);
773 pipe->do_propagation = true;
774 }
775 }
776
777 /* Frame number propagation. In continuous streaming mode the number
778 * is incremented in the frame start ISR. In mem-to-mem mode
779 * singleshot is used and frame start IRQs are not available.
780 * Thus we have to increment the number here.
781 */
782 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
783 atomic_inc(&pipe->frame_number);
784
785 return 0;
786 }
787
788 static int isp_pipeline_wait_resizer(struct isp_device *isp)
789 {
790 return omap3isp_resizer_busy(&isp->isp_res);
791 }
792
793 static int isp_pipeline_wait_preview(struct isp_device *isp)
794 {
795 return omap3isp_preview_busy(&isp->isp_prev);
796 }
797
798 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
799 {
800 return omap3isp_stat_busy(&isp->isp_af)
801 || omap3isp_stat_busy(&isp->isp_aewb)
802 || omap3isp_stat_busy(&isp->isp_hist)
803 || omap3isp_ccdc_busy(&isp->isp_ccdc);
804 }
805
806 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
807
808 static int isp_pipeline_wait(struct isp_device *isp,
809 int(*busy)(struct isp_device *isp))
810 {
811 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
812
813 while (!time_after(jiffies, timeout)) {
814 if (!busy(isp))
815 return 0;
816 }
817
818 return 1;
819 }
820
821 /*
822 * isp_pipeline_disable - Disable streaming on a pipeline
823 * @pipe: ISP pipeline
824 *
825 * Walk the entities chain starting at the pipeline output video node and stop
826 * all modules in the chain. Wait synchronously for the modules to be stopped if
827 * necessary.
828 *
829 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
830 * can't be stopped (in which case a software reset of the ISP is probably
831 * necessary).
832 */
833 static int isp_pipeline_disable(struct isp_pipeline *pipe)
834 {
835 struct isp_device *isp = pipe->output->isp;
836 struct media_entity *entity;
837 struct media_pad *pad;
838 struct v4l2_subdev *subdev;
839 int failure = 0;
840 int ret;
841
842 /*
843 * We need to stop all the modules after CCDC first or they'll
844 * never stop since they may not get a full frame from CCDC.
845 */
846 entity = &pipe->output->video.entity;
847 while (1) {
848 pad = &entity->pads[0];
849 if (!(pad->flags & MEDIA_PAD_FL_SINK))
850 break;
851
852 pad = media_entity_remote_source(pad);
853 if (pad == NULL ||
854 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
855 break;
856
857 entity = pad->entity;
858 subdev = media_entity_to_v4l2_subdev(entity);
859
860 if (subdev == &isp->isp_ccdc.subdev) {
861 v4l2_subdev_call(&isp->isp_aewb.subdev,
862 video, s_stream, 0);
863 v4l2_subdev_call(&isp->isp_af.subdev,
864 video, s_stream, 0);
865 v4l2_subdev_call(&isp->isp_hist.subdev,
866 video, s_stream, 0);
867 }
868
869 v4l2_subdev_call(subdev, video, s_stream, 0);
870
871 if (subdev == &isp->isp_res.subdev)
872 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
873 else if (subdev == &isp->isp_prev.subdev)
874 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
875 else if (subdev == &isp->isp_ccdc.subdev)
876 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
877 else
878 ret = 0;
879
880 if (ret) {
881 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
882 failure = -ETIMEDOUT;
883 }
884 }
885
886 if (failure < 0)
887 isp->needs_reset = true;
888
889 return failure;
890 }
891
892 /*
893 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
894 * @pipe: ISP pipeline
895 * @state: Stream state (stopped, single shot or continuous)
896 *
897 * Set the pipeline to the given stream state. Pipelines can be started in
898 * single-shot or continuous mode.
899 *
900 * Return 0 if successful, or the return value of the failed video::s_stream
901 * operation otherwise. The pipeline state is not updated when the operation
902 * fails, except when stopping the pipeline.
903 */
904 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
905 enum isp_pipeline_stream_state state)
906 {
907 int ret;
908
909 if (state == ISP_PIPELINE_STREAM_STOPPED)
910 ret = isp_pipeline_disable(pipe);
911 else
912 ret = isp_pipeline_enable(pipe, state);
913
914 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
915 pipe->stream_state = state;
916
917 return ret;
918 }
919
920 /*
921 * isp_pipeline_resume - Resume streaming on a pipeline
922 * @pipe: ISP pipeline
923 *
924 * Resume video output and input and re-enable pipeline.
925 */
926 static void isp_pipeline_resume(struct isp_pipeline *pipe)
927 {
928 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
929
930 omap3isp_video_resume(pipe->output, !singleshot);
931 if (singleshot)
932 omap3isp_video_resume(pipe->input, 0);
933 isp_pipeline_enable(pipe, pipe->stream_state);
934 }
935
936 /*
937 * isp_pipeline_suspend - Suspend streaming on a pipeline
938 * @pipe: ISP pipeline
939 *
940 * Suspend pipeline.
941 */
942 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
943 {
944 isp_pipeline_disable(pipe);
945 }
946
947 /*
948 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
949 * video node
950 * @me: ISP module's media entity
951 *
952 * Returns 1 if the entity has an enabled link to the output video node or 0
953 * otherwise. It's true only while pipeline can have no more than one output
954 * node.
955 */
956 static int isp_pipeline_is_last(struct media_entity *me)
957 {
958 struct isp_pipeline *pipe;
959 struct media_pad *pad;
960
961 if (!me->pipe)
962 return 0;
963 pipe = to_isp_pipeline(me);
964 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
965 return 0;
966 pad = media_entity_remote_source(&pipe->output->pad);
967 return pad->entity == me;
968 }
969
970 /*
971 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
972 * @me: ISP module's media entity
973 *
974 * Suspend the whole pipeline if module's entity has an enabled link to the
975 * output video node. It works only while pipeline can have no more than one
976 * output node.
977 */
978 static void isp_suspend_module_pipeline(struct media_entity *me)
979 {
980 if (isp_pipeline_is_last(me))
981 isp_pipeline_suspend(to_isp_pipeline(me));
982 }
983
984 /*
985 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
986 * @me: ISP module's media entity
987 *
988 * Resume the whole pipeline if module's entity has an enabled link to the
989 * output video node. It works only while pipeline can have no more than one
990 * output node.
991 */
992 static void isp_resume_module_pipeline(struct media_entity *me)
993 {
994 if (isp_pipeline_is_last(me))
995 isp_pipeline_resume(to_isp_pipeline(me));
996 }
997
998 /*
999 * isp_suspend_modules - Suspend ISP submodules.
1000 * @isp: OMAP3 ISP device
1001 *
1002 * Returns 0 if suspend left in idle state all the submodules properly,
1003 * or returns 1 if a general Reset is required to suspend the submodules.
1004 */
1005 static int isp_suspend_modules(struct isp_device *isp)
1006 {
1007 unsigned long timeout;
1008
1009 omap3isp_stat_suspend(&isp->isp_aewb);
1010 omap3isp_stat_suspend(&isp->isp_af);
1011 omap3isp_stat_suspend(&isp->isp_hist);
1012 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1014 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1016 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1017
1018 timeout = jiffies + ISP_STOP_TIMEOUT;
1019 while (omap3isp_stat_busy(&isp->isp_af)
1020 || omap3isp_stat_busy(&isp->isp_aewb)
1021 || omap3isp_stat_busy(&isp->isp_hist)
1022 || omap3isp_preview_busy(&isp->isp_prev)
1023 || omap3isp_resizer_busy(&isp->isp_res)
1024 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1025 if (time_after(jiffies, timeout)) {
1026 dev_info(isp->dev, "can't stop modules.\n");
1027 return 1;
1028 }
1029 msleep(1);
1030 }
1031
1032 return 0;
1033 }
1034
1035 /*
1036 * isp_resume_modules - Resume ISP submodules.
1037 * @isp: OMAP3 ISP device
1038 */
1039 static void isp_resume_modules(struct isp_device *isp)
1040 {
1041 omap3isp_stat_resume(&isp->isp_aewb);
1042 omap3isp_stat_resume(&isp->isp_af);
1043 omap3isp_stat_resume(&isp->isp_hist);
1044 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1046 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1048 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1049 }
1050
1051 /*
1052 * isp_reset - Reset ISP with a timeout wait for idle.
1053 * @isp: OMAP3 ISP device
1054 */
1055 static int isp_reset(struct isp_device *isp)
1056 {
1057 unsigned long timeout = 0;
1058
1059 isp_reg_writel(isp,
1060 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1061 | ISP_SYSCONFIG_SOFTRESET,
1062 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1063 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1064 ISP_SYSSTATUS) & 0x1)) {
1065 if (timeout++ > 10000) {
1066 dev_alert(isp->dev, "cannot reset ISP\n");
1067 return -ETIMEDOUT;
1068 }
1069 udelay(1);
1070 }
1071
1072 return 0;
1073 }
1074
1075 /*
1076 * isp_save_context - Saves the values of the ISP module registers.
1077 * @isp: OMAP3 ISP device
1078 * @reg_list: Structure containing pairs of register address and value to
1079 * modify on OMAP.
1080 */
1081 static void
1082 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1083 {
1084 struct isp_reg *next = reg_list;
1085
1086 for (; next->reg != ISP_TOK_TERM; next++)
1087 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1088 }
1089
1090 /*
1091 * isp_restore_context - Restores the values of the ISP module registers.
1092 * @isp: OMAP3 ISP device
1093 * @reg_list: Structure containing pairs of register address and value to
1094 * modify on OMAP.
1095 */
1096 static void
1097 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1098 {
1099 struct isp_reg *next = reg_list;
1100
1101 for (; next->reg != ISP_TOK_TERM; next++)
1102 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1103 }
1104
1105 /*
1106 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1107 * @isp: OMAP3 ISP device
1108 *
1109 * Routine for saving the context of each module in the ISP.
1110 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1111 */
1112 static void isp_save_ctx(struct isp_device *isp)
1113 {
1114 isp_save_context(isp, isp_reg_list);
1115 omap_iommu_save_ctx(isp->dev);
1116 }
1117
1118 /*
1119 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1120 * @isp: OMAP3 ISP device
1121 *
1122 * Routine for restoring the context of each module in the ISP.
1123 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1124 */
1125 static void isp_restore_ctx(struct isp_device *isp)
1126 {
1127 isp_restore_context(isp, isp_reg_list);
1128 omap_iommu_restore_ctx(isp->dev);
1129 omap3isp_ccdc_restore_context(isp);
1130 omap3isp_preview_restore_context(isp);
1131 }
1132
1133 /* -----------------------------------------------------------------------------
1134 * SBL resources management
1135 */
1136 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1137 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1138 OMAP3_ISP_SBL_PREVIEW_READ | \
1139 OMAP3_ISP_SBL_RESIZER_READ)
1140 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1141 OMAP3_ISP_SBL_CSI2A_WRITE | \
1142 OMAP3_ISP_SBL_CSI2C_WRITE | \
1143 OMAP3_ISP_SBL_CCDC_WRITE | \
1144 OMAP3_ISP_SBL_PREVIEW_WRITE)
1145
1146 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1147 {
1148 u32 sbl = 0;
1149
1150 isp->sbl_resources |= res;
1151
1152 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1153 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1154
1155 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1156 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1157
1158 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1159 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1160
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1162 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1163
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1165 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1166
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1168 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1169
1170 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1171 }
1172
1173 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1174 {
1175 u32 sbl = 0;
1176
1177 isp->sbl_resources &= ~res;
1178
1179 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1180 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1181
1182 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1183 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1184
1185 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1186 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1187
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1189 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1190
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1192 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1193
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1195 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1196
1197 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1198 }
1199
1200 /*
1201 * isp_module_sync_idle - Helper to sync module with its idle state
1202 * @me: ISP submodule's media entity
1203 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1204 * @stopping: flag which tells module wants to stop
1205 *
1206 * This function checks if ISP submodule needs to wait for next interrupt. If
1207 * yes, makes the caller to sleep while waiting for such event.
1208 */
1209 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1210 atomic_t *stopping)
1211 {
1212 struct isp_pipeline *pipe = to_isp_pipeline(me);
1213
1214 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1215 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1216 !isp_pipeline_ready(pipe)))
1217 return 0;
1218
1219 /*
1220 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1221 * scenario. We'll call it here to avoid race conditions.
1222 */
1223 atomic_set(stopping, 1);
1224 smp_mb();
1225
1226 /*
1227 * If module is the last one, it's writing to memory. In this case,
1228 * it's necessary to check if the module is already paused due to
1229 * DMA queue underrun or if it has to wait for next interrupt to be
1230 * idle.
1231 * If it isn't the last one, the function won't sleep but *stopping
1232 * will still be set to warn next submodule caller's interrupt the
1233 * module wants to be idle.
1234 */
1235 if (isp_pipeline_is_last(me)) {
1236 struct isp_video *video = pipe->output;
1237 unsigned long flags;
1238 spin_lock_irqsave(&video->queue->irqlock, flags);
1239 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1240 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1241 atomic_set(stopping, 0);
1242 smp_mb();
1243 return 0;
1244 }
1245 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1246 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1247 msecs_to_jiffies(1000))) {
1248 atomic_set(stopping, 0);
1249 smp_mb();
1250 return -ETIMEDOUT;
1251 }
1252 }
1253
1254 return 0;
1255 }
1256
1257 /*
1258 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1259 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1260 * @stopping: flag which tells module wants to stop
1261 *
1262 * This function checks if ISP submodule was stopping. In case of yes, it
1263 * notices the caller by setting stopping to 0 and waking up the wait queue.
1264 * Returns 1 if it was stopping or 0 otherwise.
1265 */
1266 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1267 atomic_t *stopping)
1268 {
1269 if (atomic_cmpxchg(stopping, 1, 0)) {
1270 wake_up(wait);
1271 return 1;
1272 }
1273
1274 return 0;
1275 }
1276
1277 /* --------------------------------------------------------------------------
1278 * Clock management
1279 */
1280
1281 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1282 ISPCTRL_HIST_CLK_EN | \
1283 ISPCTRL_RSZ_CLK_EN | \
1284 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1285 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1286
1287 static void __isp_subclk_update(struct isp_device *isp)
1288 {
1289 u32 clk = 0;
1290
1291 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1292 clk |= ISPCTRL_H3A_CLK_EN;
1293
1294 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1295 clk |= ISPCTRL_HIST_CLK_EN;
1296
1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1298 clk |= ISPCTRL_RSZ_CLK_EN;
1299
1300 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1301 * RAM as well.
1302 */
1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1304 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1305
1306 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1307 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1308
1309 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1310 ISPCTRL_CLKS_MASK, clk);
1311 }
1312
1313 void omap3isp_subclk_enable(struct isp_device *isp,
1314 enum isp_subclk_resource res)
1315 {
1316 isp->subclk_resources |= res;
1317
1318 __isp_subclk_update(isp);
1319 }
1320
1321 void omap3isp_subclk_disable(struct isp_device *isp,
1322 enum isp_subclk_resource res)
1323 {
1324 isp->subclk_resources &= ~res;
1325
1326 __isp_subclk_update(isp);
1327 }
1328
1329 /*
1330 * isp_enable_clocks - Enable ISP clocks
1331 * @isp: OMAP3 ISP device
1332 *
1333 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1334 */
1335 static int isp_enable_clocks(struct isp_device *isp)
1336 {
1337 int r;
1338 unsigned long rate;
1339 int divisor;
1340
1341 /*
1342 * cam_mclk clock chain:
1343 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1344 *
1345 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1346 * set to the same value. Hence the rate set for dpll4_m5
1347 * has to be twice of what is set on OMAP3430 to get
1348 * the required value for cam_mclk
1349 */
1350 if (cpu_is_omap3630())
1351 divisor = 1;
1352 else
1353 divisor = 2;
1354
1355 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1356 if (r) {
1357 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1358 goto out_clk_enable_ick;
1359 }
1360 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1361 CM_CAM_MCLK_HZ/divisor);
1362 if (r) {
1363 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1364 goto out_clk_enable_mclk;
1365 }
1366 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1367 if (r) {
1368 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1369 goto out_clk_enable_mclk;
1370 }
1371 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1372 if (rate != CM_CAM_MCLK_HZ)
1373 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1374 " expected : %d\n"
1375 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1376 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1377 if (r) {
1378 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1379 goto out_clk_enable_csi2_fclk;
1380 }
1381 return 0;
1382
1383 out_clk_enable_csi2_fclk:
1384 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1385 out_clk_enable_mclk:
1386 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1387 out_clk_enable_ick:
1388 return r;
1389 }
1390
1391 /*
1392 * isp_disable_clocks - Disable ISP clocks
1393 * @isp: OMAP3 ISP device
1394 */
1395 static void isp_disable_clocks(struct isp_device *isp)
1396 {
1397 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1398 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1399 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1400 }
1401
1402 static const char *isp_clocks[] = {
1403 "cam_ick",
1404 "cam_mclk",
1405 "dpll4_m5_ck",
1406 "csi2_96m_fck",
1407 "l3_ick",
1408 };
1409
1410 static void isp_put_clocks(struct isp_device *isp)
1411 {
1412 unsigned int i;
1413
1414 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1415 if (isp->clock[i]) {
1416 clk_put(isp->clock[i]);
1417 isp->clock[i] = NULL;
1418 }
1419 }
1420 }
1421
1422 static int isp_get_clocks(struct isp_device *isp)
1423 {
1424 struct clk *clk;
1425 unsigned int i;
1426
1427 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1428 clk = clk_get(isp->dev, isp_clocks[i]);
1429 if (IS_ERR(clk)) {
1430 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1431 isp_put_clocks(isp);
1432 return PTR_ERR(clk);
1433 }
1434
1435 isp->clock[i] = clk;
1436 }
1437
1438 return 0;
1439 }
1440
1441 /*
1442 * omap3isp_get - Acquire the ISP resource.
1443 *
1444 * Initializes the clocks for the first acquire.
1445 *
1446 * Increment the reference count on the ISP. If the first reference is taken,
1447 * enable clocks and power-up all submodules.
1448 *
1449 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1450 */
1451 struct isp_device *omap3isp_get(struct isp_device *isp)
1452 {
1453 struct isp_device *__isp = isp;
1454
1455 if (isp == NULL)
1456 return NULL;
1457
1458 mutex_lock(&isp->isp_mutex);
1459 if (isp->ref_count > 0)
1460 goto out;
1461
1462 if (isp_enable_clocks(isp) < 0) {
1463 __isp = NULL;
1464 goto out;
1465 }
1466
1467 /* We don't want to restore context before saving it! */
1468 if (isp->has_context)
1469 isp_restore_ctx(isp);
1470 else
1471 isp->has_context = 1;
1472
1473 isp_enable_interrupts(isp);
1474
1475 out:
1476 if (__isp != NULL)
1477 isp->ref_count++;
1478 mutex_unlock(&isp->isp_mutex);
1479
1480 return __isp;
1481 }
1482
1483 /*
1484 * omap3isp_put - Release the ISP
1485 *
1486 * Decrement the reference count on the ISP. If the last reference is released,
1487 * power-down all submodules, disable clocks and free temporary buffers.
1488 */
1489 void omap3isp_put(struct isp_device *isp)
1490 {
1491 if (isp == NULL)
1492 return;
1493
1494 mutex_lock(&isp->isp_mutex);
1495 BUG_ON(isp->ref_count == 0);
1496 if (--isp->ref_count == 0) {
1497 isp_disable_interrupts(isp);
1498 isp_save_ctx(isp);
1499 if (isp->needs_reset) {
1500 isp_reset(isp);
1501 isp->needs_reset = false;
1502 }
1503 isp_disable_clocks(isp);
1504 }
1505 mutex_unlock(&isp->isp_mutex);
1506 }
1507
1508 /* --------------------------------------------------------------------------
1509 * Platform device driver
1510 */
1511
1512 /*
1513 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1514 * @isp: OMAP3 ISP device
1515 */
1516 #define ISP_PRINT_REGISTER(isp, name)\
1517 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1518 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1519 #define SBL_PRINT_REGISTER(isp, name)\
1520 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1521 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1522
1523 void omap3isp_print_status(struct isp_device *isp)
1524 {
1525 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1526
1527 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1528 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1529 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1530 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1531 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1532 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1533 ISP_PRINT_REGISTER(isp, CTRL);
1534 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1535 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1536 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1537 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1538 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1539 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1540 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1541 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1542
1543 SBL_PRINT_REGISTER(isp, PCR);
1544 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1545
1546 dev_dbg(isp->dev, "--------------------------------------------\n");
1547 }
1548
1549 #ifdef CONFIG_PM
1550
1551 /*
1552 * Power management support.
1553 *
1554 * As the ISP can't properly handle an input video stream interruption on a non
1555 * frame boundary, the ISP pipelines need to be stopped before sensors get
1556 * suspended. However, as suspending the sensors can require a running clock,
1557 * which can be provided by the ISP, the ISP can't be completely suspended
1558 * before the sensor.
1559 *
1560 * To solve this problem power management support is split into prepare/complete
1561 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1562 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1563 * resume(), and the the pipelines are restarted in complete().
1564 *
1565 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1566 * yet.
1567 */
1568 static int isp_pm_prepare(struct device *dev)
1569 {
1570 struct isp_device *isp = dev_get_drvdata(dev);
1571 int reset;
1572
1573 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1574
1575 if (isp->ref_count == 0)
1576 return 0;
1577
1578 reset = isp_suspend_modules(isp);
1579 isp_disable_interrupts(isp);
1580 isp_save_ctx(isp);
1581 if (reset)
1582 isp_reset(isp);
1583
1584 return 0;
1585 }
1586
1587 static int isp_pm_suspend(struct device *dev)
1588 {
1589 struct isp_device *isp = dev_get_drvdata(dev);
1590
1591 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1592
1593 if (isp->ref_count)
1594 isp_disable_clocks(isp);
1595
1596 return 0;
1597 }
1598
1599 static int isp_pm_resume(struct device *dev)
1600 {
1601 struct isp_device *isp = dev_get_drvdata(dev);
1602
1603 if (isp->ref_count == 0)
1604 return 0;
1605
1606 return isp_enable_clocks(isp);
1607 }
1608
1609 static void isp_pm_complete(struct device *dev)
1610 {
1611 struct isp_device *isp = dev_get_drvdata(dev);
1612
1613 if (isp->ref_count == 0)
1614 return;
1615
1616 isp_restore_ctx(isp);
1617 isp_enable_interrupts(isp);
1618 isp_resume_modules(isp);
1619 }
1620
1621 #else
1622
1623 #define isp_pm_prepare NULL
1624 #define isp_pm_suspend NULL
1625 #define isp_pm_resume NULL
1626 #define isp_pm_complete NULL
1627
1628 #endif /* CONFIG_PM */
1629
1630 static void isp_unregister_entities(struct isp_device *isp)
1631 {
1632 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1633 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1634 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1635 omap3isp_preview_unregister_entities(&isp->isp_prev);
1636 omap3isp_resizer_unregister_entities(&isp->isp_res);
1637 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1638 omap3isp_stat_unregister_entities(&isp->isp_af);
1639 omap3isp_stat_unregister_entities(&isp->isp_hist);
1640
1641 v4l2_device_unregister(&isp->v4l2_dev);
1642 media_device_unregister(&isp->media_dev);
1643 }
1644
1645 /*
1646 * isp_register_subdev_group - Register a group of subdevices
1647 * @isp: OMAP3 ISP device
1648 * @board_info: I2C subdevs board information array
1649 *
1650 * Register all I2C subdevices in the board_info array. The array must be
1651 * terminated by a NULL entry, and the first entry must be the sensor.
1652 *
1653 * Return a pointer to the sensor media entity if it has been successfully
1654 * registered, or NULL otherwise.
1655 */
1656 static struct v4l2_subdev *
1657 isp_register_subdev_group(struct isp_device *isp,
1658 struct isp_subdev_i2c_board_info *board_info)
1659 {
1660 struct v4l2_subdev *sensor = NULL;
1661 unsigned int first;
1662
1663 if (board_info->board_info == NULL)
1664 return NULL;
1665
1666 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1667 struct v4l2_subdev *subdev;
1668 struct i2c_adapter *adapter;
1669
1670 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1671 if (adapter == NULL) {
1672 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1673 "device %s\n", __func__,
1674 board_info->i2c_adapter_id,
1675 board_info->board_info->type);
1676 continue;
1677 }
1678
1679 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1680 board_info->board_info, NULL);
1681 if (subdev == NULL) {
1682 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1683 __func__, board_info->board_info->type);
1684 continue;
1685 }
1686
1687 if (first)
1688 sensor = subdev;
1689 }
1690
1691 return sensor;
1692 }
1693
1694 static int isp_register_entities(struct isp_device *isp)
1695 {
1696 struct isp_platform_data *pdata = isp->pdata;
1697 struct isp_v4l2_subdevs_group *subdevs;
1698 int ret;
1699
1700 isp->media_dev.dev = isp->dev;
1701 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1702 sizeof(isp->media_dev.model));
1703 isp->media_dev.hw_revision = isp->revision;
1704 isp->media_dev.link_notify = isp_pipeline_link_notify;
1705 ret = media_device_register(&isp->media_dev);
1706 if (ret < 0) {
1707 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1708 __func__, ret);
1709 return ret;
1710 }
1711
1712 isp->v4l2_dev.mdev = &isp->media_dev;
1713 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1714 if (ret < 0) {
1715 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1716 __func__, ret);
1717 goto done;
1718 }
1719
1720 /* Register internal entities */
1721 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1722 if (ret < 0)
1723 goto done;
1724
1725 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1726 if (ret < 0)
1727 goto done;
1728
1729 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1730 if (ret < 0)
1731 goto done;
1732
1733 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1734 &isp->v4l2_dev);
1735 if (ret < 0)
1736 goto done;
1737
1738 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1739 if (ret < 0)
1740 goto done;
1741
1742 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1743 if (ret < 0)
1744 goto done;
1745
1746 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1747 if (ret < 0)
1748 goto done;
1749
1750 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1751 if (ret < 0)
1752 goto done;
1753
1754 /* Register external entities */
1755 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1756 struct v4l2_subdev *sensor;
1757 struct media_entity *input;
1758 unsigned int flags;
1759 unsigned int pad;
1760
1761 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1762 if (sensor == NULL)
1763 continue;
1764
1765 sensor->host_priv = subdevs;
1766
1767 /* Connect the sensor to the correct interface module. Parallel
1768 * sensors are connected directly to the CCDC, while serial
1769 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1770 * through CSIPHY1 or CSIPHY2.
1771 */
1772 switch (subdevs->interface) {
1773 case ISP_INTERFACE_PARALLEL:
1774 input = &isp->isp_ccdc.subdev.entity;
1775 pad = CCDC_PAD_SINK;
1776 flags = 0;
1777 break;
1778
1779 case ISP_INTERFACE_CSI2A_PHY2:
1780 input = &isp->isp_csi2a.subdev.entity;
1781 pad = CSI2_PAD_SINK;
1782 flags = MEDIA_LNK_FL_IMMUTABLE
1783 | MEDIA_LNK_FL_ENABLED;
1784 break;
1785
1786 case ISP_INTERFACE_CCP2B_PHY1:
1787 case ISP_INTERFACE_CCP2B_PHY2:
1788 input = &isp->isp_ccp2.subdev.entity;
1789 pad = CCP2_PAD_SINK;
1790 flags = 0;
1791 break;
1792
1793 case ISP_INTERFACE_CSI2C_PHY1:
1794 input = &isp->isp_csi2c.subdev.entity;
1795 pad = CSI2_PAD_SINK;
1796 flags = MEDIA_LNK_FL_IMMUTABLE
1797 | MEDIA_LNK_FL_ENABLED;
1798 break;
1799
1800 default:
1801 printk(KERN_ERR "%s: invalid interface type %u\n",
1802 __func__, subdevs->interface);
1803 ret = -EINVAL;
1804 goto done;
1805 }
1806
1807 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1808 flags);
1809 if (ret < 0)
1810 goto done;
1811 }
1812
1813 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1814
1815 done:
1816 if (ret < 0)
1817 isp_unregister_entities(isp);
1818
1819 return ret;
1820 }
1821
1822 static void isp_cleanup_modules(struct isp_device *isp)
1823 {
1824 omap3isp_h3a_aewb_cleanup(isp);
1825 omap3isp_h3a_af_cleanup(isp);
1826 omap3isp_hist_cleanup(isp);
1827 omap3isp_resizer_cleanup(isp);
1828 omap3isp_preview_cleanup(isp);
1829 omap3isp_ccdc_cleanup(isp);
1830 omap3isp_ccp2_cleanup(isp);
1831 omap3isp_csi2_cleanup(isp);
1832 }
1833
1834 static int isp_initialize_modules(struct isp_device *isp)
1835 {
1836 int ret;
1837
1838 ret = omap3isp_csiphy_init(isp);
1839 if (ret < 0) {
1840 dev_err(isp->dev, "CSI PHY initialization failed\n");
1841 goto error_csiphy;
1842 }
1843
1844 ret = omap3isp_csi2_init(isp);
1845 if (ret < 0) {
1846 dev_err(isp->dev, "CSI2 initialization failed\n");
1847 goto error_csi2;
1848 }
1849
1850 ret = omap3isp_ccp2_init(isp);
1851 if (ret < 0) {
1852 dev_err(isp->dev, "CCP2 initialization failed\n");
1853 goto error_ccp2;
1854 }
1855
1856 ret = omap3isp_ccdc_init(isp);
1857 if (ret < 0) {
1858 dev_err(isp->dev, "CCDC initialization failed\n");
1859 goto error_ccdc;
1860 }
1861
1862 ret = omap3isp_preview_init(isp);
1863 if (ret < 0) {
1864 dev_err(isp->dev, "Preview initialization failed\n");
1865 goto error_preview;
1866 }
1867
1868 ret = omap3isp_resizer_init(isp);
1869 if (ret < 0) {
1870 dev_err(isp->dev, "Resizer initialization failed\n");
1871 goto error_resizer;
1872 }
1873
1874 ret = omap3isp_hist_init(isp);
1875 if (ret < 0) {
1876 dev_err(isp->dev, "Histogram initialization failed\n");
1877 goto error_hist;
1878 }
1879
1880 ret = omap3isp_h3a_aewb_init(isp);
1881 if (ret < 0) {
1882 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1883 goto error_h3a_aewb;
1884 }
1885
1886 ret = omap3isp_h3a_af_init(isp);
1887 if (ret < 0) {
1888 dev_err(isp->dev, "H3A AF initialization failed\n");
1889 goto error_h3a_af;
1890 }
1891
1892 /* Connect the submodules. */
1893 ret = media_entity_create_link(
1894 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1895 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1896 if (ret < 0)
1897 goto error_link;
1898
1899 ret = media_entity_create_link(
1900 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1901 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1902 if (ret < 0)
1903 goto error_link;
1904
1905 ret = media_entity_create_link(
1906 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1907 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1908 if (ret < 0)
1909 goto error_link;
1910
1911 ret = media_entity_create_link(
1912 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1913 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1914 if (ret < 0)
1915 goto error_link;
1916
1917 ret = media_entity_create_link(
1918 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1919 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1920 if (ret < 0)
1921 goto error_link;
1922
1923 ret = media_entity_create_link(
1924 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1925 &isp->isp_aewb.subdev.entity, 0,
1926 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1927 if (ret < 0)
1928 goto error_link;
1929
1930 ret = media_entity_create_link(
1931 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1932 &isp->isp_af.subdev.entity, 0,
1933 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1934 if (ret < 0)
1935 goto error_link;
1936
1937 ret = media_entity_create_link(
1938 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1939 &isp->isp_hist.subdev.entity, 0,
1940 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1941 if (ret < 0)
1942 goto error_link;
1943
1944 return 0;
1945
1946 error_link:
1947 omap3isp_h3a_af_cleanup(isp);
1948 error_h3a_af:
1949 omap3isp_h3a_aewb_cleanup(isp);
1950 error_h3a_aewb:
1951 omap3isp_hist_cleanup(isp);
1952 error_hist:
1953 omap3isp_resizer_cleanup(isp);
1954 error_resizer:
1955 omap3isp_preview_cleanup(isp);
1956 error_preview:
1957 omap3isp_ccdc_cleanup(isp);
1958 error_ccdc:
1959 omap3isp_ccp2_cleanup(isp);
1960 error_ccp2:
1961 omap3isp_csi2_cleanup(isp);
1962 error_csi2:
1963 error_csiphy:
1964 return ret;
1965 }
1966
1967 /*
1968 * isp_remove - Remove ISP platform device
1969 * @pdev: Pointer to ISP platform device
1970 *
1971 * Always returns 0.
1972 */
1973 static int isp_remove(struct platform_device *pdev)
1974 {
1975 struct isp_device *isp = platform_get_drvdata(pdev);
1976 int i;
1977
1978 isp_unregister_entities(isp);
1979 isp_cleanup_modules(isp);
1980
1981 omap3isp_get(isp);
1982 iommu_detach_device(isp->domain, &pdev->dev);
1983 iommu_domain_free(isp->domain);
1984 omap3isp_put(isp);
1985
1986 free_irq(isp->irq_num, isp);
1987 isp_put_clocks(isp);
1988
1989 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1990 if (isp->mmio_base[i]) {
1991 iounmap(isp->mmio_base[i]);
1992 isp->mmio_base[i] = NULL;
1993 }
1994
1995 if (isp->mmio_base_phys[i]) {
1996 release_mem_region(isp->mmio_base_phys[i],
1997 isp->mmio_size[i]);
1998 isp->mmio_base_phys[i] = 0;
1999 }
2000 }
2001
2002 regulator_put(isp->isp_csiphy1.vdd);
2003 regulator_put(isp->isp_csiphy2.vdd);
2004 kfree(isp);
2005
2006 return 0;
2007 }
2008
2009 static int isp_map_mem_resource(struct platform_device *pdev,
2010 struct isp_device *isp,
2011 enum isp_mem_resources res)
2012 {
2013 struct resource *mem;
2014
2015 /* request the mem region for the camera registers */
2016
2017 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2018 if (!mem) {
2019 dev_err(isp->dev, "no mem resource?\n");
2020 return -ENODEV;
2021 }
2022
2023 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2024 dev_err(isp->dev,
2025 "cannot reserve camera register I/O region\n");
2026 return -ENODEV;
2027 }
2028 isp->mmio_base_phys[res] = mem->start;
2029 isp->mmio_size[res] = resource_size(mem);
2030
2031 /* map the region */
2032 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2033 isp->mmio_size[res]);
2034 if (!isp->mmio_base[res]) {
2035 dev_err(isp->dev, "cannot map camera register I/O region\n");
2036 return -ENODEV;
2037 }
2038
2039 return 0;
2040 }
2041
2042 /*
2043 * isp_probe - Probe ISP platform device
2044 * @pdev: Pointer to ISP platform device
2045 *
2046 * Returns 0 if successful,
2047 * -ENOMEM if no memory available,
2048 * -ENODEV if no platform device resources found
2049 * or no space for remapping registers,
2050 * -EINVAL if couldn't install ISR,
2051 * or clk_get return error value.
2052 */
2053 static int isp_probe(struct platform_device *pdev)
2054 {
2055 struct isp_platform_data *pdata = pdev->dev.platform_data;
2056 struct isp_device *isp;
2057 int ret;
2058 int i, m;
2059
2060 if (pdata == NULL)
2061 return -EINVAL;
2062
2063 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2064 if (!isp) {
2065 dev_err(&pdev->dev, "could not allocate memory\n");
2066 return -ENOMEM;
2067 }
2068
2069 isp->autoidle = autoidle;
2070 isp->platform_cb.set_xclk = isp_set_xclk;
2071 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2072
2073 mutex_init(&isp->isp_mutex);
2074 spin_lock_init(&isp->stat_lock);
2075
2076 isp->dev = &pdev->dev;
2077 isp->pdata = pdata;
2078 isp->ref_count = 0;
2079
2080 isp->raw_dmamask = DMA_BIT_MASK(32);
2081 isp->dev->dma_mask = &isp->raw_dmamask;
2082 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2083
2084 platform_set_drvdata(pdev, isp);
2085
2086 /* Regulators */
2087 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2088 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2089
2090 /* Clocks */
2091 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2092 if (ret < 0)
2093 goto error;
2094
2095 ret = isp_get_clocks(isp);
2096 if (ret < 0)
2097 goto error;
2098
2099 if (omap3isp_get(isp) == NULL)
2100 goto error;
2101
2102 ret = isp_reset(isp);
2103 if (ret < 0)
2104 goto error_isp;
2105
2106 /* Memory resources */
2107 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2108 dev_info(isp->dev, "Revision %d.%d found\n",
2109 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2110
2111 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2112 if (isp->revision == isp_res_maps[m].isp_rev)
2113 break;
2114
2115 if (m == ARRAY_SIZE(isp_res_maps)) {
2116 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2117 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2118 ret = -ENODEV;
2119 goto error_isp;
2120 }
2121
2122 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2123 if (isp_res_maps[m].map & 1 << i) {
2124 ret = isp_map_mem_resource(pdev, isp, i);
2125 if (ret)
2126 goto error_isp;
2127 }
2128 }
2129
2130 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2131 if (!isp->domain) {
2132 dev_err(isp->dev, "can't alloc iommu domain\n");
2133 ret = -ENOMEM;
2134 goto error_isp;
2135 }
2136
2137 ret = iommu_attach_device(isp->domain, &pdev->dev);
2138 if (ret) {
2139 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2140 goto free_domain;
2141 }
2142
2143 /* Interrupt */
2144 isp->irq_num = platform_get_irq(pdev, 0);
2145 if (isp->irq_num <= 0) {
2146 dev_err(isp->dev, "No IRQ resource\n");
2147 ret = -ENODEV;
2148 goto detach_dev;
2149 }
2150
2151 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2152 dev_err(isp->dev, "Unable to request IRQ\n");
2153 ret = -EINVAL;
2154 goto detach_dev;
2155 }
2156
2157 /* Entities */
2158 ret = isp_initialize_modules(isp);
2159 if (ret < 0)
2160 goto error_irq;
2161
2162 ret = isp_register_entities(isp);
2163 if (ret < 0)
2164 goto error_modules;
2165
2166 isp_power_settings(isp, 1);
2167 omap3isp_put(isp);
2168
2169 return 0;
2170
2171 error_modules:
2172 isp_cleanup_modules(isp);
2173 error_irq:
2174 free_irq(isp->irq_num, isp);
2175 detach_dev:
2176 iommu_detach_device(isp->domain, &pdev->dev);
2177 free_domain:
2178 iommu_domain_free(isp->domain);
2179 error_isp:
2180 omap3isp_put(isp);
2181 error:
2182 isp_put_clocks(isp);
2183
2184 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2185 if (isp->mmio_base[i]) {
2186 iounmap(isp->mmio_base[i]);
2187 isp->mmio_base[i] = NULL;
2188 }
2189
2190 if (isp->mmio_base_phys[i]) {
2191 release_mem_region(isp->mmio_base_phys[i],
2192 isp->mmio_size[i]);
2193 isp->mmio_base_phys[i] = 0;
2194 }
2195 }
2196 regulator_put(isp->isp_csiphy2.vdd);
2197 regulator_put(isp->isp_csiphy1.vdd);
2198 platform_set_drvdata(pdev, NULL);
2199
2200 mutex_destroy(&isp->isp_mutex);
2201 kfree(isp);
2202
2203 return ret;
2204 }
2205
2206 static const struct dev_pm_ops omap3isp_pm_ops = {
2207 .prepare = isp_pm_prepare,
2208 .suspend = isp_pm_suspend,
2209 .resume = isp_pm_resume,
2210 .complete = isp_pm_complete,
2211 };
2212
2213 static struct platform_device_id omap3isp_id_table[] = {
2214 { "omap3isp", 0 },
2215 { },
2216 };
2217 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2218
2219 static struct platform_driver omap3isp_driver = {
2220 .probe = isp_probe,
2221 .remove = isp_remove,
2222 .id_table = omap3isp_id_table,
2223 .driver = {
2224 .owner = THIS_MODULE,
2225 .name = "omap3isp",
2226 .pm = &omap3isp_pm_ops,
2227 },
2228 };
2229
2230 module_platform_driver(omap3isp_driver);
2231
2232 MODULE_AUTHOR("Nokia Corporation");
2233 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2234 MODULE_LICENSE("GPL");
2235 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);