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Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / media / video / omap3isp / ispccdc.c
blobeaabc27f0fa2936b8de8b1bf0a143e49a9fc7916
1 /*
2 * ispccdc.c
3 *
4 * TI OMAP3 ISP - CCDC module
5 *
6 * Copyright (C) 2009-2010 Nokia Corporation
7 * Copyright (C) 2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27 #include <linux/module.h>
28 #include <linux/uaccess.h>
29 #include <linux/delay.h>
30 #include <linux/device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/mm.h>
33 #include <linux/sched.h>
34 #include <linux/slab.h>
35 #include <media/v4l2-event.h>
36
37 #include "isp.h"
38 #include "ispreg.h"
39 #include "ispccdc.h"
40
41 static struct v4l2_mbus_framefmt *
42 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
43 unsigned int pad, enum v4l2_subdev_format_whence which);
44
45 static const unsigned int ccdc_fmts[] = {
46 V4L2_MBUS_FMT_Y8_1X8,
47 V4L2_MBUS_FMT_Y10_1X10,
48 V4L2_MBUS_FMT_Y12_1X12,
49 V4L2_MBUS_FMT_SGRBG8_1X8,
50 V4L2_MBUS_FMT_SRGGB8_1X8,
51 V4L2_MBUS_FMT_SBGGR8_1X8,
52 V4L2_MBUS_FMT_SGBRG8_1X8,
53 V4L2_MBUS_FMT_SGRBG10_1X10,
54 V4L2_MBUS_FMT_SRGGB10_1X10,
55 V4L2_MBUS_FMT_SBGGR10_1X10,
56 V4L2_MBUS_FMT_SGBRG10_1X10,
57 V4L2_MBUS_FMT_SGRBG12_1X12,
58 V4L2_MBUS_FMT_SRGGB12_1X12,
59 V4L2_MBUS_FMT_SBGGR12_1X12,
60 V4L2_MBUS_FMT_SGBRG12_1X12,
61 };
62
63 /*
64 * ccdc_print_status - Print current CCDC Module register values.
65 * @ccdc: Pointer to ISP CCDC device.
66 *
67 * Also prints other debug information stored in the CCDC module.
68 */
69 #define CCDC_PRINT_REGISTER(isp, name)\
70 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
71 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
72
73 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
74 {
75 struct isp_device *isp = to_isp_device(ccdc);
76
77 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
78
79 CCDC_PRINT_REGISTER(isp, PCR);
80 CCDC_PRINT_REGISTER(isp, SYN_MODE);
81 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
82 CCDC_PRINT_REGISTER(isp, PIX_LINES);
83 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
84 CCDC_PRINT_REGISTER(isp, VERT_START);
85 CCDC_PRINT_REGISTER(isp, VERT_LINES);
86 CCDC_PRINT_REGISTER(isp, CULLING);
87 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
88 CCDC_PRINT_REGISTER(isp, SDOFST);
89 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
90 CCDC_PRINT_REGISTER(isp, CLAMP);
91 CCDC_PRINT_REGISTER(isp, DCSUB);
92 CCDC_PRINT_REGISTER(isp, COLPTN);
93 CCDC_PRINT_REGISTER(isp, BLKCMP);
94 CCDC_PRINT_REGISTER(isp, FPC);
95 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
96 CCDC_PRINT_REGISTER(isp, VDINT);
97 CCDC_PRINT_REGISTER(isp, ALAW);
98 CCDC_PRINT_REGISTER(isp, REC656IF);
99 CCDC_PRINT_REGISTER(isp, CFG);
100 CCDC_PRINT_REGISTER(isp, FMTCFG);
101 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
102 CCDC_PRINT_REGISTER(isp, FMT_VERT);
103 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
104 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
105 CCDC_PRINT_REGISTER(isp, PRGODD0);
106 CCDC_PRINT_REGISTER(isp, PRGODD1);
107 CCDC_PRINT_REGISTER(isp, VP_OUT);
108 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
109 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
110 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
111 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
112
113 dev_dbg(isp->dev, "--------------------------------------------\n");
114 }
115
116 /*
117 * omap3isp_ccdc_busy - Get busy state of the CCDC.
118 * @ccdc: Pointer to ISP CCDC device.
119 */
120 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
121 {
122 struct isp_device *isp = to_isp_device(ccdc);
123
124 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
125 ISPCCDC_PCR_BUSY;
126 }
127
128 /* -----------------------------------------------------------------------------
129 * Lens Shading Compensation
130 */
131
132 /*
133 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
134 * @ccdc: Pointer to ISP CCDC device.
135 * @lsc_cfg: the LSC configuration to check.
136 *
137 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
138 */
139 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
140 struct omap3isp_ccdc_lsc_config *lsc_cfg)
141 {
142 struct isp_device *isp = to_isp_device(ccdc);
143 struct v4l2_mbus_framefmt *format;
144 unsigned int paxel_width, paxel_height;
145 unsigned int paxel_shift_x, paxel_shift_y;
146 unsigned int min_width, min_height, min_size;
147 unsigned int input_width, input_height;
148
149 paxel_shift_x = lsc_cfg->gain_mode_m;
150 paxel_shift_y = lsc_cfg->gain_mode_n;
151
152 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
153 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
154 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
155 return -EINVAL;
156 }
157
158 if (lsc_cfg->offset & 3) {
159 dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
160 "4\n");
161 return -EINVAL;
162 }
163
164 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
165 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
166 return -EINVAL;
167 }
168
169 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
170 V4L2_SUBDEV_FORMAT_ACTIVE);
171 input_width = format->width;
172 input_height = format->height;
173
174 /* Calculate minimum bytesize for validation */
175 paxel_width = 1 << paxel_shift_x;
176 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
177 >> paxel_shift_x) + 1;
178
179 paxel_height = 1 << paxel_shift_y;
180 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
181 >> paxel_shift_y) + 1;
182
183 min_size = 4 * min_width * min_height;
184 if (min_size > lsc_cfg->size) {
185 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
186 return -EINVAL;
187 }
188 if (lsc_cfg->offset < (min_width * 4)) {
189 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
190 return -EINVAL;
191 }
192 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
193 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
194 return -EINVAL;
195 }
196 return 0;
197 }
198
199 /*
200 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
201 * @ccdc: Pointer to ISP CCDC device.
202 */
203 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
204 {
205 isp_reg_writel(to_isp_device(ccdc), addr,
206 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
207 }
208
209 /*
210 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
211 * @ccdc: Pointer to ISP CCDC device.
212 */
213 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
214 struct omap3isp_ccdc_lsc_config *cfg)
215 {
216 struct isp_device *isp = to_isp_device(ccdc);
217 int reg;
218
219 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
220 ISPCCDC_LSC_TABLE_OFFSET);
221
222 reg = 0;
223 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
224 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
225 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
226 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
227
228 reg = 0;
229 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
230 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
231 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
232 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
233 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
234 ISPCCDC_LSC_INITIAL);
235 }
236
237 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
238 {
239 struct isp_device *isp = to_isp_device(ccdc);
240 unsigned int wait;
241
242 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
243 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
244
245 /* timeout 1 ms */
246 for (wait = 0; wait < 1000; wait++) {
247 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
248 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
249 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
250 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
251 return 0;
252 }
253
254 rmb();
255 udelay(1);
256 }
257
258 return -ETIMEDOUT;
259 }
260
261 /*
262 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
263 * @ccdc: Pointer to ISP CCDC device.
264 * @enable: 0 Disables LSC, 1 Enables LSC.
265 */
266 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
267 {
268 struct isp_device *isp = to_isp_device(ccdc);
269 const struct v4l2_mbus_framefmt *format =
270 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
271 V4L2_SUBDEV_FORMAT_ACTIVE);
272
273 if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
274 (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
275 (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
276 (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
277 return -EINVAL;
278
279 if (enable)
280 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
281
282 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
283 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
284
285 if (enable) {
286 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
287 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
288 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
289 ccdc->lsc.state = LSC_STATE_STOPPED;
290 dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
291 return -ETIMEDOUT;
292 }
293 ccdc->lsc.state = LSC_STATE_RUNNING;
294 } else {
295 ccdc->lsc.state = LSC_STATE_STOPPING;
296 }
297
298 return 0;
299 }
300
301 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
302 {
303 struct isp_device *isp = to_isp_device(ccdc);
304
305 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
306 ISPCCDC_LSC_BUSY;
307 }
308
309 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
310 * @ccdc: Pointer to ISP CCDC device
311 * @req: New configuration request
312 *
313 * context: in_interrupt()
314 */
315 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
316 struct ispccdc_lsc_config_req *req)
317 {
318 if (!req->enable)
319 return -EINVAL;
320
321 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
322 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
323 return -EINVAL;
324 }
325
326 if (ccdc_lsc_busy(ccdc))
327 return -EBUSY;
328
329 ccdc_lsc_setup_regs(ccdc, &req->config);
330 ccdc_lsc_program_table(ccdc, req->table);
331 return 0;
332 }
333
334 /*
335 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
336 * @ccdc: Pointer to ISP CCDC device.
337 *
338 * Disables LSC, and defers enablement to shadow registers update time.
339 */
340 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
341 {
342 struct isp_device *isp = to_isp_device(ccdc);
343 /*
344 * From OMAP3 TRM: When this event is pending, the module
345 * goes into transparent mode (output =input). Normal
346 * operation can be resumed at the start of the next frame
347 * after:
348 * 1) Clearing this event
349 * 2) Disabling the LSC module
350 * 3) Enabling it
351 */
352 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
353 ISPCCDC_LSC_ENABLE);
354 ccdc->lsc.state = LSC_STATE_STOPPED;
355 }
356
357 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
358 struct ispccdc_lsc_config_req *req)
359 {
360 struct isp_device *isp = to_isp_device(ccdc);
361
362 if (req == NULL)
363 return;
364
365 if (req->iovm)
366 dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
367 req->iovm->sgt->nents, DMA_TO_DEVICE);
368 if (req->table)
369 omap_iommu_vfree(isp->domain, isp->dev, req->table);
370 kfree(req);
371 }
372
373 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
374 struct list_head *queue)
375 {
376 struct ispccdc_lsc_config_req *req, *n;
377 unsigned long flags;
378
379 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
380 list_for_each_entry_safe(req, n, queue, list) {
381 list_del(&req->list);
382 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
383 ccdc_lsc_free_request(ccdc, req);
384 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
385 }
386 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
387 }
388
389 static void ccdc_lsc_free_table_work(struct work_struct *work)
390 {
391 struct isp_ccdc_device *ccdc;
392 struct ispccdc_lsc *lsc;
393
394 lsc = container_of(work, struct ispccdc_lsc, table_work);
395 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
396
397 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
398 }
399
400 /*
401 * ccdc_lsc_config - Configure the LSC module from a userspace request
402 *
403 * Store the request LSC configuration in the LSC engine request pointer. The
404 * configuration will be applied to the hardware when the CCDC will be enabled,
405 * or at the next LSC interrupt if the CCDC is already running.
406 */
407 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
408 struct omap3isp_ccdc_update_config *config)
409 {
410 struct isp_device *isp = to_isp_device(ccdc);
411 struct ispccdc_lsc_config_req *req;
412 unsigned long flags;
413 void *table;
414 u16 update;
415 int ret;
416
417 update = config->update &
418 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
419 if (!update)
420 return 0;
421
422 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
423 dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
424 "need to be supplied\n", __func__);
425 return -EINVAL;
426 }
427
428 req = kzalloc(sizeof(*req), GFP_KERNEL);
429 if (req == NULL)
430 return -ENOMEM;
431
432 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
433 if (copy_from_user(&req->config, config->lsc_cfg,
434 sizeof(req->config))) {
435 ret = -EFAULT;
436 goto done;
437 }
438
439 req->enable = 1;
440
441 req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
442 req->config.size, IOMMU_FLAG);
443 if (IS_ERR_VALUE(req->table)) {
444 req->table = 0;
445 ret = -ENOMEM;
446 goto done;
447 }
448
449 req->iovm = omap_find_iovm_area(isp->dev, req->table);
450 if (req->iovm == NULL) {
451 ret = -ENOMEM;
452 goto done;
453 }
454
455 if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
456 req->iovm->sgt->nents, DMA_TO_DEVICE)) {
457 ret = -ENOMEM;
458 req->iovm = NULL;
459 goto done;
460 }
461
462 dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
463 req->iovm->sgt->nents, DMA_TO_DEVICE);
464
465 table = omap_da_to_va(isp->dev, req->table);
466 if (copy_from_user(table, config->lsc, req->config.size)) {
467 ret = -EFAULT;
468 goto done;
469 }
470
471 dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
472 req->iovm->sgt->nents, DMA_TO_DEVICE);
473 }
474
475 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
476 if (ccdc->lsc.request) {
477 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
478 schedule_work(&ccdc->lsc.table_work);
479 }
480 ccdc->lsc.request = req;
481 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
482
483 ret = 0;
484
485 done:
486 if (ret < 0)
487 ccdc_lsc_free_request(ccdc, req);
488
489 return ret;
490 }
491
492 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
493 {
494 unsigned long flags;
495
496 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
497 if (ccdc->lsc.active) {
498 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
499 return 1;
500 }
501 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
502 return 0;
503 }
504
505 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
506 {
507 struct ispccdc_lsc *lsc = &ccdc->lsc;
508
509 if (lsc->state != LSC_STATE_STOPPED)
510 return -EINVAL;
511
512 if (lsc->active) {
513 list_add_tail(&lsc->active->list, &lsc->free_queue);
514 lsc->active = NULL;
515 }
516
517 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
518 omap3isp_sbl_disable(to_isp_device(ccdc),
519 OMAP3_ISP_SBL_CCDC_LSC_READ);
520 list_add_tail(&lsc->request->list, &lsc->free_queue);
521 lsc->request = NULL;
522 goto done;
523 }
524
525 lsc->active = lsc->request;
526 lsc->request = NULL;
527 __ccdc_lsc_enable(ccdc, 1);
528
529 done:
530 if (!list_empty(&lsc->free_queue))
531 schedule_work(&lsc->table_work);
532
533 return 0;
534 }
535
536 /* -----------------------------------------------------------------------------
537 * Parameters configuration
538 */
539
540 /*
541 * ccdc_configure_clamp - Configure optical-black or digital clamping
542 * @ccdc: Pointer to ISP CCDC device.
543 *
544 * The CCDC performs either optical-black or digital clamp. Configure and enable
545 * the selected clamp method.
546 */
547 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
548 {
549 struct isp_device *isp = to_isp_device(ccdc);
550 u32 clamp;
551
552 if (ccdc->obclamp) {
553 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
554 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
555 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
556 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
557 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
558 } else {
559 isp_reg_writel(isp, ccdc->clamp.dcsubval,
560 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
561 }
562
563 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
564 ISPCCDC_CLAMP_CLAMPEN,
565 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
566 }
567
568 /*
569 * ccdc_configure_fpc - Configure Faulty Pixel Correction
570 * @ccdc: Pointer to ISP CCDC device.
571 */
572 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
573 {
574 struct isp_device *isp = to_isp_device(ccdc);
575
576 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
577
578 if (!ccdc->fpc_en)
579 return;
580
581 isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
582 ISPCCDC_FPC_ADDR);
583 /* The FPNUM field must be set before enabling FPC. */
584 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
585 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
586 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
587 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
588 }
589
590 /*
591 * ccdc_configure_black_comp - Configure Black Level Compensation.
592 * @ccdc: Pointer to ISP CCDC device.
593 */
594 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
595 {
596 struct isp_device *isp = to_isp_device(ccdc);
597 u32 blcomp;
598
599 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
600 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
601 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
602 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
603
604 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
605 }
606
607 /*
608 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
609 * @ccdc: Pointer to ISP CCDC device.
610 */
611 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
612 {
613 struct isp_device *isp = to_isp_device(ccdc);
614
615 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
616 ISPCCDC_SYN_MODE_LPF,
617 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
618 }
619
620 /*
621 * ccdc_configure_alaw - Configure A-law compression.
622 * @ccdc: Pointer to ISP CCDC device.
623 */
624 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
625 {
626 struct isp_device *isp = to_isp_device(ccdc);
627 u32 alaw = 0;
628
629 switch (ccdc->syncif.datsz) {
630 case 8:
631 return;
632
633 case 10:
634 alaw = ISPCCDC_ALAW_GWDI_9_0;
635 break;
636 case 11:
637 alaw = ISPCCDC_ALAW_GWDI_10_1;
638 break;
639 case 12:
640 alaw = ISPCCDC_ALAW_GWDI_11_2;
641 break;
642 case 13:
643 alaw = ISPCCDC_ALAW_GWDI_12_3;
644 break;
645 }
646
647 if (ccdc->alaw)
648 alaw |= ISPCCDC_ALAW_CCDTBL;
649
650 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
651 }
652
653 /*
654 * ccdc_config_imgattr - Configure sensor image specific attributes.
655 * @ccdc: Pointer to ISP CCDC device.
656 * @colptn: Color pattern of the sensor.
657 */
658 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
659 {
660 struct isp_device *isp = to_isp_device(ccdc);
661
662 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
663 }
664
665 /*
666 * ccdc_config - Set CCDC configuration from userspace
667 * @ccdc: Pointer to ISP CCDC device.
668 * @userspace_add: Structure containing CCDC configuration sent from userspace.
669 *
670 * Returns 0 if successful, -EINVAL if the pointer to the configuration
671 * structure is null, or the copy_from_user function fails to copy user space
672 * memory to kernel space memory.
673 */
674 static int ccdc_config(struct isp_ccdc_device *ccdc,
675 struct omap3isp_ccdc_update_config *ccdc_struct)
676 {
677 struct isp_device *isp = to_isp_device(ccdc);
678 unsigned long flags;
679
680 spin_lock_irqsave(&ccdc->lock, flags);
681 ccdc->shadow_update = 1;
682 spin_unlock_irqrestore(&ccdc->lock, flags);
683
684 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
685 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
686 ccdc->update |= OMAP3ISP_CCDC_ALAW;
687 }
688
689 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
690 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
691 ccdc->update |= OMAP3ISP_CCDC_LPF;
692 }
693
694 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
695 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
696 sizeof(ccdc->clamp))) {
697 ccdc->shadow_update = 0;
698 return -EFAULT;
699 }
700
701 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
702 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
703 }
704
705 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
706 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
707 sizeof(ccdc->blcomp))) {
708 ccdc->shadow_update = 0;
709 return -EFAULT;
710 }
711
712 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
713 }
714
715 ccdc->shadow_update = 0;
716
717 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
718 u32 table_old = 0;
719 u32 table_new;
720 u32 size;
721
722 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
723 return -EBUSY;
724
725 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
726
727 if (ccdc->fpc_en) {
728 if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
729 sizeof(ccdc->fpc)))
730 return -EFAULT;
731
732 /*
733 * table_new must be 64-bytes aligned, but it's
734 * already done by omap_iommu_vmalloc().
735 */
736 size = ccdc->fpc.fpnum * 4;
737 table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
738 0, size, IOMMU_FLAG);
739 if (IS_ERR_VALUE(table_new))
740 return -ENOMEM;
741
742 if (copy_from_user(omap_da_to_va(isp->dev, table_new),
743 (__force void __user *)
744 ccdc->fpc.fpcaddr, size)) {
745 omap_iommu_vfree(isp->domain, isp->dev,
746 table_new);
747 return -EFAULT;
748 }
749
750 table_old = ccdc->fpc.fpcaddr;
751 ccdc->fpc.fpcaddr = table_new;
752 }
753
754 ccdc_configure_fpc(ccdc);
755 if (table_old != 0)
756 omap_iommu_vfree(isp->domain, isp->dev, table_old);
757 }
758
759 return ccdc_lsc_config(ccdc, ccdc_struct);
760 }
761
762 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
763 {
764 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
765 ccdc_configure_alaw(ccdc);
766 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
767 }
768
769 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
770 ccdc_configure_lpf(ccdc);
771 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
772 }
773
774 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
775 ccdc_configure_clamp(ccdc);
776 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
777 }
778
779 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
780 ccdc_configure_black_comp(ccdc);
781 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
782 }
783 }
784
785 /*
786 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
787 * @dev: Pointer to ISP device
788 */
789 void omap3isp_ccdc_restore_context(struct isp_device *isp)
790 {
791 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
792
793 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
794
795 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
796 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
797 ccdc_apply_controls(ccdc);
798 ccdc_configure_fpc(ccdc);
799 }
800
801 /* -----------------------------------------------------------------------------
802 * Format- and pipeline-related configuration helpers
803 */
804
805 /*
806 * ccdc_config_vp - Configure the Video Port.
807 * @ccdc: Pointer to ISP CCDC device.
808 */
809 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
810 {
811 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
812 struct isp_device *isp = to_isp_device(ccdc);
813 unsigned long l3_ick = pipe->l3_ick;
814 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
815 unsigned int div = 0;
816 u32 fmtcfg_vp;
817
818 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
819 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
820
821 switch (ccdc->syncif.datsz) {
822 case 8:
823 case 10:
824 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
825 break;
826 case 11:
827 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
828 break;
829 case 12:
830 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
831 break;
832 case 13:
833 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
834 break;
835 };
836
837 if (pipe->input)
838 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
839 else if (ccdc->vpcfg.pixelclk)
840 div = l3_ick / ccdc->vpcfg.pixelclk;
841
842 div = clamp(div, 2U, max_div);
843 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
844
845 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
846 }
847
848 /*
849 * ccdc_enable_vp - Enable Video Port.
850 * @ccdc: Pointer to ISP CCDC device.
851 * @enable: 0 Disables VP, 1 Enables VP
852 *
853 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
854 */
855 static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
856 {
857 struct isp_device *isp = to_isp_device(ccdc);
858
859 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
860 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
861 }
862
863 /*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
866 * @offset: Address offset to start a new line. Must be twice the
867 * Output width and aligned on 32 byte boundary
868 * @oddeven: Specifies the odd/even line pattern to be chosen to store the
869 * output.
870 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
871 *
872 * - Configures the output line offset when stored in memory
873 * - Sets the odd/even line pattern to store the output
874 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
875 * - Configures the number of even and odd line fields in case of rearranging
876 * the lines.
877 */
878 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
879 u32 offset, u8 oddeven, u8 numlines)
880 {
881 struct isp_device *isp = to_isp_device(ccdc);
882
883 isp_reg_writel(isp, offset & 0xffff,
884 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
885
886 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
887 ISPCCDC_SDOFST_FINV);
888
889 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
890 ISPCCDC_SDOFST_FOFST_4L);
891
892 switch (oddeven) {
893 case EVENEVEN:
894 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
895 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
896 break;
897 case ODDEVEN:
898 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
899 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
900 break;
901 case EVENODD:
902 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
903 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
904 break;
905 case ODDODD:
906 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
907 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
908 break;
909 default:
910 break;
911 }
912 }
913
914 /*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922 {
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926 }
927
928 /*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937 {
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954 }
955
956 /*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
959 * @syncif: Structure containing the sync parameters like field state, CCDC in
960 * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
961 * signals.
962 */
963 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
964 struct ispccdc_syncif *syncif)
965 {
966 struct isp_device *isp = to_isp_device(ccdc);
967 u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
968 ISPCCDC_SYN_MODE);
969
970 syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
971
972 if (syncif->fldstat)
973 syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
974 else
975 syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
976
977 syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
978 switch (syncif->datsz) {
979 case 8:
980 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
981 break;
982 case 10:
983 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
984 break;
985 case 11:
986 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
987 break;
988 case 12:
989 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
990 break;
991 };
992
993 if (syncif->fldmode)
994 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
995 else
996 syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
997
998 if (syncif->datapol)
999 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1000 else
1001 syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
1002
1003 if (syncif->fldpol)
1004 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1005 else
1006 syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
1007
1008 if (syncif->hdpol)
1009 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1010 else
1011 syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
1012
1013 if (syncif->vdpol)
1014 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1015 else
1016 syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
1017
1018 if (syncif->ccdc_mastermode) {
1019 syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
1020 isp_reg_writel(isp,
1021 syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
1022 | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
1023 OMAP3_ISP_IOMEM_CCDC,
1024 ISPCCDC_HD_VD_WID);
1025
1026 isp_reg_writel(isp,
1027 syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
1028 | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
1029 OMAP3_ISP_IOMEM_CCDC,
1030 ISPCCDC_PIX_LINES);
1031 } else
1032 syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
1033 ISPCCDC_SYN_MODE_VDHDOUT);
1034
1035 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1036
1037 if (!syncif->bt_r656_en)
1038 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1039 ISPCCDC_REC656IF_R656ON);
1040 }
1041
1042 /* CCDC formats descriptions */
1043 static const u32 ccdc_sgrbg_pattern =
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1046 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1047 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1050 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1051 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1054 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1055 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1058 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1059 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1060
1061 static const u32 ccdc_srggb_pattern =
1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1064 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1065 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1068 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1069 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1072 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1073 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1076 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1077 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1078
1079 static const u32 ccdc_sbggr_pattern =
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1082 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1083 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1086 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1087 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1090 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1091 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1094 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1095 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1096
1097 static const u32 ccdc_sgbrg_pattern =
1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1100 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1101 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1104 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1105 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1108 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1109 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1112 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1113 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1114
1115 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1116 {
1117 struct isp_device *isp = to_isp_device(ccdc);
1118 struct isp_parallel_platform_data *pdata = NULL;
1119 struct v4l2_subdev *sensor;
1120 struct v4l2_mbus_framefmt *format;
1121 const struct isp_format_info *fmt_info;
1122 struct v4l2_subdev_format fmt_src;
1123 unsigned int depth_out;
1124 unsigned int depth_in = 0;
1125 struct media_pad *pad;
1126 unsigned long flags;
1127 unsigned int shift;
1128 u32 syn_mode;
1129 u32 ccdc_pattern;
1130
1131 pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
1132 sensor = media_entity_to_v4l2_subdev(pad->entity);
1133 if (ccdc->input == CCDC_INPUT_PARALLEL)
1134 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1135 ->bus.parallel;
1136
1137 /* Compute shift value for lane shifter to configure the bridge. */
1138 fmt_src.pad = pad->index;
1139 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1140 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1141 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1142 depth_in = fmt_info->bpp;
1143 }
1144
1145 fmt_info = omap3isp_video_format_info
1146 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1147 depth_out = fmt_info->bpp;
1148
1149 shift = depth_in - depth_out;
1150 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
1151
1152 ccdc->syncif.datsz = depth_out;
1153 ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
1154 ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
1155 ccdc_config_sync_if(ccdc, &ccdc->syncif);
1156
1157 /* CCDC_PAD_SINK */
1158 format = &ccdc->formats[CCDC_PAD_SINK];
1159
1160 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1161
1162 /* Use the raw, unprocessed data when writing to memory. The H3A and
1163 * histogram modules are still fed with lens shading corrected data.
1164 */
1165 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1166
1167 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1168 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1169 else
1170 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1171
1172 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1173 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1174 else
1175 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1176
1177 /* Use PACK8 mode for 1byte per pixel formats. */
1178 if (omap3isp_video_format_info(format->code)->bpp <= 8)
1179 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1180 else
1181 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1182
1183 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1184
1185 /* Mosaic filter */
1186 switch (format->code) {
1187 case V4L2_MBUS_FMT_SRGGB10_1X10:
1188 case V4L2_MBUS_FMT_SRGGB12_1X12:
1189 ccdc_pattern = ccdc_srggb_pattern;
1190 break;
1191 case V4L2_MBUS_FMT_SBGGR10_1X10:
1192 case V4L2_MBUS_FMT_SBGGR12_1X12:
1193 ccdc_pattern = ccdc_sbggr_pattern;
1194 break;
1195 case V4L2_MBUS_FMT_SGBRG10_1X10:
1196 case V4L2_MBUS_FMT_SGBRG12_1X12:
1197 ccdc_pattern = ccdc_sgbrg_pattern;
1198 break;
1199 default:
1200 /* Use GRBG */
1201 ccdc_pattern = ccdc_sgrbg_pattern;
1202 break;
1203 }
1204 ccdc_config_imgattr(ccdc, ccdc_pattern);
1205
1206 /* Generate VD0 on the last line of the image and VD1 on the
1207 * 2/3 height line.
1208 */
1209 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1210 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1211 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1212
1213 /* CCDC_PAD_SOURCE_OF */
1214 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1215
1216 isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1217 ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1218 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1219 isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
1220 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1221 isp_reg_writel(isp, (format->height - 1)
1222 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1223 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1224
1225 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1226
1227 /* CCDC_PAD_SOURCE_VP */
1228 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1229
1230 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1231 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1232 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1233 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1234 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1235 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1236
1237 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1238 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1239 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1240
1241 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1242 if (ccdc->lsc.request == NULL)
1243 goto unlock;
1244
1245 WARN_ON(ccdc->lsc.active);
1246
1247 /* Get last good LSC configuration. If it is not supported for
1248 * the current active resolution discard it.
1249 */
1250 if (ccdc->lsc.active == NULL &&
1251 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1252 ccdc->lsc.active = ccdc->lsc.request;
1253 } else {
1254 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1255 schedule_work(&ccdc->lsc.table_work);
1256 }
1257
1258 ccdc->lsc.request = NULL;
1259
1260 unlock:
1261 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1262
1263 ccdc_apply_controls(ccdc);
1264 }
1265
1266 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1267 {
1268 struct isp_device *isp = to_isp_device(ccdc);
1269
1270 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1271 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1272 }
1273
1274 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1275 {
1276 unsigned long flags;
1277 int ret = 0;
1278
1279 spin_lock_irqsave(&ccdc->lock, flags);
1280 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1281 ccdc->stopping = CCDC_STOP_REQUEST;
1282 spin_unlock_irqrestore(&ccdc->lock, flags);
1283
1284 ret = wait_event_timeout(ccdc->wait,
1285 ccdc->stopping == CCDC_STOP_FINISHED,
1286 msecs_to_jiffies(2000));
1287 if (ret == 0) {
1288 ret = -ETIMEDOUT;
1289 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1290 }
1291
1292 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1293
1294 mutex_lock(&ccdc->ioctl_lock);
1295 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1296 ccdc->lsc.request = ccdc->lsc.active;
1297 ccdc->lsc.active = NULL;
1298 cancel_work_sync(&ccdc->lsc.table_work);
1299 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1300 mutex_unlock(&ccdc->ioctl_lock);
1301
1302 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1303
1304 return ret > 0 ? 0 : ret;
1305 }
1306
1307 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1308 {
1309 if (ccdc_lsc_is_configured(ccdc))
1310 __ccdc_lsc_enable(ccdc, 1);
1311 __ccdc_enable(ccdc, 1);
1312 }
1313
1314 /* -----------------------------------------------------------------------------
1315 * Interrupt handling
1316 */
1317
1318 /*
1319 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1320 * @ccdc: Pointer to ISP CCDC device.
1321 *
1322 * Returns zero if the CCDC is idle and the image has been written to
1323 * memory, too.
1324 */
1325 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1326 {
1327 struct isp_device *isp = to_isp_device(ccdc);
1328
1329 return omap3isp_ccdc_busy(ccdc)
1330 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1331 ISPSBL_CCDC_WR_0_DATA_READY)
1332 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1333 ISPSBL_CCDC_WR_0_DATA_READY)
1334 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1335 ISPSBL_CCDC_WR_0_DATA_READY)
1336 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1337 ISPSBL_CCDC_WR_0_DATA_READY);
1338 }
1339
1340 /*
1341 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1342 * @ccdc: Pointer to ISP CCDC device.
1343 * @max_wait: Max retry count in us for wait for idle/busy transition.
1344 */
1345 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1346 unsigned int max_wait)
1347 {
1348 unsigned int wait = 0;
1349
1350 if (max_wait == 0)
1351 max_wait = 10000; /* 10 ms */
1352
1353 for (wait = 0; wait <= max_wait; wait++) {
1354 if (!ccdc_sbl_busy(ccdc))
1355 return 0;
1356
1357 rmb();
1358 udelay(1);
1359 }
1360
1361 return -EBUSY;
1362 }
1363
1364 /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1365 * @ccdc: Pointer to ISP CCDC device.
1366 * @event: Pointing which event trigger handler
1367 *
1368 * Return 1 when the event and stopping request combination is satisfied,
1369 * zero otherwise.
1370 */
1371 static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1372 {
1373 int rval = 0;
1374
1375 switch ((ccdc->stopping & 3) | event) {
1376 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1377 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1378 __ccdc_lsc_enable(ccdc, 0);
1379 __ccdc_enable(ccdc, 0);
1380 ccdc->stopping = CCDC_STOP_EXECUTED;
1381 return 1;
1382
1383 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1384 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1385 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1386 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1387 rval = 1;
1388 break;
1389
1390 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1391 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1392 rval = 1;
1393 break;
1394
1395 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1396 return 1;
1397 }
1398
1399 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1400 wake_up(&ccdc->wait);
1401 rval = 1;
1402 }
1403
1404 return rval;
1405 }
1406
1407 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1408 {
1409 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1410 struct video_device *vdev = ccdc->subdev.devnode;
1411 struct v4l2_event event;
1412
1413 memset(&event, 0, sizeof(event));
1414 event.type = V4L2_EVENT_FRAME_SYNC;
1415 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1416
1417 v4l2_event_queue(vdev, &event);
1418 }
1419
1420 /*
1421 * ccdc_lsc_isr - Handle LSC events
1422 * @ccdc: Pointer to ISP CCDC device.
1423 * @events: LSC events
1424 */
1425 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1426 {
1427 unsigned long flags;
1428
1429 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1430 struct isp_pipeline *pipe =
1431 to_isp_pipeline(&ccdc->subdev.entity);
1432
1433 ccdc_lsc_error_handler(ccdc);
1434 pipe->error = true;
1435 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1436 }
1437
1438 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1439 return;
1440
1441 /* LSC_DONE interrupt occur, there are two cases
1442 * 1. stopping for reconfiguration
1443 * 2. stopping because of STREAM OFF command
1444 */
1445 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1446
1447 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1448 ccdc->lsc.state = LSC_STATE_STOPPED;
1449
1450 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1451 goto done;
1452
1453 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1454 goto done;
1455
1456 /* LSC is in STOPPING state, change to the new state */
1457 ccdc->lsc.state = LSC_STATE_STOPPED;
1458
1459 /* This is an exception. Start of frame and LSC_DONE interrupt
1460 * have been received on the same time. Skip this event and wait
1461 * for better times.
1462 */
1463 if (events & IRQ0STATUS_HS_VS_IRQ)
1464 goto done;
1465
1466 /* The LSC engine is stopped at this point. Enable it if there's a
1467 * pending request.
1468 */
1469 if (ccdc->lsc.request == NULL)
1470 goto done;
1471
1472 ccdc_lsc_enable(ccdc);
1473
1474 done:
1475 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1476 }
1477
1478 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1479 {
1480 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1481 struct isp_device *isp = to_isp_device(ccdc);
1482 struct isp_buffer *buffer;
1483 int restart = 0;
1484
1485 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1486 * doesn't explicitly state if that's supposed to happen or not, so it
1487 * can be considered as a hardware bug or as a feature, but we have to
1488 * deal with it anyway). Disabling the CCDC when no buffer is available
1489 * would thus not be enough, we need to handle the situation explicitly.
1490 */
1491 if (list_empty(&ccdc->video_out.dmaqueue))
1492 goto done;
1493
1494 /* We're in continuous mode, and memory writes were disabled due to a
1495 * buffer underrun. Reenable them now that we have a buffer. The buffer
1496 * address has been set in ccdc_video_queue.
1497 */
1498 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1499 restart = 1;
1500 ccdc->underrun = 0;
1501 goto done;
1502 }
1503
1504 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1505 dev_info(isp->dev, "CCDC won't become idle!\n");
1506 goto done;
1507 }
1508
1509 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1510 if (buffer != NULL) {
1511 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1512 restart = 1;
1513 }
1514
1515 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1516
1517 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1518 isp_pipeline_ready(pipe))
1519 omap3isp_pipeline_set_stream(pipe,
1520 ISP_PIPELINE_STREAM_SINGLESHOT);
1521
1522 done:
1523 return restart;
1524 }
1525
1526 /*
1527 * ccdc_vd0_isr - Handle VD0 event
1528 * @ccdc: Pointer to ISP CCDC device.
1529 *
1530 * Executes LSC deferred enablement before next frame starts.
1531 */
1532 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1533 {
1534 unsigned long flags;
1535 int restart = 0;
1536
1537 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1538 restart = ccdc_isr_buffer(ccdc);
1539
1540 spin_lock_irqsave(&ccdc->lock, flags);
1541 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1542 spin_unlock_irqrestore(&ccdc->lock, flags);
1543 return;
1544 }
1545
1546 if (!ccdc->shadow_update)
1547 ccdc_apply_controls(ccdc);
1548 spin_unlock_irqrestore(&ccdc->lock, flags);
1549
1550 if (restart)
1551 ccdc_enable(ccdc);
1552 }
1553
1554 /*
1555 * ccdc_vd1_isr - Handle VD1 event
1556 * @ccdc: Pointer to ISP CCDC device.
1557 */
1558 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1559 {
1560 unsigned long flags;
1561
1562 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1563
1564 /*
1565 * Depending on the CCDC pipeline state, CCDC stopping should be
1566 * handled differently. In SINGLESHOT we emulate an internal CCDC
1567 * stopping because the CCDC hw works only in continuous mode.
1568 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1569 * data to memory the CCDC and LSC are stopped immediately but
1570 * without change the CCDC stopping state machine. The CCDC
1571 * stopping state machine should be used only when user request
1572 * for stopping is received (SINGLESHOT is an exeption).
1573 */
1574 switch (ccdc->state) {
1575 case ISP_PIPELINE_STREAM_SINGLESHOT:
1576 ccdc->stopping = CCDC_STOP_REQUEST;
1577 break;
1578
1579 case ISP_PIPELINE_STREAM_CONTINUOUS:
1580 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1581 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1582 __ccdc_lsc_enable(ccdc, 0);
1583 __ccdc_enable(ccdc, 0);
1584 }
1585 break;
1586
1587 case ISP_PIPELINE_STREAM_STOPPED:
1588 break;
1589 }
1590
1591 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1592 goto done;
1593
1594 if (ccdc->lsc.request == NULL)
1595 goto done;
1596
1597 /*
1598 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1599 * do the appropriate changes in registers
1600 */
1601 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1602 __ccdc_lsc_enable(ccdc, 0);
1603 ccdc->lsc.state = LSC_STATE_RECONFIG;
1604 goto done;
1605 }
1606
1607 /* LSC has been in STOPPED state, enable it */
1608 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1609 ccdc_lsc_enable(ccdc);
1610
1611 done:
1612 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1613 }
1614
1615 /*
1616 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1617 * @ccdc: Pointer to ISP CCDC device.
1618 * @events: CCDC events
1619 */
1620 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1621 {
1622 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1623 return 0;
1624
1625 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1626 ccdc_vd1_isr(ccdc);
1627
1628 ccdc_lsc_isr(ccdc, events);
1629
1630 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1631 ccdc_vd0_isr(ccdc);
1632
1633 if (events & IRQ0STATUS_HS_VS_IRQ)
1634 ccdc_hs_vs_isr(ccdc);
1635
1636 return 0;
1637 }
1638
1639 /* -----------------------------------------------------------------------------
1640 * ISP video operations
1641 */
1642
1643 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1644 {
1645 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1646
1647 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1648 return -ENODEV;
1649
1650 ccdc_set_outaddr(ccdc, buffer->isp_addr);
1651
1652 /* We now have a buffer queued on the output, restart the pipeline
1653 * on the next CCDC interrupt if running in continuous mode (or when
1654 * starting the stream).
1655 */
1656 ccdc->underrun = 1;
1657
1658 return 0;
1659 }
1660
1661 static const struct isp_video_operations ccdc_video_ops = {
1662 .queue = ccdc_video_queue,
1663 };
1664
1665 /* -----------------------------------------------------------------------------
1666 * V4L2 subdev operations
1667 */
1668
1669 /*
1670 * ccdc_ioctl - CCDC module private ioctl's
1671 * @sd: ISP CCDC V4L2 subdevice
1672 * @cmd: ioctl command
1673 * @arg: ioctl argument
1674 *
1675 * Return 0 on success or a negative error code otherwise.
1676 */
1677 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1678 {
1679 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1680 int ret;
1681
1682 switch (cmd) {
1683 case VIDIOC_OMAP3ISP_CCDC_CFG:
1684 mutex_lock(&ccdc->ioctl_lock);
1685 ret = ccdc_config(ccdc, arg);
1686 mutex_unlock(&ccdc->ioctl_lock);
1687 break;
1688
1689 default:
1690 return -ENOIOCTLCMD;
1691 }
1692
1693 return ret;
1694 }
1695
1696 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1697 struct v4l2_event_subscription *sub)
1698 {
1699 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1700 return -EINVAL;
1701
1702 /* line number is zero at frame start */
1703 if (sub->id != 0)
1704 return -EINVAL;
1705
1706 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
1707 }
1708
1709 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1710 struct v4l2_event_subscription *sub)
1711 {
1712 return v4l2_event_unsubscribe(fh, sub);
1713 }
1714
1715 /*
1716 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1717 * @sd: ISP CCDC V4L2 subdevice
1718 * @enable: Enable/disable stream
1719 *
1720 * When writing to memory, the CCDC hardware can't be enabled without a memory
1721 * buffer to write to. As the s_stream operation is called in response to a
1722 * STREAMON call without any buffer queued yet, just update the enabled field
1723 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1724 *
1725 * When not writing to memory enable the CCDC immediately.
1726 */
1727 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1728 {
1729 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1730 struct isp_device *isp = to_isp_device(ccdc);
1731 int ret = 0;
1732
1733 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1734 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1735 return 0;
1736
1737 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1738 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1739 ISPCCDC_CFG_VDLC);
1740
1741 ccdc_configure(ccdc);
1742
1743 /* TODO: Don't configure the video port if all of its output
1744 * links are inactive.
1745 */
1746 ccdc_config_vp(ccdc);
1747 ccdc_enable_vp(ccdc, 1);
1748 ccdc_print_status(ccdc);
1749 }
1750
1751 switch (enable) {
1752 case ISP_PIPELINE_STREAM_CONTINUOUS:
1753 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1754 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1755
1756 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1757 ccdc_enable(ccdc);
1758
1759 ccdc->underrun = 0;
1760 break;
1761
1762 case ISP_PIPELINE_STREAM_SINGLESHOT:
1763 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1764 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1765 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1766
1767 ccdc_enable(ccdc);
1768 break;
1769
1770 case ISP_PIPELINE_STREAM_STOPPED:
1771 ret = ccdc_disable(ccdc);
1772 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1773 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1774 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1775 ccdc->underrun = 0;
1776 break;
1777 }
1778
1779 ccdc->state = enable;
1780 return ret;
1781 }
1782
1783 static struct v4l2_mbus_framefmt *
1784 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1785 unsigned int pad, enum v4l2_subdev_format_whence which)
1786 {
1787 if (which == V4L2_SUBDEV_FORMAT_TRY)
1788 return v4l2_subdev_get_try_format(fh, pad);
1789 else
1790 return &ccdc->formats[pad];
1791 }
1792
1793 /*
1794 * ccdc_try_format - Try video format on a pad
1795 * @ccdc: ISP CCDC device
1796 * @fh : V4L2 subdev file handle
1797 * @pad: Pad number
1798 * @fmt: Format
1799 */
1800 static void
1801 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1802 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1803 enum v4l2_subdev_format_whence which)
1804 {
1805 struct v4l2_mbus_framefmt *format;
1806 const struct isp_format_info *info;
1807 unsigned int width = fmt->width;
1808 unsigned int height = fmt->height;
1809 unsigned int i;
1810
1811 switch (pad) {
1812 case CCDC_PAD_SINK:
1813 /* TODO: If the CCDC output formatter pad is connected directly
1814 * to the resizer, only YUV formats can be used.
1815 */
1816 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1817 if (fmt->code == ccdc_fmts[i])
1818 break;
1819 }
1820
1821 /* If not found, use SGRBG10 as default */
1822 if (i >= ARRAY_SIZE(ccdc_fmts))
1823 fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1824
1825 /* Clamp the input size. */
1826 fmt->width = clamp_t(u32, width, 32, 4096);
1827 fmt->height = clamp_t(u32, height, 32, 4096);
1828 break;
1829
1830 case CCDC_PAD_SOURCE_OF:
1831 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1832 memcpy(fmt, format, sizeof(*fmt));
1833
1834 /* The data formatter truncates the number of horizontal output
1835 * pixels to a multiple of 16. To avoid clipping data, allow
1836 * callers to request an output size bigger than the input size
1837 * up to the nearest multiple of 16.
1838 */
1839 fmt->width = clamp_t(u32, width, 32, fmt->width + 15);
1840 fmt->width &= ~15;
1841 fmt->height = clamp_t(u32, height, 32, fmt->height);
1842 break;
1843
1844 case CCDC_PAD_SOURCE_VP:
1845 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1846 memcpy(fmt, format, sizeof(*fmt));
1847
1848 /* The video port interface truncates the data to 10 bits. */
1849 info = omap3isp_video_format_info(fmt->code);
1850 fmt->code = info->truncated;
1851
1852 /* The number of lines that can be clocked out from the video
1853 * port output must be at least one line less than the number
1854 * of input lines.
1855 */
1856 fmt->width = clamp_t(u32, width, 32, fmt->width);
1857 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1858 break;
1859 }
1860
1861 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1862 * stored on 2 bytes.
1863 */
1864 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1865 fmt->field = V4L2_FIELD_NONE;
1866 }
1867
1868 /*
1869 * ccdc_enum_mbus_code - Handle pixel format enumeration
1870 * @sd : pointer to v4l2 subdev structure
1871 * @fh : V4L2 subdev file handle
1872 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1873 * return -EINVAL or zero on success
1874 */
1875 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1876 struct v4l2_subdev_fh *fh,
1877 struct v4l2_subdev_mbus_code_enum *code)
1878 {
1879 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1880 struct v4l2_mbus_framefmt *format;
1881
1882 switch (code->pad) {
1883 case CCDC_PAD_SINK:
1884 if (code->index >= ARRAY_SIZE(ccdc_fmts))
1885 return -EINVAL;
1886
1887 code->code = ccdc_fmts[code->index];
1888 break;
1889
1890 case CCDC_PAD_SOURCE_OF:
1891 case CCDC_PAD_SOURCE_VP:
1892 /* No format conversion inside CCDC */
1893 if (code->index != 0)
1894 return -EINVAL;
1895
1896 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
1897 V4L2_SUBDEV_FORMAT_TRY);
1898
1899 code->code = format->code;
1900 break;
1901
1902 default:
1903 return -EINVAL;
1904 }
1905
1906 return 0;
1907 }
1908
1909 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
1910 struct v4l2_subdev_fh *fh,
1911 struct v4l2_subdev_frame_size_enum *fse)
1912 {
1913 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1914 struct v4l2_mbus_framefmt format;
1915
1916 if (fse->index != 0)
1917 return -EINVAL;
1918
1919 format.code = fse->code;
1920 format.width = 1;
1921 format.height = 1;
1922 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1923 fse->min_width = format.width;
1924 fse->min_height = format.height;
1925
1926 if (format.code != fse->code)
1927 return -EINVAL;
1928
1929 format.code = fse->code;
1930 format.width = -1;
1931 format.height = -1;
1932 ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1933 fse->max_width = format.width;
1934 fse->max_height = format.height;
1935
1936 return 0;
1937 }
1938
1939 /*
1940 * ccdc_get_format - Retrieve the video format on a pad
1941 * @sd : ISP CCDC V4L2 subdevice
1942 * @fh : V4L2 subdev file handle
1943 * @fmt: Format
1944 *
1945 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1946 * to the format type.
1947 */
1948 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1949 struct v4l2_subdev_format *fmt)
1950 {
1951 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1952 struct v4l2_mbus_framefmt *format;
1953
1954 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1955 if (format == NULL)
1956 return -EINVAL;
1957
1958 fmt->format = *format;
1959 return 0;
1960 }
1961
1962 /*
1963 * ccdc_set_format - Set the video format on a pad
1964 * @sd : ISP CCDC V4L2 subdevice
1965 * @fh : V4L2 subdev file handle
1966 * @fmt: Format
1967 *
1968 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
1969 * to the format type.
1970 */
1971 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1972 struct v4l2_subdev_format *fmt)
1973 {
1974 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1975 struct v4l2_mbus_framefmt *format;
1976
1977 format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
1978 if (format == NULL)
1979 return -EINVAL;
1980
1981 ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
1982 *format = fmt->format;
1983
1984 /* Propagate the format from sink to source */
1985 if (fmt->pad == CCDC_PAD_SINK) {
1986 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
1987 fmt->which);
1988 *format = fmt->format;
1989 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
1990 fmt->which);
1991
1992 format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
1993 fmt->which);
1994 *format = fmt->format;
1995 ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
1996 fmt->which);
1997 }
1998
1999 return 0;
2000 }
2001
2002 /*
2003 * ccdc_init_formats - Initialize formats on all pads
2004 * @sd: ISP CCDC V4L2 subdevice
2005 * @fh: V4L2 subdev file handle
2006 *
2007 * Initialize all pad formats with default values. If fh is not NULL, try
2008 * formats are initialized on the file handle. Otherwise active formats are
2009 * initialized on the device.
2010 */
2011 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2012 {
2013 struct v4l2_subdev_format format;
2014
2015 memset(&format, 0, sizeof(format));
2016 format.pad = CCDC_PAD_SINK;
2017 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2018 format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2019 format.format.width = 4096;
2020 format.format.height = 4096;
2021 ccdc_set_format(sd, fh, &format);
2022
2023 return 0;
2024 }
2025
2026 /* V4L2 subdev core operations */
2027 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2028 .ioctl = ccdc_ioctl,
2029 .subscribe_event = ccdc_subscribe_event,
2030 .unsubscribe_event = ccdc_unsubscribe_event,
2031 };
2032
2033 /* V4L2 subdev video operations */
2034 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2035 .s_stream = ccdc_set_stream,
2036 };
2037
2038 /* V4L2 subdev pad operations */
2039 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2040 .enum_mbus_code = ccdc_enum_mbus_code,
2041 .enum_frame_size = ccdc_enum_frame_size,
2042 .get_fmt = ccdc_get_format,
2043 .set_fmt = ccdc_set_format,
2044 };
2045
2046 /* V4L2 subdev operations */
2047 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2048 .core = &ccdc_v4l2_core_ops,
2049 .video = &ccdc_v4l2_video_ops,
2050 .pad = &ccdc_v4l2_pad_ops,
2051 };
2052
2053 /* V4L2 subdev internal operations */
2054 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2055 .open = ccdc_init_formats,
2056 };
2057
2058 /* -----------------------------------------------------------------------------
2059 * Media entity operations
2060 */
2061
2062 /*
2063 * ccdc_link_setup - Setup CCDC connections
2064 * @entity: CCDC media entity
2065 * @local: Pad at the local end of the link
2066 * @remote: Pad at the remote end of the link
2067 * @flags: Link flags
2068 *
2069 * return -EINVAL or zero on success
2070 */
2071 static int ccdc_link_setup(struct media_entity *entity,
2072 const struct media_pad *local,
2073 const struct media_pad *remote, u32 flags)
2074 {
2075 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2076 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2077 struct isp_device *isp = to_isp_device(ccdc);
2078
2079 switch (local->index | media_entity_type(remote->entity)) {
2080 case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2081 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2082 * CSI2c.
2083 */
2084 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2085 ccdc->input = CCDC_INPUT_NONE;
2086 break;
2087 }
2088
2089 if (ccdc->input != CCDC_INPUT_NONE)
2090 return -EBUSY;
2091
2092 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2093 ccdc->input = CCDC_INPUT_CCP2B;
2094 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2095 ccdc->input = CCDC_INPUT_CSI2A;
2096 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2097 ccdc->input = CCDC_INPUT_CSI2C;
2098 else
2099 ccdc->input = CCDC_INPUT_PARALLEL;
2100
2101 break;
2102
2103 /*
2104 * The ISP core doesn't support pipelines with multiple video outputs.
2105 * Revisit this when it will be implemented, and return -EBUSY for now.
2106 */
2107
2108 case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2109 /* Write to preview engine, histogram and H3A. When none of
2110 * those links are active, the video port can be disabled.
2111 */
2112 if (flags & MEDIA_LNK_FL_ENABLED) {
2113 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2114 return -EBUSY;
2115 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2116 } else {
2117 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2118 }
2119 break;
2120
2121 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2122 /* Write to memory */
2123 if (flags & MEDIA_LNK_FL_ENABLED) {
2124 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2125 return -EBUSY;
2126 ccdc->output |= CCDC_OUTPUT_MEMORY;
2127 } else {
2128 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2129 }
2130 break;
2131
2132 case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2133 /* Write to resizer */
2134 if (flags & MEDIA_LNK_FL_ENABLED) {
2135 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2136 return -EBUSY;
2137 ccdc->output |= CCDC_OUTPUT_RESIZER;
2138 } else {
2139 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2140 }
2141 break;
2142
2143 default:
2144 return -EINVAL;
2145 }
2146
2147 return 0;
2148 }
2149
2150 /* media operations */
2151 static const struct media_entity_operations ccdc_media_ops = {
2152 .link_setup = ccdc_link_setup,
2153 };
2154
2155 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2156 {
2157 v4l2_device_unregister_subdev(&ccdc->subdev);
2158 omap3isp_video_unregister(&ccdc->video_out);
2159 }
2160
2161 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2162 struct v4l2_device *vdev)
2163 {
2164 int ret;
2165
2166 /* Register the subdev and video node. */
2167 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2168 if (ret < 0)
2169 goto error;
2170
2171 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2172 if (ret < 0)
2173 goto error;
2174
2175 return 0;
2176
2177 error:
2178 omap3isp_ccdc_unregister_entities(ccdc);
2179 return ret;
2180 }
2181
2182 /* -----------------------------------------------------------------------------
2183 * ISP CCDC initialisation and cleanup
2184 */
2185
2186 /*
2187 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2188 * @ccdc: ISP CCDC module
2189 *
2190 * Return 0 on success and a negative error code on failure.
2191 */
2192 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2193 {
2194 struct v4l2_subdev *sd = &ccdc->subdev;
2195 struct media_pad *pads = ccdc->pads;
2196 struct media_entity *me = &sd->entity;
2197 int ret;
2198
2199 ccdc->input = CCDC_INPUT_NONE;
2200
2201 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2202 sd->internal_ops = &ccdc_v4l2_internal_ops;
2203 strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2204 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2205 v4l2_set_subdevdata(sd, ccdc);
2206 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2207
2208 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2209 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2210 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2211
2212 me->ops = &ccdc_media_ops;
2213 ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2214 if (ret < 0)
2215 return ret;
2216
2217 ccdc_init_formats(sd, NULL);
2218
2219 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2220 ccdc->video_out.ops = &ccdc_video_ops;
2221 ccdc->video_out.isp = to_isp_device(ccdc);
2222 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2223 ccdc->video_out.bpl_alignment = 32;
2224
2225 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2226 if (ret < 0)
2227 goto error_video;
2228
2229 /* Connect the CCDC subdev to the video node. */
2230 ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2231 &ccdc->video_out.video.entity, 0, 0);
2232 if (ret < 0)
2233 goto error_link;
2234
2235 return 0;
2236
2237 error_link:
2238 omap3isp_video_cleanup(&ccdc->video_out);
2239 error_video:
2240 media_entity_cleanup(me);
2241 return ret;
2242 }
2243
2244 /*
2245 * omap3isp_ccdc_init - CCDC module initialization.
2246 * @dev: Device pointer specific to the OMAP3 ISP.
2247 *
2248 * TODO: Get the initialisation values from platform data.
2249 *
2250 * Return 0 on success or a negative error code otherwise.
2251 */
2252 int omap3isp_ccdc_init(struct isp_device *isp)
2253 {
2254 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2255 int ret;
2256
2257 spin_lock_init(&ccdc->lock);
2258 init_waitqueue_head(&ccdc->wait);
2259 mutex_init(&ccdc->ioctl_lock);
2260
2261 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2262
2263 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2264 ccdc->lsc.state = LSC_STATE_STOPPED;
2265 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2266 spin_lock_init(&ccdc->lsc.req_lock);
2267
2268 ccdc->syncif.ccdc_mastermode = 0;
2269 ccdc->syncif.datapol = 0;
2270 ccdc->syncif.datsz = 0;
2271 ccdc->syncif.fldmode = 0;
2272 ccdc->syncif.fldout = 0;
2273 ccdc->syncif.fldpol = 0;
2274 ccdc->syncif.fldstat = 0;
2275
2276 ccdc->clamp.oblen = 0;
2277 ccdc->clamp.dcsubval = 0;
2278
2279 ccdc->vpcfg.pixelclk = 0;
2280
2281 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2282 ccdc_apply_controls(ccdc);
2283
2284 ret = ccdc_init_entities(ccdc);
2285 if (ret < 0) {
2286 mutex_destroy(&ccdc->ioctl_lock);
2287 return ret;
2288 }
2289
2290 return 0;
2291 }
2292
2293 /*
2294 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2295 * @dev: Device pointer specific to the OMAP3 ISP.
2296 */
2297 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2298 {
2299 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2300
2301 omap3isp_video_cleanup(&ccdc->video_out);
2302 media_entity_cleanup(&ccdc->subdev.entity);
2303
2304 /* Free LSC requests. As the CCDC is stopped there's no active request,
2305 * so only the pending request and the free queue need to be handled.
2306 */
2307 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2308 cancel_work_sync(&ccdc->lsc.table_work);
2309 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2310
2311 if (ccdc->fpc.fpcaddr != 0)
2312 omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
2313
2314 mutex_destroy(&ccdc->ioctl_lock);
2315 }