Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / message / fusion / lsi / mpi_init.h
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1 /*
2 * Copyright (c) 2000-2008 LSI Corporation.
5 * Name: mpi_init.h
6 * Title: MPI initiator mode messages and structures
7 * Creation Date: June 8, 2000
9 * mpi_init.h Version: 01.05.09
11 * Version History
12 * ---------------
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
18 * 06-06-00 01.00.01 Update version number for 1.0 release.
19 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
20 * 11-02-00 01.01.01 Original release for post 1.0 work.
21 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
22 * 02-20-01 01.01.03 Started using MPI_POINTER.
23 * 03-27-01 01.01.04 Added structure offset comments.
24 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
25 * 08-08-01 01.02.01 Original release for v1.2 work.
26 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
27 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
28 * MSG_SCSI_IO_REPLY.
29 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
30 * Processor messages.
31 * 10-04-01 01.02.04 Added defines for SEP request Action field.
32 * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
33 * for SCSI IO requests.
34 * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
35 * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
36 * 05-11-04 01.03.01 Original release for MPI v1.3.
37 * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
38 * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
39 * and a reserved U16.
40 * Added new MSG_SCSI_IO32_REQUEST structure.
41 * Added a TaskType of Clear Task Set to SCSI
42 * Task Management request.
43 * 12-07-04 01.05.02 Added support for Task Management Query Task.
44 * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
45 * WWID addressing.
46 * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
47 * Removed SCSI IO 32 Request.
48 * Modified SCSI Enclosure Processor Request and Reply to
49 * support Enclosure/Slot addressing rather than WWID
50 * addressing.
51 * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines.
52 * Added four new defines for SEP SlotStatus.
53 * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
54 * unique in the first 32 characters.
55 * 03-27-06 01.05.07 Added Task Management type of Clear ACA.
56 * 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA.
57 * 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management
58 * Request: Do Not Send Task IU and Soft Reset Option.
59 * --------------------------------------------------------------------------
62 #ifndef MPI_INIT_H
63 #define MPI_INIT_H
66 /*****************************************************************************
68 * S C S I I n i t i a t o r M e s s a g e s
70 *****************************************************************************/
72 /****************************************************************************/
73 /* SCSI IO messages and associated structures */
74 /****************************************************************************/
76 typedef struct _MSG_SCSI_IO_REQUEST
78 U8 TargetID; /* 00h */
79 U8 Bus; /* 01h */
80 U8 ChainOffset; /* 02h */
81 U8 Function; /* 03h */
82 U8 CDBLength; /* 04h */
83 U8 SenseBufferLength; /* 05h */
84 U8 Reserved; /* 06h */
85 U8 MsgFlags; /* 07h */
86 U32 MsgContext; /* 08h */
87 U8 LUN[8]; /* 0Ch */
88 U32 Control; /* 14h */
89 U8 CDB[16]; /* 18h */
90 U32 DataLength; /* 28h */
91 U32 SenseBufferLowAddr; /* 2Ch */
92 SGE_IO_UNION SGL; /* 30h */
93 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
94 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
97 /* SCSI IO MsgFlags bits */
99 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
100 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
101 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
103 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
104 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
105 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
107 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
109 /* SCSI IO LUN fields */
111 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
112 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
113 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
114 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
115 #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
116 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
118 /* SCSI IO Control bits */
120 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
121 #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
122 #define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
123 #define MPI_SCSIIO_CONTROL_READ (0x02000000)
125 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
126 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
128 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
129 #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
130 #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
131 #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
132 #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
133 #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
134 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
136 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
137 #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
138 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
139 #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
140 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
141 #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
142 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
143 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
144 #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
147 /* SCSI IO reply structure */
148 typedef struct _MSG_SCSI_IO_REPLY
150 U8 TargetID; /* 00h */
151 U8 Bus; /* 01h */
152 U8 MsgLength; /* 02h */
153 U8 Function; /* 03h */
154 U8 CDBLength; /* 04h */
155 U8 SenseBufferLength; /* 05h */
156 U8 Reserved; /* 06h */
157 U8 MsgFlags; /* 07h */
158 U32 MsgContext; /* 08h */
159 U8 SCSIStatus; /* 0Ch */
160 U8 SCSIState; /* 0Dh */
161 U16 IOCStatus; /* 0Eh */
162 U32 IOCLogInfo; /* 10h */
163 U32 TransferCount; /* 14h */
164 U32 SenseCount; /* 18h */
165 U32 ResponseInfo; /* 1Ch */
166 U16 TaskTag; /* 20h */
167 U16 Reserved1; /* 22h */
168 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
169 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
172 /* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
174 #define MPI_SCSI_STATUS_SUCCESS (0x00)
175 #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
176 #define MPI_SCSI_STATUS_CONDITION_MET (0x04)
177 #define MPI_SCSI_STATUS_BUSY (0x08)
178 #define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
179 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
180 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
181 #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
182 #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
183 #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
185 #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
186 #define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
187 #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
190 /* SCSI IO Reply SCSIState values */
192 #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
193 #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
194 #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
195 #define MPI_SCSI_STATE_TERMINATED (0x08)
196 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
197 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
199 /* SCSI IO Reply ResponseInfo values */
200 /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
202 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
203 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
204 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
205 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
206 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
207 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
208 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
210 #define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
213 /****************************************************************************/
214 /* SCSI IO 32 messages and associated structures */
215 /****************************************************************************/
217 typedef struct
219 U8 CDB[20]; /* 00h */
220 U32 PrimaryReferenceTag; /* 14h */
221 U16 PrimaryApplicationTag; /* 18h */
222 U16 PrimaryApplicationTagMask; /* 1Ah */
223 U32 TransferLength; /* 1Ch */
224 } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
225 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
227 typedef struct
229 U8 CDB[16]; /* 00h */
230 U32 DataLength; /* 10h */
231 U32 PrimaryReferenceTag; /* 14h */
232 U16 PrimaryApplicationTag; /* 18h */
233 U16 PrimaryApplicationTagMask; /* 1Ah */
234 U32 TransferLength; /* 1Ch */
235 } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
236 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
238 typedef union
240 U8 CDB32[32];
241 MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
242 MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
243 SGE_SIMPLE_UNION SGE;
244 } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
245 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
247 typedef struct
249 U8 TargetID; /* 00h */
250 U8 Bus; /* 01h */
251 U16 Reserved1; /* 02h */
252 U32 Reserved2; /* 04h */
253 } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
254 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
256 typedef union
258 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
259 U64 WWID;
260 } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
261 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
263 typedef struct _MSG_SCSI_IO32_REQUEST
265 U8 Port; /* 00h */
266 U8 Reserved1; /* 01h */
267 U8 ChainOffset; /* 02h */
268 U8 Function; /* 03h */
269 U8 CDBLength; /* 04h */
270 U8 SenseBufferLength; /* 05h */
271 U8 Flags; /* 06h */
272 U8 MsgFlags; /* 07h */
273 U32 MsgContext; /* 08h */
274 U8 LUN[8]; /* 0Ch */
275 U32 Control; /* 14h */
276 MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */
277 U32 DataLength; /* 38h */
278 U32 BidirectionalDataLength; /* 3Ch */
279 U32 SecondaryReferenceTag; /* 40h */
280 U16 SecondaryApplicationTag; /* 44h */
281 U16 Reserved2; /* 46h */
282 U16 EEDPFlags; /* 48h */
283 U16 ApplicationTagTranslationMask; /* 4Ah */
284 U32 EEDPBlockSize; /* 4Ch */
285 MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */
286 U8 SGLOffset0; /* 58h */
287 U8 SGLOffset1; /* 59h */
288 U8 SGLOffset2; /* 5Ah */
289 U8 SGLOffset3; /* 5Bh */
290 U32 Reserved3; /* 5Ch */
291 U32 Reserved4; /* 60h */
292 U32 SenseBufferLowAddr; /* 64h */
293 SGE_IO_UNION SGL; /* 68h */
294 } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
295 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
297 /* SCSI IO 32 MsgFlags bits */
298 #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
299 #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
300 #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
302 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
303 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
304 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
306 #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
307 #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
308 #define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
309 #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
310 #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
312 /* SCSI IO 32 Flags bits */
313 #define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
314 #define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
315 #define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
317 /* SCSI IO 32 LUN fields */
318 #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
319 #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
320 #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
321 #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
322 #define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
323 #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
325 /* SCSI IO 32 Control bits */
326 #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
327 #define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
328 #define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
329 #define MPI_SCSIIO32_CONTROL_READ (0x02000000)
330 #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
332 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
333 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
335 #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
336 #define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
337 #define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
338 #define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
339 #define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
340 #define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
341 #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
343 #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
344 #define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
345 #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
346 #define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
347 #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
348 #define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
349 #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
350 #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
351 #define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
353 /* SCSI IO 32 EEDPFlags */
354 #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
355 #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
356 #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
357 #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
358 #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
359 #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
360 #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
361 #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
363 #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
364 #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
366 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
367 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
368 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
369 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
370 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
372 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
373 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
374 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
375 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
378 /* SCSIIO32 IO reply structure */
379 typedef struct _MSG_SCSIIO32_IO_REPLY
381 U8 Port; /* 00h */
382 U8 Reserved1; /* 01h */
383 U8 MsgLength; /* 02h */
384 U8 Function; /* 03h */
385 U8 CDBLength; /* 04h */
386 U8 SenseBufferLength; /* 05h */
387 U8 Flags; /* 06h */
388 U8 MsgFlags; /* 07h */
389 U32 MsgContext; /* 08h */
390 U8 SCSIStatus; /* 0Ch */
391 U8 SCSIState; /* 0Dh */
392 U16 IOCStatus; /* 0Eh */
393 U32 IOCLogInfo; /* 10h */
394 U32 TransferCount; /* 14h */
395 U32 SenseCount; /* 18h */
396 U32 ResponseInfo; /* 1Ch */
397 U16 TaskTag; /* 20h */
398 U16 Reserved2; /* 22h */
399 U32 BidirectionalTransferCount; /* 24h */
400 } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
401 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
404 /****************************************************************************/
405 /* SCSI Task Management messages */
406 /****************************************************************************/
408 typedef struct _MSG_SCSI_TASK_MGMT
410 U8 TargetID; /* 00h */
411 U8 Bus; /* 01h */
412 U8 ChainOffset; /* 02h */
413 U8 Function; /* 03h */
414 U8 Reserved; /* 04h */
415 U8 TaskType; /* 05h */
416 U8 Reserved1; /* 06h */
417 U8 MsgFlags; /* 07h */
418 U32 MsgContext; /* 08h */
419 U8 LUN[8]; /* 0Ch */
420 U32 Reserved2[7]; /* 14h */
421 U32 TaskMsgContext; /* 30h */
422 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
423 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
425 /* TaskType values */
427 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
428 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
429 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
430 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
431 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
432 #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
433 #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
434 #define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
436 /* MsgFlags bits */
437 #define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
439 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
440 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
441 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
443 #define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08)
445 /* SCSI Task Management Reply */
446 typedef struct _MSG_SCSI_TASK_MGMT_REPLY
448 U8 TargetID; /* 00h */
449 U8 Bus; /* 01h */
450 U8 MsgLength; /* 02h */
451 U8 Function; /* 03h */
452 U8 ResponseCode; /* 04h */
453 U8 TaskType; /* 05h */
454 U8 Reserved1; /* 06h */
455 U8 MsgFlags; /* 07h */
456 U32 MsgContext; /* 08h */
457 U8 Reserved2[2]; /* 0Ch */
458 U16 IOCStatus; /* 0Eh */
459 U32 IOCLogInfo; /* 10h */
460 U32 TerminationCount; /* 14h */
461 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
462 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
464 /* ResponseCode values */
465 #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
466 #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
467 #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
468 #define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
469 #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
470 #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
471 #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
474 /****************************************************************************/
475 /* SCSI Enclosure Processor messages */
476 /****************************************************************************/
478 typedef struct _MSG_SEP_REQUEST
480 U8 TargetID; /* 00h */
481 U8 Bus; /* 01h */
482 U8 ChainOffset; /* 02h */
483 U8 Function; /* 03h */
484 U8 Action; /* 04h */
485 U8 Flags; /* 05h */
486 U8 Reserved1; /* 06h */
487 U8 MsgFlags; /* 07h */
488 U32 MsgContext; /* 08h */
489 U32 SlotStatus; /* 0Ch */
490 U32 Reserved2; /* 10h */
491 U32 Reserved3; /* 14h */
492 U32 Reserved4; /* 18h */
493 U16 Slot; /* 1Ch */
494 U16 EnclosureHandle; /* 1Eh */
495 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
496 SEPRequest_t, MPI_POINTER pSEPRequest_t;
498 /* Action defines */
499 #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
500 #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
502 /* Flags defines */
503 #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
504 #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
506 /* SlotStatus bits for MSG_SEP_REQUEST */
507 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
508 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
509 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
510 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
511 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
512 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
513 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
514 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
515 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
516 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
517 #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
518 #define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
519 #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
520 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
521 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
522 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
523 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
524 #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
525 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
526 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
527 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
528 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
531 typedef struct _MSG_SEP_REPLY
533 U8 TargetID; /* 00h */
534 U8 Bus; /* 01h */
535 U8 MsgLength; /* 02h */
536 U8 Function; /* 03h */
537 U8 Action; /* 04h */
538 U8 Reserved1; /* 05h */
539 U8 Reserved2; /* 06h */
540 U8 MsgFlags; /* 07h */
541 U32 MsgContext; /* 08h */
542 U16 Reserved3; /* 0Ch */
543 U16 IOCStatus; /* 0Eh */
544 U32 IOCLogInfo; /* 10h */
545 U32 SlotStatus; /* 14h */
546 U32 Reserved4; /* 18h */
547 U16 Slot; /* 1Ch */
548 U16 EnclosureHandle; /* 1Eh */
549 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
550 SEPReply_t, MPI_POINTER pSEPReply_t;
552 /* SlotStatus bits for MSG_SEP_REPLY */
553 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
554 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
555 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
556 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
557 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
558 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
559 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
560 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
561 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
562 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
563 #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
564 #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
565 #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
566 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
567 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
568 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
569 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
570 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
571 #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
572 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
573 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
574 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
575 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
576 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
577 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
578 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
580 #endif