Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / mmc / host / tmio_mmc_pio.c
blob5f9ad74fbf80b3a4a3556c5c5919c9ba525c610d
1 /*
2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
20 * TODO:
21 * Investigate using a workqueue for PIO transfers
22 * Eliminate FIXMEs
23 * SDIO support
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
34 #include <linux/io.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/tmio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/scatterlist.h>
44 #include <linux/spinlock.h>
45 #include <linux/workqueue.h>
47 #include "tmio_mmc.h"
49 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
51 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
52 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
55 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
57 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
58 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
61 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
63 sd_ctrl_write32(host, CTL_STATUS, ~i);
66 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
68 host->sg_len = data->sg_len;
69 host->sg_ptr = data->sg;
70 host->sg_orig = data->sg;
71 host->sg_off = 0;
74 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
76 host->sg_ptr = sg_next(host->sg_ptr);
77 host->sg_off = 0;
78 return --host->sg_len;
81 #ifdef CONFIG_MMC_DEBUG
83 #define STATUS_TO_TEXT(a, status, i) \
84 do { \
85 if (status & TMIO_STAT_##a) { \
86 if (i++) \
87 printk(" | "); \
88 printk(#a); \
89 } \
90 } while (0)
92 static void pr_debug_status(u32 status)
94 int i = 0;
95 pr_debug("status: %08x = ", status);
96 STATUS_TO_TEXT(CARD_REMOVE, status, i);
97 STATUS_TO_TEXT(CARD_INSERT, status, i);
98 STATUS_TO_TEXT(SIGSTATE, status, i);
99 STATUS_TO_TEXT(WRPROTECT, status, i);
100 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
101 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
102 STATUS_TO_TEXT(SIGSTATE_A, status, i);
103 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
104 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
105 STATUS_TO_TEXT(ILL_FUNC, status, i);
106 STATUS_TO_TEXT(CMD_BUSY, status, i);
107 STATUS_TO_TEXT(CMDRESPEND, status, i);
108 STATUS_TO_TEXT(DATAEND, status, i);
109 STATUS_TO_TEXT(CRCFAIL, status, i);
110 STATUS_TO_TEXT(DATATIMEOUT, status, i);
111 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
112 STATUS_TO_TEXT(RXOVERFLOW, status, i);
113 STATUS_TO_TEXT(TXUNDERRUN, status, i);
114 STATUS_TO_TEXT(RXRDY, status, i);
115 STATUS_TO_TEXT(TXRQ, status, i);
116 STATUS_TO_TEXT(ILL_ACCESS, status, i);
117 printk("\n");
120 #else
121 #define pr_debug_status(s) do { } while (0)
122 #endif
124 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
126 struct tmio_mmc_host *host = mmc_priv(mmc);
128 if (enable) {
129 host->sdio_irq_enabled = 1;
130 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
131 ~TMIO_SDIO_STAT_IOIRQ;
132 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
133 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
134 } else {
135 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
136 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
137 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
138 host->sdio_irq_enabled = 0;
142 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
144 u32 clk = 0, clock;
146 if (new_clock) {
147 for (clock = host->mmc->f_min, clk = 0x80000080;
148 new_clock >= (clock<<1); clk >>= 1)
149 clock <<= 1;
150 clk |= 0x100;
153 if (host->set_clk_div)
154 host->set_clk_div(host->pdev, (clk>>22) & 1);
156 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
159 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
161 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
163 /* implicit BUG_ON(!res) */
164 if (resource_size(res) > 0x100) {
165 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
166 msleep(10);
169 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
170 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
171 msleep(10);
174 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
176 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
178 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
179 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
180 msleep(10);
182 /* implicit BUG_ON(!res) */
183 if (resource_size(res) > 0x100) {
184 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
185 msleep(10);
189 static void tmio_mmc_reset(struct tmio_mmc_host *host)
191 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 /* implicit BUG_ON(!res) */
196 if (resource_size(res) > 0x100)
197 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
198 msleep(10);
199 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
200 if (resource_size(res) > 0x100)
201 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
202 msleep(10);
205 static void tmio_mmc_reset_work(struct work_struct *work)
207 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
208 delayed_reset_work.work);
209 struct mmc_request *mrq;
210 unsigned long flags;
212 spin_lock_irqsave(&host->lock, flags);
213 mrq = host->mrq;
216 * is request already finished? Since we use a non-blocking
217 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
218 * us, so, have to check for IS_ERR(host->mrq)
220 if (IS_ERR_OR_NULL(mrq)
221 || time_is_after_jiffies(host->last_req_ts +
222 msecs_to_jiffies(2000))) {
223 spin_unlock_irqrestore(&host->lock, flags);
224 return;
227 dev_warn(&host->pdev->dev,
228 "timeout waiting for hardware interrupt (CMD%u)\n",
229 mrq->cmd->opcode);
231 if (host->data)
232 host->data->error = -ETIMEDOUT;
233 else if (host->cmd)
234 host->cmd->error = -ETIMEDOUT;
235 else
236 mrq->cmd->error = -ETIMEDOUT;
238 host->cmd = NULL;
239 host->data = NULL;
240 host->force_pio = false;
242 spin_unlock_irqrestore(&host->lock, flags);
244 tmio_mmc_reset(host);
246 /* Ready for new calls */
247 host->mrq = NULL;
249 tmio_mmc_abort_dma(host);
250 mmc_request_done(host->mmc, mrq);
253 /* called with host->lock held, interrupts disabled */
254 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
256 struct mmc_request *mrq;
257 unsigned long flags;
259 spin_lock_irqsave(&host->lock, flags);
261 mrq = host->mrq;
262 if (IS_ERR_OR_NULL(mrq)) {
263 spin_unlock_irqrestore(&host->lock, flags);
264 return;
267 host->cmd = NULL;
268 host->data = NULL;
269 host->force_pio = false;
271 cancel_delayed_work(&host->delayed_reset_work);
273 host->mrq = NULL;
274 spin_unlock_irqrestore(&host->lock, flags);
276 if (mrq->cmd->error || (mrq->data && mrq->data->error))
277 tmio_mmc_abort_dma(host);
279 mmc_request_done(host->mmc, mrq);
282 static void tmio_mmc_done_work(struct work_struct *work)
284 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
285 done);
286 tmio_mmc_finish_request(host);
289 /* These are the bitmasks the tmio chip requires to implement the MMC response
290 * types. Note that R1 and R6 are the same in this scheme. */
291 #define APP_CMD 0x0040
292 #define RESP_NONE 0x0300
293 #define RESP_R1 0x0400
294 #define RESP_R1B 0x0500
295 #define RESP_R2 0x0600
296 #define RESP_R3 0x0700
297 #define DATA_PRESENT 0x0800
298 #define TRANSFER_READ 0x1000
299 #define TRANSFER_MULTI 0x2000
300 #define SECURITY_CMD 0x4000
302 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
304 struct mmc_data *data = host->data;
305 int c = cmd->opcode;
307 /* Command 12 is handled by hardware */
308 if (cmd->opcode == 12 && !cmd->arg) {
309 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
310 return 0;
313 switch (mmc_resp_type(cmd)) {
314 case MMC_RSP_NONE: c |= RESP_NONE; break;
315 case MMC_RSP_R1: c |= RESP_R1; break;
316 case MMC_RSP_R1B: c |= RESP_R1B; break;
317 case MMC_RSP_R2: c |= RESP_R2; break;
318 case MMC_RSP_R3: c |= RESP_R3; break;
319 default:
320 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
321 return -EINVAL;
324 host->cmd = cmd;
326 /* FIXME - this seems to be ok commented out but the spec suggest this bit
327 * should be set when issuing app commands.
328 * if(cmd->flags & MMC_FLAG_ACMD)
329 * c |= APP_CMD;
331 if (data) {
332 c |= DATA_PRESENT;
333 if (data->blocks > 1) {
334 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
335 c |= TRANSFER_MULTI;
337 if (data->flags & MMC_DATA_READ)
338 c |= TRANSFER_READ;
341 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
343 /* Fire off the command */
344 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
345 sd_ctrl_write16(host, CTL_SD_CMD, c);
347 return 0;
351 * This chip always returns (at least?) as much data as you ask for.
352 * I'm unsure what happens if you ask for less than a block. This should be
353 * looked into to ensure that a funny length read doesn't hose the controller.
355 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
357 struct mmc_data *data = host->data;
358 void *sg_virt;
359 unsigned short *buf;
360 unsigned int count;
361 unsigned long flags;
363 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
364 pr_err("PIO IRQ in DMA mode!\n");
365 return;
366 } else if (!data) {
367 pr_debug("Spurious PIO IRQ\n");
368 return;
371 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
372 buf = (unsigned short *)(sg_virt + host->sg_off);
374 count = host->sg_ptr->length - host->sg_off;
375 if (count > data->blksz)
376 count = data->blksz;
378 pr_debug("count: %08x offset: %08x flags %08x\n",
379 count, host->sg_off, data->flags);
381 /* Transfer the data */
382 if (data->flags & MMC_DATA_READ)
383 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
384 else
385 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
387 host->sg_off += count;
389 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
391 if (host->sg_off == host->sg_ptr->length)
392 tmio_mmc_next_sg(host);
394 return;
397 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
399 if (host->sg_ptr == &host->bounce_sg) {
400 unsigned long flags;
401 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
402 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
403 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
407 /* needs to be called with host->lock held */
408 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
410 struct mmc_data *data = host->data;
411 struct mmc_command *stop;
413 host->data = NULL;
415 if (!data) {
416 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
417 return;
419 stop = data->stop;
421 /* FIXME - return correct transfer count on errors */
422 if (!data->error)
423 data->bytes_xfered = data->blocks * data->blksz;
424 else
425 data->bytes_xfered = 0;
427 pr_debug("Completed data request\n");
430 * FIXME: other drivers allow an optional stop command of any given type
431 * which we dont do, as the chip can auto generate them.
432 * Perhaps we can be smarter about when to use auto CMD12 and
433 * only issue the auto request when we know this is the desired
434 * stop command, allowing fallback to the stop command the
435 * upper layers expect. For now, we do what works.
438 if (data->flags & MMC_DATA_READ) {
439 if (host->chan_rx && !host->force_pio)
440 tmio_mmc_check_bounce_buffer(host);
441 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
442 host->mrq);
443 } else {
444 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
445 host->mrq);
448 if (stop) {
449 if (stop->opcode == 12 && !stop->arg)
450 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
451 else
452 BUG();
455 schedule_work(&host->done);
458 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
460 struct mmc_data *data;
461 spin_lock(&host->lock);
462 data = host->data;
464 if (!data)
465 goto out;
467 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
469 * Has all data been written out yet? Testing on SuperH showed,
470 * that in most cases the first interrupt comes already with the
471 * BUSY status bit clear, but on some operations, like mount or
472 * in the beginning of a write / sync / umount, there is one
473 * DATAEND interrupt with the BUSY bit set, in this cases
474 * waiting for one more interrupt fixes the problem.
476 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
477 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
478 tasklet_schedule(&host->dma_complete);
480 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
481 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
482 tasklet_schedule(&host->dma_complete);
483 } else {
484 tmio_mmc_do_data_irq(host);
485 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
487 out:
488 spin_unlock(&host->lock);
491 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
492 unsigned int stat)
494 struct mmc_command *cmd = host->cmd;
495 int i, addr;
497 spin_lock(&host->lock);
499 if (!host->cmd) {
500 pr_debug("Spurious CMD irq\n");
501 goto out;
504 host->cmd = NULL;
506 /* This controller is sicker than the PXA one. Not only do we need to
507 * drop the top 8 bits of the first response word, we also need to
508 * modify the order of the response for short response command types.
511 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
512 cmd->resp[i] = sd_ctrl_read32(host, addr);
514 if (cmd->flags & MMC_RSP_136) {
515 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
516 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
517 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
518 cmd->resp[3] <<= 8;
519 } else if (cmd->flags & MMC_RSP_R3) {
520 cmd->resp[0] = cmd->resp[3];
523 if (stat & TMIO_STAT_CMDTIMEOUT)
524 cmd->error = -ETIMEDOUT;
525 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
526 cmd->error = -EILSEQ;
528 /* If there is data to handle we enable data IRQs here, and
529 * we will ultimatley finish the request in the data_end handler.
530 * If theres no data or we encountered an error, finish now.
532 if (host->data && !cmd->error) {
533 if (host->data->flags & MMC_DATA_READ) {
534 if (host->force_pio || !host->chan_rx)
535 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
536 else
537 tasklet_schedule(&host->dma_issue);
538 } else {
539 if (host->force_pio || !host->chan_tx)
540 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
541 else
542 tasklet_schedule(&host->dma_issue);
544 } else {
545 schedule_work(&host->done);
548 out:
549 spin_unlock(&host->lock);
552 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
553 int *ireg, int *status)
555 *status = sd_ctrl_read32(host, CTL_STATUS);
556 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
558 pr_debug_status(*status);
559 pr_debug_status(*ireg);
562 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
563 int ireg, int status)
565 struct mmc_host *mmc = host->mmc;
567 /* Card insert / remove attempts */
568 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
569 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
570 TMIO_STAT_CARD_REMOVE);
571 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
572 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
573 !work_pending(&mmc->detect.work))
574 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
575 return true;
578 return false;
581 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
583 unsigned int ireg, status;
584 struct tmio_mmc_host *host = devid;
586 tmio_mmc_card_irq_status(host, &ireg, &status);
587 __tmio_mmc_card_detect_irq(host, ireg, status);
589 return IRQ_HANDLED;
591 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
593 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
594 int ireg, int status)
596 /* Command completion */
597 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
598 tmio_mmc_ack_mmc_irqs(host,
599 TMIO_STAT_CMDRESPEND |
600 TMIO_STAT_CMDTIMEOUT);
601 tmio_mmc_cmd_irq(host, status);
602 return true;
605 /* Data transfer */
606 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
607 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
608 tmio_mmc_pio_irq(host);
609 return true;
612 /* Data transfer completion */
613 if (ireg & TMIO_STAT_DATAEND) {
614 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
615 tmio_mmc_data_irq(host);
616 return true;
619 return false;
622 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
624 unsigned int ireg, status;
625 struct tmio_mmc_host *host = devid;
627 tmio_mmc_card_irq_status(host, &ireg, &status);
628 __tmio_mmc_sdcard_irq(host, ireg, status);
630 return IRQ_HANDLED;
632 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
634 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
636 struct tmio_mmc_host *host = devid;
637 struct mmc_host *mmc = host->mmc;
638 struct tmio_mmc_data *pdata = host->pdata;
639 unsigned int ireg, status;
641 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
642 return IRQ_HANDLED;
644 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
645 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
647 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
649 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
650 mmc_signal_sdio_irq(mmc);
652 return IRQ_HANDLED;
654 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
656 irqreturn_t tmio_mmc_irq(int irq, void *devid)
658 struct tmio_mmc_host *host = devid;
659 unsigned int ireg, status;
661 pr_debug("MMC IRQ begin\n");
663 tmio_mmc_card_irq_status(host, &ireg, &status);
664 if (__tmio_mmc_card_detect_irq(host, ireg, status))
665 return IRQ_HANDLED;
666 if (__tmio_mmc_sdcard_irq(host, ireg, status))
667 return IRQ_HANDLED;
669 tmio_mmc_sdio_irq(irq, devid);
671 return IRQ_HANDLED;
673 EXPORT_SYMBOL(tmio_mmc_irq);
675 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
676 struct mmc_data *data)
678 struct tmio_mmc_data *pdata = host->pdata;
680 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
681 data->blksz, data->blocks);
683 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
684 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
685 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
687 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
688 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
689 mmc_hostname(host->mmc), data->blksz);
690 return -EINVAL;
694 tmio_mmc_init_sg(host, data);
695 host->data = data;
697 /* Set transfer length / blocksize */
698 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
699 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
701 tmio_mmc_start_dma(host, data);
703 return 0;
706 /* Process requests from the MMC layer */
707 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
709 struct tmio_mmc_host *host = mmc_priv(mmc);
710 unsigned long flags;
711 int ret;
713 spin_lock_irqsave(&host->lock, flags);
715 if (host->mrq) {
716 pr_debug("request not null\n");
717 if (IS_ERR(host->mrq)) {
718 spin_unlock_irqrestore(&host->lock, flags);
719 mrq->cmd->error = -EAGAIN;
720 mmc_request_done(mmc, mrq);
721 return;
725 host->last_req_ts = jiffies;
726 wmb();
727 host->mrq = mrq;
729 spin_unlock_irqrestore(&host->lock, flags);
731 if (mrq->data) {
732 ret = tmio_mmc_start_data(host, mrq->data);
733 if (ret)
734 goto fail;
737 ret = tmio_mmc_start_command(host, mrq->cmd);
738 if (!ret) {
739 schedule_delayed_work(&host->delayed_reset_work,
740 msecs_to_jiffies(2000));
741 return;
744 fail:
745 host->force_pio = false;
746 host->mrq = NULL;
747 mrq->cmd->error = ret;
748 mmc_request_done(mmc, mrq);
751 /* Set MMC clock / power.
752 * Note: This controller uses a simple divider scheme therefore it cannot
753 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
754 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
755 * slowest setting.
757 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
759 struct tmio_mmc_host *host = mmc_priv(mmc);
760 struct tmio_mmc_data *pdata = host->pdata;
761 unsigned long flags;
763 mutex_lock(&host->ios_lock);
765 spin_lock_irqsave(&host->lock, flags);
766 if (host->mrq) {
767 if (IS_ERR(host->mrq)) {
768 dev_dbg(&host->pdev->dev,
769 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
770 current->comm, task_pid_nr(current),
771 ios->clock, ios->power_mode);
772 host->mrq = ERR_PTR(-EINTR);
773 } else {
774 dev_dbg(&host->pdev->dev,
775 "%s.%d: CMD%u active since %lu, now %lu!\n",
776 current->comm, task_pid_nr(current),
777 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
779 spin_unlock_irqrestore(&host->lock, flags);
781 mutex_unlock(&host->ios_lock);
782 return;
785 host->mrq = ERR_PTR(-EBUSY);
787 spin_unlock_irqrestore(&host->lock, flags);
790 * pdata->power == false only if COLD_CD is available, otherwise only
791 * in short time intervals during probing or resuming
793 if (ios->power_mode == MMC_POWER_ON && ios->clock) {
794 if (!pdata->power) {
795 pm_runtime_get_sync(&host->pdev->dev);
796 pdata->power = true;
798 tmio_mmc_set_clock(host, ios->clock);
799 /* power up SD bus */
800 if (host->set_pwr)
801 host->set_pwr(host->pdev, 1);
802 /* start bus clock */
803 tmio_mmc_clk_start(host);
804 } else if (ios->power_mode != MMC_POWER_UP) {
805 if (host->set_pwr && ios->power_mode == MMC_POWER_OFF)
806 host->set_pwr(host->pdev, 0);
807 if (pdata->power) {
808 pdata->power = false;
809 pm_runtime_put(&host->pdev->dev);
811 tmio_mmc_clk_stop(host);
814 switch (ios->bus_width) {
815 case MMC_BUS_WIDTH_1:
816 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
817 break;
818 case MMC_BUS_WIDTH_4:
819 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
820 break;
823 /* Let things settle. delay taken from winCE driver */
824 udelay(140);
825 if (PTR_ERR(host->mrq) == -EINTR)
826 dev_dbg(&host->pdev->dev,
827 "%s.%d: IOS interrupted: clk %u, mode %u",
828 current->comm, task_pid_nr(current),
829 ios->clock, ios->power_mode);
830 host->mrq = NULL;
832 mutex_unlock(&host->ios_lock);
835 static int tmio_mmc_get_ro(struct mmc_host *mmc)
837 struct tmio_mmc_host *host = mmc_priv(mmc);
838 struct tmio_mmc_data *pdata = host->pdata;
840 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
841 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
844 static int tmio_mmc_get_cd(struct mmc_host *mmc)
846 struct tmio_mmc_host *host = mmc_priv(mmc);
847 struct tmio_mmc_data *pdata = host->pdata;
849 if (!pdata->get_cd)
850 return -ENOSYS;
851 else
852 return pdata->get_cd(host->pdev);
855 static const struct mmc_host_ops tmio_mmc_ops = {
856 .request = tmio_mmc_request,
857 .set_ios = tmio_mmc_set_ios,
858 .get_ro = tmio_mmc_get_ro,
859 .get_cd = tmio_mmc_get_cd,
860 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
863 int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
864 struct platform_device *pdev,
865 struct tmio_mmc_data *pdata)
867 struct tmio_mmc_host *_host;
868 struct mmc_host *mmc;
869 struct resource *res_ctl;
870 int ret;
871 u32 irq_mask = TMIO_MASK_CMD;
873 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
874 if (!res_ctl)
875 return -EINVAL;
877 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
878 if (!mmc)
879 return -ENOMEM;
881 pdata->dev = &pdev->dev;
882 _host = mmc_priv(mmc);
883 _host->pdata = pdata;
884 _host->mmc = mmc;
885 _host->pdev = pdev;
886 platform_set_drvdata(pdev, mmc);
888 _host->set_pwr = pdata->set_pwr;
889 _host->set_clk_div = pdata->set_clk_div;
891 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
892 _host->bus_shift = resource_size(res_ctl) >> 10;
894 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
895 if (!_host->ctl) {
896 ret = -ENOMEM;
897 goto host_free;
900 mmc->ops = &tmio_mmc_ops;
901 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
902 mmc->f_max = pdata->hclk;
903 mmc->f_min = mmc->f_max / 512;
904 mmc->max_segs = 32;
905 mmc->max_blk_size = 512;
906 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
907 mmc->max_segs;
908 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
909 mmc->max_seg_size = mmc->max_req_size;
910 if (pdata->ocr_mask)
911 mmc->ocr_avail = pdata->ocr_mask;
912 else
913 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
915 pdata->power = false;
916 pm_runtime_enable(&pdev->dev);
917 ret = pm_runtime_resume(&pdev->dev);
918 if (ret < 0)
919 goto pm_disable;
922 * There are 4 different scenarios for the card detection:
923 * 1) an external gpio irq handles the cd (best for power savings)
924 * 2) internal sdhi irq handles the cd
925 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
926 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
928 * While we increment the rtpm counter for all scenarios when the mmc
929 * core activates us by calling an appropriate set_ios(), we must
930 * additionally ensure that in case 2) the tmio mmc hardware stays
931 * powered on during runtime for the card detection to work.
933 if (!(pdata->flags & TMIO_MMC_HAS_COLD_CD
934 || mmc->caps & MMC_CAP_NEEDS_POLL
935 || mmc->caps & MMC_CAP_NONREMOVABLE))
936 pm_runtime_get_noresume(&pdev->dev);
938 tmio_mmc_clk_stop(_host);
939 tmio_mmc_reset(_host);
941 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
942 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
943 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
944 tmio_mmc_enable_sdio_irq(mmc, 0);
946 spin_lock_init(&_host->lock);
947 mutex_init(&_host->ios_lock);
949 /* Init delayed work for request timeouts */
950 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
951 INIT_WORK(&_host->done, tmio_mmc_done_work);
953 /* See if we also get DMA */
954 tmio_mmc_request_dma(_host, pdata);
956 mmc_add_host(mmc);
958 /* Unmask the IRQs we want to know about */
959 if (!_host->chan_rx)
960 irq_mask |= TMIO_MASK_READOP;
961 if (!_host->chan_tx)
962 irq_mask |= TMIO_MASK_WRITEOP;
964 tmio_mmc_enable_mmc_irqs(_host, irq_mask);
966 *host = _host;
968 return 0;
970 pm_disable:
971 pm_runtime_disable(&pdev->dev);
972 iounmap(_host->ctl);
973 host_free:
974 mmc_free_host(mmc);
976 return ret;
978 EXPORT_SYMBOL(tmio_mmc_host_probe);
980 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
982 struct platform_device *pdev = host->pdev;
985 * We don't have to manipulate pdata->power here: if there is a card in
986 * the slot, the runtime PM is active and our .runtime_resume() will not
987 * be run. If there is no card in the slot and the platform can suspend
988 * the controller, the runtime PM is suspended and pdata->power == false,
989 * so, our .runtime_resume() will not try to detect a card in the slot.
991 if (host->pdata->flags & TMIO_MMC_HAS_COLD_CD
992 || host->mmc->caps & MMC_CAP_NEEDS_POLL
993 || host->mmc->caps & MMC_CAP_NONREMOVABLE)
994 pm_runtime_get_sync(&pdev->dev);
996 mmc_remove_host(host->mmc);
997 cancel_work_sync(&host->done);
998 cancel_delayed_work_sync(&host->delayed_reset_work);
999 tmio_mmc_release_dma(host);
1001 pm_runtime_put_sync(&pdev->dev);
1002 pm_runtime_disable(&pdev->dev);
1004 iounmap(host->ctl);
1005 mmc_free_host(host->mmc);
1007 EXPORT_SYMBOL(tmio_mmc_host_remove);
1009 #ifdef CONFIG_PM
1010 int tmio_mmc_host_suspend(struct device *dev)
1012 struct mmc_host *mmc = dev_get_drvdata(dev);
1013 struct tmio_mmc_host *host = mmc_priv(mmc);
1014 int ret = mmc_suspend_host(mmc);
1016 if (!ret)
1017 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1019 host->pm_error = pm_runtime_put_sync(dev);
1021 return ret;
1023 EXPORT_SYMBOL(tmio_mmc_host_suspend);
1025 int tmio_mmc_host_resume(struct device *dev)
1027 struct mmc_host *mmc = dev_get_drvdata(dev);
1028 struct tmio_mmc_host *host = mmc_priv(mmc);
1030 /* The MMC core will perform the complete set up */
1031 host->pdata->power = false;
1033 host->pm_global = true;
1034 if (!host->pm_error)
1035 pm_runtime_get_sync(dev);
1037 if (host->pm_global) {
1038 /* Runtime PM resume callback didn't run */
1039 tmio_mmc_reset(host);
1040 tmio_mmc_enable_dma(host, true);
1041 host->pm_global = false;
1044 return mmc_resume_host(mmc);
1046 EXPORT_SYMBOL(tmio_mmc_host_resume);
1048 #endif /* CONFIG_PM */
1050 int tmio_mmc_host_runtime_suspend(struct device *dev)
1052 return 0;
1054 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1056 int tmio_mmc_host_runtime_resume(struct device *dev)
1058 struct mmc_host *mmc = dev_get_drvdata(dev);
1059 struct tmio_mmc_host *host = mmc_priv(mmc);
1060 struct tmio_mmc_data *pdata = host->pdata;
1062 tmio_mmc_reset(host);
1063 tmio_mmc_enable_dma(host, true);
1065 if (pdata->power) {
1066 /* Only entered after a card-insert interrupt */
1067 if (!mmc->card)
1068 tmio_mmc_set_ios(mmc, &mmc->ios);
1069 mmc_detect_change(mmc, msecs_to_jiffies(100));
1071 host->pm_global = false;
1073 return 0;
1075 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1077 MODULE_LICENSE("GPL v2");