?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Avoid beyond bounds copy while caching ACL
[zen-stable.git] / drivers / net / wireless / iwlegacy / 3945-mac.c
bloba2ec36911bd99616495f282ff89fe87ee9ce17c0
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
46
47 #include <net/ieee80211_radiotap.h>
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME "iwl3945"
53
54 #include "commands.h"
55 #include "common.h"
56 #include "3945.h"
57 #include "iwl-spectrum.h"
58
59 /*
60 * module name, copyright, version, etc.
61 */
62
63 #define DRV_DESCRIPTION \
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
65
66 #ifdef CONFIG_IWLEGACY_DEBUG
67 #define VD "d"
68 #else
69 #define VD
70 #endif
71
72 /*
73 * add "s" to indicate spectrum measurement included.
74 * we add it here to be consistent with previous releases in which
75 * this was configurable.
76 */
77 #define DRV_VERSION IWLWIFI_VERSION VD "s"
78 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
79 #define DRV_AUTHOR "<ilw@linux.intel.com>"
80
81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
82 MODULE_VERSION(DRV_VERSION);
83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
84 MODULE_LICENSE("GPL");
85
86 /* module parameters */
87 struct il_mod_params il3945_mod_params = {
88 .sw_crypto = 1,
89 .restart_fw = 1,
90 .disable_hw_scan = 1,
91 /* the rest are 0 by default */
92 };
93
94 /**
95 * il3945_get_antenna_flags - Get antenna flags for RXON command
96 * @il: eeprom and antenna fields are used to determine antenna flags
97 *
98 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
99 * il3945_mod_params.antenna specifies the antenna diversity mode:
100 *
101 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
102 * IL_ANTENNA_MAIN - Force MAIN antenna
103 * IL_ANTENNA_AUX - Force AUX antenna
104 */
105 __le32
106 il3945_get_antenna_flags(const struct il_priv *il)
107 {
108 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
109
110 switch (il3945_mod_params.antenna) {
111 case IL_ANTENNA_DIVERSITY:
112 return 0;
113
114 case IL_ANTENNA_MAIN:
115 if (eeprom->antenna_switch_type)
116 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
118
119 case IL_ANTENNA_AUX:
120 if (eeprom->antenna_switch_type)
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
123 }
124
125 /* bad antenna selector value */
126 IL_ERR("Bad antenna selector value (0x%x)\n",
127 il3945_mod_params.antenna);
128
129 return 0; /* "diversity" is default if error */
130 }
131
132 static int
133 il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
134 struct ieee80211_key_conf *keyconf, u8 sta_id)
135 {
136 unsigned long flags;
137 __le16 key_flags = 0;
138 int ret;
139
140 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
141 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
142
143 if (sta_id == il->ctx.bcast_sta_id)
144 key_flags |= STA_KEY_MULTICAST_MSK;
145
146 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
147 keyconf->hw_key_idx = keyconf->keyidx;
148 key_flags &= ~STA_KEY_FLG_INVALID;
149
150 spin_lock_irqsave(&il->sta_lock, flags);
151 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
152 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
153 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
154
155 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
156
157 if ((il->stations[sta_id].sta.key.
158 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
159 il->stations[sta_id].sta.key.key_offset =
160 il_get_free_ucode_key_idx(il);
161 /* else, we are overriding an existing key => no need to allocated room
162 * in uCode. */
163
164 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
165 "no space for a new key");
166
167 il->stations[sta_id].sta.key.key_flags = key_flags;
168 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
169 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
170
171 D_INFO("hwcrypto: modify ucode station key info\n");
172
173 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
174
175 spin_unlock_irqrestore(&il->sta_lock, flags);
176
177 return ret;
178 }
179
180 static int
181 il3945_set_tkip_dynamic_key_info(struct il_priv *il,
182 struct ieee80211_key_conf *keyconf, u8 sta_id)
183 {
184 return -EOPNOTSUPP;
185 }
186
187 static int
188 il3945_set_wep_dynamic_key_info(struct il_priv *il,
189 struct ieee80211_key_conf *keyconf, u8 sta_id)
190 {
191 return -EOPNOTSUPP;
192 }
193
194 static int
195 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
196 {
197 unsigned long flags;
198 struct il_addsta_cmd sta_cmd;
199
200 spin_lock_irqsave(&il->sta_lock, flags);
201 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
202 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
203 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
204 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
205 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
206 memcpy(&sta_cmd, &il->stations[sta_id].sta,
207 sizeof(struct il_addsta_cmd));
208 spin_unlock_irqrestore(&il->sta_lock, flags);
209
210 D_INFO("hwcrypto: clear ucode station key info\n");
211 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
212 }
213
214 static int
215 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
216 u8 sta_id)
217 {
218 int ret = 0;
219
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221
222 switch (keyconf->cipher) {
223 case WLAN_CIPHER_SUITE_CCMP:
224 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
225 break;
226 case WLAN_CIPHER_SUITE_TKIP:
227 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
228 break;
229 case WLAN_CIPHER_SUITE_WEP40:
230 case WLAN_CIPHER_SUITE_WEP104:
231 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
232 break;
233 default:
234 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
235 ret = -EINVAL;
236 }
237
238 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
239 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
240
241 return ret;
242 }
243
244 static int
245 il3945_remove_static_key(struct il_priv *il)
246 {
247 int ret = -EOPNOTSUPP;
248
249 return ret;
250 }
251
252 static int
253 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
254 {
255 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
256 key->cipher == WLAN_CIPHER_SUITE_WEP104)
257 return -EOPNOTSUPP;
258
259 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
260 return -EINVAL;
261 }
262
263 static void
264 il3945_clear_free_frames(struct il_priv *il)
265 {
266 struct list_head *element;
267
268 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
269
270 while (!list_empty(&il->free_frames)) {
271 element = il->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct il3945_frame, list));
274 il->frames_count--;
275 }
276
277 if (il->frames_count) {
278 IL_WARN("%d frames still in use. Did we lose one?\n",
279 il->frames_count);
280 il->frames_count = 0;
281 }
282 }
283
284 static struct il3945_frame *
285 il3945_get_free_frame(struct il_priv *il)
286 {
287 struct il3945_frame *frame;
288 struct list_head *element;
289 if (list_empty(&il->free_frames)) {
290 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
291 if (!frame) {
292 IL_ERR("Could not allocate frame!\n");
293 return NULL;
294 }
295
296 il->frames_count++;
297 return frame;
298 }
299
300 element = il->free_frames.next;
301 list_del(element);
302 return list_entry(element, struct il3945_frame, list);
303 }
304
305 static void
306 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
307 {
308 memset(frame, 0, sizeof(*frame));
309 list_add(&frame->list, &il->free_frames);
310 }
311
312 unsigned int
313 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
314 int left)
315 {
316
317 if (!il_is_associated(il) || !il->beacon_skb)
318 return 0;
319
320 if (il->beacon_skb->len > left)
321 return 0;
322
323 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
324
325 return il->beacon_skb->len;
326 }
327
328 static int
329 il3945_send_beacon_cmd(struct il_priv *il)
330 {
331 struct il3945_frame *frame;
332 unsigned int frame_size;
333 int rc;
334 u8 rate;
335
336 frame = il3945_get_free_frame(il);
337
338 if (!frame) {
339 IL_ERR("Could not obtain free frame buffer for beacon "
340 "command.\n");
341 return -ENOMEM;
342 }
343
344 rate = il_get_lowest_plcp(il, &il->ctx);
345
346 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
347
348 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
349
350 il3945_free_frame(il, frame);
351
352 return rc;
353 }
354
355 static void
356 il3945_unset_hw_params(struct il_priv *il)
357 {
358 if (il->_3945.shared_virt)
359 dma_free_coherent(&il->pci_dev->dev,
360 sizeof(struct il3945_shared),
361 il->_3945.shared_virt, il->_3945.shared_phys);
362 }
363
364 static void
365 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
366 struct il_device_cmd *cmd,
367 struct sk_buff *skb_frag, int sta_id)
368 {
369 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
370 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
371
372 tx_cmd->sec_ctl = 0;
373
374 switch (keyinfo->cipher) {
375 case WLAN_CIPHER_SUITE_CCMP:
376 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
377 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
378 D_TX("tx_cmd with AES hwcrypto\n");
379 break;
380
381 case WLAN_CIPHER_SUITE_TKIP:
382 break;
383
384 case WLAN_CIPHER_SUITE_WEP104:
385 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
386 /* fall through */
387 case WLAN_CIPHER_SUITE_WEP40:
388 tx_cmd->sec_ctl |=
389 TX_CMD_SEC_WEP | (info->control.hw_key->
390 hw_key_idx & TX_CMD_SEC_MSK) <<
391 TX_CMD_SEC_SHIFT;
392
393 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
394
395 D_TX("Configuring packet for WEP encryption " "with key %d\n",
396 info->control.hw_key->hw_key_idx);
397 break;
398
399 default:
400 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
401 break;
402 }
403 }
404
405 /*
406 * handle build C_TX command notification.
407 */
408 static void
409 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
410 struct ieee80211_tx_info *info,
411 struct ieee80211_hdr *hdr, u8 std_id)
412 {
413 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
414 __le32 tx_flags = tx_cmd->tx_flags;
415 __le16 fc = hdr->frame_control;
416
417 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
418 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
419 tx_flags |= TX_CMD_FLG_ACK_MSK;
420 if (ieee80211_is_mgmt(fc))
421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 if (ieee80211_is_probe_resp(fc) &&
423 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
424 tx_flags |= TX_CMD_FLG_TSF_MSK;
425 } else {
426 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
427 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
428 }
429
430 tx_cmd->sta_id = std_id;
431 if (ieee80211_has_morefrags(fc))
432 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
433
434 if (ieee80211_is_data_qos(fc)) {
435 u8 *qc = ieee80211_get_qos_ctl(hdr);
436 tx_cmd->tid_tspec = qc[0] & 0xf;
437 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
438 } else {
439 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
440 }
441
442 il_tx_cmd_protection(il, info, fc, &tx_flags);
443
444 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
445 if (ieee80211_is_mgmt(fc)) {
446 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
448 else
449 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
450 } else {
451 tx_cmd->timeout.pm_frame_timeout = 0;
452 }
453
454 tx_cmd->driver_txop = 0;
455 tx_cmd->tx_flags = tx_flags;
456 tx_cmd->next_frame_len = 0;
457 }
458
459 /*
460 * start C_TX command process
461 */
462 static int
463 il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
464 {
465 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
466 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
467 struct il3945_tx_cmd *tx_cmd;
468 struct il_tx_queue *txq = NULL;
469 struct il_queue *q = NULL;
470 struct il_device_cmd *out_cmd;
471 struct il_cmd_meta *out_meta;
472 dma_addr_t phys_addr;
473 dma_addr_t txcmd_phys;
474 int txq_id = skb_get_queue_mapping(skb);
475 u16 len, idx, hdr_len;
476 u8 id;
477 u8 unicast;
478 u8 sta_id;
479 u8 tid = 0;
480 __le16 fc;
481 u8 wait_write_ptr = 0;
482 unsigned long flags;
483
484 spin_lock_irqsave(&il->lock, flags);
485 if (il_is_rfkill(il)) {
486 D_DROP("Dropping - RF KILL\n");
487 goto drop_unlock;
488 }
489
490 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
491 IL_INVALID_RATE) {
492 IL_ERR("ERROR: No TX rate available.\n");
493 goto drop_unlock;
494 }
495
496 unicast = !is_multicast_ether_addr(hdr->addr1);
497 id = 0;
498
499 fc = hdr->frame_control;
500
501 #ifdef CONFIG_IWLEGACY_DEBUG
502 if (ieee80211_is_auth(fc))
503 D_TX("Sending AUTH frame\n");
504 else if (ieee80211_is_assoc_req(fc))
505 D_TX("Sending ASSOC frame\n");
506 else if (ieee80211_is_reassoc_req(fc))
507 D_TX("Sending REASSOC frame\n");
508 #endif
509
510 spin_unlock_irqrestore(&il->lock, flags);
511
512 hdr_len = ieee80211_hdrlen(fc);
513
514 /* Find idx into station table for destination station */
515 sta_id = il_sta_id_or_broadcast(il, &il->ctx, info->control.sta);
516 if (sta_id == IL_INVALID_STATION) {
517 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
518 goto drop;
519 }
520
521 D_RATE("station Id %d\n", sta_id);
522
523 if (ieee80211_is_data_qos(fc)) {
524 u8 *qc = ieee80211_get_qos_ctl(hdr);
525 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
526 if (unlikely(tid >= MAX_TID_COUNT))
527 goto drop;
528 }
529
530 /* Descriptor for chosen Tx queue */
531 txq = &il->txq[txq_id];
532 q = &txq->q;
533
534 if ((il_queue_space(q) < q->high_mark))
535 goto drop;
536
537 spin_lock_irqsave(&il->lock, flags);
538
539 idx = il_get_cmd_idx(q, q->write_ptr, 0);
540
541 /* Set up driver data for this TFD */
542 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
543 txq->txb[q->write_ptr].skb = skb;
544 txq->txb[q->write_ptr].ctx = &il->ctx;
545
546 /* Init first empty entry in queue's array of Tx/cmd buffers */
547 out_cmd = txq->cmd[idx];
548 out_meta = &txq->meta[idx];
549 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
550 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
551 memset(tx_cmd, 0, sizeof(*tx_cmd));
552
553 /*
554 * Set up the Tx-command (not MAC!) header.
555 * Store the chosen Tx queue and TFD idx within the sequence field;
556 * after Tx, uCode's Tx response will return this value so driver can
557 * locate the frame within the tx queue and do post-tx processing.
558 */
559 out_cmd->hdr.cmd = C_TX;
560 out_cmd->hdr.sequence =
561 cpu_to_le16((u16)
562 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
563
564 /* Copy MAC header from skb into command buffer */
565 memcpy(tx_cmd->hdr, hdr, hdr_len);
566
567 if (info->control.hw_key)
568 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
569
570 /* TODO need this for burst mode later on */
571 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
572
573 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
574
575 /* Total # bytes to be transmitted */
576 len = (u16) skb->len;
577 tx_cmd->len = cpu_to_le16(len);
578
579 il_dbg_log_tx_data_frame(il, len, hdr);
580 il_update_stats(il, true, fc, len);
581 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
582 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
583
584 if (!ieee80211_has_morefrags(hdr->frame_control)) {
585 txq->need_update = 1;
586 } else {
587 wait_write_ptr = 1;
588 txq->need_update = 0;
589 }
590
591 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
592 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
593 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
594 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
595 ieee80211_hdrlen(fc));
596
597 /*
598 * Use the first empty entry in this queue's command buffer array
599 * to contain the Tx command and MAC header concatenated together
600 * (payload data will be in another buffer).
601 * Size of this varies, due to varying MAC header length.
602 * If end is not dword aligned, we'll have 2 extra bytes at the end
603 * of the MAC header (device reads on dword boundaries).
604 * We'll tell device about this padding later.
605 */
606 len =
607 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
608 hdr_len;
609 len = (len + 3) & ~3;
610
611 /* Physical address of this Tx command's header (not MAC header!),
612 * within command buffer array. */
613 txcmd_phys =
614 pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
615 /* we do not map meta data ... so we can safely access address to
616 * provide to unmap command*/
617 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
618 dma_unmap_len_set(out_meta, len, len);
619
620 /* Add buffer containing Tx command and MAC(!) header to TFD's
621 * first entry */
622 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1,
623 0);
624
625 /* Set up TFD's 2nd entry to point directly to remainder of skb,
626 * if any (802.11 null frames have no payload). */
627 len = skb->len - hdr_len;
628 if (len) {
629 phys_addr =
630 pci_map_single(il->pci_dev, skb->data + hdr_len, len,
631 PCI_DMA_TODEVICE);
632 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr,
633 len, 0, U32_PAD(len));
634 }
635
636 /* Tell device the write idx *just past* this latest filled TFD */
637 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
638 il_txq_update_write_ptr(il, txq);
639 spin_unlock_irqrestore(&il->lock, flags);
640
641 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
642 if (wait_write_ptr) {
643 spin_lock_irqsave(&il->lock, flags);
644 txq->need_update = 1;
645 il_txq_update_write_ptr(il, txq);
646 spin_unlock_irqrestore(&il->lock, flags);
647 }
648
649 il_stop_queue(il, txq);
650 }
651
652 return 0;
653
654 drop_unlock:
655 spin_unlock_irqrestore(&il->lock, flags);
656 drop:
657 return -1;
658 }
659
660 static int
661 il3945_get_measurement(struct il_priv *il,
662 struct ieee80211_measurement_params *params, u8 type)
663 {
664 struct il_spectrum_cmd spectrum;
665 struct il_rx_pkt *pkt;
666 struct il_host_cmd cmd = {
667 .id = C_SPECTRUM_MEASUREMENT,
668 .data = (void *)&spectrum,
669 .flags = CMD_WANT_SKB,
670 };
671 u32 add_time = le64_to_cpu(params->start_time);
672 int rc;
673 int spectrum_resp_status;
674 int duration = le16_to_cpu(params->duration);
675 struct il_rxon_context *ctx = &il->ctx;
676
677 if (il_is_associated(il))
678 add_time =
679 il_usecs_to_beacons(il,
680 le64_to_cpu(params->start_time) -
681 il->_3945.last_tsf,
682 le16_to_cpu(ctx->timing.
683 beacon_interval));
684
685 memset(&spectrum, 0, sizeof(spectrum));
686
687 spectrum.channel_count = cpu_to_le16(1);
688 spectrum.flags =
689 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
690 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
691 cmd.len = sizeof(spectrum);
692 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
693
694 if (il_is_associated(il))
695 spectrum.start_time =
696 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
697 le16_to_cpu(ctx->timing.
698 beacon_interval));
699 else
700 spectrum.start_time = 0;
701
702 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
703 spectrum.channels[0].channel = params->channel;
704 spectrum.channels[0].type = type;
705 if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
706 spectrum.flags |=
707 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
708 RXON_FLG_TGG_PROTECT_MSK;
709
710 rc = il_send_cmd_sync(il, &cmd);
711 if (rc)
712 return rc;
713
714 pkt = (struct il_rx_pkt *)cmd.reply_page;
715 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
716 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
717 rc = -EIO;
718 }
719
720 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
721 switch (spectrum_resp_status) {
722 case 0: /* Command will be handled */
723 if (pkt->u.spectrum.id != 0xff) {
724 D_INFO("Replaced existing measurement: %d\n",
725 pkt->u.spectrum.id);
726 il->measurement_status &= ~MEASUREMENT_READY;
727 }
728 il->measurement_status |= MEASUREMENT_ACTIVE;
729 rc = 0;
730 break;
731
732 case 1: /* Command will not be handled */
733 rc = -EAGAIN;
734 break;
735 }
736
737 il_free_pages(il, cmd.reply_page);
738
739 return rc;
740 }
741
742 static void
743 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
744 {
745 struct il_rx_pkt *pkt = rxb_addr(rxb);
746 struct il_alive_resp *palive;
747 struct delayed_work *pwork;
748
749 palive = &pkt->u.alive_frame;
750
751 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
752 palive->is_valid, palive->ver_type, palive->ver_subtype);
753
754 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
755 D_INFO("Initialization Alive received.\n");
756 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
757 sizeof(struct il_alive_resp));
758 pwork = &il->init_alive_start;
759 } else {
760 D_INFO("Runtime Alive received.\n");
761 memcpy(&il->card_alive, &pkt->u.alive_frame,
762 sizeof(struct il_alive_resp));
763 pwork = &il->alive_start;
764 il3945_disable_events(il);
765 }
766
767 /* We delay the ALIVE response by 5ms to
768 * give the HW RF Kill time to activate... */
769 if (palive->is_valid == UCODE_VALID_OK)
770 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
771 else
772 IL_WARN("uCode did not respond OK.\n");
773 }
774
775 static void
776 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
777 {
778 #ifdef CONFIG_IWLEGACY_DEBUG
779 struct il_rx_pkt *pkt = rxb_addr(rxb);
780 #endif
781
782 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
783 }
784
785 static void
786 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
787 {
788 struct il_rx_pkt *pkt = rxb_addr(rxb);
789 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
790 #ifdef CONFIG_IWLEGACY_DEBUG
791 u8 rate = beacon->beacon_notify_hdr.rate;
792
793 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
794 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
795 beacon->beacon_notify_hdr.failure_frame,
796 le32_to_cpu(beacon->ibss_mgr_status),
797 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
798 #endif
799
800 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
801
802 }
803
804 /* Handle notification from uCode that card's power state is changing
805 * due to software, hardware, or critical temperature RFKILL */
806 static void
807 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
808 {
809 struct il_rx_pkt *pkt = rxb_addr(rxb);
810 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
811 unsigned long status = il->status;
812
813 IL_WARN("Card state received: HW:%s SW:%s\n",
814 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
815 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
816
817 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
818
819 if (flags & HW_CARD_DISABLED)
820 set_bit(S_RF_KILL_HW, &il->status);
821 else
822 clear_bit(S_RF_KILL_HW, &il->status);
823
824 il_scan_cancel(il);
825
826 if ((test_bit(S_RF_KILL_HW, &status) !=
827 test_bit(S_RF_KILL_HW, &il->status)))
828 wiphy_rfkill_set_hw_state(il->hw->wiphy,
829 test_bit(S_RF_KILL_HW, &il->status));
830 else
831 wake_up(&il->wait_command_queue);
832 }
833
834 /**
835 * il3945_setup_handlers - Initialize Rx handler callbacks
836 *
837 * Setup the RX handlers for each of the reply types sent from the uCode
838 * to the host.
839 *
840 * This function chains into the hardware specific files for them to setup
841 * any hardware specific handlers as well.
842 */
843 static void
844 il3945_setup_handlers(struct il_priv *il)
845 {
846 il->handlers[N_ALIVE] = il3945_hdl_alive;
847 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
848 il->handlers[N_ERROR] = il_hdl_error;
849 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
850 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
851 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
852 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
853 il->handlers[N_BEACON] = il3945_hdl_beacon;
854
855 /*
856 * The same handler is used for both the REPLY to a discrete
857 * stats request from the host as well as for the periodic
858 * stats notifications (after received beacons) from the uCode.
859 */
860 il->handlers[C_STATS] = il3945_hdl_c_stats;
861 il->handlers[N_STATS] = il3945_hdl_stats;
862
863 il_setup_rx_scan_handlers(il);
864 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
865
866 /* Set up hardware specific Rx handlers */
867 il3945_hw_handler_setup(il);
868 }
869
870 /************************** RX-FUNCTIONS ****************************/
871 /*
872 * Rx theory of operation
873 *
874 * The host allocates 32 DMA target addresses and passes the host address
875 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
876 * 0 to 31
877 *
878 * Rx Queue Indexes
879 * The host/firmware share two idx registers for managing the Rx buffers.
880 *
881 * The READ idx maps to the first position that the firmware may be writing
882 * to -- the driver can read up to (but not including) this position and get
883 * good data.
884 * The READ idx is managed by the firmware once the card is enabled.
885 *
886 * The WRITE idx maps to the last position the driver has read from -- the
887 * position preceding WRITE is the last slot the firmware can place a packet.
888 *
889 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
890 * WRITE = READ.
891 *
892 * During initialization, the host sets up the READ queue position to the first
893 * IDX position, and WRITE to the last (READ - 1 wrapped)
894 *
895 * When the firmware places a packet in a buffer, it will advance the READ idx
896 * and fire the RX interrupt. The driver can then query the READ idx and
897 * process as many packets as possible, moving the WRITE idx forward as it
898 * resets the Rx queue buffers with new memory.
899 *
900 * The management in the driver is as follows:
901 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
902 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
903 * to replenish the iwl->rxq->rx_free.
904 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
905 * iwl->rxq is replenished and the READ IDX is updated (updating the
906 * 'processed' and 'read' driver idxes as well)
907 * + A received packet is processed and handed to the kernel network stack,
908 * detached from the iwl->rxq. The driver 'processed' idx is updated.
909 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
910 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
911 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
912 * were enough free buffers and RX_STALLED is set it is cleared.
913 *
914 *
915 * Driver sequence:
916 *
917 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
918 * il3945_rx_queue_restock
919 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
920 * queue, updates firmware pointers, and updates
921 * the WRITE idx. If insufficient rx_free buffers
922 * are available, schedules il3945_rx_replenish
923 *
924 * -- enable interrupts --
925 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
926 * READ IDX, detaching the SKB from the pool.
927 * Moves the packet buffer from queue to rx_used.
928 * Calls il3945_rx_queue_restock to refill any empty
929 * slots.
930 * ...
931 *
932 */
933
934 /**
935 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
936 */
937 static inline __le32
938 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
939 {
940 return cpu_to_le32((u32) dma_addr);
941 }
942
943 /**
944 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
945 *
946 * If there are slots in the RX queue that need to be restocked,
947 * and we have free pre-allocated buffers, fill the ranks as much
948 * as we can, pulling from rx_free.
949 *
950 * This moves the 'write' idx forward to catch up with 'processed', and
951 * also updates the memory address in the firmware to reference the new
952 * target buffer.
953 */
954 static void
955 il3945_rx_queue_restock(struct il_priv *il)
956 {
957 struct il_rx_queue *rxq = &il->rxq;
958 struct list_head *element;
959 struct il_rx_buf *rxb;
960 unsigned long flags;
961 int write;
962
963 spin_lock_irqsave(&rxq->lock, flags);
964 write = rxq->write & ~0x7;
965 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
966 /* Get next free Rx buffer, remove from free list */
967 element = rxq->rx_free.next;
968 rxb = list_entry(element, struct il_rx_buf, list);
969 list_del(element);
970
971 /* Point to Rx buffer via next RBD in circular buffer */
972 rxq->bd[rxq->write] =
973 il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
974 rxq->queue[rxq->write] = rxb;
975 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
976 rxq->free_count--;
977 }
978 spin_unlock_irqrestore(&rxq->lock, flags);
979 /* If the pre-allocated buffer pool is dropping low, schedule to
980 * refill it */
981 if (rxq->free_count <= RX_LOW_WATERMARK)
982 queue_work(il->workqueue, &il->rx_replenish);
983
984 /* If we've added more space for the firmware to place data, tell it.
985 * Increment device's write pointer in multiples of 8. */
986 if (rxq->write_actual != (rxq->write & ~0x7) ||
987 abs(rxq->write - rxq->read) > 7) {
988 spin_lock_irqsave(&rxq->lock, flags);
989 rxq->need_update = 1;
990 spin_unlock_irqrestore(&rxq->lock, flags);
991 il_rx_queue_update_write_ptr(il, rxq);
992 }
993 }
994
995 /**
996 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
997 *
998 * When moving to rx_free an SKB is allocated for the slot.
999 *
1000 * Also restock the Rx queue via il3945_rx_queue_restock.
1001 * This is called as a scheduled work item (except for during initialization)
1002 */
1003 static void
1004 il3945_rx_allocate(struct il_priv *il, gfp_t priority)
1005 {
1006 struct il_rx_queue *rxq = &il->rxq;
1007 struct list_head *element;
1008 struct il_rx_buf *rxb;
1009 struct page *page;
1010 unsigned long flags;
1011 gfp_t gfp_mask = priority;
1012
1013 while (1) {
1014 spin_lock_irqsave(&rxq->lock, flags);
1015
1016 if (list_empty(&rxq->rx_used)) {
1017 spin_unlock_irqrestore(&rxq->lock, flags);
1018 return;
1019 }
1020 spin_unlock_irqrestore(&rxq->lock, flags);
1021
1022 if (rxq->free_count > RX_LOW_WATERMARK)
1023 gfp_mask |= __GFP_NOWARN;
1024
1025 if (il->hw_params.rx_page_order > 0)
1026 gfp_mask |= __GFP_COMP;
1027
1028 /* Alloc a new receive buffer */
1029 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1030 if (!page) {
1031 if (net_ratelimit())
1032 D_INFO("Failed to allocate SKB buffer.\n");
1033 if (rxq->free_count <= RX_LOW_WATERMARK &&
1034 net_ratelimit())
1035 IL_ERR("Failed to allocate SKB buffer with %0x."
1036 "Only %u free buffers remaining.\n",
1037 priority, rxq->free_count);
1038 /* We don't reschedule replenish work here -- we will
1039 * call the restock method and if it still needs
1040 * more buffers it will schedule replenish */
1041 break;
1042 }
1043
1044 spin_lock_irqsave(&rxq->lock, flags);
1045 if (list_empty(&rxq->rx_used)) {
1046 spin_unlock_irqrestore(&rxq->lock, flags);
1047 __free_pages(page, il->hw_params.rx_page_order);
1048 return;
1049 }
1050 element = rxq->rx_used.next;
1051 rxb = list_entry(element, struct il_rx_buf, list);
1052 list_del(element);
1053 spin_unlock_irqrestore(&rxq->lock, flags);
1054
1055 rxb->page = page;
1056 /* Get physical address of RB/SKB */
1057 rxb->page_dma =
1058 pci_map_page(il->pci_dev, page, 0,
1059 PAGE_SIZE << il->hw_params.rx_page_order,
1060 PCI_DMA_FROMDEVICE);
1061
1062 spin_lock_irqsave(&rxq->lock, flags);
1063
1064 list_add_tail(&rxb->list, &rxq->rx_free);
1065 rxq->free_count++;
1066 il->alloc_rxb_page++;
1067
1068 spin_unlock_irqrestore(&rxq->lock, flags);
1069 }
1070 }
1071
1072 void
1073 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1074 {
1075 unsigned long flags;
1076 int i;
1077 spin_lock_irqsave(&rxq->lock, flags);
1078 INIT_LIST_HEAD(&rxq->rx_free);
1079 INIT_LIST_HEAD(&rxq->rx_used);
1080 /* Fill the rx_used queue with _all_ of the Rx buffers */
1081 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1082 /* In the reset function, these buffers may have been allocated
1083 * to an SKB, so we need to unmap and free potential storage */
1084 if (rxq->pool[i].page != NULL) {
1085 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1086 PAGE_SIZE << il->hw_params.rx_page_order,
1087 PCI_DMA_FROMDEVICE);
1088 __il_free_pages(il, rxq->pool[i].page);
1089 rxq->pool[i].page = NULL;
1090 }
1091 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1092 }
1093
1094 /* Set us so that we have processed and used all buffers, but have
1095 * not restocked the Rx queue with fresh buffers */
1096 rxq->read = rxq->write = 0;
1097 rxq->write_actual = 0;
1098 rxq->free_count = 0;
1099 spin_unlock_irqrestore(&rxq->lock, flags);
1100 }
1101
1102 void
1103 il3945_rx_replenish(void *data)
1104 {
1105 struct il_priv *il = data;
1106 unsigned long flags;
1107
1108 il3945_rx_allocate(il, GFP_KERNEL);
1109
1110 spin_lock_irqsave(&il->lock, flags);
1111 il3945_rx_queue_restock(il);
1112 spin_unlock_irqrestore(&il->lock, flags);
1113 }
1114
1115 static void
1116 il3945_rx_replenish_now(struct il_priv *il)
1117 {
1118 il3945_rx_allocate(il, GFP_ATOMIC);
1119
1120 il3945_rx_queue_restock(il);
1121 }
1122
1123 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1124 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1125 * This free routine walks the list of POOL entries and if SKB is set to
1126 * non NULL it is unmapped and freed
1127 */
1128 static void
1129 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1130 {
1131 int i;
1132 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1133 if (rxq->pool[i].page != NULL) {
1134 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1135 PAGE_SIZE << il->hw_params.rx_page_order,
1136 PCI_DMA_FROMDEVICE);
1137 __il_free_pages(il, rxq->pool[i].page);
1138 rxq->pool[i].page = NULL;
1139 }
1140 }
1141
1142 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1143 rxq->bd_dma);
1144 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1145 rxq->rb_stts, rxq->rb_stts_dma);
1146 rxq->bd = NULL;
1147 rxq->rb_stts = NULL;
1148 }
1149
1150 /* Convert linear signal-to-noise ratio into dB */
1151 static u8 ratio2dB[100] = {
1152 /* 0 1 2 3 4 5 6 7 8 9 */
1153 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1154 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1155 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1156 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1157 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1158 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1159 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1160 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1161 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1162 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1163 };
1164
1165 /* Calculates a relative dB value from a ratio of linear
1166 * (i.e. not dB) signal levels.
1167 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1168 int
1169 il3945_calc_db_from_ratio(int sig_ratio)
1170 {
1171 /* 1000:1 or higher just report as 60 dB */
1172 if (sig_ratio >= 1000)
1173 return 60;
1174
1175 /* 100:1 or higher, divide by 10 and use table,
1176 * add 20 dB to make up for divide by 10 */
1177 if (sig_ratio >= 100)
1178 return 20 + (int)ratio2dB[sig_ratio / 10];
1179
1180 /* We shouldn't see this */
1181 if (sig_ratio < 1)
1182 return 0;
1183
1184 /* Use table for ratios 1:1 - 99:1 */
1185 return (int)ratio2dB[sig_ratio];
1186 }
1187
1188 /**
1189 * il3945_rx_handle - Main entry function for receiving responses from uCode
1190 *
1191 * Uses the il->handlers callback function array to invoke
1192 * the appropriate handlers, including command responses,
1193 * frame-received notifications, and other notifications.
1194 */
1195 static void
1196 il3945_rx_handle(struct il_priv *il)
1197 {
1198 struct il_rx_buf *rxb;
1199 struct il_rx_pkt *pkt;
1200 struct il_rx_queue *rxq = &il->rxq;
1201 u32 r, i;
1202 int reclaim;
1203 unsigned long flags;
1204 u8 fill_rx = 0;
1205 u32 count = 8;
1206 int total_empty = 0;
1207
1208 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1209 * buffer that the driver may process (last buffer filled by ucode). */
1210 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1211 i = rxq->read;
1212
1213 /* calculate total frames need to be restock after handling RX */
1214 total_empty = r - rxq->write_actual;
1215 if (total_empty < 0)
1216 total_empty += RX_QUEUE_SIZE;
1217
1218 if (total_empty > (RX_QUEUE_SIZE / 2))
1219 fill_rx = 1;
1220 /* Rx interrupt, but nothing sent from uCode */
1221 if (i == r)
1222 D_RX("r = %d, i = %d\n", r, i);
1223
1224 while (i != r) {
1225 int len;
1226
1227 rxb = rxq->queue[i];
1228
1229 /* If an RXB doesn't have a Rx queue slot associated with it,
1230 * then a bug has been introduced in the queue refilling
1231 * routines -- catch it here */
1232 BUG_ON(rxb == NULL);
1233
1234 rxq->queue[i] = NULL;
1235
1236 pci_unmap_page(il->pci_dev, rxb->page_dma,
1237 PAGE_SIZE << il->hw_params.rx_page_order,
1238 PCI_DMA_FROMDEVICE);
1239 pkt = rxb_addr(rxb);
1240
1241 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1242 len += sizeof(u32); /* account for status word */
1243
1244 /* Reclaim a command buffer only if this packet is a response
1245 * to a (driver-originated) command.
1246 * If the packet (e.g. Rx frame) originated from uCode,
1247 * there is no command buffer to reclaim.
1248 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1249 * but apparently a few don't get set; catch them here. */
1250 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1251 pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
1252
1253 /* Based on type of command response or notification,
1254 * handle those that need handling via function in
1255 * handlers table. See il3945_setup_handlers() */
1256 if (il->handlers[pkt->hdr.cmd]) {
1257 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1258 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1259 il->isr_stats.handlers[pkt->hdr.cmd]++;
1260 il->handlers[pkt->hdr.cmd] (il, rxb);
1261 } else {
1262 /* No handling needed */
1263 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1264 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1265 }
1266
1267 /*
1268 * XXX: After here, we should always check rxb->page
1269 * against NULL before touching it or its virtual
1270 * memory (pkt). Because some handler might have
1271 * already taken or freed the pages.
1272 */
1273
1274 if (reclaim) {
1275 /* Invoke any callbacks, transfer the buffer to caller,
1276 * and fire off the (possibly) blocking il_send_cmd()
1277 * as we reclaim the driver command queue */
1278 if (rxb->page)
1279 il_tx_cmd_complete(il, rxb);
1280 else
1281 IL_WARN("Claim null rxb?\n");
1282 }
1283
1284 /* Reuse the page if possible. For notification packets and
1285 * SKBs that fail to Rx correctly, add them back into the
1286 * rx_free list for reuse later. */
1287 spin_lock_irqsave(&rxq->lock, flags);
1288 if (rxb->page != NULL) {
1289 rxb->page_dma =
1290 pci_map_page(il->pci_dev, rxb->page, 0,
1291 PAGE_SIZE << il->hw_params.
1292 rx_page_order, PCI_DMA_FROMDEVICE);
1293 list_add_tail(&rxb->list, &rxq->rx_free);
1294 rxq->free_count++;
1295 } else
1296 list_add_tail(&rxb->list, &rxq->rx_used);
1297
1298 spin_unlock_irqrestore(&rxq->lock, flags);
1299
1300 i = (i + 1) & RX_QUEUE_MASK;
1301 /* If there are a lot of unused frames,
1302 * restock the Rx queue so ucode won't assert. */
1303 if (fill_rx) {
1304 count++;
1305 if (count >= 8) {
1306 rxq->read = i;
1307 il3945_rx_replenish_now(il);
1308 count = 0;
1309 }
1310 }
1311 }
1312
1313 /* Backtrack one entry */
1314 rxq->read = i;
1315 if (fill_rx)
1316 il3945_rx_replenish_now(il);
1317 else
1318 il3945_rx_queue_restock(il);
1319 }
1320
1321 /* call this function to flush any scheduled tasklet */
1322 static inline void
1323 il3945_synchronize_irq(struct il_priv *il)
1324 {
1325 /* wait to make sure we flush pending tasklet */
1326 synchronize_irq(il->pci_dev->irq);
1327 tasklet_kill(&il->irq_tasklet);
1328 }
1329
1330 static const char *
1331 il3945_desc_lookup(int i)
1332 {
1333 switch (i) {
1334 case 1:
1335 return "FAIL";
1336 case 2:
1337 return "BAD_PARAM";
1338 case 3:
1339 return "BAD_CHECKSUM";
1340 case 4:
1341 return "NMI_INTERRUPT";
1342 case 5:
1343 return "SYSASSERT";
1344 case 6:
1345 return "FATAL_ERROR";
1346 }
1347
1348 return "UNKNOWN";
1349 }
1350
1351 #define ERROR_START_OFFSET (1 * sizeof(u32))
1352 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1353
1354 void
1355 il3945_dump_nic_error_log(struct il_priv *il)
1356 {
1357 u32 i;
1358 u32 desc, time, count, base, data1;
1359 u32 blink1, blink2, ilink1, ilink2;
1360
1361 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1362
1363 if (!il3945_hw_valid_rtc_data_addr(base)) {
1364 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1365 return;
1366 }
1367
1368 count = il_read_targ_mem(il, base);
1369
1370 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1371 IL_ERR("Start IWL Error Log Dump:\n");
1372 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1373 }
1374
1375 IL_ERR("Desc Time asrtPC blink2 "
1376 "ilink1 nmiPC Line\n");
1377 for (i = ERROR_START_OFFSET;
1378 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1379 i += ERROR_ELEM_SIZE) {
1380 desc = il_read_targ_mem(il, base + i);
1381 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1382 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1383 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1384 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1385 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1386 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1387
1388 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1389 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1390 ilink1, ilink2, data1);
1391 }
1392 }
1393
1394 static void
1395 il3945_irq_tasklet(struct il_priv *il)
1396 {
1397 u32 inta, handled = 0;
1398 u32 inta_fh;
1399 unsigned long flags;
1400 #ifdef CONFIG_IWLEGACY_DEBUG
1401 u32 inta_mask;
1402 #endif
1403
1404 spin_lock_irqsave(&il->lock, flags);
1405
1406 /* Ack/clear/reset pending uCode interrupts.
1407 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1408 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1409 inta = _il_rd(il, CSR_INT);
1410 _il_wr(il, CSR_INT, inta);
1411
1412 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1413 * Any new interrupts that happen after this, either while we're
1414 * in this tasklet, or later, will show up in next ISR/tasklet. */
1415 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1416 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1417
1418 #ifdef CONFIG_IWLEGACY_DEBUG
1419 if (il_get_debug_level(il) & IL_DL_ISR) {
1420 /* just for debug */
1421 inta_mask = _il_rd(il, CSR_INT_MASK);
1422 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1423 inta_mask, inta_fh);
1424 }
1425 #endif
1426
1427 spin_unlock_irqrestore(&il->lock, flags);
1428
1429 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1430 * atomic, make sure that inta covers all the interrupts that
1431 * we've discovered, even if FH interrupt came in just after
1432 * reading CSR_INT. */
1433 if (inta_fh & CSR39_FH_INT_RX_MASK)
1434 inta |= CSR_INT_BIT_FH_RX;
1435 if (inta_fh & CSR39_FH_INT_TX_MASK)
1436 inta |= CSR_INT_BIT_FH_TX;
1437
1438 /* Now service all interrupt bits discovered above. */
1439 if (inta & CSR_INT_BIT_HW_ERR) {
1440 IL_ERR("Hardware error detected. Restarting.\n");
1441
1442 /* Tell the device to stop sending interrupts */
1443 il_disable_interrupts(il);
1444
1445 il->isr_stats.hw++;
1446 il_irq_handle_error(il);
1447
1448 handled |= CSR_INT_BIT_HW_ERR;
1449
1450 return;
1451 }
1452 #ifdef CONFIG_IWLEGACY_DEBUG
1453 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1454 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1455 if (inta & CSR_INT_BIT_SCD) {
1456 D_ISR("Scheduler finished to transmit "
1457 "the frame/frames.\n");
1458 il->isr_stats.sch++;
1459 }
1460
1461 /* Alive notification via Rx interrupt will do the real work */
1462 if (inta & CSR_INT_BIT_ALIVE) {
1463 D_ISR("Alive interrupt\n");
1464 il->isr_stats.alive++;
1465 }
1466 }
1467 #endif
1468 /* Safely ignore these bits for debug checks below */
1469 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1470
1471 /* Error detected by uCode */
1472 if (inta & CSR_INT_BIT_SW_ERR) {
1473 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1474 inta);
1475 il->isr_stats.sw++;
1476 il_irq_handle_error(il);
1477 handled |= CSR_INT_BIT_SW_ERR;
1478 }
1479
1480 /* uCode wakes up after power-down sleep */
1481 if (inta & CSR_INT_BIT_WAKEUP) {
1482 D_ISR("Wakeup interrupt\n");
1483 il_rx_queue_update_write_ptr(il, &il->rxq);
1484 il_txq_update_write_ptr(il, &il->txq[0]);
1485 il_txq_update_write_ptr(il, &il->txq[1]);
1486 il_txq_update_write_ptr(il, &il->txq[2]);
1487 il_txq_update_write_ptr(il, &il->txq[3]);
1488 il_txq_update_write_ptr(il, &il->txq[4]);
1489 il_txq_update_write_ptr(il, &il->txq[5]);
1490
1491 il->isr_stats.wakeup++;
1492 handled |= CSR_INT_BIT_WAKEUP;
1493 }
1494
1495 /* All uCode command responses, including Tx command responses,
1496 * Rx "responses" (frame-received notification), and other
1497 * notifications from uCode come through here*/
1498 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1499 il3945_rx_handle(il);
1500 il->isr_stats.rx++;
1501 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1502 }
1503
1504 if (inta & CSR_INT_BIT_FH_TX) {
1505 D_ISR("Tx interrupt\n");
1506 il->isr_stats.tx++;
1507
1508 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1509 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1510 handled |= CSR_INT_BIT_FH_TX;
1511 }
1512
1513 if (inta & ~handled) {
1514 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1515 il->isr_stats.unhandled++;
1516 }
1517
1518 if (inta & ~il->inta_mask) {
1519 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1520 inta & ~il->inta_mask);
1521 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
1522 }
1523
1524 /* Re-enable all interrupts */
1525 /* only Re-enable if disabled by irq */
1526 if (test_bit(S_INT_ENABLED, &il->status))
1527 il_enable_interrupts(il);
1528
1529 #ifdef CONFIG_IWLEGACY_DEBUG
1530 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1531 inta = _il_rd(il, CSR_INT);
1532 inta_mask = _il_rd(il, CSR_INT_MASK);
1533 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1534 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1535 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1536 }
1537 #endif
1538 }
1539
1540 static int
1541 il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
1542 u8 is_active, u8 n_probes,
1543 struct il3945_scan_channel *scan_ch,
1544 struct ieee80211_vif *vif)
1545 {
1546 struct ieee80211_channel *chan;
1547 const struct ieee80211_supported_band *sband;
1548 const struct il_channel_info *ch_info;
1549 u16 passive_dwell = 0;
1550 u16 active_dwell = 0;
1551 int added, i;
1552
1553 sband = il_get_hw_mode(il, band);
1554 if (!sband)
1555 return 0;
1556
1557 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1558 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1559
1560 if (passive_dwell <= active_dwell)
1561 passive_dwell = active_dwell + 1;
1562
1563 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1564 chan = il->scan_request->channels[i];
1565
1566 if (chan->band != band)
1567 continue;
1568
1569 scan_ch->channel = chan->hw_value;
1570
1571 ch_info = il_get_channel_info(il, band, scan_ch->channel);
1572 if (!il_is_channel_valid(ch_info)) {
1573 D_SCAN("Channel %d is INVALID for this band.\n",
1574 scan_ch->channel);
1575 continue;
1576 }
1577
1578 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1579 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1580 /* If passive , set up for auto-switch
1581 * and use long active_dwell time.
1582 */
1583 if (!is_active || il_is_channel_passive(ch_info) ||
1584 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1585 scan_ch->type = 0; /* passive */
1586 if (IL_UCODE_API(il->ucode_ver) == 1)
1587 scan_ch->active_dwell =
1588 cpu_to_le16(passive_dwell - 1);
1589 } else {
1590 scan_ch->type = 1; /* active */
1591 }
1592
1593 /* Set direct probe bits. These may be used both for active
1594 * scan channels (probes gets sent right away),
1595 * or for passive channels (probes get se sent only after
1596 * hearing clear Rx packet).*/
1597 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1598 if (n_probes)
1599 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1600 } else {
1601 /* uCode v1 does not allow setting direct probe bits on
1602 * passive channel. */
1603 if ((scan_ch->type & 1) && n_probes)
1604 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1605 }
1606
1607 /* Set txpower levels to defaults */
1608 scan_ch->tpc.dsp_atten = 110;
1609 /* scan_pwr_info->tpc.dsp_atten; */
1610
1611 /*scan_pwr_info->tpc.tx_gain; */
1612 if (band == IEEE80211_BAND_5GHZ)
1613 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1614 else {
1615 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1616 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1617 * power level:
1618 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1619 */
1620 }
1621
1622 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1623 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1624 (scan_ch->type & 1) ? active_dwell : passive_dwell);
1625
1626 scan_ch++;
1627 added++;
1628 }
1629
1630 D_SCAN("total channels to scan %d\n", added);
1631 return added;
1632 }
1633
1634 static void
1635 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1636 {
1637 int i;
1638
1639 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1640 rates[i].bitrate = il3945_rates[i].ieee * 5;
1641 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1642 rates[i].hw_value_short = i;
1643 rates[i].flags = 0;
1644 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1645 /*
1646 * If CCK != 1M then set short preamble rate flag.
1647 */
1648 rates[i].flags |=
1649 (il3945_rates[i].plcp ==
1650 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1651 }
1652 }
1653 }
1654
1655 /******************************************************************************
1656 *
1657 * uCode download functions
1658 *
1659 ******************************************************************************/
1660
1661 static void
1662 il3945_dealloc_ucode_pci(struct il_priv *il)
1663 {
1664 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1665 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1666 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1667 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1668 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1669 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1670 }
1671
1672 /**
1673 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1674 * looking at all data.
1675 */
1676 static int
1677 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1678 {
1679 u32 val;
1680 u32 save_len = len;
1681 int rc = 0;
1682 u32 errcnt;
1683
1684 D_INFO("ucode inst image size is %u\n", len);
1685
1686 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1687
1688 errcnt = 0;
1689 for (; len > 0; len -= sizeof(u32), image++) {
1690 /* read data comes through single port, auto-incr addr */
1691 /* NOTE: Use the debugless read so we don't flood kernel log
1692 * if IL_DL_IO is set */
1693 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1694 if (val != le32_to_cpu(*image)) {
1695 IL_ERR("uCode INST section is invalid at "
1696 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1697 save_len - len, val, le32_to_cpu(*image));
1698 rc = -EIO;
1699 errcnt++;
1700 if (errcnt >= 20)
1701 break;
1702 }
1703 }
1704
1705 if (!errcnt)
1706 D_INFO("ucode image in INSTRUCTION memory is good\n");
1707
1708 return rc;
1709 }
1710
1711 /**
1712 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1713 * using sample data 100 bytes apart. If these sample points are good,
1714 * it's a pretty good bet that everything between them is good, too.
1715 */
1716 static int
1717 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1718 {
1719 u32 val;
1720 int rc = 0;
1721 u32 errcnt = 0;
1722 u32 i;
1723
1724 D_INFO("ucode inst image size is %u\n", len);
1725
1726 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1727 /* read data comes through single port, auto-incr addr */
1728 /* NOTE: Use the debugless read so we don't flood kernel log
1729 * if IL_DL_IO is set */
1730 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1731 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1732 if (val != le32_to_cpu(*image)) {
1733 #if 0 /* Enable this if you want to see details */
1734 IL_ERR("uCode INST section is invalid at "
1735 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1736 *image);
1737 #endif
1738 rc = -EIO;
1739 errcnt++;
1740 if (errcnt >= 3)
1741 break;
1742 }
1743 }
1744
1745 return rc;
1746 }
1747
1748 /**
1749 * il3945_verify_ucode - determine which instruction image is in SRAM,
1750 * and verify its contents
1751 */
1752 static int
1753 il3945_verify_ucode(struct il_priv *il)
1754 {
1755 __le32 *image;
1756 u32 len;
1757 int rc = 0;
1758
1759 /* Try bootstrap */
1760 image = (__le32 *) il->ucode_boot.v_addr;
1761 len = il->ucode_boot.len;
1762 rc = il3945_verify_inst_sparse(il, image, len);
1763 if (rc == 0) {
1764 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1765 return 0;
1766 }
1767
1768 /* Try initialize */
1769 image = (__le32 *) il->ucode_init.v_addr;
1770 len = il->ucode_init.len;
1771 rc = il3945_verify_inst_sparse(il, image, len);
1772 if (rc == 0) {
1773 D_INFO("Initialize uCode is good in inst SRAM\n");
1774 return 0;
1775 }
1776
1777 /* Try runtime/protocol */
1778 image = (__le32 *) il->ucode_code.v_addr;
1779 len = il->ucode_code.len;
1780 rc = il3945_verify_inst_sparse(il, image, len);
1781 if (rc == 0) {
1782 D_INFO("Runtime uCode is good in inst SRAM\n");
1783 return 0;
1784 }
1785
1786 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1787
1788 /* Since nothing seems to match, show first several data entries in
1789 * instruction SRAM, so maybe visual inspection will give a clue.
1790 * Selection of bootstrap image (vs. other images) is arbitrary. */
1791 image = (__le32 *) il->ucode_boot.v_addr;
1792 len = il->ucode_boot.len;
1793 rc = il3945_verify_inst_full(il, image, len);
1794
1795 return rc;
1796 }
1797
1798 static void
1799 il3945_nic_start(struct il_priv *il)
1800 {
1801 /* Remove all resets to allow NIC to operate */
1802 _il_wr(il, CSR_RESET, 0);
1803 }
1804
1805 #define IL3945_UCODE_GET(item) \
1806 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1807 { \
1808 return le32_to_cpu(ucode->v1.item); \
1809 }
1810
1811 static u32
1812 il3945_ucode_get_header_size(u32 api_ver)
1813 {
1814 return 24;
1815 }
1816
1817 static u8 *
1818 il3945_ucode_get_data(const struct il_ucode_header *ucode)
1819 {
1820 return (u8 *) ucode->v1.data;
1821 }
1822
1823 IL3945_UCODE_GET(inst_size);
1824 IL3945_UCODE_GET(data_size);
1825 IL3945_UCODE_GET(init_size);
1826 IL3945_UCODE_GET(init_data_size);
1827 IL3945_UCODE_GET(boot_size);
1828
1829 /**
1830 * il3945_read_ucode - Read uCode images from disk file.
1831 *
1832 * Copy into buffers for card to fetch via bus-mastering
1833 */
1834 static int
1835 il3945_read_ucode(struct il_priv *il)
1836 {
1837 const struct il_ucode_header *ucode;
1838 int ret = -EINVAL, idx;
1839 const struct firmware *ucode_raw;
1840 /* firmware file name contains uCode/driver compatibility version */
1841 const char *name_pre = il->cfg->fw_name_pre;
1842 const unsigned int api_max = il->cfg->ucode_api_max;
1843 const unsigned int api_min = il->cfg->ucode_api_min;
1844 char buf[25];
1845 u8 *src;
1846 size_t len;
1847 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1848
1849 /* Ask kernel firmware_class module to get the boot firmware off disk.
1850 * request_firmware() is synchronous, file is in memory on return. */
1851 for (idx = api_max; idx >= api_min; idx--) {
1852 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1853 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1854 if (ret < 0) {
1855 IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1856 if (ret == -ENOENT)
1857 continue;
1858 else
1859 goto error;
1860 } else {
1861 if (idx < api_max)
1862 IL_ERR("Loaded firmware %s, "
1863 "which is deprecated. "
1864 " Please use API v%u instead.\n", buf,
1865 api_max);
1866 D_INFO("Got firmware '%s' file "
1867 "(%zd bytes) from disk\n", buf, ucode_raw->size);
1868 break;
1869 }
1870 }
1871
1872 if (ret < 0)
1873 goto error;
1874
1875 /* Make sure that we got at least our header! */
1876 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1877 IL_ERR("File size way too small!\n");
1878 ret = -EINVAL;
1879 goto err_release;
1880 }
1881
1882 /* Data from ucode file: header followed by uCode images */
1883 ucode = (struct il_ucode_header *)ucode_raw->data;
1884
1885 il->ucode_ver = le32_to_cpu(ucode->ver);
1886 api_ver = IL_UCODE_API(il->ucode_ver);
1887 inst_size = il3945_ucode_get_inst_size(ucode);
1888 data_size = il3945_ucode_get_data_size(ucode);
1889 init_size = il3945_ucode_get_init_size(ucode);
1890 init_data_size = il3945_ucode_get_init_data_size(ucode);
1891 boot_size = il3945_ucode_get_boot_size(ucode);
1892 src = il3945_ucode_get_data(ucode);
1893
1894 /* api_ver should match the api version forming part of the
1895 * firmware filename ... but we don't check for that and only rely
1896 * on the API version read from firmware header from here on forward */
1897
1898 if (api_ver < api_min || api_ver > api_max) {
1899 IL_ERR("Driver unable to support your firmware API. "
1900 "Driver supports v%u, firmware is v%u.\n", api_max,
1901 api_ver);
1902 il->ucode_ver = 0;
1903 ret = -EINVAL;
1904 goto err_release;
1905 }
1906 if (api_ver != api_max)
1907 IL_ERR("Firmware has old API version. Expected %u, "
1908 "got %u. New firmware can be obtained "
1909 "from http://www.intellinuxwireless.org.\n", api_max,
1910 api_ver);
1911
1912 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1913 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1914 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1915
1916 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1917 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1918 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1919 IL_UCODE_SERIAL(il->ucode_ver));
1920
1921 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1922 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1923 D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1924 D_INFO("f/w package hdr init inst size = %u\n", init_size);
1925 D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1926 D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1927
1928 /* Verify size of file vs. image size info in file's header */
1929 if (ucode_raw->size !=
1930 il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1931 init_size + init_data_size + boot_size) {
1932
1933 D_INFO("uCode file size %zd does not match expected size\n",
1934 ucode_raw->size);
1935 ret = -EINVAL;
1936 goto err_release;
1937 }
1938
1939 /* Verify that uCode images will fit in card's SRAM */
1940 if (inst_size > IL39_MAX_INST_SIZE) {
1941 D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1942 ret = -EINVAL;
1943 goto err_release;
1944 }
1945
1946 if (data_size > IL39_MAX_DATA_SIZE) {
1947 D_INFO("uCode data len %d too large to fit in\n", data_size);
1948 ret = -EINVAL;
1949 goto err_release;
1950 }
1951 if (init_size > IL39_MAX_INST_SIZE) {
1952 D_INFO("uCode init instr len %d too large to fit in\n",
1953 init_size);
1954 ret = -EINVAL;
1955 goto err_release;
1956 }
1957 if (init_data_size > IL39_MAX_DATA_SIZE) {
1958 D_INFO("uCode init data len %d too large to fit in\n",
1959 init_data_size);
1960 ret = -EINVAL;
1961 goto err_release;
1962 }
1963 if (boot_size > IL39_MAX_BSM_SIZE) {
1964 D_INFO("uCode boot instr len %d too large to fit in\n",
1965 boot_size);
1966 ret = -EINVAL;
1967 goto err_release;
1968 }
1969
1970 /* Allocate ucode buffers for card's bus-master loading ... */
1971
1972 /* Runtime instructions and 2 copies of data:
1973 * 1) unmodified from disk
1974 * 2) backup cache for save/restore during power-downs */
1975 il->ucode_code.len = inst_size;
1976 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1977
1978 il->ucode_data.len = data_size;
1979 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1980
1981 il->ucode_data_backup.len = data_size;
1982 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1983
1984 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1985 !il->ucode_data_backup.v_addr)
1986 goto err_pci_alloc;
1987
1988 /* Initialization instructions and data */
1989 if (init_size && init_data_size) {
1990 il->ucode_init.len = init_size;
1991 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1992
1993 il->ucode_init_data.len = init_data_size;
1994 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1995
1996 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1997 goto err_pci_alloc;
1998 }
1999
2000 /* Bootstrap (instructions only, no data) */
2001 if (boot_size) {
2002 il->ucode_boot.len = boot_size;
2003 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
2004
2005 if (!il->ucode_boot.v_addr)
2006 goto err_pci_alloc;
2007 }
2008
2009 /* Copy images into buffers for card's bus-master reads ... */
2010
2011 /* Runtime instructions (first block of data in file) */
2012 len = inst_size;
2013 D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
2014 memcpy(il->ucode_code.v_addr, src, len);
2015 src += len;
2016
2017 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2018 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2019
2020 /* Runtime data (2nd block)
2021 * NOTE: Copy into backup buffer will be done in il3945_up() */
2022 len = data_size;
2023 D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2024 memcpy(il->ucode_data.v_addr, src, len);
2025 memcpy(il->ucode_data_backup.v_addr, src, len);
2026 src += len;
2027
2028 /* Initialization instructions (3rd block) */
2029 if (init_size) {
2030 len = init_size;
2031 D_INFO("Copying (but not loading) init instr len %zd\n", len);
2032 memcpy(il->ucode_init.v_addr, src, len);
2033 src += len;
2034 }
2035
2036 /* Initialization data (4th block) */
2037 if (init_data_size) {
2038 len = init_data_size;
2039 D_INFO("Copying (but not loading) init data len %zd\n", len);
2040 memcpy(il->ucode_init_data.v_addr, src, len);
2041 src += len;
2042 }
2043
2044 /* Bootstrap instructions (5th block) */
2045 len = boot_size;
2046 D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2047 memcpy(il->ucode_boot.v_addr, src, len);
2048
2049 /* We have our copies now, allow OS release its copies */
2050 release_firmware(ucode_raw);
2051 return 0;
2052
2053 err_pci_alloc:
2054 IL_ERR("failed to allocate pci memory\n");
2055 ret = -ENOMEM;
2056 il3945_dealloc_ucode_pci(il);
2057
2058 err_release:
2059 release_firmware(ucode_raw);
2060
2061 error:
2062 return ret;
2063 }
2064
2065 /**
2066 * il3945_set_ucode_ptrs - Set uCode address location
2067 *
2068 * Tell initialization uCode where to find runtime uCode.
2069 *
2070 * BSM registers initially contain pointers to initialization uCode.
2071 * We need to replace them to load runtime uCode inst and data,
2072 * and to save runtime data when powering down.
2073 */
2074 static int
2075 il3945_set_ucode_ptrs(struct il_priv *il)
2076 {
2077 dma_addr_t pinst;
2078 dma_addr_t pdata;
2079
2080 /* bits 31:0 for 3945 */
2081 pinst = il->ucode_code.p_addr;
2082 pdata = il->ucode_data_backup.p_addr;
2083
2084 /* Tell bootstrap uCode where to find image to load */
2085 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2086 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2087 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2088
2089 /* Inst byte count must be last to set up, bit 31 signals uCode
2090 * that all new ptr/size info is in place */
2091 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2092 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2093
2094 D_INFO("Runtime uCode pointers are set.\n");
2095
2096 return 0;
2097 }
2098
2099 /**
2100 * il3945_init_alive_start - Called after N_ALIVE notification received
2101 *
2102 * Called after N_ALIVE notification received from "initialize" uCode.
2103 *
2104 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2105 */
2106 static void
2107 il3945_init_alive_start(struct il_priv *il)
2108 {
2109 /* Check alive response for "valid" sign from uCode */
2110 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2111 /* We had an error bringing up the hardware, so take it
2112 * all the way back down so we can try again */
2113 D_INFO("Initialize Alive failed.\n");
2114 goto restart;
2115 }
2116
2117 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2118 * This is a paranoid check, because we would not have gotten the
2119 * "initialize" alive if code weren't properly loaded. */
2120 if (il3945_verify_ucode(il)) {
2121 /* Runtime instruction load was bad;
2122 * take it all the way back down so we can try again */
2123 D_INFO("Bad \"initialize\" uCode load.\n");
2124 goto restart;
2125 }
2126
2127 /* Send pointers to protocol/runtime uCode image ... init code will
2128 * load and launch runtime uCode, which will send us another "Alive"
2129 * notification. */
2130 D_INFO("Initialization Alive received.\n");
2131 if (il3945_set_ucode_ptrs(il)) {
2132 /* Runtime instruction load won't happen;
2133 * take it all the way back down so we can try again */
2134 D_INFO("Couldn't set up uCode pointers.\n");
2135 goto restart;
2136 }
2137 return;
2138
2139 restart:
2140 queue_work(il->workqueue, &il->restart);
2141 }
2142
2143 /**
2144 * il3945_alive_start - called after N_ALIVE notification received
2145 * from protocol/runtime uCode (initialization uCode's
2146 * Alive gets handled by il3945_init_alive_start()).
2147 */
2148 static void
2149 il3945_alive_start(struct il_priv *il)
2150 {
2151 int thermal_spin = 0;
2152 u32 rfkill;
2153 struct il_rxon_context *ctx = &il->ctx;
2154
2155 D_INFO("Runtime Alive received.\n");
2156
2157 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2158 /* We had an error bringing up the hardware, so take it
2159 * all the way back down so we can try again */
2160 D_INFO("Alive failed.\n");
2161 goto restart;
2162 }
2163
2164 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2165 * This is a paranoid check, because we would not have gotten the
2166 * "runtime" alive if code weren't properly loaded. */
2167 if (il3945_verify_ucode(il)) {
2168 /* Runtime instruction load was bad;
2169 * take it all the way back down so we can try again */
2170 D_INFO("Bad runtime uCode load.\n");
2171 goto restart;
2172 }
2173
2174 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2175 D_INFO("RFKILL status: 0x%x\n", rfkill);
2176
2177 if (rfkill & 0x1) {
2178 clear_bit(S_RF_KILL_HW, &il->status);
2179 /* if RFKILL is not on, then wait for thermal
2180 * sensor in adapter to kick in */
2181 while (il3945_hw_get_temperature(il) == 0) {
2182 thermal_spin++;
2183 udelay(10);
2184 }
2185
2186 if (thermal_spin)
2187 D_INFO("Thermal calibration took %dus\n",
2188 thermal_spin * 10);
2189 } else
2190 set_bit(S_RF_KILL_HW, &il->status);
2191
2192 /* After the ALIVE response, we can send commands to 3945 uCode */
2193 set_bit(S_ALIVE, &il->status);
2194
2195 /* Enable watchdog to monitor the driver tx queues */
2196 il_setup_watchdog(il);
2197
2198 if (il_is_rfkill(il))
2199 return;
2200
2201 ieee80211_wake_queues(il->hw);
2202
2203 il->active_rate = RATES_MASK_3945;
2204
2205 il_power_update_mode(il, true);
2206
2207 if (il_is_associated(il)) {
2208 struct il3945_rxon_cmd *active_rxon =
2209 (struct il3945_rxon_cmd *)(&ctx->active);
2210
2211 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2212 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2213 } else {
2214 /* Initialize our rx_config data */
2215 il_connection_init_rx_config(il, ctx);
2216 }
2217
2218 /* Configure Bluetooth device coexistence support */
2219 il_send_bt_config(il);
2220
2221 set_bit(S_READY, &il->status);
2222
2223 /* Configure the adapter for unassociated operation */
2224 il3945_commit_rxon(il, ctx);
2225
2226 il3945_reg_txpower_periodic(il);
2227
2228 D_INFO("ALIVE processing complete.\n");
2229 wake_up(&il->wait_command_queue);
2230
2231 return;
2232
2233 restart:
2234 queue_work(il->workqueue, &il->restart);
2235 }
2236
2237 static void il3945_cancel_deferred_work(struct il_priv *il);
2238
2239 static void
2240 __il3945_down(struct il_priv *il)
2241 {
2242 unsigned long flags;
2243 int exit_pending;
2244
2245 D_INFO(DRV_NAME " is going down\n");
2246
2247 il_scan_cancel_timeout(il, 200);
2248
2249 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2250
2251 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2252 * to prevent rearm timer */
2253 del_timer_sync(&il->watchdog);
2254
2255 /* Station information will now be cleared in device */
2256 il_clear_ucode_stations(il, NULL);
2257 il_dealloc_bcast_stations(il);
2258 il_clear_driver_stations(il);
2259
2260 /* Unblock any waiting calls */
2261 wake_up_all(&il->wait_command_queue);
2262
2263 /* Wipe out the EXIT_PENDING status bit if we are not actually
2264 * exiting the module */
2265 if (!exit_pending)
2266 clear_bit(S_EXIT_PENDING, &il->status);
2267
2268 /* stop and reset the on-board processor */
2269 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2270
2271 /* tell the device to stop sending interrupts */
2272 spin_lock_irqsave(&il->lock, flags);
2273 il_disable_interrupts(il);
2274 spin_unlock_irqrestore(&il->lock, flags);
2275 il3945_synchronize_irq(il);
2276
2277 if (il->mac80211_registered)
2278 ieee80211_stop_queues(il->hw);
2279
2280 /* If we have not previously called il3945_init() then
2281 * clear all bits but the RF Kill bits and return */
2282 if (!il_is_init(il)) {
2283 il->status =
2284 test_bit(S_RF_KILL_HW,
2285 &il->
2286 status) << S_RF_KILL_HW |
2287 test_bit(S_GEO_CONFIGURED,
2288 &il->
2289 status) << S_GEO_CONFIGURED |
2290 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2291 goto exit;
2292 }
2293
2294 /* ...otherwise clear out all the status bits but the RF Kill
2295 * bit and continue taking the NIC down. */
2296 il->status &=
2297 test_bit(S_RF_KILL_HW,
2298 &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED,
2299 &il->
2300 status) <<
2301 S_GEO_CONFIGURED | test_bit(S_FW_ERROR,
2302 &il->
2303 status) << S_FW_ERROR |
2304 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2305
2306 il3945_hw_txq_ctx_stop(il);
2307 il3945_hw_rxq_stop(il);
2308
2309 /* Power-down device's busmaster DMA clocks */
2310 il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2311 udelay(5);
2312
2313 /* Stop the device, and put it in low power state */
2314 il_apm_stop(il);
2315
2316 exit:
2317 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2318
2319 if (il->beacon_skb)
2320 dev_kfree_skb(il->beacon_skb);
2321 il->beacon_skb = NULL;
2322
2323 /* clear out any free frames */
2324 il3945_clear_free_frames(il);
2325 }
2326
2327 static void
2328 il3945_down(struct il_priv *il)
2329 {
2330 mutex_lock(&il->mutex);
2331 __il3945_down(il);
2332 mutex_unlock(&il->mutex);
2333
2334 il3945_cancel_deferred_work(il);
2335 }
2336
2337 #define MAX_HW_RESTARTS 5
2338
2339 static int
2340 il3945_alloc_bcast_station(struct il_priv *il)
2341 {
2342 struct il_rxon_context *ctx = &il->ctx;
2343 unsigned long flags;
2344 u8 sta_id;
2345
2346 spin_lock_irqsave(&il->sta_lock, flags);
2347 sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL);
2348 if (sta_id == IL_INVALID_STATION) {
2349 IL_ERR("Unable to prepare broadcast station\n");
2350 spin_unlock_irqrestore(&il->sta_lock, flags);
2351
2352 return -EINVAL;
2353 }
2354
2355 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2356 il->stations[sta_id].used |= IL_STA_BCAST;
2357 spin_unlock_irqrestore(&il->sta_lock, flags);
2358
2359 return 0;
2360 }
2361
2362 static int
2363 __il3945_up(struct il_priv *il)
2364 {
2365 int rc, i;
2366
2367 rc = il3945_alloc_bcast_station(il);
2368 if (rc)
2369 return rc;
2370
2371 if (test_bit(S_EXIT_PENDING, &il->status)) {
2372 IL_WARN("Exit pending; will not bring the NIC up\n");
2373 return -EIO;
2374 }
2375
2376 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2377 IL_ERR("ucode not available for device bring up\n");
2378 return -EIO;
2379 }
2380
2381 /* If platform's RF_KILL switch is NOT set to KILL */
2382 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2383 clear_bit(S_RF_KILL_HW, &il->status);
2384 else {
2385 set_bit(S_RF_KILL_HW, &il->status);
2386 IL_WARN("Radio disabled by HW RF Kill switch\n");
2387 return -ENODEV;
2388 }
2389
2390 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2391
2392 rc = il3945_hw_nic_init(il);
2393 if (rc) {
2394 IL_ERR("Unable to int nic\n");
2395 return rc;
2396 }
2397
2398 /* make sure rfkill handshake bits are cleared */
2399 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2400 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2401
2402 /* clear (again), then enable host interrupts */
2403 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2404 il_enable_interrupts(il);
2405
2406 /* really make sure rfkill handshake bits are cleared */
2407 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2408 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2409
2410 /* Copy original ucode data image from disk into backup cache.
2411 * This will be used to initialize the on-board processor's
2412 * data SRAM for a clean start when the runtime program first loads. */
2413 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2414 il->ucode_data.len);
2415
2416 /* We return success when we resume from suspend and rf_kill is on. */
2417 if (test_bit(S_RF_KILL_HW, &il->status))
2418 return 0;
2419
2420 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2421
2422 /* load bootstrap state machine,
2423 * load bootstrap program into processor's memory,
2424 * prepare to load the "initialize" uCode */
2425 rc = il->cfg->ops->lib->load_ucode(il);
2426
2427 if (rc) {
2428 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2429 continue;
2430 }
2431
2432 /* start card; "initialize" will load runtime ucode */
2433 il3945_nic_start(il);
2434
2435 D_INFO(DRV_NAME " is coming up\n");
2436
2437 return 0;
2438 }
2439
2440 set_bit(S_EXIT_PENDING, &il->status);
2441 __il3945_down(il);
2442 clear_bit(S_EXIT_PENDING, &il->status);
2443
2444 /* tried to restart and config the device for as long as our
2445 * patience could withstand */
2446 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2447 return -EIO;
2448 }
2449
2450 /*****************************************************************************
2451 *
2452 * Workqueue callbacks
2453 *
2454 *****************************************************************************/
2455
2456 static void
2457 il3945_bg_init_alive_start(struct work_struct *data)
2458 {
2459 struct il_priv *il =
2460 container_of(data, struct il_priv, init_alive_start.work);
2461
2462 mutex_lock(&il->mutex);
2463 if (test_bit(S_EXIT_PENDING, &il->status))
2464 goto out;
2465
2466 il3945_init_alive_start(il);
2467 out:
2468 mutex_unlock(&il->mutex);
2469 }
2470
2471 static void
2472 il3945_bg_alive_start(struct work_struct *data)
2473 {
2474 struct il_priv *il =
2475 container_of(data, struct il_priv, alive_start.work);
2476
2477 mutex_lock(&il->mutex);
2478 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2479 goto out;
2480
2481 il3945_alive_start(il);
2482 out:
2483 mutex_unlock(&il->mutex);
2484 }
2485
2486 /*
2487 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2488 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2489 * *is* readable even when device has been SW_RESET into low power mode
2490 * (e.g. during RF KILL).
2491 */
2492 static void
2493 il3945_rfkill_poll(struct work_struct *data)
2494 {
2495 struct il_priv *il =
2496 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2497 bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
2498 bool new_rfkill =
2499 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2500
2501 if (new_rfkill != old_rfkill) {
2502 if (new_rfkill)
2503 set_bit(S_RF_KILL_HW, &il->status);
2504 else
2505 clear_bit(S_RF_KILL_HW, &il->status);
2506
2507 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2508
2509 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2510 new_rfkill ? "disable radio" : "enable radio");
2511 }
2512
2513 /* Keep this running, even if radio now enabled. This will be
2514 * cancelled in mac_start() if system decides to start again */
2515 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2516 round_jiffies_relative(2 * HZ));
2517
2518 }
2519
2520 int
2521 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2522 {
2523 struct il_host_cmd cmd = {
2524 .id = C_SCAN,
2525 .len = sizeof(struct il3945_scan_cmd),
2526 .flags = CMD_SIZE_HUGE,
2527 };
2528 struct il3945_scan_cmd *scan;
2529 u8 n_probes = 0;
2530 enum ieee80211_band band;
2531 bool is_active = false;
2532 int ret;
2533 u16 len;
2534
2535 lockdep_assert_held(&il->mutex);
2536
2537 if (!il->scan_cmd) {
2538 il->scan_cmd =
2539 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2540 GFP_KERNEL);
2541 if (!il->scan_cmd) {
2542 D_SCAN("Fail to allocate scan memory\n");
2543 return -ENOMEM;
2544 }
2545 }
2546 scan = il->scan_cmd;
2547 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2548
2549 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2550 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2551
2552 if (il_is_associated(il)) {
2553 u16 interval;
2554 u32 extra;
2555 u32 suspend_time = 100;
2556 u32 scan_suspend_time = 100;
2557
2558 D_INFO("Scanning while associated...\n");
2559
2560 interval = vif->bss_conf.beacon_int;
2561
2562 scan->suspend_time = 0;
2563 scan->max_out_time = cpu_to_le32(200 * 1024);
2564 if (!interval)
2565 interval = suspend_time;
2566 /*
2567 * suspend time format:
2568 * 0-19: beacon interval in usec (time before exec.)
2569 * 20-23: 0
2570 * 24-31: number of beacons (suspend between channels)
2571 */
2572
2573 extra = (suspend_time / interval) << 24;
2574 scan_suspend_time =
2575 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2576
2577 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2578 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2579 scan_suspend_time, interval);
2580 }
2581
2582 if (il->scan_request->n_ssids) {
2583 int i, p = 0;
2584 D_SCAN("Kicking off active scan\n");
2585 for (i = 0; i < il->scan_request->n_ssids; i++) {
2586 /* always does wildcard anyway */
2587 if (!il->scan_request->ssids[i].ssid_len)
2588 continue;
2589 scan->direct_scan[p].id = WLAN_EID_SSID;
2590 scan->direct_scan[p].len =
2591 il->scan_request->ssids[i].ssid_len;
2592 memcpy(scan->direct_scan[p].ssid,
2593 il->scan_request->ssids[i].ssid,
2594 il->scan_request->ssids[i].ssid_len);
2595 n_probes++;
2596 p++;
2597 }
2598 is_active = true;
2599 } else
2600 D_SCAN("Kicking off passive scan.\n");
2601
2602 /* We don't build a direct scan probe request; the uCode will do
2603 * that based on the direct_mask added to each channel entry */
2604 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2605 scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
2606 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2607
2608 /* flags + rate selection */
2609
2610 switch (il->scan_band) {
2611 case IEEE80211_BAND_2GHZ:
2612 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2613 scan->tx_cmd.rate = RATE_1M_PLCP;
2614 band = IEEE80211_BAND_2GHZ;
2615 break;
2616 case IEEE80211_BAND_5GHZ:
2617 scan->tx_cmd.rate = RATE_6M_PLCP;
2618 band = IEEE80211_BAND_5GHZ;
2619 break;
2620 default:
2621 IL_WARN("Invalid scan band\n");
2622 return -EIO;
2623 }
2624
2625 /*
2626 * If active scaning is requested but a certain channel is marked
2627 * passive, we can do active scanning if we detect transmissions. For
2628 * passive only scanning disable switching to active on any channel.
2629 */
2630 scan->good_CRC_th =
2631 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2632
2633 len =
2634 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2635 vif->addr, il->scan_request->ie,
2636 il->scan_request->ie_len,
2637 IL_MAX_SCAN_SIZE - sizeof(*scan));
2638 scan->tx_cmd.len = cpu_to_le16(len);
2639
2640 /* select Rx antennas */
2641 scan->flags |= il3945_get_antenna_flags(il);
2642
2643 scan->channel_count =
2644 il3945_get_channels_for_scan(il, band, is_active, n_probes,
2645 (void *)&scan->data[len], vif);
2646 if (scan->channel_count == 0) {
2647 D_SCAN("channel count %d\n", scan->channel_count);
2648 return -EIO;
2649 }
2650
2651 cmd.len +=
2652 le16_to_cpu(scan->tx_cmd.len) +
2653 scan->channel_count * sizeof(struct il3945_scan_channel);
2654 cmd.data = scan;
2655 scan->len = cpu_to_le16(cmd.len);
2656
2657 set_bit(S_SCAN_HW, &il->status);
2658 ret = il_send_cmd_sync(il, &cmd);
2659 if (ret)
2660 clear_bit(S_SCAN_HW, &il->status);
2661 return ret;
2662 }
2663
2664 void
2665 il3945_post_scan(struct il_priv *il)
2666 {
2667 struct il_rxon_context *ctx = &il->ctx;
2668
2669 /*
2670 * Since setting the RXON may have been deferred while
2671 * performing the scan, fire one off if needed
2672 */
2673 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2674 il3945_commit_rxon(il, ctx);
2675 }
2676
2677 static void
2678 il3945_bg_restart(struct work_struct *data)
2679 {
2680 struct il_priv *il = container_of(data, struct il_priv, restart);
2681
2682 if (test_bit(S_EXIT_PENDING, &il->status))
2683 return;
2684
2685 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2686 mutex_lock(&il->mutex);
2687 il->is_open = 0;
2688 mutex_unlock(&il->mutex);
2689 il3945_down(il);
2690 ieee80211_restart_hw(il->hw);
2691 } else {
2692 il3945_down(il);
2693
2694 mutex_lock(&il->mutex);
2695 if (test_bit(S_EXIT_PENDING, &il->status)) {
2696 mutex_unlock(&il->mutex);
2697 return;
2698 }
2699
2700 __il3945_up(il);
2701 mutex_unlock(&il->mutex);
2702 }
2703 }
2704
2705 static void
2706 il3945_bg_rx_replenish(struct work_struct *data)
2707 {
2708 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2709
2710 mutex_lock(&il->mutex);
2711 if (test_bit(S_EXIT_PENDING, &il->status))
2712 goto out;
2713
2714 il3945_rx_replenish(il);
2715 out:
2716 mutex_unlock(&il->mutex);
2717 }
2718
2719 void
2720 il3945_post_associate(struct il_priv *il)
2721 {
2722 int rc = 0;
2723 struct ieee80211_conf *conf = NULL;
2724 struct il_rxon_context *ctx = &il->ctx;
2725
2726 if (!ctx->vif || !il->is_open)
2727 return;
2728
2729 D_ASSOC("Associated as %d to: %pM\n", ctx->vif->bss_conf.aid,
2730 ctx->active.bssid_addr);
2731
2732 if (test_bit(S_EXIT_PENDING, &il->status))
2733 return;
2734
2735 il_scan_cancel_timeout(il, 200);
2736
2737 conf = &il->hw->conf;
2738
2739 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2740 il3945_commit_rxon(il, ctx);
2741
2742 rc = il_send_rxon_timing(il, ctx);
2743 if (rc)
2744 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2745
2746 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2747
2748 ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
2749
2750 D_ASSOC("assoc id %d beacon interval %d\n", ctx->vif->bss_conf.aid,
2751 ctx->vif->bss_conf.beacon_int);
2752
2753 if (ctx->vif->bss_conf.use_short_preamble)
2754 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2755 else
2756 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2757
2758 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2759 if (ctx->vif->bss_conf.use_short_slot)
2760 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2761 else
2762 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2763 }
2764
2765 il3945_commit_rxon(il, ctx);
2766
2767 switch (ctx->vif->type) {
2768 case NL80211_IFTYPE_STATION:
2769 il3945_rate_scale_init(il->hw, IL_AP_ID);
2770 break;
2771 case NL80211_IFTYPE_ADHOC:
2772 il3945_send_beacon_cmd(il);
2773 break;
2774 default:
2775 IL_ERR("%s Should not be called in %d mode\n", __func__,
2776 ctx->vif->type);
2777 break;
2778 }
2779 }
2780
2781 /*****************************************************************************
2782 *
2783 * mac80211 entry point functions
2784 *
2785 *****************************************************************************/
2786
2787 #define UCODE_READY_TIMEOUT (2 * HZ)
2788
2789 static int
2790 il3945_mac_start(struct ieee80211_hw *hw)
2791 {
2792 struct il_priv *il = hw->priv;
2793 int ret;
2794
2795 D_MAC80211("enter\n");
2796
2797 /* we should be verifying the device is ready to be opened */
2798 mutex_lock(&il->mutex);
2799
2800 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2801 * ucode filename and max sizes are card-specific. */
2802
2803 if (!il->ucode_code.len) {
2804 ret = il3945_read_ucode(il);
2805 if (ret) {
2806 IL_ERR("Could not read microcode: %d\n", ret);
2807 mutex_unlock(&il->mutex);
2808 goto out_release_irq;
2809 }
2810 }
2811
2812 ret = __il3945_up(il);
2813
2814 mutex_unlock(&il->mutex);
2815
2816 if (ret)
2817 goto out_release_irq;
2818
2819 D_INFO("Start UP work.\n");
2820
2821 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2822 * mac80211 will not be run successfully. */
2823 ret = wait_event_timeout(il->wait_command_queue,
2824 test_bit(S_READY, &il->status),
2825 UCODE_READY_TIMEOUT);
2826 if (!ret) {
2827 if (!test_bit(S_READY, &il->status)) {
2828 IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2829 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2830 ret = -ETIMEDOUT;
2831 goto out_release_irq;
2832 }
2833 }
2834
2835 /* ucode is running and will send rfkill notifications,
2836 * no need to poll the killswitch state anymore */
2837 cancel_delayed_work(&il->_3945.rfkill_poll);
2838
2839 il->is_open = 1;
2840 D_MAC80211("leave\n");
2841 return 0;
2842
2843 out_release_irq:
2844 il->is_open = 0;
2845 D_MAC80211("leave - failed\n");
2846 return ret;
2847 }
2848
2849 static void
2850 il3945_mac_stop(struct ieee80211_hw *hw)
2851 {
2852 struct il_priv *il = hw->priv;
2853
2854 D_MAC80211("enter\n");
2855
2856 if (!il->is_open) {
2857 D_MAC80211("leave - skip\n");
2858 return;
2859 }
2860
2861 il->is_open = 0;
2862
2863 il3945_down(il);
2864
2865 flush_workqueue(il->workqueue);
2866
2867 /* start polling the killswitch state again */
2868 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2869 round_jiffies_relative(2 * HZ));
2870
2871 D_MAC80211("leave\n");
2872 }
2873
2874 static void
2875 il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2876 {
2877 struct il_priv *il = hw->priv;
2878
2879 D_MAC80211("enter\n");
2880
2881 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2882 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2883
2884 if (il3945_tx_skb(il, skb))
2885 dev_kfree_skb_any(skb);
2886
2887 D_MAC80211("leave\n");
2888 }
2889
2890 void
2891 il3945_config_ap(struct il_priv *il)
2892 {
2893 struct il_rxon_context *ctx = &il->ctx;
2894 struct ieee80211_vif *vif = ctx->vif;
2895 int rc = 0;
2896
2897 if (test_bit(S_EXIT_PENDING, &il->status))
2898 return;
2899
2900 /* The following should be done only at AP bring up */
2901 if (!(il_is_associated(il))) {
2902
2903 /* RXON - unassoc (to set timing command) */
2904 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2905 il3945_commit_rxon(il, ctx);
2906
2907 /* RXON Timing */
2908 rc = il_send_rxon_timing(il, ctx);
2909 if (rc)
2910 IL_WARN("C_RXON_TIMING failed - "
2911 "Attempting to continue.\n");
2912
2913 ctx->staging.assoc_id = 0;
2914
2915 if (vif->bss_conf.use_short_preamble)
2916 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2917 else
2918 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2919
2920 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2921 if (vif->bss_conf.use_short_slot)
2922 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2923 else
2924 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2925 }
2926 /* restore RXON assoc */
2927 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2928 il3945_commit_rxon(il, ctx);
2929 }
2930 il3945_send_beacon_cmd(il);
2931 }
2932
2933 static int
2934 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2935 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2936 struct ieee80211_key_conf *key)
2937 {
2938 struct il_priv *il = hw->priv;
2939 int ret = 0;
2940 u8 sta_id = IL_INVALID_STATION;
2941 u8 static_key;
2942
2943 D_MAC80211("enter\n");
2944
2945 if (il3945_mod_params.sw_crypto) {
2946 D_MAC80211("leave - hwcrypto disabled\n");
2947 return -EOPNOTSUPP;
2948 }
2949
2950 /*
2951 * To support IBSS RSN, don't program group keys in IBSS, the
2952 * hardware will then not attempt to decrypt the frames.
2953 */
2954 if (vif->type == NL80211_IFTYPE_ADHOC &&
2955 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2956 return -EOPNOTSUPP;
2957
2958 static_key = !il_is_associated(il);
2959
2960 if (!static_key) {
2961 sta_id = il_sta_id_or_broadcast(il, &il->ctx, sta);
2962 if (sta_id == IL_INVALID_STATION)
2963 return -EINVAL;
2964 }
2965
2966 mutex_lock(&il->mutex);
2967 il_scan_cancel_timeout(il, 100);
2968
2969 switch (cmd) {
2970 case SET_KEY:
2971 if (static_key)
2972 ret = il3945_set_static_key(il, key);
2973 else
2974 ret = il3945_set_dynamic_key(il, key, sta_id);
2975 D_MAC80211("enable hwcrypto key\n");
2976 break;
2977 case DISABLE_KEY:
2978 if (static_key)
2979 ret = il3945_remove_static_key(il);
2980 else
2981 ret = il3945_clear_sta_key_info(il, sta_id);
2982 D_MAC80211("disable hwcrypto key\n");
2983 break;
2984 default:
2985 ret = -EINVAL;
2986 }
2987
2988 mutex_unlock(&il->mutex);
2989 D_MAC80211("leave\n");
2990
2991 return ret;
2992 }
2993
2994 static int
2995 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2996 struct ieee80211_sta *sta)
2997 {
2998 struct il_priv *il = hw->priv;
2999 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3000 int ret;
3001 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3002 u8 sta_id;
3003
3004 D_INFO("received request to add station %pM\n", sta->addr);
3005 mutex_lock(&il->mutex);
3006 D_INFO("proceeding to add station %pM\n", sta->addr);
3007 sta_priv->common.sta_id = IL_INVALID_STATION;
3008
3009 ret =
3010 il_add_station_common(il, &il->ctx, sta->addr, is_ap, sta, &sta_id);
3011 if (ret) {
3012 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
3013 /* Should we return success if return code is EEXIST ? */
3014 mutex_unlock(&il->mutex);
3015 return ret;
3016 }
3017
3018 sta_priv->common.sta_id = sta_id;
3019
3020 /* Initialize rate scaling */
3021 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
3022 il3945_rs_rate_init(il, sta, sta_id);
3023 mutex_unlock(&il->mutex);
3024
3025 return 0;
3026 }
3027
3028 static void
3029 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3030 unsigned int *total_flags, u64 multicast)
3031 {
3032 struct il_priv *il = hw->priv;
3033 __le32 filter_or = 0, filter_nand = 0;
3034 struct il_rxon_context *ctx = &il->ctx;
3035
3036 #define CHK(test, flag) do { \
3037 if (*total_flags & (test)) \
3038 filter_or |= (flag); \
3039 else \
3040 filter_nand |= (flag); \
3041 } while (0)
3042
3043 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3044 *total_flags);
3045
3046 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3047 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3048 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3049
3050 #undef CHK
3051
3052 mutex_lock(&il->mutex);
3053
3054 ctx->staging.filter_flags &= ~filter_nand;
3055 ctx->staging.filter_flags |= filter_or;
3056
3057 /*
3058 * Not committing directly because hardware can perform a scan,
3059 * but even if hw is ready, committing here breaks for some reason,
3060 * we'll eventually commit the filter flags change anyway.
3061 */
3062
3063 mutex_unlock(&il->mutex);
3064
3065 /*
3066 * Receiving all multicast frames is always enabled by the
3067 * default flags setup in il_connection_init_rx_config()
3068 * since we currently do not support programming multicast
3069 * filters into the device.
3070 */
3071 *total_flags &=
3072 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3073 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3074 }
3075
3076 /*****************************************************************************
3077 *
3078 * sysfs attributes
3079 *
3080 *****************************************************************************/
3081
3082 #ifdef CONFIG_IWLEGACY_DEBUG
3083
3084 /*
3085 * The following adds a new attribute to the sysfs representation
3086 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3087 * used for controlling the debug level.
3088 *
3089 * See the level definitions in iwl for details.
3090 *
3091 * The debug_level being managed using sysfs below is a per device debug
3092 * level that is used instead of the global debug level if it (the per
3093 * device debug level) is set.
3094 */
3095 static ssize_t
3096 il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3097 char *buf)
3098 {
3099 struct il_priv *il = dev_get_drvdata(d);
3100 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3101 }
3102
3103 static ssize_t
3104 il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3105 const char *buf, size_t count)
3106 {
3107 struct il_priv *il = dev_get_drvdata(d);
3108 unsigned long val;
3109 int ret;
3110
3111 ret = strict_strtoul(buf, 0, &val);
3112 if (ret)
3113 IL_INFO("%s is not in hex or decimal form.\n", buf);
3114 else {
3115 il->debug_level = val;
3116 if (il_alloc_traffic_mem(il))
3117 IL_ERR("Not enough memory to generate traffic log\n");
3118 }
3119 return strnlen(buf, count);
3120 }
3121
3122 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
3123 il3945_store_debug_level);
3124
3125 #endif /* CONFIG_IWLEGACY_DEBUG */
3126
3127 static ssize_t
3128 il3945_show_temperature(struct device *d, struct device_attribute *attr,
3129 char *buf)
3130 {
3131 struct il_priv *il = dev_get_drvdata(d);
3132
3133 if (!il_is_alive(il))
3134 return -EAGAIN;
3135
3136 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3137 }
3138
3139 static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
3140
3141 static ssize_t
3142 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3143 {
3144 struct il_priv *il = dev_get_drvdata(d);
3145 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3146 }
3147
3148 static ssize_t
3149 il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3150 const char *buf, size_t count)
3151 {
3152 struct il_priv *il = dev_get_drvdata(d);
3153 char *p = (char *)buf;
3154 u32 val;
3155
3156 val = simple_strtoul(p, &p, 10);
3157 if (p == buf)
3158 IL_INFO(": %s is not in decimal form.\n", buf);
3159 else
3160 il3945_hw_reg_set_txpower(il, val);
3161
3162 return count;
3163 }
3164
3165 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
3166 il3945_store_tx_power);
3167
3168 static ssize_t
3169 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3170 {
3171 struct il_priv *il = dev_get_drvdata(d);
3172 struct il_rxon_context *ctx = &il->ctx;
3173
3174 return sprintf(buf, "0x%04X\n", ctx->active.flags);
3175 }
3176
3177 static ssize_t
3178 il3945_store_flags(struct device *d, struct device_attribute *attr,
3179 const char *buf, size_t count)
3180 {
3181 struct il_priv *il = dev_get_drvdata(d);
3182 u32 flags = simple_strtoul(buf, NULL, 0);
3183 struct il_rxon_context *ctx = &il->ctx;
3184
3185 mutex_lock(&il->mutex);
3186 if (le32_to_cpu(ctx->staging.flags) != flags) {
3187 /* Cancel any currently running scans... */
3188 if (il_scan_cancel_timeout(il, 100))
3189 IL_WARN("Could not cancel scan.\n");
3190 else {
3191 D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3192 ctx->staging.flags = cpu_to_le32(flags);
3193 il3945_commit_rxon(il, ctx);
3194 }
3195 }
3196 mutex_unlock(&il->mutex);
3197
3198 return count;
3199 }
3200
3201 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
3202 il3945_store_flags);
3203
3204 static ssize_t
3205 il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3206 char *buf)
3207 {
3208 struct il_priv *il = dev_get_drvdata(d);
3209 struct il_rxon_context *ctx = &il->ctx;
3210
3211 return sprintf(buf, "0x%04X\n", le32_to_cpu(ctx->active.filter_flags));
3212 }
3213
3214 static ssize_t
3215 il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3216 const char *buf, size_t count)
3217 {
3218 struct il_priv *il = dev_get_drvdata(d);
3219 struct il_rxon_context *ctx = &il->ctx;
3220 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3221
3222 mutex_lock(&il->mutex);
3223 if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3224 /* Cancel any currently running scans... */
3225 if (il_scan_cancel_timeout(il, 100))
3226 IL_WARN("Could not cancel scan.\n");
3227 else {
3228 D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3229 filter_flags);
3230 ctx->staging.filter_flags = cpu_to_le32(filter_flags);
3231 il3945_commit_rxon(il, ctx);
3232 }
3233 }
3234 mutex_unlock(&il->mutex);
3235
3236 return count;
3237 }
3238
3239 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
3240 il3945_store_filter_flags);
3241
3242 static ssize_t
3243 il3945_show_measurement(struct device *d, struct device_attribute *attr,
3244 char *buf)
3245 {
3246 struct il_priv *il = dev_get_drvdata(d);
3247 struct il_spectrum_notification measure_report;
3248 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3249 u8 *data = (u8 *) &measure_report;
3250 unsigned long flags;
3251
3252 spin_lock_irqsave(&il->lock, flags);
3253 if (!(il->measurement_status & MEASUREMENT_READY)) {
3254 spin_unlock_irqrestore(&il->lock, flags);
3255 return 0;
3256 }
3257 memcpy(&measure_report, &il->measure_report, size);
3258 il->measurement_status = 0;
3259 spin_unlock_irqrestore(&il->lock, flags);
3260
3261 while (size && PAGE_SIZE - len) {
3262 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3263 PAGE_SIZE - len, 1);
3264 len = strlen(buf);
3265 if (PAGE_SIZE - len)
3266 buf[len++] = '\n';
3267
3268 ofs += 16;
3269 size -= min(size, 16U);
3270 }
3271
3272 return len;
3273 }
3274
3275 static ssize_t
3276 il3945_store_measurement(struct device *d, struct device_attribute *attr,
3277 const char *buf, size_t count)
3278 {
3279 struct il_priv *il = dev_get_drvdata(d);
3280 struct il_rxon_context *ctx = &il->ctx;
3281 struct ieee80211_measurement_params params = {
3282 .channel = le16_to_cpu(ctx->active.channel),
3283 .start_time = cpu_to_le64(il->_3945.last_tsf),
3284 .duration = cpu_to_le16(1),
3285 };
3286 u8 type = IL_MEASURE_BASIC;
3287 u8 buffer[32];
3288 u8 channel;
3289
3290 if (count) {
3291 char *p = buffer;
3292 strncpy(buffer, buf, min(sizeof(buffer), count));
3293 channel = simple_strtoul(p, NULL, 0);
3294 if (channel)
3295 params.channel = channel;
3296
3297 p = buffer;
3298 while (*p && *p != ' ')
3299 p++;
3300 if (*p)
3301 type = simple_strtoul(p + 1, NULL, 0);
3302 }
3303
3304 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3305 type, params.channel, buf);
3306 il3945_get_measurement(il, &params, type);
3307
3308 return count;
3309 }
3310
3311 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
3312 il3945_store_measurement);
3313
3314 static ssize_t
3315 il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3316 const char *buf, size_t count)
3317 {
3318 struct il_priv *il = dev_get_drvdata(d);
3319
3320 il->retry_rate = simple_strtoul(buf, NULL, 0);
3321 if (il->retry_rate <= 0)
3322 il->retry_rate = 1;
3323
3324 return count;
3325 }
3326
3327 static ssize_t
3328 il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3329 char *buf)
3330 {
3331 struct il_priv *il = dev_get_drvdata(d);
3332 return sprintf(buf, "%d", il->retry_rate);
3333 }
3334
3335 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
3336 il3945_store_retry_rate);
3337
3338 static ssize_t
3339 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3340 {
3341 /* all this shit doesn't belong into sysfs anyway */
3342 return 0;
3343 }
3344
3345 static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
3346
3347 static ssize_t
3348 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3349 {
3350 struct il_priv *il = dev_get_drvdata(d);
3351
3352 if (!il_is_alive(il))
3353 return -EAGAIN;
3354
3355 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3356 }
3357
3358 static ssize_t
3359 il3945_store_antenna(struct device *d, struct device_attribute *attr,
3360 const char *buf, size_t count)
3361 {
3362 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3363 int ant;
3364
3365 if (count == 0)
3366 return 0;
3367
3368 if (sscanf(buf, "%1i", &ant) != 1) {
3369 D_INFO("not in hex or decimal form.\n");
3370 return count;
3371 }
3372
3373 if (ant >= 0 && ant <= 2) {
3374 D_INFO("Setting antenna select to %d.\n", ant);
3375 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3376 } else
3377 D_INFO("Bad antenna select value %d.\n", ant);
3378
3379 return count;
3380 }
3381
3382 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
3383 il3945_store_antenna);
3384
3385 static ssize_t
3386 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3387 {
3388 struct il_priv *il = dev_get_drvdata(d);
3389 if (!il_is_alive(il))
3390 return -EAGAIN;
3391 return sprintf(buf, "0x%08x\n", (int)il->status);
3392 }
3393
3394 static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
3395
3396 static ssize_t
3397 il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3398 const char *buf, size_t count)
3399 {
3400 struct il_priv *il = dev_get_drvdata(d);
3401 char *p = (char *)buf;
3402
3403 if (p[0] == '1')
3404 il3945_dump_nic_error_log(il);
3405
3406 return strnlen(buf, count);
3407 }
3408
3409 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
3410
3411 /*****************************************************************************
3412 *
3413 * driver setup and tear down
3414 *
3415 *****************************************************************************/
3416
3417 static void
3418 il3945_setup_deferred_work(struct il_priv *il)
3419 {
3420 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3421
3422 init_waitqueue_head(&il->wait_command_queue);
3423
3424 INIT_WORK(&il->restart, il3945_bg_restart);
3425 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3426 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3427 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3428 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3429
3430 il_setup_scan_deferred_work(il);
3431
3432 il3945_hw_setup_deferred_work(il);
3433
3434 init_timer(&il->watchdog);
3435 il->watchdog.data = (unsigned long)il;
3436 il->watchdog.function = il_bg_watchdog;
3437
3438 tasklet_init(&il->irq_tasklet,
3439 (void (*)(unsigned long))il3945_irq_tasklet,
3440 (unsigned long)il);
3441 }
3442
3443 static void
3444 il3945_cancel_deferred_work(struct il_priv *il)
3445 {
3446 il3945_hw_cancel_deferred_work(il);
3447
3448 cancel_delayed_work_sync(&il->init_alive_start);
3449 cancel_delayed_work(&il->alive_start);
3450
3451 il_cancel_scan_deferred_work(il);
3452 }
3453
3454 static struct attribute *il3945_sysfs_entries[] = {
3455 &dev_attr_antenna.attr,
3456 &dev_attr_channels.attr,
3457 &dev_attr_dump_errors.attr,
3458 &dev_attr_flags.attr,
3459 &dev_attr_filter_flags.attr,
3460 &dev_attr_measurement.attr,
3461 &dev_attr_retry_rate.attr,
3462 &dev_attr_status.attr,
3463 &dev_attr_temperature.attr,
3464 &dev_attr_tx_power.attr,
3465 #ifdef CONFIG_IWLEGACY_DEBUG
3466 &dev_attr_debug_level.attr,
3467 #endif
3468 NULL
3469 };
3470
3471 static struct attribute_group il3945_attribute_group = {
3472 .name = NULL, /* put in device directory */
3473 .attrs = il3945_sysfs_entries,
3474 };
3475
3476 struct ieee80211_ops il3945_hw_ops = {
3477 .tx = il3945_mac_tx,
3478 .start = il3945_mac_start,
3479 .stop = il3945_mac_stop,
3480 .add_interface = il_mac_add_interface,
3481 .remove_interface = il_mac_remove_interface,
3482 .change_interface = il_mac_change_interface,
3483 .config = il_mac_config,
3484 .configure_filter = il3945_configure_filter,
3485 .set_key = il3945_mac_set_key,
3486 .conf_tx = il_mac_conf_tx,
3487 .reset_tsf = il_mac_reset_tsf,
3488 .bss_info_changed = il_mac_bss_info_changed,
3489 .hw_scan = il_mac_hw_scan,
3490 .sta_add = il3945_mac_sta_add,
3491 .sta_remove = il_mac_sta_remove,
3492 .tx_last_beacon = il_mac_tx_last_beacon,
3493 };
3494
3495 static int
3496 il3945_init_drv(struct il_priv *il)
3497 {
3498 int ret;
3499 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3500
3501 il->retry_rate = 1;
3502 il->beacon_skb = NULL;
3503
3504 spin_lock_init(&il->sta_lock);
3505 spin_lock_init(&il->hcmd_lock);
3506
3507 INIT_LIST_HEAD(&il->free_frames);
3508
3509 mutex_init(&il->mutex);
3510
3511 il->ieee_channels = NULL;
3512 il->ieee_rates = NULL;
3513 il->band = IEEE80211_BAND_2GHZ;
3514
3515 il->iw_mode = NL80211_IFTYPE_STATION;
3516 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3517
3518 /* initialize force reset */
3519 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3520
3521 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3522 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3523 eeprom->version);
3524 ret = -EINVAL;
3525 goto err;
3526 }
3527 ret = il_init_channel_map(il);
3528 if (ret) {
3529 IL_ERR("initializing regulatory failed: %d\n", ret);
3530 goto err;
3531 }
3532
3533 /* Set up txpower settings in driver for all channels */
3534 if (il3945_txpower_set_from_eeprom(il)) {
3535 ret = -EIO;
3536 goto err_free_channel_map;
3537 }
3538
3539 ret = il_init_geos(il);
3540 if (ret) {
3541 IL_ERR("initializing geos failed: %d\n", ret);
3542 goto err_free_channel_map;
3543 }
3544 il3945_init_hw_rates(il, il->ieee_rates);
3545
3546 return 0;
3547
3548 err_free_channel_map:
3549 il_free_channel_map(il);
3550 err:
3551 return ret;
3552 }
3553
3554 #define IL3945_MAX_PROBE_REQUEST 200
3555
3556 static int
3557 il3945_setup_mac(struct il_priv *il)
3558 {
3559 int ret;
3560 struct ieee80211_hw *hw = il->hw;
3561
3562 hw->rate_control_algorithm = "iwl-3945-rs";
3563 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3564 hw->vif_data_size = sizeof(struct il_vif_priv);
3565
3566 /* Tell mac80211 our characteristics */
3567 hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
3568
3569 hw->wiphy->interface_modes = il->ctx.interface_modes;
3570
3571 hw->wiphy->flags |=
3572 WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
3573 WIPHY_FLAG_IBSS_RSN;
3574
3575 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3576 /* we create the 802.11 header and a zero-length SSID element */
3577 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3578
3579 /* Default value; 4 EDCA QOS priorities */
3580 hw->queues = 4;
3581
3582 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
3583 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3584 &il->bands[IEEE80211_BAND_2GHZ];
3585
3586 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
3587 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3588 &il->bands[IEEE80211_BAND_5GHZ];
3589
3590 il_leds_init(il);
3591
3592 ret = ieee80211_register_hw(il->hw);
3593 if (ret) {
3594 IL_ERR("Failed to register hw (error %d)\n", ret);
3595 return ret;
3596 }
3597 il->mac80211_registered = 1;
3598
3599 return 0;
3600 }
3601
3602 static int
3603 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3604 {
3605 int err = 0;
3606 struct il_priv *il;
3607 struct ieee80211_hw *hw;
3608 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3609 struct il3945_eeprom *eeprom;
3610 unsigned long flags;
3611
3612 /***********************
3613 * 1. Allocating HW data
3614 * ********************/
3615
3616 /* mac80211 allocates memory for this device instance, including
3617 * space for this driver's ilate structure */
3618 hw = il_alloc_all(cfg);
3619 if (hw == NULL) {
3620 pr_err("Can not allocate network device\n");
3621 err = -ENOMEM;
3622 goto out;
3623 }
3624 il = hw->priv;
3625 SET_IEEE80211_DEV(hw, &pdev->dev);
3626
3627 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3628
3629 il->ctx.ctxid = 0;
3630
3631 il->ctx.rxon_cmd = C_RXON;
3632 il->ctx.rxon_timing_cmd = C_RXON_TIMING;
3633 il->ctx.rxon_assoc_cmd = C_RXON_ASSOC;
3634 il->ctx.qos_cmd = C_QOS_PARAM;
3635 il->ctx.ap_sta_id = IL_AP_ID;
3636 il->ctx.wep_key_cmd = C_WEPKEY;
3637 il->ctx.interface_modes =
3638 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3639 il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
3640 il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
3641 il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
3642
3643 /*
3644 * Disabling hardware scan means that mac80211 will perform scans
3645 * "the hard way", rather than using device's scan.
3646 */
3647 if (il3945_mod_params.disable_hw_scan) {
3648 D_INFO("Disabling hw_scan\n");
3649 il3945_hw_ops.hw_scan = NULL;
3650 }
3651
3652 D_INFO("*** LOAD DRIVER ***\n");
3653 il->cfg = cfg;
3654 il->pci_dev = pdev;
3655 il->inta_mask = CSR_INI_SET_MASK;
3656
3657 if (il_alloc_traffic_mem(il))
3658 IL_ERR("Not enough memory to generate traffic log\n");
3659
3660 /***************************
3661 * 2. Initializing PCI bus
3662 * *************************/
3663 pci_disable_link_state(pdev,
3664 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3665 PCIE_LINK_STATE_CLKPM);
3666
3667 if (pci_enable_device(pdev)) {
3668 err = -ENODEV;
3669 goto out_ieee80211_free_hw;
3670 }
3671
3672 pci_set_master(pdev);
3673
3674 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3675 if (!err)
3676 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3677 if (err) {
3678 IL_WARN("No suitable DMA available.\n");
3679 goto out_pci_disable_device;
3680 }
3681
3682 pci_set_drvdata(pdev, il);
3683 err = pci_request_regions(pdev, DRV_NAME);
3684 if (err)
3685 goto out_pci_disable_device;
3686
3687 /***********************
3688 * 3. Read REV Register
3689 * ********************/
3690 il->hw_base = pci_iomap(pdev, 0, 0);
3691 if (!il->hw_base) {
3692 err = -ENODEV;
3693 goto out_pci_release_regions;
3694 }
3695
3696 D_INFO("pci_resource_len = 0x%08llx\n",
3697 (unsigned long long)pci_resource_len(pdev, 0));
3698 D_INFO("pci_resource_base = %p\n", il->hw_base);
3699
3700 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3701 * PCI Tx retries from interfering with C3 CPU state */
3702 pci_write_config_byte(pdev, 0x41, 0x00);
3703
3704 /* these spin locks will be used in apm_ops.init and EEPROM access
3705 * we should init now
3706 */
3707 spin_lock_init(&il->reg_lock);
3708 spin_lock_init(&il->lock);
3709
3710 /*
3711 * stop and reset the on-board processor just in case it is in a
3712 * strange state ... like being left stranded by a primary kernel
3713 * and this is now the kdump kernel trying to start up
3714 */
3715 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3716
3717 /***********************
3718 * 4. Read EEPROM
3719 * ********************/
3720
3721 /* Read the EEPROM */
3722 err = il_eeprom_init(il);
3723 if (err) {
3724 IL_ERR("Unable to init EEPROM\n");
3725 goto out_iounmap;
3726 }
3727 /* MAC Address location in EEPROM same for 3945/4965 */
3728 eeprom = (struct il3945_eeprom *)il->eeprom;
3729 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3730 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3731
3732 /***********************
3733 * 5. Setup HW Constants
3734 * ********************/
3735 /* Device-specific setup */
3736 if (il3945_hw_set_hw_params(il)) {
3737 IL_ERR("failed to set hw settings\n");
3738 goto out_eeprom_free;
3739 }
3740
3741 /***********************
3742 * 6. Setup il
3743 * ********************/
3744
3745 err = il3945_init_drv(il);
3746 if (err) {
3747 IL_ERR("initializing driver failed\n");
3748 goto out_unset_hw_params;
3749 }
3750
3751 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3752
3753 /***********************
3754 * 7. Setup Services
3755 * ********************/
3756
3757 spin_lock_irqsave(&il->lock, flags);
3758 il_disable_interrupts(il);
3759 spin_unlock_irqrestore(&il->lock, flags);
3760
3761 pci_enable_msi(il->pci_dev);
3762
3763 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3764 if (err) {
3765 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3766 goto out_disable_msi;
3767 }
3768
3769 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3770 if (err) {
3771 IL_ERR("failed to create sysfs device attributes\n");
3772 goto out_release_irq;
3773 }
3774
3775 il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5],
3776 &il->ctx);
3777 il3945_setup_deferred_work(il);
3778 il3945_setup_handlers(il);
3779 il_power_initialize(il);
3780
3781 /*********************************
3782 * 8. Setup and Register mac80211
3783 * *******************************/
3784
3785 il_enable_interrupts(il);
3786
3787 err = il3945_setup_mac(il);
3788 if (err)
3789 goto out_remove_sysfs;
3790
3791 err = il_dbgfs_register(il, DRV_NAME);
3792 if (err)
3793 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
3794 err);
3795
3796 /* Start monitoring the killswitch */
3797 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3798
3799 return 0;
3800
3801 out_remove_sysfs:
3802 destroy_workqueue(il->workqueue);
3803 il->workqueue = NULL;
3804 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3805 out_release_irq:
3806 free_irq(il->pci_dev->irq, il);
3807 out_disable_msi:
3808 pci_disable_msi(il->pci_dev);
3809 il_free_geos(il);
3810 il_free_channel_map(il);
3811 out_unset_hw_params:
3812 il3945_unset_hw_params(il);
3813 out_eeprom_free:
3814 il_eeprom_free(il);
3815 out_iounmap:
3816 pci_iounmap(pdev, il->hw_base);
3817 out_pci_release_regions:
3818 pci_release_regions(pdev);
3819 out_pci_disable_device:
3820 pci_set_drvdata(pdev, NULL);
3821 pci_disable_device(pdev);
3822 out_ieee80211_free_hw:
3823 il_free_traffic_mem(il);
3824 ieee80211_free_hw(il->hw);
3825 out:
3826 return err;
3827 }
3828
3829 static void __devexit
3830 il3945_pci_remove(struct pci_dev *pdev)
3831 {
3832 struct il_priv *il = pci_get_drvdata(pdev);
3833 unsigned long flags;
3834
3835 if (!il)
3836 return;
3837
3838 D_INFO("*** UNLOAD DRIVER ***\n");
3839
3840 il_dbgfs_unregister(il);
3841
3842 set_bit(S_EXIT_PENDING, &il->status);
3843
3844 il_leds_exit(il);
3845
3846 if (il->mac80211_registered) {
3847 ieee80211_unregister_hw(il->hw);
3848 il->mac80211_registered = 0;
3849 } else {
3850 il3945_down(il);
3851 }
3852
3853 /*
3854 * Make sure device is reset to low power before unloading driver.
3855 * This may be redundant with il_down(), but there are paths to
3856 * run il_down() without calling apm_ops.stop(), and there are
3857 * paths to avoid running il_down() at all before leaving driver.
3858 * This (inexpensive) call *makes sure* device is reset.
3859 */
3860 il_apm_stop(il);
3861
3862 /* make sure we flush any pending irq or
3863 * tasklet for the driver
3864 */
3865 spin_lock_irqsave(&il->lock, flags);
3866 il_disable_interrupts(il);
3867 spin_unlock_irqrestore(&il->lock, flags);
3868
3869 il3945_synchronize_irq(il);
3870
3871 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3872
3873 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3874
3875 il3945_dealloc_ucode_pci(il);
3876
3877 if (il->rxq.bd)
3878 il3945_rx_queue_free(il, &il->rxq);
3879 il3945_hw_txq_ctx_free(il);
3880
3881 il3945_unset_hw_params(il);
3882
3883 /*netif_stop_queue(dev); */
3884 flush_workqueue(il->workqueue);
3885
3886 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3887 * il->workqueue... so we can't take down the workqueue
3888 * until now... */
3889 destroy_workqueue(il->workqueue);
3890 il->workqueue = NULL;
3891 il_free_traffic_mem(il);
3892
3893 free_irq(pdev->irq, il);
3894 pci_disable_msi(pdev);
3895
3896 pci_iounmap(pdev, il->hw_base);
3897 pci_release_regions(pdev);
3898 pci_disable_device(pdev);
3899 pci_set_drvdata(pdev, NULL);
3900
3901 il_free_channel_map(il);
3902 il_free_geos(il);
3903 kfree(il->scan_cmd);
3904 if (il->beacon_skb)
3905 dev_kfree_skb(il->beacon_skb);
3906
3907 ieee80211_free_hw(il->hw);
3908 }
3909
3910 /*****************************************************************************
3911 *
3912 * driver and module entry point
3913 *
3914 *****************************************************************************/
3915
3916 static struct pci_driver il3945_driver = {
3917 .name = DRV_NAME,
3918 .id_table = il3945_hw_card_ids,
3919 .probe = il3945_pci_probe,
3920 .remove = __devexit_p(il3945_pci_remove),
3921 .driver.pm = IL_LEGACY_PM_OPS,
3922 };
3923
3924 static int __init
3925 il3945_init(void)
3926 {
3927
3928 int ret;
3929 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3930 pr_info(DRV_COPYRIGHT "\n");
3931
3932 ret = il3945_rate_control_register();
3933 if (ret) {
3934 pr_err("Unable to register rate control algorithm: %d\n", ret);
3935 return ret;
3936 }
3937
3938 ret = pci_register_driver(&il3945_driver);
3939 if (ret) {
3940 pr_err("Unable to initialize PCI module\n");
3941 goto error_register;
3942 }
3943
3944 return ret;
3945
3946 error_register:
3947 il3945_rate_control_unregister();
3948 return ret;
3949 }
3950
3951 static void __exit
3952 il3945_exit(void)
3953 {
3954 pci_unregister_driver(&il3945_driver);
3955 il3945_rate_control_unregister();
3956 }
3957
3958 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3959
3960 module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
3961 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3962 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
3963 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3964 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3965 S_IRUGO);
3966 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3967 #ifdef CONFIG_IWLEGACY_DEBUG
3968 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
3969 MODULE_PARM_DESC(debug, "debug output mask");
3970 #endif
3971 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
3972 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3973
3974 module_exit(il3945_exit);
3975 module_init(il3945_init);