drivers/mmc/host/sdhci-of-esdhc.c

   1 /*
   2  * Freescale eSDHC controller driver.
   3  *
   4  * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc.
   5  * Copyright (c) 2009 MontaVista Software, Inc.
   6  *
   7  * Authors: Xiaobo Xie <X.Xie@freescale.com>
   8  *          Anton Vorontsov <avorontsov@ru.mvista.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  */
  15
  16 #include <linux/io.h>
  17 #include <linux/delay.h>
  18 #include <linux/module.h>
  19 #include <linux/mmc/host.h>
  20 #include "sdhci-pltfm.h"
  21 #include "sdhci-esdhc.h"
  22
  23 static u16 esdhc_readw(struct sdhci_host *host, int reg)
  24 {
  25         u16 ret;
  26         int base = reg & ~0x3;
  27         int shift = (reg & 0x2) * 8;
  28
  29         if (unlikely(reg == SDHCI_HOST_VERSION))
  30                 ret = in_be32(host->ioaddr + base) & 0xffff;
  31         else
  32                 ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff;
  33         return ret;
  34 }
  35
  36 static u8 esdhc_readb(struct sdhci_host *host, int reg)
  37 {
  38         int base = reg & ~0x3;
  39         int shift = (reg & 0x3) * 8;
  40         u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
  41         return ret;
  42 }
  43
  44 static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
  45 {
  46         if (reg == SDHCI_BLOCK_SIZE) {
  47                 /*
  48                  * Two last DMA bits are reserved, and first one is used for
  49                  * non-standard blksz of 4096 bytes that we don't support
  50                  * yet. So clear the DMA boundary bits.
  51                  */
  52                 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
  53         }
  54         sdhci_be32bs_writew(host, val, reg);
  55 }
  56
  57 static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
  58 {
  59         /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
  60         if (reg == SDHCI_HOST_CONTROL)
  61                 val &= ~ESDHC_HOST_CONTROL_RES;
  62         sdhci_be32bs_writeb(host, val, reg);
  63 }
  64
  65 static int esdhc_of_enable_dma(struct sdhci_host *host)
  66 {
  67         setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
  68         return 0;
  69 }
  70
  71 static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
  72 {
  73         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  74
  75         return pltfm_host->clock;
  76 }
  77
  78 static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
  79 {
  80         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  81
  82         return pltfm_host->clock / 256 / 16;
  83 }
  84
  85 static struct sdhci_ops sdhci_esdhc_ops = {
  86         .read_l = sdhci_be32bs_readl,
  87         .read_w = esdhc_readw,
  88         .read_b = esdhc_readb,
  89         .write_l = sdhci_be32bs_writel,
  90         .write_w = esdhc_writew,
  91         .write_b = esdhc_writeb,
  92         .set_clock = esdhc_set_clock,
  93         .enable_dma = esdhc_of_enable_dma,
  94         .get_max_clock = esdhc_of_get_max_clock,
  95         .get_min_clock = esdhc_of_get_min_clock,
  96 };
  97
  98 static struct sdhci_pltfm_data sdhci_esdhc_pdata = {
  99         /* card detection could be handled via GPIO */
 100         .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
 101                 | SDHCI_QUIRK_NO_CARD_NO_RESET,
 102         .ops = &sdhci_esdhc_ops,
 103 };
 104
 105 static int __devinit sdhci_esdhc_probe(struct platform_device *pdev)
 106 {
 107         return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata);
 108 }
 109
 110 static int __devexit sdhci_esdhc_remove(struct platform_device *pdev)
 111 {
 112         return sdhci_pltfm_unregister(pdev);
 113 }
 114
 115 static const struct of_device_id sdhci_esdhc_of_match[] = {
 116         { .compatible = "fsl,mpc8379-esdhc" },
 117         { .compatible = "fsl,mpc8536-esdhc" },
 118         { .compatible = "fsl,esdhc" },
 119         { }
 120 };
 121 MODULE_DEVICE_TABLE(of, sdhci_esdhc_of_match);
 122
 123 static struct platform_driver sdhci_esdhc_driver = {
 124         .driver = {
 125                 .name = "sdhci-esdhc",
 126                 .owner = THIS_MODULE,
 127                 .of_match_table = sdhci_esdhc_of_match,
 128         },
 129         .probe = sdhci_esdhc_probe,
 130         .remove = __devexit_p(sdhci_esdhc_remove),
 131 #ifdef CONFIG_PM
 132         .suspend = sdhci_pltfm_suspend,
 133         .resume = sdhci_pltfm_resume,
 134 #endif
 135 };
 136
 137 static int __init sdhci_esdhc_init(void)
 138 {
 139         return platform_driver_register(&sdhci_esdhc_driver);
 140 }
 141 module_init(sdhci_esdhc_init);
 142
 143 static void __exit sdhci_esdhc_exit(void)
 144 {
 145         platform_driver_unregister(&sdhci_esdhc_driver);
 146 }
 147 module_exit(sdhci_esdhc_exit);
 148
 149 MODULE_DESCRIPTION("SDHCI OF driver for Freescale MPC eSDHC");
 150 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
 151               "Anton Vorontsov <avorontsov@ru.mvista.com>");
 152 MODULE_LICENSE("GPL v2");