2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 /* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
31 /****************************************************/
32 /* Graphics Object Type Definition */
33 /****************************************************/
34 #define GRAPH_OBJECT_TYPE_NONE 0x0
35 #define GRAPH_OBJECT_TYPE_GPU 0x1
36 #define GRAPH_OBJECT_TYPE_ENCODER 0x2
37 #define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
38 #define GRAPH_OBJECT_TYPE_ROUTER 0x4
40 #define GRAPH_OBJECT_TYPE_DISPLAY_PATH 0x6
41 #define GRAPH_OBJECT_TYPE_GENERIC 0x7
43 /****************************************************/
44 /* Encoder Object ID Definition */
45 /****************************************************/
46 #define ENCODER_OBJECT_ID_NONE 0x00
48 /* Radeon Class Display Hardware */
49 #define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
50 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
51 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
52 #define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
53 #define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
54 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
55 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
57 /* External Third Party Encoders */
58 #define ENCODER_OBJECT_ID_SI170B 0x08
59 #define ENCODER_OBJECT_ID_CH7303 0x09
60 #define ENCODER_OBJECT_ID_CH7301 0x0A
61 #define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
62 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
63 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
64 #define ENCODER_OBJECT_ID_TITFP513 0x0E
65 #define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
66 #define ENCODER_OBJECT_ID_VT1623 0x10
67 #define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
68 #define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
69 #define ENCODER_OBJECT_ID_ALMOND 0x22
70 #define ENCODER_OBJECT_ID_TRAVIS 0x23
71 #define ENCODER_OBJECT_ID_NUTMEG 0x22
72 /* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
73 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
74 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
75 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
76 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
77 #define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
78 #define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
79 #define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
80 #define ENCODER_OBJECT_ID_VT1625 0x1A
81 #define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
82 #define ENCODER_OBJECT_ID_DP_AN9801 0x1C
83 #define ENCODER_OBJECT_ID_DP_DP501 0x1D
84 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
85 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
86 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20
87 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21
89 #define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF
91 /****************************************************/
92 /* Connector Object ID Definition */
93 /****************************************************/
94 #define CONNECTOR_OBJECT_ID_NONE 0x00
95 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
96 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
97 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
98 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
99 #define CONNECTOR_OBJECT_ID_VGA 0x05
100 #define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
101 #define CONNECTOR_OBJECT_ID_SVIDEO 0x07
102 #define CONNECTOR_OBJECT_ID_YPbPr 0x08
103 #define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
104 #define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
105 #define CONNECTOR_OBJECT_ID_SCART 0x0B
106 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
107 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
108 #define CONNECTOR_OBJECT_ID_LVDS 0x0E
109 #define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
110 #define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
111 #define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
112 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
113 #define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
114 #define CONNECTOR_OBJECT_ID_eDP 0x14
115 #define CONNECTOR_OBJECT_ID_MXM 0x15
116 #define CONNECTOR_OBJECT_ID_LVDS_eDP 0x16
120 /****************************************************/
121 /* Router Object ID Definition */
122 /****************************************************/
123 #define ROUTER_OBJECT_ID_NONE 0x00
124 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
126 /****************************************************/
127 /* Generic Object ID Definition */
128 /****************************************************/
129 #define GENERIC_OBJECT_ID_NONE 0x00
130 #define GENERIC_OBJECT_ID_GLSYNC 0x01
131 #define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE 0x02
132 #define GENERIC_OBJECT_ID_MXM_OPM 0x03
133 #define GENERIC_OBJECT_ID_STEREO_PIN 0x04 //This object could show up from Misc Object table, it follows ATOM_OBJECT format, and contains one ATOM_OBJECT_GPIO_CNTL_RECORD for the stereo pin
135 /****************************************************/
136 /* Graphics Object ENUM ID Definition */
137 /****************************************************/
138 #define GRAPH_OBJECT_ENUM_ID1 0x01
139 #define GRAPH_OBJECT_ENUM_ID2 0x02
140 #define GRAPH_OBJECT_ENUM_ID3 0x03
141 #define GRAPH_OBJECT_ENUM_ID4 0x04
142 #define GRAPH_OBJECT_ENUM_ID5 0x05
143 #define GRAPH_OBJECT_ENUM_ID6 0x06
144 #define GRAPH_OBJECT_ENUM_ID7 0x07
146 /****************************************************/
147 /* Graphics Object ID Bit definition */
148 /****************************************************/
149 #define OBJECT_ID_MASK 0x00FF
150 #define ENUM_ID_MASK 0x0700
151 #define RESERVED1_ID_MASK 0x0800
152 #define OBJECT_TYPE_MASK 0x7000
153 #define RESERVED2_ID_MASK 0x8000
155 #define OBJECT_ID_SHIFT 0x00
156 #define ENUM_ID_SHIFT 0x08
157 #define OBJECT_TYPE_SHIFT 0x0C
160 /****************************************************/
161 /* Graphics Object family definition */
162 /****************************************************/
163 #define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
164 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
165 /****************************************************/
166 /* GPU Object ID definition - Shared with BIOS */
167 /****************************************************/
168 #define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
169 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
171 /****************************************************/
172 /* Encoder Object ID definition - Shared with BIOS */
173 /****************************************************/
175 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
176 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
177 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
178 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
179 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
180 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
181 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
182 #define ENCODER_SIL170B_ENUM_ID1 0x2108
183 #define ENCODER_CH7303_ENUM_ID1 0x2109
184 #define ENCODER_CH7301_ENUM_ID1 0x210A
185 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
186 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
187 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
188 #define ENCODER_TITFP513_ENUM_ID1 0x210E
189 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
190 #define ENCODER_VT1623_ENUM_ID1 0x2110
191 #define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
192 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
193 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
194 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
195 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
196 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
197 #define ENCODER_SI178_ENUM_ID1 0x2117
198 #define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
199 #define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
200 #define ENCODER_VT1625_ENUM_ID1 0x211A
201 #define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
202 #define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
203 #define ENCODER_DP_DP501_ENUM_ID1 0x211D
204 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
206 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
207 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
208 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
210 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
211 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
212 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
214 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
215 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
216 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
218 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
219 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
220 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
222 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
223 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
224 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
226 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
227 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
228 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
230 #define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
231 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
232 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
234 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
235 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
236 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
238 #define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
239 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
240 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
242 #define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
243 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
244 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
246 #define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
247 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
248 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
250 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
251 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
252 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
254 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
255 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
256 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
258 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
259 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
260 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
263 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
264 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
265 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
268 #define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
269 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
270 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
272 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
273 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
274 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
276 #define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
277 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
278 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
280 #define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
281 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
282 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
284 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
285 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
286 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
288 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
289 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
290 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
293 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
294 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
295 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
298 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
299 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
300 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
302 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
303 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
304 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
306 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
307 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
308 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
310 #define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
311 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
312 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
314 #define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
315 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
316 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
318 #define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
319 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
320 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
322 #define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
323 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
324 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
326 #define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
327 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
328 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
330 #define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
331 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
332 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
334 #define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
335 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
336 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
338 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
339 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
340 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
342 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
343 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
344 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
346 #define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
347 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
348 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
350 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
351 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
352 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
354 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
355 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
356 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
358 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
359 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
360 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
362 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
363 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
364 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
366 #define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
367 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
368 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
370 #define ENCODER_ALMOND_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
371 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
372 ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
374 #define ENCODER_ALMOND_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
375 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
376 ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
378 #define ENCODER_TRAVIS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
379 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
380 ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
382 #define ENCODER_TRAVIS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
383 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
384 ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
386 #define ENCODER_NUTMEG_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
387 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
388 ENCODER_OBJECT_ID_NUTMEG << OBJECT_ID_SHIFT)
390 /****************************************************/
391 /* Connector Object ID definition - Shared with BIOS */
392 /****************************************************/
394 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
395 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
396 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
397 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
398 #define CONNECTOR_VGA_ENUM_ID1 0x3105
399 #define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
400 #define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
401 #define CONNECTOR_YPbPr_ENUM_ID1 0x3108
402 #define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
403 #define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
404 #define CONNECTOR_SCART_ENUM_ID1 0x310B
405 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
406 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
407 #define CONNECTOR_LVDS_ENUM_ID1 0x310E
408 #define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
409 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
411 #define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
412 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
413 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
415 #define CONNECTOR_LVDS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
416 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
417 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
419 #define CONNECTOR_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
420 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
421 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
423 #define CONNECTOR_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
424 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
425 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
427 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
428 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
429 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
431 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
432 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
433 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
435 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
436 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
437 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
439 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
440 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
441 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
443 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
444 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
445 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
447 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
448 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
449 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
451 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
452 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
453 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
455 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
456 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
457 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
459 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
460 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
461 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
463 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
464 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
465 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
467 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
468 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
469 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
471 #define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
472 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
473 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
475 #define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
476 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
477 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
479 #define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
480 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
481 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
483 #define CONNECTOR_COMPOSITE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
484 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
485 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
487 #define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
488 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
489 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
491 #define CONNECTOR_SVIDEO_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
492 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
493 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
495 #define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
496 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
497 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
499 #define CONNECTOR_YPbPr_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
500 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
501 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
503 #define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
504 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
505 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
507 #define CONNECTOR_D_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
508 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
509 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
511 #define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
512 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
513 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
515 #define CONNECTOR_9PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
516 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
517 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
519 #define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
520 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
521 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
523 #define CONNECTOR_SCART_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
524 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
525 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
527 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
528 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
529 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
531 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
532 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
533 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
535 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
536 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
537 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
539 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
540 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
541 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
543 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
544 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
545 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
547 #define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
548 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
549 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
551 #define CONNECTOR_7PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
552 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
553 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
555 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
556 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
557 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
559 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
560 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
561 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
563 #define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
564 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
565 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
567 #define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
568 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
569 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
572 #define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
573 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
574 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
576 #define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
577 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
578 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
580 #define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
581 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
582 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
584 #define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
585 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
586 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
588 #define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
589 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
590 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
592 #define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
593 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
594 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
596 #define CONNECTOR_DISPLAYPORT_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
597 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
598 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
600 #define CONNECTOR_DISPLAYPORT_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
601 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
602 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
604 #define CONNECTOR_MXM_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
605 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
606 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_A
608 #define CONNECTOR_MXM_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
609 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
610 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_B
612 #define CONNECTOR_MXM_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
613 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
614 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_C
616 #define CONNECTOR_MXM_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
617 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
618 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_D
620 #define CONNECTOR_MXM_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
621 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
622 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_TXxx
624 #define CONNECTOR_MXM_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
625 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
626 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_UXxx
628 #define CONNECTOR_MXM_ENUM_ID7 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
629 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
630 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DAC
632 #define CONNECTOR_LVDS_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
633 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
634 CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
636 #define CONNECTOR_LVDS_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
637 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
638 CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
640 /****************************************************/
641 /* Router Object ID definition - Shared with BIOS */
642 /****************************************************/
643 #define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
644 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
645 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
649 /****************************************************/
650 /* Generic Object ID definition - Shared with BIOS */
651 /****************************************************/
652 #define GENERICOBJECT_GLSYNC_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
653 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
654 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
656 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
657 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
658 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
660 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID2 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
661 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
662 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
664 #define GENERICOBJECT_MXM_OPM_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
665 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
666 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
668 #define GENERICOBJECT_STEREO_PIN_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
669 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
670 GENERIC_OBJECT_ID_STEREO_PIN << OBJECT_ID_SHIFT)
672 /****************************************************/
673 /* Object Cap definition - Shared with BIOS */
674 /****************************************************/
675 #define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
676 #define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
679 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
680 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
681 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
687 #endif /*GRAPHICTYPE */