2 * DDR SDRAM initialization - alter with care
3 * This file is intended to be included from other assembler files
5 * Note: This file may not modify r8 or r9 because they are used to
6 * carry information from the decompresser to the kernel
8 * Copyright (C) 2005-2007 Axis Communications AB
10 * Authors: Mikael Starvik <starvik@axis.com>
13 /* Just to be certain the config file is included, we include it here
14 * explicitely instead of depending on it being included in the file that
18 #include <hwregs/asm/reg_map_asm.h>
19 #include <hwregs/asm/ddr2_defs_asm.h>
21 ;; WARNING! The registers r8 and r9 are used as parameters carrying
22 ;; information from the decompressor (if the kernel was compressed).
23 ;; They should not be used in the code below.
25 ;; Refer to ddr2 MDS for initialization sequence
33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
34 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1
42 ; Reset phy and start calibration
43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
44 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
45 REG_STATE(ddr2, rw_phy_ctrl, cal_rst, yes), $r1
47 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1
56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
57 move.d sdram_commands_start, $r2
69 cmp.d sdram_commands_end, $r2
74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
75 move.d CONFIG_ETRAX_DDR2_TIMING, $r1
79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
80 move.d CONFIG_ETRAX_DDR2_LATENCY, $r1
84 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
85 move.d CONFIG_ETRAX_DDR2_CONFIG, $r1
88 ba after_sdram_commands
92 .byte regk_ddr2_deselect
95 .word regk_ddr2_pre_all
101 .word regk_ddr2_dll_en
103 .word regk_ddr2_dll_rst
105 .word regk_ddr2_pre_all
111 .word CONFIG_ETRAX_DDR2_MRS & 0xffff
113 .word regk_ddr2_ocd_default | regk_ddr2_dll_en
115 .word regk_ddr2_ocd_exit | regk_ddr2_dll_en | (CONFIG_ETRAX_DDR2_MRS >> 16)
118 after_sdram_commands: