USB: cp210x: call generic open last in open
[zen-stable.git] / drivers / video / omap2 / dss / dpi.c
blob395d658a94fcab1e7e54131e96485b379fee07a7
1 /*
2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
33 #include <video/omapdss.h>
34 #include <plat/cpu.h>
36 #include "dss.h"
38 static struct {
39 struct regulator *vdds_dsi_reg;
40 struct platform_device *dsidev;
41 } dpi;
43 static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
45 int dsi_module;
47 dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
49 return dsi_get_dsidev_from_id(dsi_module);
52 static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
54 if (dssdev->clocks.dispc.dispc_fclk_src ==
55 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
56 dssdev->clocks.dispc.dispc_fclk_src ==
57 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
58 dssdev->clocks.dispc.channel.lcd_clk_src ==
59 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
60 dssdev->clocks.dispc.channel.lcd_clk_src ==
61 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
62 return true;
63 else
64 return false;
67 static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
68 unsigned long pck_req, unsigned long *fck, int *lck_div,
69 int *pck_div)
71 struct dsi_clock_info dsi_cinfo;
72 struct dispc_clock_info dispc_cinfo;
73 int r;
75 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
76 &dsi_cinfo, &dispc_cinfo);
77 if (r)
78 return r;
80 r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
81 if (r)
82 return r;
84 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
86 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
87 if (r) {
88 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
89 return r;
92 *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
93 *lck_div = dispc_cinfo.lck_div;
94 *pck_div = dispc_cinfo.pck_div;
96 return 0;
99 static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
100 unsigned long pck_req, unsigned long *fck, int *lck_div,
101 int *pck_div)
103 struct dss_clock_info dss_cinfo;
104 struct dispc_clock_info dispc_cinfo;
105 int r;
107 r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
108 if (r)
109 return r;
111 r = dss_set_clock_div(&dss_cinfo);
112 if (r)
113 return r;
115 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
116 if (r)
117 return r;
119 *fck = dss_cinfo.fck;
120 *lck_div = dispc_cinfo.lck_div;
121 *pck_div = dispc_cinfo.pck_div;
123 return 0;
126 static int dpi_set_mode(struct omap_dss_device *dssdev)
128 struct omap_video_timings *t = &dssdev->panel.timings;
129 int lck_div = 0, pck_div = 0;
130 unsigned long fck = 0;
131 unsigned long pck;
132 bool is_tft;
133 int r = 0;
135 dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
136 dssdev->panel.acbi, dssdev->panel.acb);
138 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
140 if (dpi_use_dsi_pll(dssdev))
141 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
142 &fck, &lck_div, &pck_div);
143 else
144 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
145 &fck, &lck_div, &pck_div);
146 if (r)
147 return r;
149 pck = fck / lck_div / pck_div / 1000;
151 if (pck != t->pixel_clock) {
152 DSSWARN("Could not find exact pixel clock. "
153 "Requested %d kHz, got %lu kHz\n",
154 t->pixel_clock, pck);
156 t->pixel_clock = pck;
159 dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
161 return 0;
164 static void dpi_basic_init(struct omap_dss_device *dssdev)
166 bool is_tft;
168 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
170 dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
171 dispc_mgr_enable_stallmode(dssdev->manager->id, false);
173 dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
174 OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
175 dispc_mgr_set_tft_data_lines(dssdev->manager->id,
176 dssdev->phy.dpi.data_lines);
179 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
181 int r;
183 if (dssdev->manager == NULL) {
184 DSSERR("failed to enable display: no manager\n");
185 return -ENODEV;
188 r = omap_dss_start_device(dssdev);
189 if (r) {
190 DSSERR("failed to start device\n");
191 goto err_start_dev;
194 if (cpu_is_omap34xx()) {
195 r = regulator_enable(dpi.vdds_dsi_reg);
196 if (r)
197 goto err_reg_enable;
200 r = dss_runtime_get();
201 if (r)
202 goto err_get_dss;
204 r = dispc_runtime_get();
205 if (r)
206 goto err_get_dispc;
208 dpi_basic_init(dssdev);
210 if (dpi_use_dsi_pll(dssdev)) {
211 r = dsi_runtime_get(dpi.dsidev);
212 if (r)
213 goto err_get_dsi;
215 r = dsi_pll_init(dpi.dsidev, 0, 1);
216 if (r)
217 goto err_dsi_pll_init;
220 r = dpi_set_mode(dssdev);
221 if (r)
222 goto err_set_mode;
224 mdelay(2);
226 r = dss_mgr_enable(dssdev->manager);
227 if (r)
228 goto err_mgr_enable;
230 return 0;
232 err_mgr_enable:
233 err_set_mode:
234 if (dpi_use_dsi_pll(dssdev))
235 dsi_pll_uninit(dpi.dsidev, true);
236 err_dsi_pll_init:
237 if (dpi_use_dsi_pll(dssdev))
238 dsi_runtime_put(dpi.dsidev);
239 err_get_dsi:
240 dispc_runtime_put();
241 err_get_dispc:
242 dss_runtime_put();
243 err_get_dss:
244 if (cpu_is_omap34xx())
245 regulator_disable(dpi.vdds_dsi_reg);
246 err_reg_enable:
247 omap_dss_stop_device(dssdev);
248 err_start_dev:
249 return r;
251 EXPORT_SYMBOL(omapdss_dpi_display_enable);
253 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
255 dss_mgr_disable(dssdev->manager);
257 if (dpi_use_dsi_pll(dssdev)) {
258 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
259 dsi_pll_uninit(dpi.dsidev, true);
260 dsi_runtime_put(dpi.dsidev);
263 dispc_runtime_put();
264 dss_runtime_put();
266 if (cpu_is_omap34xx())
267 regulator_disable(dpi.vdds_dsi_reg);
269 omap_dss_stop_device(dssdev);
271 EXPORT_SYMBOL(omapdss_dpi_display_disable);
273 void dpi_set_timings(struct omap_dss_device *dssdev,
274 struct omap_video_timings *timings)
276 int r;
278 DSSDBG("dpi_set_timings\n");
279 dssdev->panel.timings = *timings;
280 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
281 r = dss_runtime_get();
282 if (r)
283 return;
285 r = dispc_runtime_get();
286 if (r) {
287 dss_runtime_put();
288 return;
291 dpi_set_mode(dssdev);
292 dispc_mgr_go(dssdev->manager->id);
294 dispc_runtime_put();
295 dss_runtime_put();
298 EXPORT_SYMBOL(dpi_set_timings);
300 int dpi_check_timings(struct omap_dss_device *dssdev,
301 struct omap_video_timings *timings)
303 bool is_tft;
304 int r;
305 int lck_div, pck_div;
306 unsigned long fck;
307 unsigned long pck;
308 struct dispc_clock_info dispc_cinfo;
310 if (!dispc_lcd_timings_ok(timings))
311 return -EINVAL;
313 if (timings->pixel_clock == 0)
314 return -EINVAL;
316 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
318 if (dpi_use_dsi_pll(dssdev)) {
319 struct dsi_clock_info dsi_cinfo;
320 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
321 timings->pixel_clock * 1000,
322 &dsi_cinfo, &dispc_cinfo);
324 if (r)
325 return r;
327 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
328 } else {
329 struct dss_clock_info dss_cinfo;
330 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
331 &dss_cinfo, &dispc_cinfo);
333 if (r)
334 return r;
336 fck = dss_cinfo.fck;
339 lck_div = dispc_cinfo.lck_div;
340 pck_div = dispc_cinfo.pck_div;
342 pck = fck / lck_div / pck_div / 1000;
344 timings->pixel_clock = pck;
346 return 0;
348 EXPORT_SYMBOL(dpi_check_timings);
350 int dpi_init_display(struct omap_dss_device *dssdev)
352 DSSDBG("init_display\n");
354 if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
355 struct regulator *vdds_dsi;
357 vdds_dsi = dss_get_vdds_dsi();
359 if (IS_ERR(vdds_dsi)) {
360 DSSERR("can't get VDDS_DSI regulator\n");
361 return PTR_ERR(vdds_dsi);
364 dpi.vdds_dsi_reg = vdds_dsi;
367 if (dpi_use_dsi_pll(dssdev)) {
368 enum omap_dss_clk_source dispc_fclk_src =
369 dssdev->clocks.dispc.dispc_fclk_src;
370 dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
373 return 0;
376 int dpi_init(void)
378 return 0;
381 void dpi_exit(void)