Blackfin: bf548-ezkit/bf561-ezkit: update nor flash layout
[zen-stable.git] / drivers / video / riva / rivafb-i2c.c
blob167400e2a18204f359edc38b6cfe2499e7992aa5
1 /*
2 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
4 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
6 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
8 * Based on radeonfb-i2c.c
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/pci.h>
19 #include <linux/fb.h>
20 #include <linux/jiffies.h>
22 #include <asm/io.h>
24 #include "rivafb.h"
25 #include "../edid.h"
27 static void riva_gpio_setscl(void* data, int state)
29 struct riva_i2c_chan *chan = data;
30 struct riva_par *par = chan->par;
31 u32 val;
33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
34 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
36 if (state)
37 val |= 0x20;
38 else
39 val &= ~0x20;
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
42 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
45 static void riva_gpio_setsda(void* data, int state)
47 struct riva_i2c_chan *chan = data;
48 struct riva_par *par = chan->par;
49 u32 val;
51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
52 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
54 if (state)
55 val |= 0x10;
56 else
57 val &= ~0x10;
59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
60 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
63 static int riva_gpio_getscl(void* data)
65 struct riva_i2c_chan *chan = data;
66 struct riva_par *par = chan->par;
67 u32 val = 0;
69 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
70 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
71 val = 1;
73 return val;
76 static int riva_gpio_getsda(void* data)
78 struct riva_i2c_chan *chan = data;
79 struct riva_par *par = chan->par;
80 u32 val = 0;
82 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
83 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
84 val = 1;
86 return val;
89 static int __devinit riva_setup_i2c_bus(struct riva_i2c_chan *chan,
90 const char *name,
91 unsigned int i2c_class)
93 int rc;
95 strcpy(chan->adapter.name, name);
96 chan->adapter.owner = THIS_MODULE;
97 chan->adapter.class = i2c_class;
98 chan->adapter.algo_data = &chan->algo;
99 chan->adapter.dev.parent = &chan->par->pdev->dev;
100 chan->algo.setsda = riva_gpio_setsda;
101 chan->algo.setscl = riva_gpio_setscl;
102 chan->algo.getsda = riva_gpio_getsda;
103 chan->algo.getscl = riva_gpio_getscl;
104 chan->algo.udelay = 40;
105 chan->algo.timeout = msecs_to_jiffies(2);
106 chan->algo.data = chan;
108 i2c_set_adapdata(&chan->adapter, chan);
110 /* Raise SCL and SDA */
111 riva_gpio_setsda(chan, 1);
112 riva_gpio_setscl(chan, 1);
113 udelay(20);
115 rc = i2c_bit_add_bus(&chan->adapter);
116 if (rc == 0)
117 dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
118 else {
119 dev_warn(&chan->par->pdev->dev,
120 "Failed to register I2C bus %s.\n", name);
121 chan->par = NULL;
124 return rc;
127 void __devinit riva_create_i2c_busses(struct riva_par *par)
129 par->chan[0].par = par;
130 par->chan[1].par = par;
131 par->chan[2].par = par;
133 par->chan[0].ddc_base = 0x36;
134 par->chan[1].ddc_base = 0x3e;
135 par->chan[2].ddc_base = 0x50;
136 riva_setup_i2c_bus(&par->chan[0], "BUS1", I2C_CLASS_HWMON);
137 riva_setup_i2c_bus(&par->chan[1], "BUS2", 0);
138 riva_setup_i2c_bus(&par->chan[2], "BUS3", 0);
141 void riva_delete_i2c_busses(struct riva_par *par)
143 int i;
145 for (i = 0; i < 3; i++) {
146 if (!par->chan[i].par)
147 continue;
148 i2c_del_adapter(&par->chan[i].adapter);
149 par->chan[i].par = NULL;
153 int __devinit riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid)
155 u8 *edid = NULL;
157 if (par->chan[conn].par)
158 edid = fb_ddc_read(&par->chan[conn].adapter);
160 if (out_edid)
161 *out_edid = edid;
162 if (!edid)
163 return 1;
165 return 0;