drivers/ata/pata_atiixp.c

   1 /*
   2  * pata_atiixp.c        - ATI PATA for new ATA layer
   3  *                        (C) 2005 Red Hat Inc
   4  *                        (C) 2009-2010 Bartlomiej Zolnierkiewicz
   5  *
   6  * Based on
   7  *
   8  *  linux/drivers/ide/pci/atiixp.c      Version 0.01-bart2      Feb. 26, 2004
   9  *
  10  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  11  *  Copyright (C) 2004 Bartlomiej Zolnierkiewicz
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/pci.h>
  18 #include <linux/init.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/delay.h>
  21 #include <scsi/scsi_host.h>
  22 #include <linux/libata.h>
  23
  24 #define DRV_NAME "pata_atiixp"
  25 #define DRV_VERSION "0.4.6"
  26
  27 enum {
  28         ATIIXP_IDE_PIO_TIMING   = 0x40,
  29         ATIIXP_IDE_MWDMA_TIMING = 0x44,
  30         ATIIXP_IDE_PIO_CONTROL  = 0x48,
  31         ATIIXP_IDE_PIO_MODE     = 0x4a,
  32         ATIIXP_IDE_UDMA_CONTROL = 0x54,
  33         ATIIXP_IDE_UDMA_MODE    = 0x56
  34 };
  35
  36 static int atiixp_cable_detect(struct ata_port *ap)
  37 {
  38         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  39         u8 udma;
  40
  41         /* Hack from drivers/ide/pci. Really we want to know how to do the
  42            raw detection not play follow the bios mode guess */
  43         pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
  44         if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
  45                 return  ATA_CBL_PATA80;
  46         return ATA_CBL_PATA40;
  47 }
  48
  49 static DEFINE_SPINLOCK(atiixp_lock);
  50
  51 /**
  52  *      atiixp_set_pio_timing   -       set initial PIO mode data
  53  *      @ap: ATA interface
  54  *      @adev: ATA device
  55  *
  56  *      Called by both the pio and dma setup functions to set the controller
  57  *      timings for PIO transfers. We must load both the mode number and
  58  *      timing values into the controller.
  59  */
  60
  61 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
  62 {
  63         static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
  64
  65         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  66         int dn = 2 * ap->port_no + adev->devno;
  67         int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  68         u32 pio_timing_data;
  69         u16 pio_mode_data;
  70
  71         pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  72         pio_mode_data &= ~(0x7 << (4 * dn));
  73         pio_mode_data |= pio << (4 * dn);
  74         pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  75
  76         pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  77         pio_timing_data &= ~(0xFF << timing_shift);
  78         pio_timing_data |= (pio_timings[pio] << timing_shift);
  79         pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  80 }
  81
  82 /**
  83  *      atiixp_set_piomode      -       set initial PIO mode data
  84  *      @ap: ATA interface
  85  *      @adev: ATA device
  86  *
  87  *      Called to do the PIO mode setup. We use a shared helper for this
  88  *      as the DMA setup must also adjust the PIO timing information.
  89  */
  90
  91 static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
  92 {
  93         unsigned long flags;
  94         spin_lock_irqsave(&atiixp_lock, flags);
  95         atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
  96         spin_unlock_irqrestore(&atiixp_lock, flags);
  97 }
  98
  99 /**
 100  *      atiixp_set_dmamode      -       set initial DMA mode data
 101  *      @ap: ATA interface
 102  *      @adev: ATA device
 103  *
 104  *      Called to do the DMA mode setup. We use timing tables for most
 105  *      modes but must tune an appropriate PIO mode to match.
 106  */
 107
 108 static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 109 {
 110         static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
 111
 112         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 113         int dma = adev->dma_mode;
 114         int dn = 2 * ap->port_no + adev->devno;
 115         int wanted_pio;
 116         unsigned long flags;
 117
 118         spin_lock_irqsave(&atiixp_lock, flags);
 119
 120         if (adev->dma_mode >= XFER_UDMA_0) {
 121                 u16 udma_mode_data;
 122
 123                 dma -= XFER_UDMA_0;
 124
 125                 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
 126                 udma_mode_data &= ~(0x7 << (4 * dn));
 127                 udma_mode_data |= dma << (4 * dn);
 128                 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
 129         } else {
 130                 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
 131                 u32 mwdma_timing_data;
 132
 133                 dma -= XFER_MW_DMA_0;
 134
 135                 pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
 136                                       &mwdma_timing_data);
 137                 mwdma_timing_data &= ~(0xFF << timing_shift);
 138                 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
 139                 pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
 140                                        mwdma_timing_data);
 141         }
 142         /*
 143          *      We must now look at the PIO mode situation. We may need to
 144          *      adjust the PIO mode to keep the timings acceptable
 145          */
 146          if (adev->dma_mode >= XFER_MW_DMA_2)
 147                 wanted_pio = 4;
 148         else if (adev->dma_mode == XFER_MW_DMA_1)
 149                 wanted_pio = 3;
 150         else if (adev->dma_mode == XFER_MW_DMA_0)
 151                 wanted_pio = 0;
 152         else BUG();
 153
 154         if (adev->pio_mode != wanted_pio)
 155                 atiixp_set_pio_timing(ap, adev, wanted_pio);
 156         spin_unlock_irqrestore(&atiixp_lock, flags);
 157 }
 158
 159 /**
 160  *      atiixp_bmdma_start      -       DMA start callback
 161  *      @qc: Command in progress
 162  *
 163  *      When DMA begins we need to ensure that the UDMA control
 164  *      register for the channel is correctly set.
 165  *
 166  *      Note: The host lock held by the libata layer protects
 167  *      us from two channels both trying to set DMA bits at once
 168  */
 169
 170 static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
 171 {
 172         struct ata_port *ap = qc->ap;
 173         struct ata_device *adev = qc->dev;
 174
 175         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 176         int dn = (2 * ap->port_no) + adev->devno;
 177         u16 tmp16;
 178
 179         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 180         if (ata_using_udma(adev))
 181                 tmp16 |= (1 << dn);
 182         else
 183                 tmp16 &= ~(1 << dn);
 184         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 185         ata_bmdma_start(qc);
 186 }
 187
 188 /**
 189  *      atiixp_dma_stop -       DMA stop callback
 190  *      @qc: Command in progress
 191  *
 192  *      DMA has completed. Clear the UDMA flag as the next operations will
 193  *      be PIO ones not UDMA data transfer.
 194  *
 195  *      Note: The host lock held by the libata layer protects
 196  *      us from two channels both trying to set DMA bits at once
 197  */
 198
 199 static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
 200 {
 201         struct ata_port *ap = qc->ap;
 202         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 203         int dn = (2 * ap->port_no) + qc->dev->devno;
 204         u16 tmp16;
 205
 206         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 207         tmp16 &= ~(1 << dn);
 208         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 209         ata_bmdma_stop(qc);
 210 }
 211
 212 static struct scsi_host_template atiixp_sht = {
 213         ATA_BMDMA_SHT(DRV_NAME),
 214         .sg_tablesize           = LIBATA_DUMB_MAX_PRD,
 215 };
 216
 217 static struct ata_port_operations atiixp_port_ops = {
 218         .inherits       = &ata_bmdma_port_ops,
 219
 220         .qc_prep        = ata_bmdma_dumb_qc_prep,
 221         .bmdma_start    = atiixp_bmdma_start,
 222         .bmdma_stop     = atiixp_bmdma_stop,
 223
 224         .cable_detect   = atiixp_cable_detect,
 225         .set_piomode    = atiixp_set_piomode,
 226         .set_dmamode    = atiixp_set_dmamode,
 227 };
 228
 229 static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 230 {
 231         static const struct ata_port_info info = {
 232                 .flags = ATA_FLAG_SLAVE_POSS,
 233                 .pio_mask = ATA_PIO4,
 234                 .mwdma_mask = ATA_MWDMA12_ONLY,
 235                 .udma_mask = ATA_UDMA5,
 236                 .port_ops = &atiixp_port_ops
 237         };
 238         static const struct pci_bits atiixp_enable_bits[] = {
 239                 { 0x48, 1, 0x01, 0x00 },
 240                 { 0x48, 1, 0x08, 0x00 }
 241         };
 242         const struct ata_port_info *ppi[] = { &info, &info };
 243         int i;
 244
 245         for (i = 0; i < 2; i++)
 246                 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i]))
 247                         ppi[i] = &ata_dummy_port_info;
 248
 249         return ata_pci_bmdma_init_one(pdev, ppi, &atiixp_sht, NULL,
 250                                       ATA_HOST_PARALLEL_SCAN);
 251 }
 252
 253 static const struct pci_device_id atiixp[] = {
 254         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
 255         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
 256         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
 257         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
 258         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), },
 259         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), },
 260
 261         { },
 262 };
 263
 264 static struct pci_driver atiixp_pci_driver = {
 265         .name           = DRV_NAME,
 266         .id_table       = atiixp,
 267         .probe          = atiixp_init_one,
 268         .remove         = ata_pci_remove_one,
 269 #ifdef CONFIG_PM
 270         .resume         = ata_pci_device_resume,
 271         .suspend        = ata_pci_device_suspend,
 272 #endif
 273 };
 274
 275 static int __init atiixp_init(void)
 276 {
 277         return pci_register_driver(&atiixp_pci_driver);
 278 }
 279
 280
 281 static void __exit atiixp_exit(void)
 282 {
 283         pci_unregister_driver(&atiixp_pci_driver);
 284 }
 285
 286 MODULE_AUTHOR("Alan Cox");
 287 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
 288 MODULE_LICENSE("GPL");
 289 MODULE_DEVICE_TABLE(pci, atiixp);
 290 MODULE_VERSION(DRV_VERSION);
 291
 292 module_init(atiixp_init);
 293 module_exit(atiixp_exit);