drivers/scsi/qla2xxx/qla_bsg.h

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2011 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #ifndef __QLA_BSG_H
   8 #define __QLA_BSG_H
   9
  10 /* BSG Vendor specific commands */
  11 #define QL_VND_LOOPBACK         0x01
  12 #define QL_VND_A84_RESET        0x02
  13 #define QL_VND_A84_UPDATE_FW    0x03
  14 #define QL_VND_A84_MGMT_CMD     0x04
  15 #define QL_VND_IIDMA            0x05
  16 #define QL_VND_FCP_PRIO_CFG_CMD 0x06
  17 #define QL_VND_READ_FLASH       0x07
  18 #define QL_VND_UPDATE_FLASH     0x08
  19
  20 /* BSG definations for interpreting CommandSent field */
  21 #define INT_DEF_LB_LOOPBACK_CMD         0
  22 #define INT_DEF_LB_ECHO_CMD             1
  23
  24 /* Loopback related definations */
  25 #define EXTERNAL_LOOPBACK               0xF2
  26 #define ENABLE_INTERNAL_LOOPBACK        0x02
  27 #define INTERNAL_LOOPBACK_MASK          0x000E
  28 #define MAX_ELS_FRAME_PAYLOAD           252
  29 #define ELS_OPCODE_BYTE                 0x10
  30
  31 /* BSG Vendor specific definations */
  32 #define A84_ISSUE_WRITE_TYPE_CMD        0
  33 #define A84_ISSUE_READ_TYPE_CMD         1
  34 #define A84_CLEANUP_CMD                 2
  35 #define A84_ISSUE_RESET_OP_FW           3
  36 #define A84_ISSUE_RESET_DIAG_FW         4
  37 #define A84_ISSUE_UPDATE_OPFW_CMD       5
  38 #define A84_ISSUE_UPDATE_DIAGFW_CMD     6
  39
  40 struct qla84_mgmt_param {
  41         union {
  42                 struct {
  43                         uint32_t start_addr;
  44                 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
  45                 struct {
  46                         uint32_t id;
  47 #define QLA84_MGMT_CONFIG_ID_UIF        1
  48 #define QLA84_MGMT_CONFIG_ID_FCOE_COS   2
  49 #define QLA84_MGMT_CONFIG_ID_PAUSE      3
  50 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS   4
  51
  52                 uint32_t param0;
  53                 uint32_t param1;
  54         } config; /* for QLA84_MGMT_CHNG_CONFIG */
  55
  56         struct {
  57                 uint32_t type;
  58 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA         1 /* Get Config Log Data */
  59 #define QLA84_MGMT_INFO_LOG_DATA                2 /* Get Log Data */
  60 #define QLA84_MGMT_INFO_PORT_STAT               3 /* Get Port Statistics */
  61 #define QLA84_MGMT_INFO_LIF_STAT                4 /* Get LIF Statistics  */
  62 #define QLA84_MGMT_INFO_ASIC_STAT               5 /* Get ASIC Statistics */
  63 #define QLA84_MGMT_INFO_CONFIG_PARAMS           6 /* Get Config Parameters */
  64 #define QLA84_MGMT_INFO_PANIC_LOG               7 /* Get Panic Log */
  65
  66                 uint32_t context;
  67 /*
  68 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
  69 */
  70 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG                    0
  71 #define IC_LOG_DATA_LOG_ID_LEARN_LOG                    1
  72 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG           2
  73 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG            3
  74 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG     4
  75 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG      5
  76 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG         6
  77 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG          7
  78 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG               8
  79 #define IC_LOG_DATA_LOG_ID_DCX_LOG                      9
  80
  81 /*
  82 * context definitions for QLA84_MGMT_INFO_PORT_STAT
  83 */
  84 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0   0
  85 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1   1
  86 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0        2
  87 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1        3
  88 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0         4
  89 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1         5
  90
  91
  92 /*
  93 * context definitions for QLA84_MGMT_INFO_LIF_STAT
  94 */
  95 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0     0
  96 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1     1
  97 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0           2
  98 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1           3
  99 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU                6
 100
 101                 } info; /* for QLA84_MGMT_GET_INFO */
 102         } u;
 103 };
 104
 105 struct qla84_msg_mgmt {
 106         uint16_t cmd;
 107 #define QLA84_MGMT_READ_MEM     0x00
 108 #define QLA84_MGMT_WRITE_MEM    0x01
 109 #define QLA84_MGMT_CHNG_CONFIG  0x02
 110 #define QLA84_MGMT_GET_INFO     0x03
 111         uint16_t rsrvd;
 112         struct qla84_mgmt_param mgmtp;/* parameters for cmd */
 113         uint32_t len; /* bytes in payload following this struct */
 114         uint8_t payload[0]; /* payload for cmd */
 115 };
 116
 117 struct qla_bsg_a84_mgmt {
 118         struct qla84_msg_mgmt mgmt;
 119 } __attribute__ ((packed));
 120
 121 struct qla_scsi_addr {
 122         uint16_t bus;
 123         uint16_t target;
 124 } __attribute__ ((packed));
 125
 126 struct qla_ext_dest_addr {
 127         union {
 128                 uint8_t wwnn[8];
 129                 uint8_t wwpn[8];
 130                 uint8_t id[4];
 131                 struct qla_scsi_addr scsi_addr;
 132         } dest_addr;
 133         uint16_t dest_type;
 134 #define EXT_DEF_TYPE_WWPN       2
 135         uint16_t lun;
 136         uint16_t padding[2];
 137 } __attribute__ ((packed));
 138
 139 struct qla_port_param {
 140         struct qla_ext_dest_addr fc_scsi_addr;
 141         uint16_t mode;
 142         uint16_t speed;
 143 } __attribute__ ((packed));
 144 #endif