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tty/serial: atmel_serial: whitespace and braces modifications
[zen-stable.git] / drivers / staging / rtl8187se / r8180.h
bloba2c46ae4a4007d0f37d7af5a931f6ae6ff028148
1 /*
2 This is part of rtl8180 OpenSource driver.
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public Licence)
5
6 Parts of this driver are based on the GPL part of the
7 official realtek driver
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
13
14 We want to tanks the Authors of those projects and the Ndiswrapper
15 project Authors.
16 */
17
18 #ifndef R8180H
19 #define R8180H
20
21 #include <linux/interrupt.h>
22
23 #define RTL8180_MODULE_NAME "r8180"
24 #define DMESG(x,a...) printk(KERN_INFO RTL8180_MODULE_NAME ": " x "\n", ## a)
25 #define DMESGW(x,a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": WW:" x "\n", ## a)
26 #define DMESGE(x,a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": EE:" x "\n", ## a)
27
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 //#include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/slab.h>
36 #include <linux/netdevice.h>
37 #include <linux/pci.h>
38 #include <linux/etherdevice.h>
39 #include <linux/delay.h>
40 #include <linux/rtnetlink.h> //for rtnl_lock()
41 #include <linux/wireless.h>
42 #include <linux/timer.h>
43 #include <linux/proc_fs.h> // Necessary because we use the proc fs
44 #include <linux/if_arp.h>
45 #include "ieee80211/ieee80211.h"
46 #include <asm/io.h>
47 //#include <asm/semaphore.h>
48
49 #define EPROM_93c46 0
50 #define EPROM_93c56 1
51
52 #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
53
54 #define DEFAULT_FRAG_THRESHOLD 2342U
55 #define MIN_FRAG_THRESHOLD 256U
56 #define DEFAULT_RTS_THRESHOLD 2342U
57 #define MIN_RTS_THRESHOLD 0U
58 #define MAX_RTS_THRESHOLD 2342U
59 #define DEFAULT_BEACONINTERVAL 0x64U
60
61 #define DEFAULT_RETRY_RTS 7
62 #define DEFAULT_RETRY_DATA 7
63
64 #define BEACON_QUEUE 6
65
66 #define aSifsTime 10
67
68 #define sCrcLng 4
69 #define sAckCtsLng 112 // bits in ACK and CTS frames
70 //+by amy 080312
71 #define RATE_ADAPTIVE_TIMER_PERIOD 300
72
73 typedef enum _WIRELESS_MODE {
74 WIRELESS_MODE_UNKNOWN = 0x00,
75 WIRELESS_MODE_A = 0x01,
76 WIRELESS_MODE_B = 0x02,
77 WIRELESS_MODE_G = 0x04,
78 WIRELESS_MODE_AUTO = 0x08,
79 } WIRELESS_MODE;
80
81 typedef struct ChnlAccessSetting {
82 u16 SIFS_Timer;
83 u16 DIFS_Timer;
84 u16 SlotTimeTimer;
85 u16 EIFS_Timer;
86 u16 CWminIndex;
87 u16 CWmaxIndex;
88 }*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
89
90 typedef enum{
91 NIC_8185 = 1,
92 NIC_8185B
93 } nic_t;
94
95 typedef u32 AC_CODING;
96 #define AC0_BE 0 // ACI: 0x00 // Best Effort
97 #define AC1_BK 1 // ACI: 0x01 // Background
98 #define AC2_VI 2 // ACI: 0x10 // Video
99 #define AC3_VO 3 // ACI: 0x11 // Voice
100 #define AC_MAX 4 // Max: define total number; Should not to be used as a real enum.
101
102 //
103 // ECWmin/ECWmax field.
104 // Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
105 //
106 typedef union _ECW{
107 u8 charData;
108 struct
109 {
110 u8 ECWmin:4;
111 u8 ECWmax:4;
112 }f; // Field
113 }ECW, *PECW;
114
115 //
116 // ACI/AIFSN Field.
117 // Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
118 //
119 typedef union _ACI_AIFSN{
120 u8 charData;
121
122 struct
123 {
124 u8 AIFSN:4;
125 u8 ACM:1;
126 u8 ACI:2;
127 u8 Reserved:1;
128 }f; // Field
129 }ACI_AIFSN, *PACI_AIFSN;
130
131 //
132 // AC Parameters Record Format.
133 // Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
134 //
135 typedef union _AC_PARAM{
136 u32 longData;
137 u8 charData[4];
138
139 struct
140 {
141 ACI_AIFSN AciAifsn;
142 ECW Ecw;
143 u16 TXOPLimit;
144 }f; // Field
145 }AC_PARAM, *PAC_PARAM;
146
147 /* it is a wrong definition. -xiong-2006-11-17
148 typedef struct ThreeWireReg {
149 u16 longData;
150 struct {
151 u8 enableB;
152 u8 data;
153 u8 clk;
154 u8 read_write;
155 } struc;
156 } ThreeWireReg;
157 */
158
159 typedef union _ThreeWire{
160 struct _ThreeWireStruc{
161 u16 data:1;
162 u16 clk:1;
163 u16 enableB:1;
164 u16 read_write:1;
165 u16 resv1:12;
166 // u2Byte resv2:14;
167 // u2Byte ThreeWireEnable:1;
168 // u2Byte resv3:1;
169 }struc;
170 u16 longData;
171 }ThreeWireReg;
172
173
174 typedef struct buffer
175 {
176 struct buffer *next;
177 u32 *buf;
178 dma_addr_t dma;
179 } buffer;
180
181 //YJ,modified,080828
182 typedef struct Stats
183 {
184 unsigned long txrdu;
185 unsigned long rxrdu;
186 unsigned long rxnolast;
187 unsigned long rxnodata;
188 // unsigned long rxreset;
189 // unsigned long rxwrkaround;
190 unsigned long rxnopointer;
191 unsigned long txnperr;
192 unsigned long txresumed;
193 unsigned long rxerr;
194 unsigned long rxoverflow;
195 unsigned long rxint;
196 unsigned long txbkpokint;
197 unsigned long txbepoking;
198 unsigned long txbkperr;
199 unsigned long txbeperr;
200 unsigned long txnpokint;
201 unsigned long txhpokint;
202 unsigned long txhperr;
203 unsigned long ints;
204 unsigned long shints;
205 unsigned long txoverflow;
206 unsigned long rxdmafail;
207 unsigned long txbeacon;
208 unsigned long txbeaconerr;
209 unsigned long txlpokint;
210 unsigned long txlperr;
211 unsigned long txretry;//retry number tony 20060601
212 unsigned long rxcrcerrmin;//crc error (0-500)
213 unsigned long rxcrcerrmid;//crc error (500-1000)
214 unsigned long rxcrcerrmax;//crc error (>1000)
215 unsigned long rxicverr;//ICV error
216 } Stats;
217
218 #define MAX_LD_SLOT_NUM 10
219 #define KEEP_ALIVE_INTERVAL 20 // in seconds.
220 #define CHECK_FOR_HANG_PERIOD 2 //be equal to watchdog check time
221 #define DEFAULT_KEEP_ALIVE_LEVEL 1
222 #define DEFAULT_SLOT_NUM 2
223 #define POWER_PROFILE_AC 0
224 #define POWER_PROFILE_BATTERY 1
225
226 typedef struct _link_detect_t
227 {
228 u32 RxFrameNum[MAX_LD_SLOT_NUM]; // number of Rx Frame / CheckForHang_period to determine link status
229 u16 SlotNum; // number of CheckForHang period to determine link status, default is 2
230 u16 SlotIndex;
231
232 u32 NumTxOkInPeriod; //number of packet transmitted during CheckForHang
233 u32 NumRxOkInPeriod; //number of packet received during CheckForHang
234
235 u8 IdleCount; // (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)
236 u32 LastNumTxUnicast;
237 u32 LastNumRxUnicast;
238
239 bool bBusyTraffic; //when it is set to 1, UI cann't scan at will.
240 }link_detect_t, *plink_detect_t;
241
242 //YJ,modified,080828,end
243
244 //by amy for led
245 //================================================================================
246 // LED customization.
247 //================================================================================
248
249 typedef enum _LED_STRATEGY_8185{
250 SW_LED_MODE0, //
251 SW_LED_MODE1, //
252 HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
253 }LED_STRATEGY_8185, *PLED_STRATEGY_8185;
254 //by amy for led
255 //by amy for power save
256 typedef enum _LED_CTL_MODE{
257 LED_CTL_POWER_ON = 1,
258 LED_CTL_LINK = 2,
259 LED_CTL_NO_LINK = 3,
260 LED_CTL_TX = 4,
261 LED_CTL_RX = 5,
262 LED_CTL_SITE_SURVEY = 6,
263 LED_CTL_POWER_OFF = 7
264 }LED_CTL_MODE;
265
266 typedef enum _RT_RF_POWER_STATE
267 {
268 eRfOn,
269 eRfSleep,
270 eRfOff
271 }RT_RF_POWER_STATE;
272
273 enum _ReasonCode{
274 unspec_reason = 0x1,
275 auth_not_valid = 0x2,
276 deauth_lv_ss = 0x3,
277 inactivity = 0x4,
278 ap_overload = 0x5,
279 class2_err = 0x6,
280 class3_err = 0x7,
281 disas_lv_ss = 0x8,
282 asoc_not_auth = 0x9,
283
284 //----MIC_CHECK
285 mic_failure = 0xe,
286 //----END MIC_CHECK
287
288 // Reason code defined in 802.11i D10.0 p.28.
289 invalid_IE = 0x0d,
290 four_way_tmout = 0x0f,
291 two_way_tmout = 0x10,
292 IE_dismatch = 0x11,
293 invalid_Gcipher = 0x12,
294 invalid_Pcipher = 0x13,
295 invalid_AKMP = 0x14,
296 unsup_RSNIEver = 0x15,
297 invalid_RSNIE = 0x16,
298 auth_802_1x_fail= 0x17,
299 ciper_reject = 0x18,
300
301 // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15.
302 QoS_unspec = 0x20, // 32
303 QAP_bandwidth = 0x21, // 33
304 poor_condition = 0x22, // 34
305 no_facility = 0x23, // 35
306 // Where is 36???
307 req_declined = 0x25, // 37
308 invalid_param = 0x26, // 38
309 req_not_honored= 0x27, // 39
310 TS_not_created = 0x2F, // 47
311 DL_not_allowed = 0x30, // 48
312 dest_not_exist = 0x31, // 49
313 dest_not_QSTA = 0x32, // 50
314 };
315 typedef enum _RT_PS_MODE
316 {
317 eActive, // Active/Continuous access.
318 eMaxPs, // Max power save mode.
319 eFastPs // Fast power save mode.
320 }RT_PS_MODE;
321 //by amy for power save
322 typedef struct r8180_priv
323 {
324 struct pci_dev *pdev;
325
326 short epromtype;
327 int irq;
328 struct ieee80211_device *ieee80211;
329
330 short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
331 short enable_gpio0;
332 short hw_plcp_len;
333 short plcp_preamble_mode; // 0:auto 1:short 2:long
334
335 spinlock_t irq_lock;
336 spinlock_t irq_th_lock;
337 spinlock_t tx_lock;
338 spinlock_t ps_lock;
339 spinlock_t rf_ps_lock;
340
341 u16 irq_mask;
342 short irq_enabled;
343 struct net_device *dev;
344 short chan;
345 short sens;
346 short max_sens;
347 u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
348 u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
349 //u8 challow[15]; //channels from 1 to 14, 0 not used
350 u8 channel_plan; // it's the channel plan index
351 short up;
352 short crcmon; //if 1 allow bad crc frame reception in monitor mode
353 short prism_hdr;
354
355 struct timer_list scan_timer;
356 /*short scanpending;
357 short stopscan;*/
358 spinlock_t scan_lock;
359 u8 active_probe;
360 //u8 active_scan_num;
361 struct semaphore wx_sem;
362 struct semaphore rf_state;
363 short hw_wep;
364
365 short digphy;
366 short antb;
367 short diversity;
368 u8 cs_treshold;
369 short rcr_csense;
370 u32 key0[4];
371 short (*rf_set_sens)(struct net_device *dev,short sens);
372 void (*rf_set_chan)(struct net_device *dev,short ch);
373 void (*rf_close)(struct net_device *dev);
374 void (*rf_init)(struct net_device *dev);
375 void (*rf_sleep)(struct net_device *dev);
376 void (*rf_wakeup)(struct net_device *dev);
377 //short rate;
378 short promisc;
379 /*stats*/
380 struct Stats stats;
381 struct _link_detect_t link_detect; //YJ,add,080828
382 struct iw_statistics wstats;
383 struct proc_dir_entry *dir_dev;
384
385 /*RX stuff*/
386 u32 *rxring;
387 u32 *rxringtail;
388 dma_addr_t rxringdma;
389 struct buffer *rxbuffer;
390 struct buffer *rxbufferhead;
391 int rxringcount;
392 u16 rxbuffersize;
393
394 struct sk_buff *rx_skb;
395
396 short rx_skb_complete;
397
398 u32 rx_prevlen;
399
400 /*TX stuff*/
401 /*
402 u32 *txlpring;
403 u32 *txhpring;
404 u32 *txnpring;
405 dma_addr_t txlpringdma;
406 dma_addr_t txhpringdma;
407 dma_addr_t txnpringdma;
408 u32 *txlpringtail;
409 u32 *txhpringtail;
410 u32 *txnpringtail;
411 u32 *txlpringhead;
412 u32 *txhpringhead;
413 u32 *txnpringhead;
414 struct buffer *txlpbufs;
415 struct buffer *txhpbufs;
416 struct buffer *txnpbufs;
417 struct buffer *txlpbufstail;
418 struct buffer *txhpbufstail;
419 struct buffer *txnpbufstail;
420 */
421 u32 *txmapring;
422 u32 *txbkpring;
423 u32 *txbepring;
424 u32 *txvipring;
425 u32 *txvopring;
426 u32 *txhpring;
427 dma_addr_t txmapringdma;
428 dma_addr_t txbkpringdma;
429 dma_addr_t txbepringdma;
430 dma_addr_t txvipringdma;
431 dma_addr_t txvopringdma;
432 dma_addr_t txhpringdma;
433 u32 *txmapringtail;
434 u32 *txbkpringtail;
435 u32 *txbepringtail;
436 u32 *txvipringtail;
437 u32 *txvopringtail;
438 u32 *txhpringtail;
439 u32 *txmapringhead;
440 u32 *txbkpringhead;
441 u32 *txbepringhead;
442 u32 *txvipringhead;
443 u32 *txvopringhead;
444 u32 *txhpringhead;
445 struct buffer *txmapbufs;
446 struct buffer *txbkpbufs;
447 struct buffer *txbepbufs;
448 struct buffer *txvipbufs;
449 struct buffer *txvopbufs;
450 struct buffer *txhpbufs;
451 struct buffer *txmapbufstail;
452 struct buffer *txbkpbufstail;
453 struct buffer *txbepbufstail;
454 struct buffer *txvipbufstail;
455 struct buffer *txvopbufstail;
456 struct buffer *txhpbufstail;
457
458 int txringcount;
459 int txbuffsize;
460 //struct tx_pendingbuf txnp_pending;
461 //struct tasklet_struct irq_tx_tasklet;
462 struct tasklet_struct irq_rx_tasklet;
463 u8 dma_poll_mask;
464 //short tx_suspend;
465
466 /* adhoc/master mode stuff */
467 u32 *txbeaconringtail;
468 dma_addr_t txbeaconringdma;
469 u32 *txbeaconring;
470 int txbeaconcount;
471 struct buffer *txbeaconbufs;
472 struct buffer *txbeaconbufstail;
473 //char *master_essid;
474 //u16 master_beaconinterval;
475 //u32 master_beaconsize;
476 //u16 beacon_interval;
477
478 u8 retry_data;
479 u8 retry_rts;
480 u16 rts;
481
482 //by amy for led
483 LED_STRATEGY_8185 LedStrategy;
484 //by amy for led
485
486 //by amy for power save
487 struct timer_list watch_dog_timer;
488 bool bInactivePs;
489 bool bSwRfProcessing;
490 RT_RF_POWER_STATE eInactivePowerState;
491 RT_RF_POWER_STATE eRFPowerState;
492 u32 RfOffReason;
493 bool RFChangeInProgress;
494 bool bInHctTest;
495 bool SetRFPowerStateInProgress;
496 u8 RFProgType;
497 bool bLeisurePs;
498 RT_PS_MODE dot11PowerSaveMode;
499 //u32 NumRxOkInPeriod; //YJ,del,080828
500 //u32 NumTxOkInPeriod; //YJ,del,080828
501 u8 TxPollingTimes;
502
503 bool bApBufOurFrame;// TRUE if AP buffer our unicast data , we will keep eAwake until receive data or timeout.
504 u8 WaitBufDataBcnCount;
505 u8 WaitBufDataTimeOut;
506
507 //by amy for power save
508 //by amy for antenna
509 u8 EEPROMSwAntennaDiversity;
510 bool EEPROMDefaultAntenna1;
511 u8 RegSwAntennaDiversityMechanism;
512 bool bSwAntennaDiverity;
513 u8 RegDefaultAntenna;
514 bool bDefaultAntenna1;
515 u8 SignalStrength;
516 long Stats_SignalStrength;
517 long LastSignalStrengthInPercent; // In percentange, used for smoothing, e.g. Moving Average.
518 u8 SignalQuality; // in 0-100 index.
519 long Stats_SignalQuality;
520 long RecvSignalPower; // in dBm.
521 long Stats_RecvSignalPower;
522 u8 LastRxPktAntenna; // +by amy 080312 Antenn which received the lasted packet. 0: Aux, 1:Main. Added by Roger, 2008.01.25.
523 u32 AdRxOkCnt;
524 long AdRxSignalStrength;
525 u8 CurrAntennaIndex; // Index to current Antenna (both Tx and Rx).
526 u8 AdTickCount; // Times of SwAntennaDiversityTimer happened.
527 u8 AdCheckPeriod; // # of period SwAntennaDiversityTimer to check Rx signal strength for SW Antenna Diversity.
528 u8 AdMinCheckPeriod; // Min value of AdCheckPeriod.
529 u8 AdMaxCheckPeriod; // Max value of AdCheckPeriod.
530 long AdRxSsThreshold; // Signal strength threshold to switch antenna.
531 long AdMaxRxSsThreshold; // Max value of AdRxSsThreshold.
532 bool bAdSwitchedChecking; // TRUE if we shall shall check Rx signal strength for last time switching antenna.
533 long AdRxSsBeforeSwitched; // Rx signal strength before we swithed antenna.
534 struct timer_list SwAntennaDiversityTimer;
535 //by amy for antenna
536 //{by amy 080312
537 //
538 // Crystal calibration.
539 // Added by Roger, 2007.12.11.
540 //
541 bool bXtalCalibration; // Crystal calibration.
542 u8 XtalCal_Xin; // Crystal calibration for Xin. 0~7.5pF
543 u8 XtalCal_Xout; // Crystal calibration for Xout. 0~7.5pF
544 //
545 // Tx power tracking with thermal meter indication.
546 // Added by Roger, 2007.12.11.
547 //
548 bool bTxPowerTrack; // Tx Power tracking.
549 u8 ThermalMeter; // Thermal meter reference indication.
550 //
551 // Dynamic Initial Gain Adjustment Mechanism. Added by Bruce, 2007-02-14.
552 //
553 bool bDigMechanism; // TRUE if DIG is enabled, FALSE ow.
554 bool bRegHighPowerMechanism; // For High Power Mechanism. 061010, by rcnjko.
555 u32 FalseAlarmRegValue;
556 u8 RegDigOfdmFaUpTh; // Upper threhold of OFDM false alarm, which is used in DIG.
557 u8 DIG_NumberFallbackVote;
558 u8 DIG_NumberUpgradeVote;
559 // For HW antenna diversity, added by Roger, 2008.01.30.
560 u32 AdMainAntennaRxOkCnt; // Main antenna Rx OK count.
561 u32 AdAuxAntennaRxOkCnt; // Aux antenna Rx OK count.
562 bool bHWAdSwitched; // TRUE if we has switched default antenna by HW evaluation.
563 // RF High Power upper/lower threshold.
564 u8 RegHiPwrUpperTh;
565 u8 RegHiPwrLowerTh;
566 // RF RSSI High Power upper/lower Threshold.
567 u8 RegRSSIHiPwrUpperTh;
568 u8 RegRSSIHiPwrLowerTh;
569 // Current CCK RSSI value to determine CCK high power, asked by SD3 DZ, by Bruce, 2007-04-12.
570 u8 CurCCKRSSI;
571 bool bCurCCKPkt;
572 //
573 // High Power Mechanism. Added by amy, 080312.
574 //
575 bool bToUpdateTxPwr;
576 long UndecoratedSmoothedSS;
577 long UndercorateSmoothedRxPower;
578 u8 RSSI;
579 char RxPower;
580 u8 InitialGain;
581 //For adjust Dig Threshold during Legacy/Leisure Power Save Mode
582 u32 DozePeriodInPast2Sec;
583 // Don't access BB/RF under disable PLL situation.
584 u8 InitialGainBackUp;
585 u8 RegBModeGainStage;
586 //by amy for rate adaptive
587 struct timer_list rateadapter_timer;
588 u32 RateAdaptivePeriod;
589 bool bEnhanceTxPwr;
590 bool bUpdateARFR;
591 int ForcedDataRate; // Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M.)
592 u32 NumTxUnicast; //YJ,add,080828,for keep alive
593 u8 keepAliveLevel; //YJ,add,080828,for KeepAlive
594 unsigned long NumTxOkTotal;
595 u16 LastRetryCnt;
596 u16 LastRetryRate;
597 unsigned long LastTxokCnt;
598 unsigned long LastRxokCnt;
599 u16 CurrRetryCnt;
600 unsigned long LastTxOKBytes;
601 unsigned long NumTxOkBytesTotal;
602 u8 LastFailTxRate;
603 long LastFailTxRateSS;
604 u8 FailTxRateCount;
605 u32 LastTxThroughput;
606 //for up rate
607 unsigned short bTryuping;
608 u8 CurrTxRate; //the rate before up
609 u16 CurrRetryRate;
610 u16 TryupingCount;
611 u8 TryDownCountLowData;
612 u8 TryupingCountNoData;
613
614 u8 CurrentOperaRate;
615 //by amy for rate adaptive
616 //by amy 080312}
617 // short wq_hurryup;
618 // struct workqueue_struct *workqueue;
619 struct work_struct reset_wq;
620 struct work_struct watch_dog_wq;
621 struct work_struct tx_irq_wq;
622 short ack_tx_to_ieee;
623
624 u8 PowerProfile;
625 u32 CSMethod;
626 u8 cck_txpwr_base;
627 u8 ofdm_txpwr_base;
628 u8 dma_poll_stop_mask;
629
630 //u8 RegThreeWireMode;
631 u8 MWIEnable;
632 u16 ShortRetryLimit;
633 u16 LongRetryLimit;
634 u16 EarlyRxThreshold;
635 u32 TransmitConfig;
636 u32 ReceiveConfig;
637 u32 IntrMask;
638
639 struct ChnlAccessSetting ChannelAccessSetting;
640 }r8180_priv;
641
642 #define MANAGE_PRIORITY 0
643 #define BK_PRIORITY 1
644 #define BE_PRIORITY 2
645 #define VI_PRIORITY 3
646 #define VO_PRIORITY 4
647 #define HI_PRIORITY 5
648 #define BEACON_PRIORITY 6
649
650 #define LOW_PRIORITY VI_PRIORITY
651 #define NORM_PRIORITY VO_PRIORITY
652 //AC2Queue mapping
653 #define AC2Q(_ac) (((_ac) == WME_AC_VO) ? VO_PRIORITY : \
654 ((_ac) == WME_AC_VI) ? VI_PRIORITY : \
655 ((_ac) == WME_AC_BK) ? BK_PRIORITY : \
656 BE_PRIORITY)
657
658 short rtl8180_tx(struct net_device *dev,u8* skbuf, int len,int priority,
659 short morefrag,short fragdesc,int rate);
660
661 u8 read_nic_byte(struct net_device *dev, int x);
662 u32 read_nic_dword(struct net_device *dev, int x);
663 u16 read_nic_word(struct net_device *dev, int x) ;
664 void write_nic_byte(struct net_device *dev, int x,u8 y);
665 void write_nic_word(struct net_device *dev, int x,u16 y);
666 void write_nic_dword(struct net_device *dev, int x,u32 y);
667 void force_pci_posting(struct net_device *dev);
668
669 void rtl8180_rtx_disable(struct net_device *);
670 void rtl8180_rx_enable(struct net_device *);
671 void rtl8180_tx_enable(struct net_device *);
672 void rtl8180_start_scanning(struct net_device *dev);
673 void rtl8180_start_scanning_s(struct net_device *dev);
674 void rtl8180_stop_scanning(struct net_device *dev);
675 void rtl8180_disassociate(struct net_device *dev);
676 //void fix_rx_fifo(struct net_device *dev);
677 void rtl8180_set_anaparam(struct net_device *dev,u32 a);
678 void rtl8185_set_anaparam2(struct net_device *dev,u32 a);
679 void rtl8180_set_hw_wep(struct net_device *dev);
680 void rtl8180_no_hw_wep(struct net_device *dev);
681 void rtl8180_update_msr(struct net_device *dev);
682 //void rtl8180_BSS_create(struct net_device *dev);
683 void rtl8180_beacon_tx_disable(struct net_device *dev);
684 void rtl8180_beacon_rx_disable(struct net_device *dev);
685 void rtl8180_conttx_enable(struct net_device *dev);
686 void rtl8180_conttx_disable(struct net_device *dev);
687 int rtl8180_down(struct net_device *dev);
688 int rtl8180_up(struct net_device *dev);
689 void rtl8180_commit(struct net_device *dev);
690 void rtl8180_set_chan(struct net_device *dev,short ch);
691 void rtl8180_set_master_essid(struct net_device *dev,char *essid);
692 void rtl8180_update_beacon_security(struct net_device *dev);
693 void write_phy(struct net_device *dev, u8 adr, u8 data);
694 void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
695 void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
696 void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
697 void rtl8185_rf_pins_enable(struct net_device *dev);
698 void IBSS_randomize_cell(struct net_device *dev);
699 void IPSEnter(struct net_device *dev);
700 void IPSLeave(struct net_device *dev);
701 int get_curr_tx_free_desc(struct net_device *dev, int priority);
702 void UpdateInitialGain(struct net_device *dev);
703 bool SetAntennaConfig87SE(struct net_device *dev, u8 DefaultAnt, bool bAntDiversity);
704
705 //#ifdef CONFIG_RTL8185B
706 void rtl8185b_adapter_start(struct net_device *dev);
707 void rtl8185b_rx_enable(struct net_device *dev);
708 void rtl8185b_tx_enable(struct net_device *dev);
709 void rtl8180_reset(struct net_device *dev);
710 void rtl8185b_irq_enable(struct net_device *dev);
711 void fix_rx_fifo(struct net_device *dev);
712 void fix_tx_fifo(struct net_device *dev);
713 void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch);
714 void rtl8180_rate_adapter(struct work_struct * work);
715 //#endif
716 bool MgntActSet_RF_State(struct net_device *dev, RT_RF_POWER_STATE StateToSet, u32 ChangeSource);
717
718 #endif