2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
35 * Indication for txflowcontrol that all priority bits in
36 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
43 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT 10
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT 1
57 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT 3
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT 20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT 1
70 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75 * control it independently
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N 0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
89 #define WLFEATURE_DISABLE_11N_GF 0x00000080
91 #define EDCF_ACI_MASK 0x60
92 #define EDCF_ACI_SHIFT 5
93 #define EDCF_ECWMIN_MASK 0x0f
94 #define EDCF_ECWMAX_SHIFT 4
95 #define EDCF_AIFSN_MASK 0x0f
96 #define EDCF_AIFSN_MAX 15
97 #define EDCF_ECWMAX_MASK 0xf0
99 #define EDCF_AC_BE_TXOP_STA 0x0000
100 #define EDCF_AC_BK_TXOP_STA 0x0000
101 #define EDCF_AC_VO_ACI_STA 0x62
102 #define EDCF_AC_VO_ECW_STA 0x32
103 #define EDCF_AC_VI_ACI_STA 0x42
104 #define EDCF_AC_VI_ECW_STA 0x43
105 #define EDCF_AC_BK_ECW_STA 0xA4
106 #define EDCF_AC_VI_TXOP_STA 0x005e
107 #define EDCF_AC_VO_TXOP_STA 0x002f
108 #define EDCF_AC_BE_ACI_STA 0x03
109 #define EDCF_AC_BE_ECW_STA 0xA4
110 #define EDCF_AC_BK_ACI_STA 0x27
111 #define EDCF_AC_VO_TXOP_AP 0x002f
113 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
114 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
116 #define APHY_SYMBOL_TIME 4
117 #define APHY_PREAMBLE_TIME 16
118 #define APHY_SIGNAL_TIME 4
119 #define APHY_SIFS_TIME 16
120 #define APHY_SERVICE_NBITS 16
121 #define APHY_TAIL_NBITS 6
122 #define BPHY_SIFS_TIME 10
123 #define BPHY_PLCP_SHORT_TIME 96
125 #define PREN_PREAMBLE 24
126 #define PREN_MM_EXT 12
127 #define PREN_PREAMBLE_EXT 4
129 #define DOT11_MAC_HDR_LEN 24
130 #define DOT11_ACK_LEN 10
131 #define DOT11_BA_LEN 4
132 #define DOT11_OFDM_SIGNAL_EXTENSION 6
133 #define DOT11_MIN_FRAG_LEN 256
134 #define DOT11_RTS_LEN 16
135 #define DOT11_CTS_LEN 10
136 #define DOT11_BA_BITMAP_LEN 128
137 #define DOT11_MIN_BEACON_PERIOD 1
138 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
139 #define DOT11_MAXNUMFRAGS 16
140 #define DOT11_MAX_FRAG_LEN 2346
142 #define BPHY_PLCP_TIME 192
143 #define RIFS_11N_TIME 2
146 #define WME_SUBTYPE_PARAM_IE 1
148 #define WME_OUI "\x00\x50\xf2"
155 #define BCN_TMPL_LEN 512 /* length of the BCN template area */
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200
168 #define BRCMS_HWRXOFF 38 /* chip rx buffer offset */
170 /* Find basic rate for a given rate */
171 static u8
brcms_basic_rate(struct brcms_c_info
*wlc
, u32 rspec
)
173 if (is_mcs_rate(rspec
))
174 return wlc
->band
->basic_rate
[mcs_table
[rspec
& RSPEC_RATE_MASK
]
176 return wlc
->band
->basic_rate
[rspec
& RSPEC_RATE_MASK
];
179 static u16
frametype(u32 rspec
, u8 mimoframe
)
181 if (is_mcs_rate(rspec
))
183 return is_cck_rate(rspec
) ? FT_CCK
: FT_OFDM
;
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT 10000000
189 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
191 /* precedences numbers for wlc queues. These are twice as may levels as
193 * Odd numbers are used for HI priority traffic at same precedence levels
194 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
197 #define _BRCMS_PREC_NONE 0 /* None = - */
198 #define _BRCMS_PREC_BK 2 /* BK - Background */
199 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
200 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI 10 /* Vi - Video */
203 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
204 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN 0x20
209 #define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */
214 #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */
216 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S 0
221 #define EDCF_LONG_S 8
222 #define EDCF_LFB_S 12
223 #define EDCF_SHORT_M BITFIELD_MASK(4)
224 #define EDCF_SFB_M BITFIELD_MASK(4)
225 #define EDCF_LONG_M BITFIELD_MASK(4)
226 #define EDCF_LFB_M BITFIELD_MASK(4)
228 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF 4 /* Default Long retry count */
231 #define RETRY_SHORT_FB 3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB 2 /* Long count for fallback rate */
234 #define APHY_CWMIN 15
235 #define PHY_CWMAX 1023
237 #define EDCF_AIFSN_MIN 1
239 #define FRAGNUM_MASK 0xF
241 #define APHY_SLOT_TIME 9
242 #define BPHY_SLOT_TIME 20
244 #define WL_SPURAVOID_OFF 0
245 #define WL_SPURAVOID_ON1 1
246 #define WL_SPURAVOID_ON2 2
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS 0xffffffff
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT 0
254 #define BRCMS_PLCP_LONG 1
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO -1
258 #define BRCMS_PROTECTION_OFF 0
259 #define BRCMS_PROTECTION_ON 1
260 #define BRCMS_PROTECTION_MMHDR_ONLY 2
261 #define BRCMS_PROTECTION_CTS_ONLY 3
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF 0
265 #define BRCMS_PROTECTION_CTL_LOCAL 1
266 #define BRCMS_PROTECTION_CTL_OVERLAP 2
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF 0
270 #define BRCMS_N_PROTECTION_OPTIONAL 1
271 #define BRCMS_N_PROTECTION_20IN40 2
272 #define BRCMS_N_PROTECTION_MIXEDMODE 3
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL 0
276 #define BRCMS_N_BW_40ALL 1
277 #define BRCMS_N_BW_20IN2G_40IN5G 2
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20 0x01
281 #define BRCMS_N_SGI_40 0x02
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK 0x0000ff00
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE 0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
297 #define NRATE_SGI_SHIFT 23 /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
301 #define NRATE_STF_SISO 0 /* stf mode SISO */
302 #define NRATE_STF_CDD 1 /* stf mode CDD */
303 #define NRATE_STF_STBC 2 /* stf mode STBC */
304 #define NRATE_STF_SDM 3 /* stf mode SDM */
306 #define MAX_DMA_SEGS 4
308 /* Max # of entries in Tx FIFO based on 4kb page size */
310 /* Max # of entries in Rx FIFO based on 4kb page size */
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST 32
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT 50
319 /* bounded rx loops */
320 #define RXBND 8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
324 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
326 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
329 * The following table lists the buffer memory allocated to xmt fifos in HW.
330 * the size is in units of 256bytes(one block), total size is HW dependent
331 * ucode has default fifo partition, sw can overwrite if necessary
333 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334 * the twiki is updated before making changes.
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV 20
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16
get_sifs(struct brcms_band
*band
)
349 return band
->bandtype
== BRCM_BAND_5G
? APHY_SIFS_TIME
:
355 * Detect Card removed.
356 * Even checking an sbconfig register read will not false trigger when the core
357 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359 * reg with fixed 0/1 pattern (some platforms return all 0).
360 * If clocks are present, call the sb routine which will figure out if the
363 static bool brcms_deviceremoved(struct brcms_c_info
*wlc
)
366 return ai_deviceremoved(wlc
->hw
->sih
);
367 return (R_REG(&wlc
->hw
->regs
->maccontrol
) &
368 (MCTL_PSM_JMP_0
| MCTL_IHR_EN
)) != MCTL_IHR_EN
;
371 /* sum the individual fifo tx pending packet counts */
372 static s16
brcms_txpktpendtot(struct brcms_c_info
*wlc
)
374 return wlc
->core
->txpktpend
[0] + wlc
->core
->txpktpend
[1] +
375 wlc
->core
->txpktpend
[2] + wlc
->core
->txpktpend
[3];
378 static bool brcms_is_mband_unlocked(struct brcms_c_info
*wlc
)
380 return wlc
->pub
->_nbands
> 1 && !wlc
->bandlocked
;
383 static int brcms_chspec_bw(u16 chanspec
)
385 if (CHSPEC_IS40(chanspec
))
387 if (CHSPEC_IS20(chanspec
))
393 /* dup state between BMAC(struct brcms_hardware) and HIGH(struct brcms_c_info)
395 struct brcms_b_state
{
396 u32 machwcap
; /* mac hw capibility */
397 u32 preamble_ovr
; /* preamble override */
400 struct edcf_acparam
{
406 const u8 prio2fifo
[NUMPRIO
] = {
407 TX_AC_BE_FIFO
, /* 0 BE AC_BE Best Effort */
408 TX_AC_BK_FIFO
, /* 1 BK AC_BK Background */
409 TX_AC_BK_FIFO
, /* 2 -- AC_BK Background */
410 TX_AC_BE_FIFO
, /* 3 EE AC_BE Best Effort */
411 TX_AC_VI_FIFO
, /* 4 CL AC_VI Video */
412 TX_AC_VI_FIFO
, /* 5 VI AC_VI Video */
413 TX_AC_VO_FIFO
, /* 6 VO AC_VO Voice */
414 TX_AC_VO_FIFO
/* 7 NC AC_VO Voice */
418 uint brcm_msg_level
=
425 /* TX FIFO number to WME/802.1E Access Category */
426 static const u8 wme_fifo2ac
[] = { AC_BK
, AC_BE
, AC_VI
, AC_VO
, AC_BE
, AC_BE
};
428 /* WME/802.1E Access Category to TX FIFO number */
429 static const u8 wme_ac2fifo
[] = { 1, 0, 2, 3 };
431 /* 802.1D Priority to precedence queue mapping */
432 const u8 wlc_prio2prec_map
[] = {
433 _BRCMS_PREC_BE
, /* 0 BE - Best-effort */
434 _BRCMS_PREC_BK
, /* 1 BK - Background */
435 _BRCMS_PREC_NONE
, /* 2 None = - */
436 _BRCMS_PREC_EE
, /* 3 EE - Excellent-effort */
437 _BRCMS_PREC_CL
, /* 4 CL - Controlled Load */
438 _BRCMS_PREC_VI
, /* 5 Vi - Video */
439 _BRCMS_PREC_VO
, /* 6 Vo - Voice */
440 _BRCMS_PREC_NC
, /* 7 NC - Network Control */
443 static const u16 xmtfifo_sz
[][NFIFO
] = {
444 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
445 {20, 192, 192, 21, 17, 5},
446 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
447 {9, 58, 22, 14, 14, 5},
448 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
449 {20, 192, 192, 21, 17, 5},
450 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
451 {20, 192, 192, 21, 17, 5},
452 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
453 {9, 58, 22, 14, 14, 5},
456 static const u8 acbitmap2maxprio
[] = {
457 PRIO_8021D_BE
, PRIO_8021D_BE
, PRIO_8021D_BK
, PRIO_8021D_BK
,
458 PRIO_8021D_VI
, PRIO_8021D_VI
, PRIO_8021D_VI
, PRIO_8021D_VI
,
459 PRIO_8021D_VO
, PRIO_8021D_VO
, PRIO_8021D_VO
, PRIO_8021D_VO
,
460 PRIO_8021D_VO
, PRIO_8021D_VO
, PRIO_8021D_VO
, PRIO_8021D_VO
464 static const char * const fifo_names
[] = {
465 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
467 static const char fifo_names
[6][0];
471 /* pointer to most recently allocated wl/wlc */
472 static struct brcms_c_info
*wlc_info_dbg
= (struct brcms_c_info
*) (NULL
);
475 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg
*cfg
)
480 kfree(cfg
->current_bss
);
484 static void brcms_c_detach_mfree(struct brcms_c_info
*wlc
)
489 brcms_c_bsscfg_mfree(wlc
->bsscfg
);
491 kfree(wlc
->modulecb
);
492 kfree(wlc
->default_bss
);
493 kfree(wlc
->protection
);
495 kfree(wlc
->bandstate
[0]);
496 kfree(wlc
->corestate
->macstat_snapshot
);
497 kfree(wlc
->corestate
);
498 kfree(wlc
->hw
->bandstate
[0]);
506 static struct brcms_bss_cfg
*brcms_c_bsscfg_malloc(uint unit
)
508 struct brcms_bss_cfg
*cfg
;
510 cfg
= kzalloc(sizeof(struct brcms_bss_cfg
), GFP_ATOMIC
);
514 cfg
->current_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
515 if (cfg
->current_bss
== NULL
)
521 brcms_c_bsscfg_mfree(cfg
);
525 static struct brcms_c_info
*
526 brcms_c_attach_malloc(uint unit
, uint
*err
, uint devid
)
528 struct brcms_c_info
*wlc
;
530 wlc
= kzalloc(sizeof(struct brcms_c_info
), GFP_ATOMIC
);
536 /* allocate struct brcms_c_pub state structure */
537 wlc
->pub
= kzalloc(sizeof(struct brcms_pub
), GFP_ATOMIC
);
538 if (wlc
->pub
== NULL
) {
544 /* allocate struct brcms_hardware state structure */
546 wlc
->hw
= kzalloc(sizeof(struct brcms_hardware
), GFP_ATOMIC
);
547 if (wlc
->hw
== NULL
) {
553 wlc
->hw
->bandstate
[0] =
554 kzalloc(sizeof(struct brcms_hw_band
) * MAXBANDS
, GFP_ATOMIC
);
555 if (wlc
->hw
->bandstate
[0] == NULL
) {
561 for (i
= 1; i
< MAXBANDS
; i
++)
562 wlc
->hw
->bandstate
[i
] = (struct brcms_hw_band
*)
563 ((unsigned long)wlc
->hw
->bandstate
[0] +
564 (sizeof(struct brcms_hw_band
) * i
));
568 kzalloc(sizeof(struct modulecb
) * BRCMS_MAXMODULES
, GFP_ATOMIC
);
569 if (wlc
->modulecb
== NULL
) {
574 wlc
->default_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
575 if (wlc
->default_bss
== NULL
) {
580 wlc
->bsscfg
= brcms_c_bsscfg_malloc(unit
);
581 if (wlc
->bsscfg
== NULL
) {
586 wlc
->protection
= kzalloc(sizeof(struct brcms_protection
),
588 if (wlc
->protection
== NULL
) {
593 wlc
->stf
= kzalloc(sizeof(struct brcms_stf
), GFP_ATOMIC
);
594 if (wlc
->stf
== NULL
) {
600 kzalloc(sizeof(struct brcms_band
)*MAXBANDS
, GFP_ATOMIC
);
601 if (wlc
->bandstate
[0] == NULL
) {
607 for (i
= 1; i
< MAXBANDS
; i
++)
608 wlc
->bandstate
[i
] = (struct brcms_band
*)
609 ((unsigned long)wlc
->bandstate
[0]
610 + (sizeof(struct brcms_band
)*i
));
613 wlc
->corestate
= kzalloc(sizeof(struct brcms_core
), GFP_ATOMIC
);
614 if (wlc
->corestate
== NULL
) {
619 wlc
->corestate
->macstat_snapshot
=
620 kzalloc(sizeof(struct macstat
), GFP_ATOMIC
);
621 if (wlc
->corestate
->macstat_snapshot
== NULL
) {
629 brcms_c_detach_mfree(wlc
);
634 * Update the slot timing for standard 11b/g (20us slots)
635 * or shortslot 11g (9us slots)
636 * The PSM needs to be suspended for this call.
638 static void brcms_b_update_slot_timing(struct brcms_hardware
*wlc_hw
,
641 struct d11regs __iomem
*regs
;
646 /* 11g short slot: 11a timing */
647 W_REG(®s
->ifs_slot
, 0x0207); /* APHY_SLOT_TIME */
648 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, APHY_SLOT_TIME
);
650 /* 11g long slot: 11b timing */
651 W_REG(®s
->ifs_slot
, 0x0212); /* BPHY_SLOT_TIME */
652 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, BPHY_SLOT_TIME
);
656 static void brcms_c_write_inits(struct brcms_hardware
*wlc_hw
,
657 const struct d11init
*inits
)
665 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
667 base
= (u8 __iomem
*)wlc_hw
->regs
;
669 for (i
= 0; inits
[i
].addr
!= cpu_to_le16(0xffff); i
++) {
670 size
= le16_to_cpu(inits
[i
].size
);
671 addr
= base
+ le16_to_cpu(inits
[i
].addr
);
672 value
= le32_to_cpu(inits
[i
].value
);
674 W_REG((u16 __iomem
*)addr
, value
);
676 W_REG((u32 __iomem
*)addr
, value
);
682 static void brcms_c_write_mhf(struct brcms_hardware
*wlc_hw
, u16
*mhfs
)
686 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
690 for (idx
= 0; idx
< MHFMAX
; idx
++)
691 brcms_b_write_shm(wlc_hw
, addr
[idx
], mhfs
[idx
]);
694 static void brcms_c_ucode_bsinit(struct brcms_hardware
*wlc_hw
)
696 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
697 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
699 /* init microcode host flags */
700 brcms_c_write_mhf(wlc_hw
, wlc_hw
->band
->mhfs
);
702 /* do band-specific ucode IHR, SHM, and SCR inits */
703 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
704 if (BRCMS_ISNPHY(wlc_hw
->band
))
705 brcms_c_write_inits(wlc_hw
, ucode
->d11n0bsinitvals16
);
707 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
708 " %d\n", __func__
, wlc_hw
->unit
,
711 if (D11REV_IS(wlc_hw
->corerev
, 24)) {
712 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
713 brcms_c_write_inits(wlc_hw
,
714 ucode
->d11lcn0bsinitvals24
);
716 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in"
717 " core rev %d\n", __func__
,
718 wlc_hw
->unit
, wlc_hw
->corerev
);
720 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
721 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
726 static void brcms_b_core_phy_clk(struct brcms_hardware
*wlc_hw
, bool clk
)
728 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: clk %d\n", wlc_hw
->unit
, clk
);
730 wlc_hw
->phyclk
= clk
;
732 if (OFF
== clk
) { /* clear gmode bit, put phy into reset */
734 ai_core_cflags(wlc_hw
->sih
, (SICF_PRST
| SICF_FGC
| SICF_GMODE
),
735 (SICF_PRST
| SICF_FGC
));
737 ai_core_cflags(wlc_hw
->sih
, (SICF_PRST
| SICF_FGC
), SICF_PRST
);
740 } else { /* take phy out of reset */
742 ai_core_cflags(wlc_hw
->sih
, (SICF_PRST
| SICF_FGC
), SICF_FGC
);
744 ai_core_cflags(wlc_hw
->sih
, (SICF_FGC
), 0);
750 /* switch to new band but leave it inactive */
751 static u32
brcms_c_setband_inact(struct brcms_c_info
*wlc
, uint bandunit
)
753 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
756 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
758 WARN_ON((R_REG(&wlc_hw
->regs
->maccontrol
) & MCTL_EN_MAC
) != 0);
760 /* disable interrupts */
761 macintmask
= brcms_intrsoff(wlc
->wl
);
764 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
766 brcms_b_core_phy_clk(wlc_hw
, OFF
);
768 brcms_c_setxband(wlc_hw
, bandunit
);
773 /* Process received frames */
775 * Return true if more frames need to be processed. false otherwise.
776 * Param 'bound' indicates max. # frames to process before break out.
779 brcms_b_recv(struct brcms_hardware
*wlc_hw
, uint fifo
, bool bound
)
782 struct sk_buff
*head
= NULL
;
783 struct sk_buff
*tail
= NULL
;
785 uint bound_limit
= bound
? RXBND
: -1;
787 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
788 /* gather received frames */
789 while ((p
= dma_rx(wlc_hw
->di
[fifo
]))) {
798 /* !give others some time to run! */
799 if (++n
>= bound_limit
)
803 /* post more rbufs */
804 dma_rxfill(wlc_hw
->di
[fifo
]);
806 /* process each frame */
807 while ((p
= head
) != NULL
) {
808 struct d11rxhdr_le
*rxh_le
;
809 struct d11rxhdr
*rxh
;
813 rxh_le
= (struct d11rxhdr_le
*)p
->data
;
814 rxh
= (struct d11rxhdr
*)p
->data
;
816 /* fixup rx header endianness */
817 rxh
->RxFrameSize
= le16_to_cpu(rxh_le
->RxFrameSize
);
818 rxh
->PhyRxStatus_0
= le16_to_cpu(rxh_le
->PhyRxStatus_0
);
819 rxh
->PhyRxStatus_1
= le16_to_cpu(rxh_le
->PhyRxStatus_1
);
820 rxh
->PhyRxStatus_2
= le16_to_cpu(rxh_le
->PhyRxStatus_2
);
821 rxh
->PhyRxStatus_3
= le16_to_cpu(rxh_le
->PhyRxStatus_3
);
822 rxh
->PhyRxStatus_4
= le16_to_cpu(rxh_le
->PhyRxStatus_4
);
823 rxh
->PhyRxStatus_5
= le16_to_cpu(rxh_le
->PhyRxStatus_5
);
824 rxh
->RxStatus1
= le16_to_cpu(rxh_le
->RxStatus1
);
825 rxh
->RxStatus2
= le16_to_cpu(rxh_le
->RxStatus2
);
826 rxh
->RxTSFTime
= le16_to_cpu(rxh_le
->RxTSFTime
);
827 rxh
->RxChan
= le16_to_cpu(rxh_le
->RxChan
);
829 brcms_c_recv(wlc_hw
->wlc
, p
);
832 return n
>= bound_limit
;
835 /* process an individual struct tx_status */
837 brcms_c_dotxstatus(struct brcms_c_info
*wlc
, struct tx_status
*txs
)
842 struct scb
*scb
= NULL
;
844 int tx_rts
, tx_frame_count
, tx_rts_count
;
845 uint totlen
, supr_status
;
847 struct ieee80211_hdr
*h
;
849 struct ieee80211_tx_info
*tx_info
;
850 struct ieee80211_tx_rate
*txrate
;
853 /* discard intermediate indications for ucode with one legitimate case:
854 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
855 * but the subsequent tx of DATA failed. so it will start rts/cts
856 * from the beginning (resetting the rts transmission count)
858 if (!(txs
->status
& TX_STATUS_AMPDU
)
859 && (txs
->status
& TX_STATUS_INTERMEDIATE
)) {
860 wiphy_err(wlc
->wiphy
, "%s: INTERMEDIATE but not AMPDU\n",
865 queue
= txs
->frameid
& TXFID_QUEUE_MASK
;
866 if (queue
>= NFIFO
) {
871 p
= dma_getnexttxp(wlc
->hw
->di
[queue
], DMA_RANGE_TRANSMITTED
);
875 txh
= (struct d11txh
*) (p
->data
);
876 mcl
= le16_to_cpu(txh
->MacTxControlLow
);
879 if (brcm_msg_level
& LOG_ERROR_VAL
) {
880 wiphy_err(wlc
->wiphy
, "phyerr 0x%x, rate 0x%x\n",
881 txs
->phyerr
, txh
->MainRates
);
882 brcms_c_print_txdesc(txh
);
884 brcms_c_print_txstatus(txs
);
887 if (txs
->frameid
!= le16_to_cpu(txh
->TxFrameID
))
889 tx_info
= IEEE80211_SKB_CB(p
);
890 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
892 if (tx_info
->control
.sta
)
895 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
896 brcms_c_ampdu_dotxstatus(wlc
->ampdu
, scb
, p
, txs
);
900 supr_status
= txs
->status
& TX_STATUS_SUPR_MASK
;
901 if (supr_status
== TX_STATUS_SUPR_BADCH
)
903 "%s: Pkt tx suppressed, possibly channel %d\n",
904 __func__
, CHSPEC_CHANNEL(wlc
->default_bss
->chanspec
));
906 tx_rts
= le16_to_cpu(txh
->MacTxControlLow
) & TXC_SENDRTS
;
908 (txs
->status
& TX_STATUS_FRM_RTX_MASK
) >> TX_STATUS_FRM_RTX_SHIFT
;
910 (txs
->status
& TX_STATUS_RTS_RTX_MASK
) >> TX_STATUS_RTS_RTX_SHIFT
;
912 lastframe
= !ieee80211_has_morefrags(h
->frame_control
);
915 wiphy_err(wlc
->wiphy
, "Not last frame!\n");
918 * Set information to be consumed by Minstrel ht.
920 * The "fallback limit" is the number of tx attempts a given
921 * MPDU is sent at the "primary" rate. Tx attempts beyond that
922 * limit are sent at the "secondary" rate.
923 * A 'short frame' does not exceed RTS treshold.
925 u16 sfbl
, /* Short Frame Rate Fallback Limit */
926 lfbl
, /* Long Frame Rate Fallback Limit */
929 if (queue
< AC_COUNT
) {
930 sfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
932 lfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
939 txrate
= tx_info
->status
.rates
;
940 if (txrate
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
)
945 ieee80211_tx_info_clear_status(tx_info
);
947 if ((tx_frame_count
> fbl
) && (txrate
[1].idx
>= 0)) {
949 * rate selection requested a fallback rate
952 txrate
[0].count
= fbl
;
953 txrate
[1].count
= tx_frame_count
- fbl
;
956 * rate selection did not request fallback rate, or
959 txrate
[0].count
= tx_frame_count
;
961 * rc80211_minstrel.c:minstrel_tx_status() expects
962 * unused rates to be marked with idx = -1
968 /* clear the rest of the rates */
969 for (i
= 2; i
< IEEE80211_TX_MAX_RATES
; i
++) {
974 if (txs
->status
& TX_STATUS_ACK_RCV
)
975 tx_info
->flags
|= IEEE80211_TX_STAT_ACK
;
978 totlen
= brcmu_pkttotlen(p
);
981 brcms_c_txfifo_complete(wlc
, queue
, 1);
986 /* remove PLCP & Broadcom tx descriptor header */
987 skb_pull(p
, D11_PHY_HDR_LEN
);
988 skb_pull(p
, D11_TXH_LEN
);
989 ieee80211_tx_status_irqsafe(wlc
->pub
->ieee_hw
, p
);
991 wiphy_err(wlc
->wiphy
, "%s: Not last frame => not calling "
992 "tx_status\n", __func__
);
999 brcmu_pkt_buf_free_skb(p
);
1006 brcms_b_dotxstatus(struct brcms_hardware
*wlc_hw
, struct tx_status
*txs
)
1008 /* discard intermediate indications for ucode with one legitimate case:
1009 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
1010 * but the subsequent tx of DATA failed. so it will start rts/cts from
1011 * the beginning (resetting the rts transmission count)
1013 if (!(txs
->status
& TX_STATUS_AMPDU
)
1014 && (txs
->status
& TX_STATUS_INTERMEDIATE
))
1017 return brcms_c_dotxstatus(wlc_hw
->wlc
, txs
);
1020 /* process tx completion events in BMAC
1021 * Return true if more tx status need to be processed. false otherwise.
1024 brcms_b_txstatus(struct brcms_hardware
*wlc_hw
, bool bound
, bool *fatal
)
1026 bool morepending
= false;
1027 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1028 struct d11regs __iomem
*regs
;
1029 struct tx_status txstatus
, *txs
;
1033 * Param 'max_tx_num' indicates max. # tx status to process before
1036 uint max_tx_num
= bound
? TXSBND
: -1;
1038 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1041 regs
= wlc_hw
->regs
;
1043 && (s1
= R_REG(®s
->frmtxstatus
)) & TXS_V
) {
1045 if (s1
== 0xffffffff) {
1046 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n",
1047 wlc_hw
->unit
, __func__
);
1051 s2
= R_REG(®s
->frmtxstatus2
);
1053 txs
->status
= s1
& TXS_STATUS_MASK
;
1054 txs
->frameid
= (s1
& TXS_FID_MASK
) >> TXS_FID_SHIFT
;
1055 txs
->sequence
= s2
& TXS_SEQ_MASK
;
1056 txs
->phyerr
= (s2
& TXS_PTX_MASK
) >> TXS_PTX_SHIFT
;
1057 txs
->lasttxtime
= 0;
1059 *fatal
= brcms_b_dotxstatus(wlc_hw
, txs
);
1061 /* !give others some time to run! */
1062 if (++n
>= max_tx_num
)
1069 if (n
>= max_tx_num
)
1072 if (!pktq_empty(&wlc
->pkt_queue
->q
))
1073 brcms_c_send_q(wlc
);
1078 /* brcms_b_tx_fifo_suspended:
1079 * Check the MAC's tx suspend status for a tx fifo.
1081 * When the MAC acknowledges a tx suspend, it indicates that no more
1082 * packets will be transmitted out the radio. This is independent of
1083 * DMA channel suspension---the DMA may have finished suspending, or may still
1084 * be pulling data into a tx fifo, by the time the MAC acks the suspend
1087 static bool brcms_b_tx_fifo_suspended(struct brcms_hardware
*wlc_hw
,
1090 /* check that a suspend has been requested and is no longer pending */
1093 * for DMA mode, the suspend request is set in xmtcontrol of the DMA
1094 * engine, and the tx fifo suspend at the lower end of the MAC is
1095 * acknowledged in the chnstatus register.
1097 * The tx fifo suspend completion is independent of the DMA suspend
1098 * completion and may be acked before or after the DMA is suspended.
1100 if (dma_txsuspended(wlc_hw
->di
[tx_fifo
]) &&
1101 (R_REG(&wlc_hw
->regs
->chnstatus
) &
1102 (1 << tx_fifo
)) == 0)
1108 /* second-level interrupt processing
1109 * Return true if another dpc needs to be re-scheduled. false otherwise.
1110 * Param 'bounded' indicates if applicable loops should be bounded.
1112 bool brcms_c_dpc(struct brcms_c_info
*wlc
, bool bounded
)
1115 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1116 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
1118 struct wiphy
*wiphy
= wlc
->wiphy
;
1120 if (brcms_deviceremoved(wlc
)) {
1121 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
1123 brcms_down(wlc
->wl
);
1127 /* grab and clear the saved software intstatus bits */
1128 macintstatus
= wlc
->macintstatus
;
1129 wlc
->macintstatus
= 0;
1131 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus 0x%x\n",
1132 wlc_hw
->unit
, macintstatus
);
1134 WARN_ON(macintstatus
& MI_PRQ
); /* PRQ Interrupt in non-MBSS */
1137 if (macintstatus
& MI_TFS
) {
1138 if (brcms_b_txstatus(wlc
->hw
, bounded
, &fatal
))
1139 wlc
->macintstatus
|= MI_TFS
;
1141 wiphy_err(wiphy
, "MI_TFS: fatal\n");
1146 if (macintstatus
& (MI_TBTT
| MI_DTIM_TBTT
))
1149 /* ATIM window end */
1150 if (macintstatus
& MI_ATIMWINEND
) {
1151 BCMMSG(wlc
->wiphy
, "end of ATIM window\n");
1152 OR_REG(®s
->maccommand
, wlc
->qvalid
);
1157 * received data or control frame, MI_DMAINT is
1158 * indication of RX_FIFO interrupt
1160 if (macintstatus
& MI_DMAINT
)
1161 if (brcms_b_recv(wlc_hw
, RX_FIFO
, bounded
))
1162 wlc
->macintstatus
|= MI_DMAINT
;
1164 /* TX FIFO suspend/flush completion */
1165 if (macintstatus
& MI_TXSTOP
)
1166 brcms_b_tx_fifo_suspended(wlc_hw
, TX_DATA_FIFO
);
1168 /* noise sample collected */
1169 if (macintstatus
& MI_BG_NOISE
)
1170 wlc_phy_noise_sample_intr(wlc_hw
->band
->pi
);
1172 if (macintstatus
& MI_GP0
) {
1173 wiphy_err(wiphy
, "wl%d: PSM microcode watchdog fired at %d "
1174 "(seconds). Resetting.\n", wlc_hw
->unit
, wlc_hw
->now
);
1176 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1177 __func__
, wlc_hw
->sih
->chip
,
1178 wlc_hw
->sih
->chiprev
);
1180 brcms_init(wlc
->wl
);
1183 /* gptimer timeout */
1184 if (macintstatus
& MI_TO
)
1185 W_REG(®s
->gptimer
, 0);
1187 if (macintstatus
& MI_RFDISABLE
) {
1188 BCMMSG(wlc
->wiphy
, "wl%d: BMAC Detected a change on the"
1189 " RF Disable Input\n", wlc_hw
->unit
);
1190 brcms_rfkill_set_hw_state(wlc
->wl
);
1193 /* send any enq'd tx packets. Just makes sure to jump start tx */
1194 if (!pktq_empty(&wlc
->pkt_queue
->q
))
1195 brcms_c_send_q(wlc
);
1197 /* it isn't done and needs to be resched if macintstatus is non-zero */
1198 return wlc
->macintstatus
!= 0;
1201 brcms_init(wlc
->wl
);
1202 return wlc
->macintstatus
!= 0;
1205 static int brcms_b_state_get(struct brcms_hardware
*wlc_hw
,
1206 struct brcms_b_state
*state
)
1208 state
->machwcap
= wlc_hw
->machwcap
;
1213 /* set initial host flags value */
1215 brcms_c_mhfdef(struct brcms_c_info
*wlc
, u16
*mhfs
, u16 mhf2_init
)
1217 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1219 memset(mhfs
, 0, MHFMAX
* sizeof(u16
));
1221 mhfs
[MHF2
] |= mhf2_init
;
1223 /* prohibit use of slowclock on multifunction boards */
1224 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
1225 mhfs
[MHF1
] |= MHF1_FORCEFASTCLK
;
1227 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_LT(wlc_hw
->band
->phyrev
, 2)) {
1228 mhfs
[MHF2
] |= MHF2_NPHY40MHZ_WAR
;
1229 mhfs
[MHF1
] |= MHF1_IQSWAP_WAR
;
1233 static struct dma64regs __iomem
*
1234 dmareg(struct brcms_hardware
*hw
, uint direction
, uint fifonum
)
1236 if (direction
== DMA_TX
)
1237 return &(hw
->regs
->fifo64regs
[fifonum
].dmaxmt
);
1238 return &(hw
->regs
->fifo64regs
[fifonum
].dmarcv
);
1241 static bool brcms_b_attach_dmapio(struct brcms_c_info
*wlc
, uint j
, bool wme
)
1246 * ucode host flag 2 needed for pio mode, independent of band and fifo
1249 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1250 uint unit
= wlc_hw
->unit
;
1251 struct wiphy
*wiphy
= wlc
->wiphy
;
1253 /* name and offsets for dma_attach */
1254 snprintf(name
, sizeof(name
), "wl%d", unit
);
1256 if (wlc_hw
->di
[0] == NULL
) { /* Init FIFOs */
1257 int dma_attach_err
= 0;
1261 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1262 * RX: RX_FIFO (RX data packets)
1264 wlc_hw
->di
[0] = dma_attach(name
, wlc_hw
->sih
,
1265 (wme
? dmareg(wlc_hw
, DMA_TX
, 0) :
1266 NULL
), dmareg(wlc_hw
, DMA_RX
, 0),
1267 (wme
? NTXD
: 0), NRXD
,
1268 RXBUFSZ
, -1, NRXBUFPOST
,
1269 BRCMS_HWRXOFF
, &brcm_msg_level
);
1270 dma_attach_err
|= (NULL
== wlc_hw
->di
[0]);
1274 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1275 * (legacy) TX_DATA_FIFO (TX data packets)
1278 wlc_hw
->di
[1] = dma_attach(name
, wlc_hw
->sih
,
1279 dmareg(wlc_hw
, DMA_TX
, 1), NULL
,
1280 NTXD
, 0, 0, -1, 0, 0,
1282 dma_attach_err
|= (NULL
== wlc_hw
->di
[1]);
1286 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1289 wlc_hw
->di
[2] = dma_attach(name
, wlc_hw
->sih
,
1290 dmareg(wlc_hw
, DMA_TX
, 2), NULL
,
1291 NTXD
, 0, 0, -1, 0, 0,
1293 dma_attach_err
|= (NULL
== wlc_hw
->di
[2]);
1296 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1297 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1299 wlc_hw
->di
[3] = dma_attach(name
, wlc_hw
->sih
,
1300 dmareg(wlc_hw
, DMA_TX
, 3),
1301 NULL
, NTXD
, 0, 0, -1,
1302 0, 0, &brcm_msg_level
);
1303 dma_attach_err
|= (NULL
== wlc_hw
->di
[3]);
1304 /* Cleaner to leave this as if with AP defined */
1306 if (dma_attach_err
) {
1307 wiphy_err(wiphy
, "wl%d: wlc_attach: dma_attach failed"
1312 /* get pointer to dma engine tx flow control variable */
1313 for (i
= 0; i
< NFIFO
; i
++)
1315 wlc_hw
->txavail
[i
] =
1316 (uint
*) dma_getvar(wlc_hw
->di
[i
],
1320 /* initial ucode host flags */
1321 brcms_c_mhfdef(wlc
, wlc_hw
->band
->mhfs
, pio_mhf2
);
1326 static void brcms_b_detach_dmapio(struct brcms_hardware
*wlc_hw
)
1330 for (j
= 0; j
< NFIFO
; j
++) {
1331 if (wlc_hw
->di
[j
]) {
1332 dma_detach(wlc_hw
->di
[j
]);
1333 wlc_hw
->di
[j
] = NULL
;
1339 * Initialize brcms_c_info default values ...
1340 * may get overrides later in this function
1341 * BMAC_NOTES, move low out and resolve the dangling ones
1343 static void brcms_b_info_init(struct brcms_hardware
*wlc_hw
)
1345 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1347 /* set default sw macintmask value */
1348 wlc
->defmacintmask
= DEF_MACINTMASK
;
1350 /* various 802.11g modes */
1351 wlc_hw
->shortslot
= false;
1353 wlc_hw
->SFBL
= RETRY_SHORT_FB
;
1354 wlc_hw
->LFBL
= RETRY_LONG_FB
;
1356 /* default mac retry limits */
1357 wlc_hw
->SRL
= RETRY_SHORT_DEF
;
1358 wlc_hw
->LRL
= RETRY_LONG_DEF
;
1359 wlc_hw
->chanspec
= ch20mhz_chspec(1);
1362 static void brcms_b_wait_for_wake(struct brcms_hardware
*wlc_hw
)
1364 /* delay before first read of ucode state */
1367 /* wait until ucode is no longer asleep */
1368 SPINWAIT((brcms_b_read_shm(wlc_hw
, M_UCODE_DBGST
) ==
1369 DBGST_ASLEEP
), wlc_hw
->wlc
->fastpwrup_dly
);
1372 /* control chip clock to save power, enable dynamic clock or force fast clock */
1373 static void brcms_b_clkctl_clk(struct brcms_hardware
*wlc_hw
, uint mode
)
1375 if (wlc_hw
->sih
->cccaps
& CC_CAP_PMU
) {
1376 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1377 * on backplane, but mac core will still run on ALP(not HT) when
1378 * it enters powersave mode, which means the FCA bit may not be
1379 * set. Should wakeup mac if driver wants it to run on HT.
1383 if (mode
== CLK_FAST
) {
1384 OR_REG(&wlc_hw
->regs
->clk_ctl_st
,
1391 clk_ctl_st
) & CCS_HTAVAIL
) == 0),
1392 PMU_MAX_TRANSITION_DLY
);
1395 clk_ctl_st
) & CCS_HTAVAIL
));
1397 if ((wlc_hw
->sih
->pmurev
== 0) &&
1400 clk_ctl_st
) & (CCS_FORCEHT
| CCS_HTAREQ
)))
1403 clk_ctl_st
) & CCS_HTAVAIL
)
1405 PMU_MAX_TRANSITION_DLY
);
1406 AND_REG(&wlc_hw
->regs
->clk_ctl_st
,
1410 wlc_hw
->forcefastclk
= (mode
== CLK_FAST
);
1413 /* old chips w/o PMU, force HT through cc,
1414 * then use FCA to verify mac is running fast clock
1417 wlc_hw
->forcefastclk
= ai_clkctl_cc(wlc_hw
->sih
, mode
);
1419 /* check fast clock is available (if core is not in reset) */
1420 if (wlc_hw
->forcefastclk
&& wlc_hw
->clk
)
1421 WARN_ON(!(ai_core_sflags(wlc_hw
->sih
, 0, 0) &
1425 * keep the ucode wake bit on if forcefastclk is on since we
1426 * do not want ucode to put us back to slow clock when it dozes
1427 * for PM mode. Code below matches the wake override bit with
1428 * current forcefastclk state. Only setting bit in wake_override
1429 * instead of waking ucode immediately since old code had this
1430 * behavior. Older code set wlc->forcefastclk but only had the
1431 * wake happen if the wakup_ucode work (protected by an up
1432 * check) was executed just below.
1434 if (wlc_hw
->forcefastclk
)
1435 mboolset(wlc_hw
->wake_override
,
1436 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1438 mboolclr(wlc_hw
->wake_override
,
1439 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1443 /* set or clear ucode host flag bits
1444 * it has an optimization for no-change write
1445 * it only writes through shared memory when the core has clock;
1446 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1449 * bands values are: BRCM_BAND_AUTO <--- Current band only
1450 * BRCM_BAND_5G <--- 5G band only
1451 * BRCM_BAND_2G <--- 2G band only
1452 * BRCM_BAND_ALL <--- All bands
1455 brcms_b_mhf(struct brcms_hardware
*wlc_hw
, u8 idx
, u16 mask
, u16 val
,
1459 u16 addr
[MHFMAX
] = {
1460 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
1463 struct brcms_hw_band
*band
;
1465 if ((val
& ~mask
) || idx
>= MHFMAX
)
1466 return; /* error condition */
1469 /* Current band only or all bands,
1470 * then set the band to current band
1472 case BRCM_BAND_AUTO
:
1474 band
= wlc_hw
->band
;
1477 band
= wlc_hw
->bandstate
[BAND_5G_INDEX
];
1480 band
= wlc_hw
->bandstate
[BAND_2G_INDEX
];
1483 band
= NULL
; /* error condition */
1487 save
= band
->mhfs
[idx
];
1488 band
->mhfs
[idx
] = (band
->mhfs
[idx
] & ~mask
) | val
;
1490 /* optimization: only write through if changed, and
1491 * changed band is the current band
1493 if (wlc_hw
->clk
&& (band
->mhfs
[idx
] != save
)
1494 && (band
== wlc_hw
->band
))
1495 brcms_b_write_shm(wlc_hw
, addr
[idx
],
1496 (u16
) band
->mhfs
[idx
]);
1499 if (bands
== BRCM_BAND_ALL
) {
1500 wlc_hw
->bandstate
[0]->mhfs
[idx
] =
1501 (wlc_hw
->bandstate
[0]->mhfs
[idx
] & ~mask
) | val
;
1502 wlc_hw
->bandstate
[1]->mhfs
[idx
] =
1503 (wlc_hw
->bandstate
[1]->mhfs
[idx
] & ~mask
) | val
;
1507 /* set the maccontrol register to desired reset state and
1508 * initialize the sw cache of the register
1510 static void brcms_c_mctrl_reset(struct brcms_hardware
*wlc_hw
)
1512 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1513 wlc_hw
->maccontrol
= 0;
1514 wlc_hw
->suspended_fifos
= 0;
1515 wlc_hw
->wake_override
= 0;
1516 wlc_hw
->mute_override
= 0;
1517 brcms_b_mctrl(wlc_hw
, ~0, MCTL_IHR_EN
| MCTL_WAKE
);
1521 * write the software state of maccontrol and
1522 * overrides to the maccontrol register
1524 static void brcms_c_mctrl_write(struct brcms_hardware
*wlc_hw
)
1526 u32 maccontrol
= wlc_hw
->maccontrol
;
1528 /* OR in the wake bit if overridden */
1529 if (wlc_hw
->wake_override
)
1530 maccontrol
|= MCTL_WAKE
;
1532 /* set AP and INFRA bits for mute if needed */
1533 if (wlc_hw
->mute_override
) {
1534 maccontrol
&= ~(MCTL_AP
);
1535 maccontrol
|= MCTL_INFRA
;
1538 W_REG(&wlc_hw
->regs
->maccontrol
, maccontrol
);
1541 /* set or clear maccontrol bits */
1542 void brcms_b_mctrl(struct brcms_hardware
*wlc_hw
, u32 mask
, u32 val
)
1548 return; /* error condition */
1549 maccontrol
= wlc_hw
->maccontrol
;
1550 new_maccontrol
= (maccontrol
& ~mask
) | val
;
1552 /* if the new maccontrol value is the same as the old, nothing to do */
1553 if (new_maccontrol
== maccontrol
)
1556 /* something changed, cache the new value */
1557 wlc_hw
->maccontrol
= new_maccontrol
;
1559 /* write the new values with overrides applied */
1560 brcms_c_mctrl_write(wlc_hw
);
1563 void brcms_c_ucode_wake_override_set(struct brcms_hardware
*wlc_hw
,
1566 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
)) {
1567 mboolset(wlc_hw
->wake_override
, override_bit
);
1571 mboolset(wlc_hw
->wake_override
, override_bit
);
1573 brcms_c_mctrl_write(wlc_hw
);
1574 brcms_b_wait_for_wake(wlc_hw
);
1577 void brcms_c_ucode_wake_override_clear(struct brcms_hardware
*wlc_hw
,
1580 mboolclr(wlc_hw
->wake_override
, override_bit
);
1582 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
))
1585 brcms_c_mctrl_write(wlc_hw
);
1588 /* When driver needs ucode to stop beaconing, it has to make sure that
1589 * MCTL_AP is clear and MCTL_INFRA is set
1590 * Mode MCTL_AP MCTL_INFRA
1592 * STA 0 1 <--- This will ensure no beacons
1595 static void brcms_c_ucode_mute_override_set(struct brcms_hardware
*wlc_hw
)
1597 wlc_hw
->mute_override
= 1;
1599 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1600 * override, then there is no change to write
1602 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1605 brcms_c_mctrl_write(wlc_hw
);
1608 /* Clear the override on AP and INFRA bits */
1609 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware
*wlc_hw
)
1611 if (wlc_hw
->mute_override
== 0)
1614 wlc_hw
->mute_override
= 0;
1616 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1617 * override, then there is no change to write
1619 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1622 brcms_c_mctrl_write(wlc_hw
);
1626 * Write a MAC address to the given match reg offset in the RXE match engine.
1629 brcms_b_set_addrmatch(struct brcms_hardware
*wlc_hw
, int match_reg_offset
,
1632 struct d11regs __iomem
*regs
;
1637 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: brcms_b_set_addrmatch\n",
1640 regs
= wlc_hw
->regs
;
1641 mac_l
= addr
[0] | (addr
[1] << 8);
1642 mac_m
= addr
[2] | (addr
[3] << 8);
1643 mac_h
= addr
[4] | (addr
[5] << 8);
1645 /* enter the MAC addr into the RXE match registers */
1646 W_REG(®s
->rcm_ctl
, RCM_INC_DATA
| match_reg_offset
);
1647 W_REG(®s
->rcm_mat_data
, mac_l
);
1648 W_REG(®s
->rcm_mat_data
, mac_m
);
1649 W_REG(®s
->rcm_mat_data
, mac_h
);
1654 brcms_b_write_template_ram(struct brcms_hardware
*wlc_hw
, int offset
, int len
,
1657 struct d11regs __iomem
*regs
;
1662 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1664 regs
= wlc_hw
->regs
;
1665 W_REG(®s
->tplatewrptr
, offset
);
1667 /* if MCTL_BIGEND bit set in mac control register,
1668 * the chip swaps data in fifo, as well as data in
1671 be_bit
= (R_REG(®s
->maccontrol
) & MCTL_BIGEND
) != 0;
1674 memcpy(&word
, buf
, sizeof(u32
));
1677 word_be
= cpu_to_be32(word
);
1678 word
= *(u32
*)&word_be
;
1680 word_le
= cpu_to_le32(word
);
1681 word
= *(u32
*)&word_le
;
1684 W_REG(®s
->tplatewrdata
, word
);
1686 buf
= (u8
*) buf
+ sizeof(u32
);
1691 static void brcms_b_set_cwmin(struct brcms_hardware
*wlc_hw
, u16 newmin
)
1693 wlc_hw
->band
->CWmin
= newmin
;
1695 W_REG(&wlc_hw
->regs
->objaddr
, OBJADDR_SCR_SEL
| S_DOT11_CWMIN
);
1696 (void)R_REG(&wlc_hw
->regs
->objaddr
);
1697 W_REG(&wlc_hw
->regs
->objdata
, newmin
);
1700 static void brcms_b_set_cwmax(struct brcms_hardware
*wlc_hw
, u16 newmax
)
1702 wlc_hw
->band
->CWmax
= newmax
;
1704 W_REG(&wlc_hw
->regs
->objaddr
, OBJADDR_SCR_SEL
| S_DOT11_CWMAX
);
1705 (void)R_REG(&wlc_hw
->regs
->objaddr
);
1706 W_REG(&wlc_hw
->regs
->objdata
, newmax
);
1709 void brcms_b_bw_set(struct brcms_hardware
*wlc_hw
, u16 bw
)
1713 /* request FAST clock if not on */
1714 fastclk
= wlc_hw
->forcefastclk
;
1716 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
1718 wlc_phy_bw_state_set(wlc_hw
->band
->pi
, bw
);
1720 brcms_b_phy_reset(wlc_hw
);
1721 wlc_phy_init(wlc_hw
->band
->pi
, wlc_phy_chanspec_get(wlc_hw
->band
->pi
));
1723 /* restore the clk */
1725 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
1728 static void brcms_b_upd_synthpu(struct brcms_hardware
*wlc_hw
)
1731 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1732 /* update SYNTHPU_DLY */
1734 if (BRCMS_ISLCNPHY(wlc
->band
))
1735 v
= SYNTHPU_DLY_LPPHY_US
;
1736 else if (BRCMS_ISNPHY(wlc
->band
) && (NREV_GE(wlc
->band
->phyrev
, 3)))
1737 v
= SYNTHPU_DLY_NPHY_US
;
1739 v
= SYNTHPU_DLY_BPHY_US
;
1741 brcms_b_write_shm(wlc_hw
, M_SYNTHPU_DLY
, v
);
1744 static void brcms_c_ucode_txant_set(struct brcms_hardware
*wlc_hw
)
1747 u16 phytxant
= wlc_hw
->bmac_phytxant
;
1748 u16 mask
= PHY_TXC_ANT_MASK
;
1750 /* set the Probe Response frame phy control word */
1751 phyctl
= brcms_b_read_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
);
1752 phyctl
= (phyctl
& ~mask
) | phytxant
;
1753 brcms_b_write_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
, phyctl
);
1755 /* set the Response (ACK/CTS) frame phy control word */
1756 phyctl
= brcms_b_read_shm(wlc_hw
, M_RSP_PCTLWD
);
1757 phyctl
= (phyctl
& ~mask
) | phytxant
;
1758 brcms_b_write_shm(wlc_hw
, M_RSP_PCTLWD
, phyctl
);
1761 static u16
brcms_b_ofdm_ratetable_offset(struct brcms_hardware
*wlc_hw
,
1766 struct plcp_signal_rate_lookup
{
1770 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1771 const struct plcp_signal_rate_lookup rate_lookup
[] = {
1772 {BRCM_RATE_6M
, 0xB},
1773 {BRCM_RATE_9M
, 0xF},
1774 {BRCM_RATE_12M
, 0xA},
1775 {BRCM_RATE_18M
, 0xE},
1776 {BRCM_RATE_24M
, 0x9},
1777 {BRCM_RATE_36M
, 0xD},
1778 {BRCM_RATE_48M
, 0x8},
1779 {BRCM_RATE_54M
, 0xC}
1782 for (i
= 0; i
< ARRAY_SIZE(rate_lookup
); i
++) {
1783 if (rate
== rate_lookup
[i
].rate
) {
1784 plcp_rate
= rate_lookup
[i
].signal_rate
;
1789 /* Find the SHM pointer to the rate table entry by looking in the
1792 return 2 * brcms_b_read_shm(wlc_hw
, M_RT_DIRMAP_A
+ (plcp_rate
* 2));
1795 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware
*wlc_hw
)
1799 BRCM_RATE_6M
, BRCM_RATE_9M
, BRCM_RATE_12M
, BRCM_RATE_18M
,
1800 BRCM_RATE_24M
, BRCM_RATE_36M
, BRCM_RATE_48M
, BRCM_RATE_54M
1806 if (!BRCMS_PHY_11N_CAP(wlc_hw
->band
))
1809 /* walk the phy rate table and update the entries */
1810 for (i
= 0; i
< ARRAY_SIZE(rates
); i
++) {
1813 entry_ptr
= brcms_b_ofdm_ratetable_offset(wlc_hw
, rate
);
1815 /* read the SHM Rate Table entry OFDM PCTL1 values */
1817 brcms_b_read_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
);
1819 /* modify the value */
1820 pctl1
&= ~PHY_TXC1_MODE_MASK
;
1821 pctl1
|= (wlc_hw
->hw_stf_ss_opmode
<< PHY_TXC1_MODE_SHIFT
);
1823 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1824 brcms_b_write_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
,
1829 /* band-specific init */
1830 static void brcms_b_bsinit(struct brcms_c_info
*wlc
, u16 chanspec
)
1832 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1834 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
1835 wlc_hw
->band
->bandunit
);
1837 brcms_c_ucode_bsinit(wlc_hw
);
1839 wlc_phy_init(wlc_hw
->band
->pi
, chanspec
);
1841 brcms_c_ucode_txant_set(wlc_hw
);
1844 * cwmin is band-specific, update hardware
1845 * with value for current band
1847 brcms_b_set_cwmin(wlc_hw
, wlc_hw
->band
->CWmin
);
1848 brcms_b_set_cwmax(wlc_hw
, wlc_hw
->band
->CWmax
);
1850 brcms_b_update_slot_timing(wlc_hw
,
1851 wlc_hw
->band
->bandtype
== BRCM_BAND_5G
?
1852 true : wlc_hw
->shortslot
);
1854 /* write phytype and phyvers */
1855 brcms_b_write_shm(wlc_hw
, M_PHYTYPE
, (u16
) wlc_hw
->band
->phytype
);
1856 brcms_b_write_shm(wlc_hw
, M_PHYVER
, (u16
) wlc_hw
->band
->phyrev
);
1859 * initialize the txphyctl1 rate table since
1860 * shmem is shared between bands
1862 brcms_upd_ofdm_pctl1_table(wlc_hw
);
1864 brcms_b_upd_synthpu(wlc_hw
);
1867 /* Perform a soft reset of the PHY PLL */
1868 void brcms_b_core_phypll_reset(struct brcms_hardware
*wlc_hw
)
1870 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1872 ai_corereg(wlc_hw
->sih
, SI_CC_IDX
,
1873 offsetof(struct chipcregs
, chipcontrol_addr
), ~0, 0);
1875 ai_corereg(wlc_hw
->sih
, SI_CC_IDX
,
1876 offsetof(struct chipcregs
, chipcontrol_data
), 0x4, 0);
1878 ai_corereg(wlc_hw
->sih
, SI_CC_IDX
,
1879 offsetof(struct chipcregs
, chipcontrol_data
), 0x4, 4);
1881 ai_corereg(wlc_hw
->sih
, SI_CC_IDX
,
1882 offsetof(struct chipcregs
, chipcontrol_data
), 0x4, 0);
1886 /* light way to turn on phy clock without reset for NPHY only
1887 * refer to brcms_b_core_phy_clk for full version
1889 void brcms_b_phyclk_fgc(struct brcms_hardware
*wlc_hw
, bool clk
)
1891 /* support(necessary for NPHY and HYPHY) only */
1892 if (!BRCMS_ISNPHY(wlc_hw
->band
))
1896 ai_core_cflags(wlc_hw
->sih
, SICF_FGC
, SICF_FGC
);
1898 ai_core_cflags(wlc_hw
->sih
, SICF_FGC
, 0);
1902 void brcms_b_macphyclk_set(struct brcms_hardware
*wlc_hw
, bool clk
)
1905 ai_core_cflags(wlc_hw
->sih
, SICF_MPCLKE
, SICF_MPCLKE
);
1907 ai_core_cflags(wlc_hw
->sih
, SICF_MPCLKE
, 0);
1910 void brcms_b_phy_reset(struct brcms_hardware
*wlc_hw
)
1912 struct brcms_phy_pub
*pih
= wlc_hw
->band
->pi
;
1914 bool phy_in_reset
= false;
1916 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1921 phy_bw_clkbits
= wlc_phy_clk_bwbits(wlc_hw
->band
->pi
);
1923 /* Specific reset sequence required for NPHY rev 3 and 4 */
1924 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_GE(wlc_hw
->band
->phyrev
, 3) &&
1925 NREV_LE(wlc_hw
->band
->phyrev
, 4)) {
1926 /* Set the PHY bandwidth */
1927 ai_core_cflags(wlc_hw
->sih
, SICF_BWMASK
, phy_bw_clkbits
);
1931 /* Perform a soft reset of the PHY PLL */
1932 brcms_b_core_phypll_reset(wlc_hw
);
1935 ai_core_cflags(wlc_hw
->sih
, (SICF_PRST
| SICF_PCLKE
),
1936 (SICF_PRST
| SICF_PCLKE
));
1937 phy_in_reset
= true;
1939 ai_core_cflags(wlc_hw
->sih
,
1940 (SICF_PRST
| SICF_PCLKE
| SICF_BWMASK
),
1941 (SICF_PRST
| SICF_PCLKE
| phy_bw_clkbits
));
1945 brcms_b_core_phy_clk(wlc_hw
, ON
);
1948 wlc_phy_anacore(pih
, ON
);
1951 /* switch to and initialize new band */
1952 static void brcms_b_setband(struct brcms_hardware
*wlc_hw
, uint bandunit
,
1954 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1957 /* Enable the d11 core before accessing it */
1958 if (!ai_iscoreup(wlc_hw
->sih
)) {
1959 ai_core_reset(wlc_hw
->sih
, 0, 0);
1960 brcms_c_mctrl_reset(wlc_hw
);
1963 macintmask
= brcms_c_setband_inact(wlc
, bandunit
);
1968 brcms_b_core_phy_clk(wlc_hw
, ON
);
1970 /* band-specific initializations */
1971 brcms_b_bsinit(wlc
, chanspec
);
1974 * If there are any pending software interrupt bits,
1975 * then replace these with a harmless nonzero value
1976 * so brcms_c_dpc() will re-enable interrupts when done.
1978 if (wlc
->macintstatus
)
1979 wlc
->macintstatus
= MI_DMAINT
;
1981 /* restore macintmask */
1982 brcms_intrsrestore(wlc
->wl
, macintmask
);
1984 /* ucode should still be suspended.. */
1985 WARN_ON((R_REG(&wlc_hw
->regs
->maccontrol
) & MCTL_EN_MAC
) != 0);
1988 /* low-level band switch utility routine */
1989 void brcms_c_setxband(struct brcms_hardware
*wlc_hw
, uint bandunit
)
1991 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
1994 wlc_hw
->band
= wlc_hw
->bandstate
[bandunit
];
1998 * until we eliminate need for wlc->band refs in low level code
2000 wlc_hw
->wlc
->band
= wlc_hw
->wlc
->bandstate
[bandunit
];
2002 /* set gmode core flag */
2003 if (wlc_hw
->sbclk
&& !wlc_hw
->noreset
)
2004 ai_core_cflags(wlc_hw
->sih
, SICF_GMODE
,
2005 ((bandunit
== 0) ? SICF_GMODE
: 0));
2008 static bool brcms_c_isgoodchip(struct brcms_hardware
*wlc_hw
)
2011 /* reject unsupported corerev */
2012 if (!CONF_HAS(D11CONF
, wlc_hw
->corerev
)) {
2013 wiphy_err(wlc_hw
->wlc
->wiphy
, "unsupported core rev %d\n",
2021 /* Validate some board info parameters */
2022 static bool brcms_c_validboardtype(struct brcms_hardware
*wlc_hw
)
2024 uint boardrev
= wlc_hw
->boardrev
;
2026 /* 4 bits each for board type, major, minor, and tiny version */
2027 uint brt
= (boardrev
& 0xf000) >> 12;
2028 uint b0
= (boardrev
& 0xf00) >> 8;
2029 uint b1
= (boardrev
& 0xf0) >> 4;
2030 uint b2
= boardrev
& 0xf;
2032 /* voards from other vendors are always considered valid */
2033 if (wlc_hw
->sih
->boardvendor
!= PCI_VENDOR_ID_BROADCOM
)
2036 /* do some boardrev sanity checks when boardvendor is Broadcom */
2040 if (boardrev
<= 0xff)
2043 if ((brt
> 2) || (brt
== 0) || (b0
> 9) || (b0
== 0) || (b1
> 9)
2050 static char *brcms_c_get_macaddr(struct brcms_hardware
*wlc_hw
)
2052 const char *varname
= "macaddr";
2055 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
2056 macaddr
= getvar(wlc_hw
->vars
, varname
);
2057 if (macaddr
!= NULL
)
2060 if (wlc_hw
->_nbands
> 1)
2061 varname
= "et1macaddr";
2063 varname
= "il0macaddr";
2065 macaddr
= getvar(wlc_hw
->vars
, varname
);
2066 if (macaddr
== NULL
)
2067 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: wlc_get_macaddr: macaddr "
2068 "getvar(%s) not found\n", wlc_hw
->unit
, varname
);
2073 /* power both the pll and external oscillator on/off */
2074 static void brcms_b_xtal(struct brcms_hardware
*wlc_hw
, bool want
)
2076 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: want %d\n", wlc_hw
->unit
, want
);
2079 * dont power down if plldown is false or
2080 * we must poll hw radio disable
2082 if (!want
&& wlc_hw
->pllreq
)
2086 ai_clkctl_xtal(wlc_hw
->sih
, XTAL
| PLL
, want
);
2088 wlc_hw
->sbclk
= want
;
2089 if (!wlc_hw
->sbclk
) {
2090 wlc_hw
->clk
= false;
2091 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
2092 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
2097 * Return true if radio is disabled, otherwise false.
2098 * hw radio disable signal is an external pin, users activate it asynchronously
2099 * this function could be called when driver is down and w/o clock
2100 * it operates on different registers depending on corerev and boardflag.
2102 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware
*wlc_hw
)
2105 u32 resetbits
= 0, flags
= 0;
2107 xtal
= wlc_hw
->sbclk
;
2109 brcms_b_xtal(wlc_hw
, ON
);
2111 /* may need to take core out of reset first */
2115 * mac no longer enables phyclk automatically when driver
2116 * accesses phyreg throughput mac. This can be skipped since
2117 * only mac reg is accessed below
2119 flags
|= SICF_PCLKE
;
2122 * AI chip doesn't restore bar0win2 on
2123 * hibernation/resume, need sw fixup
2125 if ((wlc_hw
->sih
->chip
== BCM43224_CHIP_ID
) ||
2126 (wlc_hw
->sih
->chip
== BCM43225_CHIP_ID
))
2127 wlc_hw
->regs
= (struct d11regs __iomem
*)
2128 ai_setcore(wlc_hw
->sih
, D11_CORE_ID
, 0);
2129 ai_core_reset(wlc_hw
->sih
, flags
, resetbits
);
2130 brcms_c_mctrl_reset(wlc_hw
);
2133 v
= ((R_REG(&wlc_hw
->regs
->phydebug
) & PDBG_RFD
) != 0);
2135 /* put core back into reset */
2137 ai_core_disable(wlc_hw
->sih
, 0);
2140 brcms_b_xtal(wlc_hw
, OFF
);
2145 static bool wlc_dma_rxreset(struct brcms_hardware
*wlc_hw
, uint fifo
)
2147 struct dma_pub
*di
= wlc_hw
->di
[fifo
];
2148 return dma_rxreset(di
);
2152 * ensure fask clock during reset
2154 * reset d11(out of reset)
2155 * reset phy(out of reset)
2156 * clear software macintstatus for fresh new start
2157 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2159 void brcms_b_corereset(struct brcms_hardware
*wlc_hw
, u32 flags
)
2161 struct d11regs __iomem
*regs
;
2166 if (flags
== BRCMS_USE_COREFLAGS
)
2167 flags
= (wlc_hw
->band
->pi
? wlc_hw
->band
->core_flags
: 0);
2169 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2171 regs
= wlc_hw
->regs
;
2173 /* request FAST clock if not on */
2174 fastclk
= wlc_hw
->forcefastclk
;
2176 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
2178 /* reset the dma engines except first time thru */
2179 if (ai_iscoreup(wlc_hw
->sih
)) {
2180 for (i
= 0; i
< NFIFO
; i
++)
2181 if ((wlc_hw
->di
[i
]) && (!dma_txreset(wlc_hw
->di
[i
])))
2182 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: "
2183 "dma_txreset[%d]: cannot stop dma\n",
2184 wlc_hw
->unit
, __func__
, i
);
2186 if ((wlc_hw
->di
[RX_FIFO
])
2187 && (!wlc_dma_rxreset(wlc_hw
, RX_FIFO
)))
2188 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: dma_rxreset"
2189 "[%d]: cannot stop dma\n",
2190 wlc_hw
->unit
, __func__
, RX_FIFO
);
2192 /* if noreset, just stop the psm and return */
2193 if (wlc_hw
->noreset
) {
2194 wlc_hw
->wlc
->macintstatus
= 0; /* skip wl_dpc after down */
2195 brcms_b_mctrl(wlc_hw
, MCTL_PSM_RUN
| MCTL_EN_MAC
, 0);
2200 * mac no longer enables phyclk automatically when driver accesses
2201 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2202 * band->pi is invalid. need to enable PHY CLK
2204 flags
|= SICF_PCLKE
;
2208 * In chips with PMU, the fastclk request goes through d11 core
2209 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2211 * This adds some delay and we can optimize it by also requesting
2212 * fastclk through chipcommon during this period if necessary. But
2213 * that has to work coordinate with other driver like mips/arm since
2214 * they may touch chipcommon as well.
2216 wlc_hw
->clk
= false;
2217 ai_core_reset(wlc_hw
->sih
, flags
, resetbits
);
2219 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
2220 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, true);
2222 brcms_c_mctrl_reset(wlc_hw
);
2224 if (wlc_hw
->sih
->cccaps
& CC_CAP_PMU
)
2225 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
2227 brcms_b_phy_reset(wlc_hw
);
2229 /* turn on PHY_PLL */
2230 brcms_b_core_phypll_ctl(wlc_hw
, true);
2232 /* clear sw intstatus */
2233 wlc_hw
->wlc
->macintstatus
= 0;
2235 /* restore the clk setting */
2237 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
2240 /* txfifo sizes needs to be modified(increased) since the newer cores
2243 static void brcms_b_corerev_fifofixup(struct brcms_hardware
*wlc_hw
)
2245 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2247 u16 txfifo_startblk
= TXFIFO_START_BLK
, txfifo_endblk
;
2248 u16 txfifo_def
, txfifo_def1
;
2251 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2252 txfifo_startblk
= TXFIFO_START_BLK
;
2254 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2255 for (fifo_nu
= 0; fifo_nu
< NFIFO
; fifo_nu
++) {
2257 txfifo_endblk
= txfifo_startblk
+ wlc_hw
->xmtfifo_sz
[fifo_nu
];
2258 txfifo_def
= (txfifo_startblk
& 0xff) |
2259 (((txfifo_endblk
- 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT
);
2260 txfifo_def1
= ((txfifo_startblk
>> 8) & 0x1) |
2262 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT
);
2264 TXFIFOCMD_RESET_MASK
| (fifo_nu
<< TXFIFOCMD_FIFOSEL_SHIFT
);
2266 W_REG(®s
->xmtfifocmd
, txfifo_cmd
);
2267 W_REG(®s
->xmtfifodef
, txfifo_def
);
2268 W_REG(®s
->xmtfifodef1
, txfifo_def1
);
2270 W_REG(®s
->xmtfifocmd
, txfifo_cmd
);
2272 txfifo_startblk
+= wlc_hw
->xmtfifo_sz
[fifo_nu
];
2275 * need to propagate to shm location to be in sync since ucode/hw won't
2278 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE0
,
2279 wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]);
2280 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE1
,
2281 wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]);
2282 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE2
,
2283 ((wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
] << 8) | wlc_hw
->
2284 xmtfifo_sz
[TX_AC_BK_FIFO
]));
2285 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE3
,
2286 ((wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
] << 8) | wlc_hw
->
2287 xmtfifo_sz
[TX_BCMC_FIFO
]));
2290 /* This function is used for changing the tsf frac register
2291 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2292 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2293 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2294 * HTPHY Formula is 2^26/freq(MHz) e.g.
2295 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2296 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2297 * For spuron: 123MHz -> 2^26/123 = 545600.5
2298 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2299 * For spur off: 120MHz -> 2^26/120 = 559240.5
2300 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2303 void brcms_b_switch_macfreq(struct brcms_hardware
*wlc_hw
, u8 spurmode
)
2305 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2307 if ((wlc_hw
->sih
->chip
== BCM43224_CHIP_ID
) ||
2308 (wlc_hw
->sih
->chip
== BCM43225_CHIP_ID
)) {
2309 if (spurmode
== WL_SPURAVOID_ON2
) { /* 126Mhz */
2310 W_REG(®s
->tsf_clk_frac_l
, 0x2082);
2311 W_REG(®s
->tsf_clk_frac_h
, 0x8);
2312 } else if (spurmode
== WL_SPURAVOID_ON1
) { /* 123Mhz */
2313 W_REG(®s
->tsf_clk_frac_l
, 0x5341);
2314 W_REG(®s
->tsf_clk_frac_h
, 0x8);
2315 } else { /* 120Mhz */
2316 W_REG(®s
->tsf_clk_frac_l
, 0x8889);
2317 W_REG(®s
->tsf_clk_frac_h
, 0x8);
2319 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2320 if (spurmode
== WL_SPURAVOID_ON1
) { /* 82Mhz */
2321 W_REG(®s
->tsf_clk_frac_l
, 0x7CE0);
2322 W_REG(®s
->tsf_clk_frac_h
, 0xC);
2323 } else { /* 80Mhz */
2324 W_REG(®s
->tsf_clk_frac_l
, 0xCCCD);
2325 W_REG(®s
->tsf_clk_frac_h
, 0xC);
2330 /* Initialize GPIOs that are controlled by D11 core */
2331 static void brcms_c_gpio_init(struct brcms_c_info
*wlc
)
2333 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2334 struct d11regs __iomem
*regs
;
2337 regs
= wlc_hw
->regs
;
2339 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2340 brcms_b_mctrl(wlc_hw
, MCTL_GPOUT_SEL_MASK
, 0);
2343 * Common GPIO setup:
2344 * G0 = LED 0 = WLAN Activity
2345 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2346 * G2 = LED 2 = WLAN 5 GHz Radio State
2347 * G4 = radio disable input (HI enabled, LO disabled)
2352 /* Allocate GPIOs for mimo antenna diversity feature */
2353 if (wlc_hw
->antsel_type
== ANTSEL_2x3
) {
2354 /* Enable antenna diversity, use 2x3 mode */
2355 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2356 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2357 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
,
2358 MHF3_ANTSEL_MODE
, BRCM_BAND_ALL
);
2360 /* init superswitch control */
2361 wlc_phy_antsel_init(wlc_hw
->band
->pi
, false);
2363 } else if (wlc_hw
->antsel_type
== ANTSEL_2x4
) {
2364 gm
|= gc
|= (BOARD_GPIO_12
| BOARD_GPIO_13
);
2366 * The board itself is powered by these GPIOs
2367 * (when not sending pattern) so set them high
2369 OR_REG(®s
->psm_gpio_oe
,
2370 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2371 OR_REG(®s
->psm_gpio_out
,
2372 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2374 /* Enable antenna diversity, use 2x4 mode */
2375 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2376 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2377 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
, 0,
2380 /* Configure the desired clock to be 4Mhz */
2381 brcms_b_write_shm(wlc_hw
, M_ANTSEL_CLKDIV
,
2382 ANTSEL_CLKDIV_4MHZ
);
2386 * gpio 9 controls the PA. ucode is responsible
2387 * for wiggling out and oe
2389 if (wlc_hw
->boardflags
& BFL_PACTRL
)
2390 gm
|= gc
|= BOARD_GPIO_PACTRL
;
2392 /* apply to gpiocontrol register */
2393 ai_gpiocontrol(wlc_hw
->sih
, gm
, gc
, GPIO_DRV_PRIORITY
);
2396 static void brcms_ucode_write(struct brcms_hardware
*wlc_hw
,
2397 const __le32 ucode
[], const size_t nbytes
)
2399 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2403 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2405 count
= (nbytes
/ sizeof(u32
));
2407 W_REG(®s
->objaddr
, (OBJADDR_AUTO_INC
| OBJADDR_UCM_SEL
));
2408 (void)R_REG(®s
->objaddr
);
2409 for (i
= 0; i
< count
; i
++)
2410 W_REG(®s
->objdata
, le32_to_cpu(ucode
[i
]));
2414 static void brcms_ucode_download(struct brcms_hardware
*wlc_hw
)
2416 struct brcms_c_info
*wlc
;
2417 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
2421 if (wlc_hw
->ucode_loaded
)
2424 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
2425 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
2426 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_16_mimo
,
2427 ucode
->bcm43xx_16_mimosz
);
2428 wlc_hw
->ucode_loaded
= true;
2430 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2432 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2433 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
2434 if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2435 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_24_lcn
,
2436 ucode
->bcm43xx_24_lcnsz
);
2437 wlc_hw
->ucode_loaded
= true;
2439 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2441 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2446 void brcms_b_txant_set(struct brcms_hardware
*wlc_hw
, u16 phytxant
)
2448 /* update sw state */
2449 wlc_hw
->bmac_phytxant
= phytxant
;
2451 /* push to ucode if up */
2454 brcms_c_ucode_txant_set(wlc_hw
);
2458 u16
brcms_b_get_txant(struct brcms_hardware
*wlc_hw
)
2460 return (u16
) wlc_hw
->wlc
->stf
->txant
;
2463 void brcms_b_antsel_type_set(struct brcms_hardware
*wlc_hw
, u8 antsel_type
)
2465 wlc_hw
->antsel_type
= antsel_type
;
2467 /* Update the antsel type for phy module to use */
2468 wlc_phy_antsel_type_set(wlc_hw
->band
->pi
, antsel_type
);
2471 static void brcms_b_fifoerrors(struct brcms_hardware
*wlc_hw
)
2475 uint intstatus
, idx
;
2476 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2477 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2479 unit
= wlc_hw
->unit
;
2481 for (idx
= 0; idx
< NFIFO
; idx
++) {
2482 /* read intstatus register and ignore any non-error bits */
2484 R_REG(®s
->intctrlregs
[idx
].intstatus
) & I_ERRORS
;
2488 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: intstatus%d 0x%x\n",
2489 unit
, idx
, intstatus
);
2491 if (intstatus
& I_RO
) {
2492 wiphy_err(wiphy
, "wl%d: fifo %d: receive fifo "
2493 "overflow\n", unit
, idx
);
2497 if (intstatus
& I_PC
) {
2498 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor error\n",
2503 if (intstatus
& I_PD
) {
2504 wiphy_err(wiphy
, "wl%d: fifo %d: data error\n", unit
,
2509 if (intstatus
& I_DE
) {
2510 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor protocol "
2511 "error\n", unit
, idx
);
2515 if (intstatus
& I_RU
)
2516 wiphy_err(wiphy
, "wl%d: fifo %d: receive descriptor "
2517 "underflow\n", idx
, unit
);
2519 if (intstatus
& I_XU
) {
2520 wiphy_err(wiphy
, "wl%d: fifo %d: transmit fifo "
2521 "underflow\n", idx
, unit
);
2526 brcms_c_fatal_error(wlc_hw
->wlc
); /* big hammer */
2529 W_REG(®s
->intctrlregs
[idx
].intstatus
,
2534 void brcms_c_intrson(struct brcms_c_info
*wlc
)
2536 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2537 wlc
->macintmask
= wlc
->defmacintmask
;
2538 W_REG(&wlc_hw
->regs
->macintmask
, wlc
->macintmask
);
2542 * callback for siutils.c, which has only wlc handler, no wl they both check
2543 * up, not only because there is no need to off/restore d11 interrupt but also
2544 * because per-port code may require sync with valid interrupt.
2546 static u32
brcms_c_wlintrsoff(struct brcms_c_info
*wlc
)
2551 return brcms_intrsoff(wlc
->wl
);
2554 static void brcms_c_wlintrsrestore(struct brcms_c_info
*wlc
, u32 macintmask
)
2559 brcms_intrsrestore(wlc
->wl
, macintmask
);
2562 u32
brcms_c_intrsoff(struct brcms_c_info
*wlc
)
2564 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2570 macintmask
= wlc
->macintmask
; /* isr can still happen */
2572 W_REG(&wlc_hw
->regs
->macintmask
, 0);
2573 (void)R_REG(&wlc_hw
->regs
->macintmask
); /* sync readback */
2574 udelay(1); /* ensure int line is no longer driven */
2575 wlc
->macintmask
= 0;
2577 /* return previous macintmask; resolve race between us and our isr */
2578 return wlc
->macintstatus
? 0 : macintmask
;
2581 void brcms_c_intrsrestore(struct brcms_c_info
*wlc
, u32 macintmask
)
2583 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2587 wlc
->macintmask
= macintmask
;
2588 W_REG(&wlc_hw
->regs
->macintmask
, wlc
->macintmask
);
2591 static void brcms_b_tx_fifo_suspend(struct brcms_hardware
*wlc_hw
,
2594 u8 fifo
= 1 << tx_fifo
;
2596 /* Two clients of this code, 11h Quiet period and scanning. */
2598 /* only suspend if not already suspended */
2599 if ((wlc_hw
->suspended_fifos
& fifo
) == fifo
)
2602 /* force the core awake only if not already */
2603 if (wlc_hw
->suspended_fifos
== 0)
2604 brcms_c_ucode_wake_override_set(wlc_hw
,
2605 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2607 wlc_hw
->suspended_fifos
|= fifo
;
2609 if (wlc_hw
->di
[tx_fifo
]) {
2611 * Suspending AMPDU transmissions in the middle can cause
2612 * underflow which may result in mismatch between ucode and
2613 * driver so suspend the mac before suspending the FIFO
2615 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2616 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
2618 dma_txsuspend(wlc_hw
->di
[tx_fifo
]);
2620 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2621 brcms_c_enable_mac(wlc_hw
->wlc
);
2625 static void brcms_b_tx_fifo_resume(struct brcms_hardware
*wlc_hw
,
2628 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2629 * but need to be done here for PIO otherwise the watchdog will catch
2630 * the inconsistency and fire
2632 /* Two clients of this code, 11h Quiet period and scanning. */
2633 if (wlc_hw
->di
[tx_fifo
])
2634 dma_txresume(wlc_hw
->di
[tx_fifo
]);
2636 /* allow core to sleep again */
2637 if (wlc_hw
->suspended_fifos
== 0)
2640 wlc_hw
->suspended_fifos
&= ~(1 << tx_fifo
);
2641 if (wlc_hw
->suspended_fifos
== 0)
2642 brcms_c_ucode_wake_override_clear(wlc_hw
,
2643 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2647 static void brcms_b_mute(struct brcms_hardware
*wlc_hw
, bool on
, u32 flags
)
2649 const u8 null_ether_addr
[ETH_ALEN
] = {0, 0, 0, 0, 0, 0};
2652 /* suspend tx fifos */
2653 brcms_b_tx_fifo_suspend(wlc_hw
, TX_DATA_FIFO
);
2654 brcms_b_tx_fifo_suspend(wlc_hw
, TX_CTL_FIFO
);
2655 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_BK_FIFO
);
2656 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_VI_FIFO
);
2658 /* zero the address match register so we do not send ACKs */
2659 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2662 /* resume tx fifos */
2663 brcms_b_tx_fifo_resume(wlc_hw
, TX_DATA_FIFO
);
2664 brcms_b_tx_fifo_resume(wlc_hw
, TX_CTL_FIFO
);
2665 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_BK_FIFO
);
2666 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_VI_FIFO
);
2668 /* Restore address */
2669 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2673 wlc_phy_mute_upd(wlc_hw
->band
->pi
, on
, flags
);
2676 brcms_c_ucode_mute_override_set(wlc_hw
);
2678 brcms_c_ucode_mute_override_clear(wlc_hw
);
2682 * Read and clear macintmask and macintstatus and intstatus registers.
2683 * This routine should be called with interrupts off
2685 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2686 * 0 if the interrupt is not for us, or we are in some special cases;
2687 * device interrupt status bits otherwise.
2689 static inline u32
wlc_intstatus(struct brcms_c_info
*wlc
, bool in_isr
)
2691 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2692 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2695 /* macintstatus includes a DMA interrupt summary bit */
2696 macintstatus
= R_REG(®s
->macintstatus
);
2698 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus: 0x%x\n", wlc_hw
->unit
,
2701 /* detect cardbus removed, in power down(suspend) and in reset */
2702 if (brcms_deviceremoved(wlc
))
2705 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2706 * handle that case here.
2708 if (macintstatus
== 0xffffffff)
2711 /* defer unsolicited interrupts */
2712 macintstatus
&= (in_isr
? wlc
->macintmask
: wlc
->defmacintmask
);
2715 if (macintstatus
== 0)
2718 /* interrupts are already turned off for CFE build
2719 * Caution: For CFE Turning off the interrupts again has some undesired
2722 /* turn off the interrupts */
2723 W_REG(®s
->macintmask
, 0);
2724 (void)R_REG(®s
->macintmask
); /* sync readback */
2725 wlc
->macintmask
= 0;
2727 /* clear device interrupts */
2728 W_REG(®s
->macintstatus
, macintstatus
);
2730 /* MI_DMAINT is indication of non-zero intstatus */
2731 if (macintstatus
& MI_DMAINT
)
2733 * only fifo interrupt enabled is I_RI in
2734 * RX_FIFO. If MI_DMAINT is set, assume it
2735 * is set and clear the interrupt.
2737 W_REG(®s
->intctrlregs
[RX_FIFO
].intstatus
,
2740 return macintstatus
;
2743 /* Update wlc->macintstatus and wlc->intstatus[]. */
2744 /* Return true if they are updated successfully. false otherwise */
2745 bool brcms_c_intrsupd(struct brcms_c_info
*wlc
)
2749 /* read and clear macintstatus and intstatus registers */
2750 macintstatus
= wlc_intstatus(wlc
, false);
2752 /* device is removed */
2753 if (macintstatus
== 0xffffffff)
2756 /* update interrupt status in software */
2757 wlc
->macintstatus
|= macintstatus
;
2763 * First-level interrupt processing.
2764 * Return true if this was our interrupt, false otherwise.
2765 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2768 bool brcms_c_isr(struct brcms_c_info
*wlc
, bool *wantdpc
)
2770 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2775 if (!wlc_hw
->up
|| !wlc
->macintmask
)
2778 /* read and clear macintstatus and intstatus registers */
2779 macintstatus
= wlc_intstatus(wlc
, true);
2781 if (macintstatus
== 0xffffffff)
2782 wiphy_err(wlc
->wiphy
, "DEVICEREMOVED detected in the ISR code"
2785 /* it is not for us */
2786 if (macintstatus
== 0)
2791 /* save interrupt status bits */
2792 wlc
->macintstatus
= macintstatus
;
2798 void brcms_c_suspend_mac_and_wait(struct brcms_c_info
*wlc
)
2800 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2801 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2803 struct wiphy
*wiphy
= wlc
->wiphy
;
2805 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2806 wlc_hw
->band
->bandunit
);
2809 * Track overlapping suspend requests
2811 wlc_hw
->mac_suspend_depth
++;
2812 if (wlc_hw
->mac_suspend_depth
> 1)
2815 /* force the core awake */
2816 brcms_c_ucode_wake_override_set(wlc_hw
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2818 mc
= R_REG(®s
->maccontrol
);
2820 if (mc
== 0xffffffff) {
2821 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2823 brcms_down(wlc
->wl
);
2826 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2827 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2828 WARN_ON(!(mc
& MCTL_EN_MAC
));
2830 mi
= R_REG(®s
->macintstatus
);
2831 if (mi
== 0xffffffff) {
2832 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2834 brcms_down(wlc
->wl
);
2837 WARN_ON(mi
& MI_MACSSPNDD
);
2839 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, 0);
2841 SPINWAIT(!(R_REG(®s
->macintstatus
) & MI_MACSSPNDD
),
2842 BRCMS_MAX_MAC_SUSPEND
);
2844 if (!(R_REG(®s
->macintstatus
) & MI_MACSSPNDD
)) {
2845 wiphy_err(wiphy
, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2846 " and MI_MACSSPNDD is still not on.\n",
2847 wlc_hw
->unit
, BRCMS_MAX_MAC_SUSPEND
);
2848 wiphy_err(wiphy
, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2849 "psm_brc 0x%04x\n", wlc_hw
->unit
,
2850 R_REG(®s
->psmdebug
),
2851 R_REG(®s
->phydebug
),
2852 R_REG(®s
->psm_brc
));
2855 mc
= R_REG(®s
->maccontrol
);
2856 if (mc
== 0xffffffff) {
2857 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2859 brcms_down(wlc
->wl
);
2862 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2863 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2864 WARN_ON(mc
& MCTL_EN_MAC
);
2867 void brcms_c_enable_mac(struct brcms_c_info
*wlc
)
2869 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2870 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
2873 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2874 wlc
->band
->bandunit
);
2877 * Track overlapping suspend requests
2879 wlc_hw
->mac_suspend_depth
--;
2880 if (wlc_hw
->mac_suspend_depth
> 0)
2883 mc
= R_REG(®s
->maccontrol
);
2884 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2885 WARN_ON(mc
& MCTL_EN_MAC
);
2886 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2888 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, MCTL_EN_MAC
);
2889 W_REG(®s
->macintstatus
, MI_MACSSPNDD
);
2891 mc
= R_REG(®s
->maccontrol
);
2892 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2893 WARN_ON(!(mc
& MCTL_EN_MAC
));
2894 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2896 mi
= R_REG(®s
->macintstatus
);
2897 WARN_ON(mi
& MI_MACSSPNDD
);
2899 brcms_c_ucode_wake_override_clear(wlc_hw
,
2900 BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2903 void brcms_b_band_stf_ss_set(struct brcms_hardware
*wlc_hw
, u8 stf_mode
)
2905 wlc_hw
->hw_stf_ss_opmode
= stf_mode
;
2908 brcms_upd_ofdm_pctl1_table(wlc_hw
);
2911 static bool brcms_b_validate_chip_access(struct brcms_hardware
*wlc_hw
)
2913 struct d11regs __iomem
*regs
;
2915 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2917 BCMMSG(wiphy
, "wl%d\n", wlc_hw
->unit
);
2919 regs
= wlc_hw
->regs
;
2921 /* Validate dchip register access */
2923 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2924 (void)R_REG(®s
->objaddr
);
2925 w
= R_REG(®s
->objdata
);
2927 /* Can we write and read back a 32bit register? */
2928 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2929 (void)R_REG(®s
->objaddr
);
2930 W_REG(®s
->objdata
, (u32
) 0xaa5555aa);
2932 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2933 (void)R_REG(®s
->objaddr
);
2934 val
= R_REG(®s
->objdata
);
2935 if (val
!= (u32
) 0xaa5555aa) {
2936 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2937 "expected 0xaa5555aa\n", wlc_hw
->unit
, val
);
2941 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2942 (void)R_REG(®s
->objaddr
);
2943 W_REG(®s
->objdata
, (u32
) 0x55aaaa55);
2945 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2946 (void)R_REG(®s
->objaddr
);
2947 val
= R_REG(®s
->objdata
);
2948 if (val
!= (u32
) 0x55aaaa55) {
2949 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2950 "expected 0x55aaaa55\n", wlc_hw
->unit
, val
);
2954 W_REG(®s
->objaddr
, OBJADDR_SHM_SEL
| 0);
2955 (void)R_REG(®s
->objaddr
);
2956 W_REG(®s
->objdata
, w
);
2958 /* clear CFPStart */
2959 W_REG(®s
->tsf_cfpstart
, 0);
2961 w
= R_REG(®s
->maccontrol
);
2962 if ((w
!= (MCTL_IHR_EN
| MCTL_WAKE
)) &&
2963 (w
!= (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
))) {
2964 wiphy_err(wiphy
, "wl%d: validate_chip_access: maccontrol = "
2965 "0x%x, expected 0x%x or 0x%x\n", wlc_hw
->unit
, w
,
2966 (MCTL_IHR_EN
| MCTL_WAKE
),
2967 (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
));
2974 #define PHYPLL_WAIT_US 100000
2976 void brcms_b_core_phypll_ctl(struct brcms_hardware
*wlc_hw
, bool on
)
2978 struct d11regs __iomem
*regs
;
2981 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2984 regs
= wlc_hw
->regs
;
2987 if ((wlc_hw
->sih
->chip
== BCM4313_CHIP_ID
)) {
2988 OR_REG(®s
->clk_ctl_st
,
2989 (CCS_ERSRC_REQ_HT
| CCS_ERSRC_REQ_D11PLL
|
2990 CCS_ERSRC_REQ_PHYPLL
));
2991 SPINWAIT((R_REG(®s
->clk_ctl_st
) &
2992 (CCS_ERSRC_AVAIL_HT
)) != (CCS_ERSRC_AVAIL_HT
),
2995 tmp
= R_REG(®s
->clk_ctl_st
);
2996 if ((tmp
& (CCS_ERSRC_AVAIL_HT
)) !=
2997 (CCS_ERSRC_AVAIL_HT
))
2998 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on PHY"
2999 " PLL failed\n", __func__
);
3001 OR_REG(®s
->clk_ctl_st
,
3002 (CCS_ERSRC_REQ_D11PLL
| CCS_ERSRC_REQ_PHYPLL
));
3003 SPINWAIT((R_REG(®s
->clk_ctl_st
) &
3004 (CCS_ERSRC_AVAIL_D11PLL
|
3005 CCS_ERSRC_AVAIL_PHYPLL
)) !=
3006 (CCS_ERSRC_AVAIL_D11PLL
|
3007 CCS_ERSRC_AVAIL_PHYPLL
), PHYPLL_WAIT_US
);
3009 tmp
= R_REG(®s
->clk_ctl_st
);
3011 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
3013 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
3014 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on "
3015 "PHY PLL failed\n", __func__
);
3019 * Since the PLL may be shared, other cores can still
3020 * be requesting it; so we'll deassert the request but
3021 * not wait for status to comply.
3023 AND_REG(®s
->clk_ctl_st
, ~CCS_ERSRC_REQ_PHYPLL
);
3024 tmp
= R_REG(®s
->clk_ctl_st
);
3028 void brcms_c_coredisable(struct brcms_hardware
*wlc_hw
)
3032 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3034 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
3039 if (wlc_hw
->noreset
)
3043 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
3045 /* turn off analog core */
3046 wlc_phy_anacore(wlc_hw
->band
->pi
, OFF
);
3048 /* turn off PHYPLL to save power */
3049 brcms_b_core_phypll_ctl(wlc_hw
, false);
3051 wlc_hw
->clk
= false;
3052 ai_core_disable(wlc_hw
->sih
, 0);
3053 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
3056 static void brcms_c_flushqueues(struct brcms_c_info
*wlc
)
3058 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
3061 /* free any posted tx packets */
3062 for (i
= 0; i
< NFIFO
; i
++)
3063 if (wlc_hw
->di
[i
]) {
3064 dma_txreclaim(wlc_hw
->di
[i
], DMA_RANGE_ALL
);
3065 wlc
->core
->txpktpend
[i
] = 0;
3066 BCMMSG(wlc
->wiphy
, "pktpend fifo %d clrd\n", i
);
3069 /* free any posted rx packets */
3070 dma_rxreclaim(wlc_hw
->di
[RX_FIFO
]);
3074 brcms_b_read_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u32 sel
)
3076 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
3077 u16 __iomem
*objdata_lo
= (u16 __iomem
*)®s
->objdata
;
3078 u16 __iomem
*objdata_hi
= objdata_lo
+ 1;
3081 W_REG(®s
->objaddr
, sel
| (offset
>> 2));
3082 (void)R_REG(®s
->objaddr
);
3084 v
= R_REG(objdata_hi
);
3086 v
= R_REG(objdata_lo
);
3092 brcms_b_write_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
,
3095 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
3096 u16 __iomem
*objdata_lo
= (u16 __iomem
*)®s
->objdata
;
3097 u16 __iomem
*objdata_hi
= objdata_lo
+ 1;
3099 W_REG(®s
->objaddr
, sel
| (offset
>> 2));
3100 (void)R_REG(®s
->objaddr
);
3102 W_REG(objdata_hi
, v
);
3104 W_REG(objdata_lo
, v
);
3108 * Read a single u16 from shared memory.
3109 * SHM 'offset' needs to be an even address
3111 u16
brcms_b_read_shm(struct brcms_hardware
*wlc_hw
, uint offset
)
3113 return brcms_b_read_objmem(wlc_hw
, offset
, OBJADDR_SHM_SEL
);
3117 * Write a single u16 to shared memory.
3118 * SHM 'offset' needs to be an even address
3120 void brcms_b_write_shm(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
)
3122 brcms_b_write_objmem(wlc_hw
, offset
, v
, OBJADDR_SHM_SEL
);
3126 * Copy a buffer to shared memory of specified type .
3127 * SHM 'offset' needs to be an even address and
3128 * Buffer length 'len' must be an even number of bytes
3129 * 'sel' selects the type of memory
3132 brcms_b_copyto_objmem(struct brcms_hardware
*wlc_hw
, uint offset
,
3133 const void *buf
, int len
, u32 sel
)
3136 const u8
*p
= (const u8
*)buf
;
3139 if (len
<= 0 || (offset
& 1) || (len
& 1))
3142 for (i
= 0; i
< len
; i
+= 2) {
3143 v
= p
[i
] | (p
[i
+ 1] << 8);
3144 brcms_b_write_objmem(wlc_hw
, offset
+ i
, v
, sel
);
3149 * Copy a piece of shared memory of specified type to a buffer .
3150 * SHM 'offset' needs to be an even address and
3151 * Buffer length 'len' must be an even number of bytes
3152 * 'sel' selects the type of memory
3155 brcms_b_copyfrom_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, void *buf
,
3162 if (len
<= 0 || (offset
& 1) || (len
& 1))
3165 for (i
= 0; i
< len
; i
+= 2) {
3166 v
= brcms_b_read_objmem(wlc_hw
, offset
+ i
, sel
);
3168 p
[i
+ 1] = (v
>> 8) & 0xFF;
3172 static void brcms_b_copyfrom_vars(struct brcms_hardware
*wlc_hw
, char **buf
,
3175 BCMMSG(wlc_hw
->wlc
->wiphy
, "nvram vars totlen=%d\n",
3178 *buf
= wlc_hw
->vars
;
3179 *len
= wlc_hw
->vars_size
;
3182 static void brcms_b_retrylimit_upd(struct brcms_hardware
*wlc_hw
,
3188 /* write retry limit to SCR, shouldn't need to suspend */
3190 W_REG(&wlc_hw
->regs
->objaddr
,
3191 OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
3192 (void)R_REG(&wlc_hw
->regs
->objaddr
);
3193 W_REG(&wlc_hw
->regs
->objdata
, wlc_hw
->SRL
);
3194 W_REG(&wlc_hw
->regs
->objaddr
,
3195 OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3196 (void)R_REG(&wlc_hw
->regs
->objaddr
);
3197 W_REG(&wlc_hw
->regs
->objdata
, wlc_hw
->LRL
);
3201 static void brcms_b_pllreq(struct brcms_hardware
*wlc_hw
, bool set
, u32 req_bit
)
3204 if (mboolisset(wlc_hw
->pllreq
, req_bit
))
3207 mboolset(wlc_hw
->pllreq
, req_bit
);
3209 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3211 brcms_b_xtal(wlc_hw
, ON
);
3214 if (!mboolisset(wlc_hw
->pllreq
, req_bit
))
3217 mboolclr(wlc_hw
->pllreq
, req_bit
);
3219 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3221 brcms_b_xtal(wlc_hw
, OFF
);
3226 static void brcms_b_antsel_set(struct brcms_hardware
*wlc_hw
, u32 antsel_avail
)
3228 wlc_hw
->antsel_avail
= antsel_avail
;
3232 * conditions under which the PM bit should be set in outgoing frames
3233 * and STAY_AWAKE is meaningful
3235 bool brcms_c_ps_allowed(struct brcms_c_info
*wlc
)
3237 struct brcms_bss_cfg
*cfg
= wlc
->bsscfg
;
3239 /* disallow PS when one of the following global conditions meets */
3240 if (!wlc
->pub
->associated
)
3243 /* disallow PS when one of these meets when not scanning */
3247 if (cfg
->associated
) {
3249 * disallow PS when one of the following
3250 * bsscfg specific conditions meets
3261 static void brcms_b_reset(struct brcms_hardware
*wlc_hw
)
3263 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3265 /* reset the core */
3266 if (!brcms_deviceremoved(wlc_hw
->wlc
))
3267 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
3269 /* purge the dma rings */
3270 brcms_c_flushqueues(wlc_hw
->wlc
);
3273 void brcms_c_reset(struct brcms_c_info
*wlc
)
3275 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3277 /* slurp up hw mac counters before core reset */
3278 brcms_c_statsupd(wlc
);
3280 /* reset our snapshot of macstat counters */
3281 memset((char *)wlc
->core
->macstat_snapshot
, 0,
3282 sizeof(struct macstat
));
3284 brcms_b_reset(wlc
->hw
);
3287 void brcms_c_fatal_error(struct brcms_c_info
*wlc
)
3289 wiphy_err(wlc
->wiphy
, "wl%d: fatal error, reinitializing\n",
3291 brcms_init(wlc
->wl
);
3294 /* Return the channel the driver should initialize during brcms_c_init.
3295 * the channel may have to be changed from the currently configured channel
3296 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3297 * invalid channel for current country, etc.)
3299 static u16
brcms_c_init_chanspec(struct brcms_c_info
*wlc
)
3302 1 | WL_CHANSPEC_BW_20
| WL_CHANSPEC_CTL_SB_NONE
|
3303 WL_CHANSPEC_BAND_2G
;
3308 void brcms_c_init_scb(struct scb
*scb
)
3312 memset(scb
, 0, sizeof(struct scb
));
3313 scb
->flags
= SCB_WMECAP
| SCB_HTCAP
;
3314 for (i
= 0; i
< NUMPRIO
; i
++) {
3316 scb
->seqctl
[i
] = 0xFFFF;
3319 scb
->seqctl_nonqos
= 0xFFFF;
3320 scb
->magic
= SCB_MAGIC
;
3325 * download ucode/PCM
3326 * let ucode run to suspended
3327 * download ucode inits
3328 * config other core registers
3331 static void brcms_b_coreinit(struct brcms_c_info
*wlc
)
3333 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
3334 struct d11regs __iomem
*regs
;
3338 bool fifosz_fixup
= false;
3341 struct wiphy
*wiphy
= wlc
->wiphy
;
3342 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
3344 regs
= wlc_hw
->regs
;
3346 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3349 brcms_b_mctrl(wlc_hw
, ~0, (MCTL_IHR_EN
| MCTL_PSM_JMP_0
| MCTL_WAKE
));
3351 brcms_ucode_download(wlc_hw
);
3353 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3355 fifosz_fixup
= true;
3357 /* let the PSM run to the suspended state, set mode to BSS STA */
3358 W_REG(®s
->macintstatus
, -1);
3359 brcms_b_mctrl(wlc_hw
, ~0,
3360 (MCTL_IHR_EN
| MCTL_INFRA
| MCTL_PSM_RUN
| MCTL_WAKE
));
3362 /* wait for ucode to self-suspend after auto-init */
3363 SPINWAIT(((R_REG(®s
->macintstatus
) & MI_MACSSPNDD
) == 0),
3365 if ((R_REG(®s
->macintstatus
) & MI_MACSSPNDD
) == 0)
3366 wiphy_err(wiphy
, "wl%d: wlc_coreinit: ucode did not self-"
3367 "suspend!\n", wlc_hw
->unit
);
3369 brcms_c_gpio_init(wlc
);
3371 sflags
= ai_core_sflags(wlc_hw
->sih
, 0, 0);
3373 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
3374 if (BRCMS_ISNPHY(wlc_hw
->band
))
3375 brcms_c_write_inits(wlc_hw
, ucode
->d11n0initvals16
);
3377 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3378 " %d\n", __func__
, wlc_hw
->unit
,
3380 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
3381 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
3382 brcms_c_write_inits(wlc_hw
, ucode
->d11lcn0initvals24
);
3384 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3385 " %d\n", __func__
, wlc_hw
->unit
,
3388 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
3389 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
3392 /* For old ucode, txfifo sizes needs to be modified(increased) */
3393 if (fifosz_fixup
== true)
3394 brcms_b_corerev_fifofixup(wlc_hw
);
3396 /* check txfifo allocations match between ucode and driver */
3397 buf
[TX_AC_BE_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE0
);
3398 if (buf
[TX_AC_BE_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]) {
3402 buf
[TX_AC_VI_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE1
);
3403 if (buf
[TX_AC_VI_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]) {
3407 buf
[TX_AC_BK_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE2
);
3408 buf
[TX_AC_VO_FIFO
] = (buf
[TX_AC_BK_FIFO
] >> 8) & 0xff;
3409 buf
[TX_AC_BK_FIFO
] &= 0xff;
3410 if (buf
[TX_AC_BK_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BK_FIFO
]) {
3414 if (buf
[TX_AC_VO_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
]) {
3418 buf
[TX_BCMC_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE3
);
3419 buf
[TX_ATIM_FIFO
] = (buf
[TX_BCMC_FIFO
] >> 8) & 0xff;
3420 buf
[TX_BCMC_FIFO
] &= 0xff;
3421 if (buf
[TX_BCMC_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_BCMC_FIFO
]) {
3425 if (buf
[TX_ATIM_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
]) {
3430 wiphy_err(wiphy
, "wlc_coreinit: txfifo mismatch: ucode size %d"
3431 " driver size %d index %d\n", buf
[i
],
3432 wlc_hw
->xmtfifo_sz
[i
], i
);
3434 /* make sure we can still talk to the mac */
3435 WARN_ON(R_REG(®s
->maccontrol
) == 0xffffffff);
3437 /* band-specific inits done by wlc_bsinit() */
3439 /* Set up frame burst size and antenna swap threshold init values */
3440 brcms_b_write_shm(wlc_hw
, M_MBURST_SIZE
, MAXTXFRAMEBURST
);
3441 brcms_b_write_shm(wlc_hw
, M_MAX_ANTCNT
, ANTCNT
);
3443 /* enable one rx interrupt per received frame */
3444 W_REG(®s
->intrcvlazy
[0], (1 << IRL_FC_SHIFT
));
3446 /* set the station mode (BSS STA) */
3447 brcms_b_mctrl(wlc_hw
,
3448 (MCTL_INFRA
| MCTL_DISCARD_PMQ
| MCTL_AP
),
3449 (MCTL_INFRA
| MCTL_DISCARD_PMQ
));
3451 /* set up Beacon interval */
3452 bcnint_us
= 0x8000 << 10;
3453 W_REG(®s
->tsf_cfprep
, (bcnint_us
<< CFPREP_CBI_SHIFT
));
3454 W_REG(®s
->tsf_cfpstart
, bcnint_us
);
3455 W_REG(®s
->macintstatus
, MI_GP1
);
3457 /* write interrupt mask */
3458 W_REG(®s
->intctrlregs
[RX_FIFO
].intmask
, DEF_RXINTMASK
);
3460 /* allow the MAC to control the PHY clock (dynamic on/off) */
3461 brcms_b_macphyclk_set(wlc_hw
, ON
);
3463 /* program dynamic clock control fast powerup delay register */
3464 wlc
->fastpwrup_dly
= ai_clkctl_fast_pwrup_delay(wlc_hw
->sih
);
3465 W_REG(®s
->scc_fastpwrup_dly
, wlc
->fastpwrup_dly
);
3467 /* tell the ucode the corerev */
3468 brcms_b_write_shm(wlc_hw
, M_MACHW_VER
, (u16
) wlc_hw
->corerev
);
3470 /* tell the ucode MAC capabilities */
3471 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_L
,
3472 (u16
) (wlc_hw
->machwcap
& 0xffff));
3473 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_H
,
3475 machwcap
>> 16) & 0xffff));
3477 /* write retry limits to SCR, this done after PSM init */
3478 W_REG(®s
->objaddr
, OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
3479 (void)R_REG(®s
->objaddr
);
3480 W_REG(®s
->objdata
, wlc_hw
->SRL
);
3481 W_REG(®s
->objaddr
, OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3482 (void)R_REG(®s
->objaddr
);
3483 W_REG(®s
->objdata
, wlc_hw
->LRL
);
3485 /* write rate fallback retry limits */
3486 brcms_b_write_shm(wlc_hw
, M_SFRMTXCNTFBRTHSD
, wlc_hw
->SFBL
);
3487 brcms_b_write_shm(wlc_hw
, M_LFRMTXCNTFBRTHSD
, wlc_hw
->LFBL
);
3489 AND_REG(®s
->ifs_ctl
, 0x0FFF);
3490 W_REG(®s
->ifs_aifsn
, EDCF_AIFSN_MIN
);
3492 /* init the tx dma engines */
3493 for (i
= 0; i
< NFIFO
; i
++) {
3495 dma_txinit(wlc_hw
->di
[i
]);
3498 /* init the rx dma engine(s) and post receive buffers */
3499 dma_rxinit(wlc_hw
->di
[RX_FIFO
]);
3500 dma_rxfill(wlc_hw
->di
[RX_FIFO
]);
3504 static brcms_b_init(struct brcms_hardware
*wlc_hw
, u16 chanspec
,
3508 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
3510 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3512 /* request FAST clock if not on */
3513 fastclk
= wlc_hw
->forcefastclk
;
3515 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
3517 /* disable interrupts */
3518 macintmask
= brcms_intrsoff(wlc
->wl
);
3520 /* set up the specified band and chanspec */
3521 brcms_c_setxband(wlc_hw
, chspec_bandunit(chanspec
));
3522 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
3524 /* do one-time phy inits and calibration */
3525 wlc_phy_cal_init(wlc_hw
->band
->pi
);
3527 /* core-specific initialization */
3528 brcms_b_coreinit(wlc
);
3530 /* suspend the tx fifos and mute the phy for preism cac time */
3532 brcms_b_mute(wlc_hw
, ON
, PHY_MUTE_FOR_PREISM
);
3534 /* band-specific inits */
3535 brcms_b_bsinit(wlc
, chanspec
);
3537 /* restore macintmask */
3538 brcms_intrsrestore(wlc
->wl
, macintmask
);
3540 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3541 * is suspended and brcms_c_enable_mac() will clear this override bit.
3543 mboolset(wlc_hw
->wake_override
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
3546 * initialize mac_suspend_depth to 1 to match ucode
3547 * initial suspended state
3549 wlc_hw
->mac_suspend_depth
= 1;
3551 /* restore the clk */
3553 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
3556 static void brcms_c_set_phy_chanspec(struct brcms_c_info
*wlc
,
3559 /* Save our copy of the chanspec */
3560 wlc
->chanspec
= chanspec
;
3562 /* Set the chanspec and power limits for this locale */
3563 brcms_c_channel_set_chanspec(wlc
->cmi
, chanspec
, BRCMS_TXPWR_MAX
);
3565 if (wlc
->stf
->ss_algosel_auto
)
3566 brcms_c_stf_ss_algo_channel_get(wlc
, &wlc
->stf
->ss_algo_channel
,
3569 brcms_c_stf_ss_update(wlc
, wlc
->band
);
3573 static void brcms_c_bandinit_ordered(struct brcms_c_info
*wlc
,
3576 struct brcms_c_rateset default_rateset
;
3578 uint i
, band_order
[2];
3580 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3582 * We might have been bandlocked during down and the chip
3583 * power-cycled (hibernate). Figure out the right band to park on
3585 if (wlc
->bandlocked
|| wlc
->pub
->_nbands
== 1) {
3586 /* updated in brcms_c_bandlock() */
3587 parkband
= wlc
->band
->bandunit
;
3588 band_order
[0] = band_order
[1] = parkband
;
3590 /* park on the band of the specified chanspec */
3591 parkband
= chspec_bandunit(chanspec
);
3593 /* order so that parkband initialize last */
3594 band_order
[0] = parkband
^ 1;
3595 band_order
[1] = parkband
;
3598 /* make each band operational, software state init */
3599 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
3600 uint j
= band_order
[i
];
3602 wlc
->band
= wlc
->bandstate
[j
];
3604 brcms_default_rateset(wlc
, &default_rateset
);
3606 /* fill in hw_rate */
3607 brcms_c_rateset_filter(&default_rateset
, &wlc
->band
->hw_rateset
,
3608 false, BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
3609 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
3611 /* init basic rate lookup */
3612 brcms_c_rate_lookup_init(wlc
, &default_rateset
);
3615 /* sync up phy/radio chanspec */
3616 brcms_c_set_phy_chanspec(wlc
, chanspec
);
3620 * ucode, hwmac update
3621 * Channel dependent updates for ucode and hw
3623 static void brcms_c_ucode_mac_upd(struct brcms_c_info
*wlc
)
3625 /* enable or disable any active IBSSs depending on whether or not
3626 * we are on the home channel
3628 if (wlc
->home_chanspec
== wlc_phy_chanspec_get(wlc
->band
->pi
)) {
3629 if (wlc
->pub
->associated
) {
3631 * BMAC_NOTE: This is something that should be fixed
3632 * in ucode inits. I think that the ucode inits set
3633 * up the bcn templates and shm values with a bogus
3634 * beacon. This should not be done in the inits. If
3635 * ucode needs to set up a beacon for testing, the
3636 * test routines should write it down, not expect the
3637 * inits to populate a bogus beacon.
3639 if (BRCMS_PHY_11N_CAP(wlc
->band
))
3640 brcms_b_write_shm(wlc
->hw
,
3641 M_BCN_TXTSF_OFFSET
, 0);
3644 /* disable an active IBSS if we are not on the home channel */
3647 /* update the various promisc bits */
3648 brcms_c_mac_bcn_promisc(wlc
);
3649 brcms_c_mac_promisc(wlc
);
3652 /* band-specific init */
3653 static void brcms_c_bsinit(struct brcms_c_info
*wlc
)
3655 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n",
3656 wlc
->pub
->unit
, wlc
->band
->bandunit
);
3658 /* write ucode ACK/CTS rate table */
3659 brcms_c_set_ratetable(wlc
);
3661 /* update some band specific mac configuration */
3662 brcms_c_ucode_mac_upd(wlc
);
3664 /* init antenna selection */
3665 brcms_c_antsel_init(wlc
->asi
);
3669 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3671 brcms_c_duty_cycle_set(struct brcms_c_info
*wlc
, int duty_cycle
, bool isOFDM
,
3674 int idle_busy_ratio_x_16
= 0;
3676 isOFDM
? M_TX_IDLE_BUSY_RATIO_X_16_OFDM
:
3677 M_TX_IDLE_BUSY_RATIO_X_16_CCK
;
3678 if (duty_cycle
> 100 || duty_cycle
< 0) {
3679 wiphy_err(wlc
->wiphy
, "wl%d: duty cycle value off limit\n",
3684 idle_busy_ratio_x_16
= (100 - duty_cycle
) * 16 / duty_cycle
;
3685 /* Only write to shared memory when wl is up */
3687 brcms_b_write_shm(wlc
->hw
, offset
, (u16
) idle_busy_ratio_x_16
);
3690 wlc
->tx_duty_cycle_ofdm
= (u16
) duty_cycle
;
3692 wlc
->tx_duty_cycle_cck
= (u16
) duty_cycle
;
3698 * Initialize the base precedence map for dequeueing
3699 * from txq based on WME settings
3701 static void brcms_c_tx_prec_map_init(struct brcms_c_info
*wlc
)
3703 wlc
->tx_prec_map
= BRCMS_PREC_BMP_ALL
;
3704 memset(wlc
->fifo2prec_map
, 0, NFIFO
* sizeof(u16
));
3706 wlc
->fifo2prec_map
[TX_AC_BK_FIFO
] = BRCMS_PREC_BMP_AC_BK
;
3707 wlc
->fifo2prec_map
[TX_AC_BE_FIFO
] = BRCMS_PREC_BMP_AC_BE
;
3708 wlc
->fifo2prec_map
[TX_AC_VI_FIFO
] = BRCMS_PREC_BMP_AC_VI
;
3709 wlc
->fifo2prec_map
[TX_AC_VO_FIFO
] = BRCMS_PREC_BMP_AC_VO
;
3713 brcms_c_txflowcontrol_signal(struct brcms_c_info
*wlc
,
3714 struct brcms_txq_info
*qi
, bool on
, int prio
)
3716 /* transmit flowcontrol is not yet implemented */
3719 static void brcms_c_txflowcontrol_reset(struct brcms_c_info
*wlc
)
3721 struct brcms_txq_info
*qi
;
3723 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
) {
3725 brcms_c_txflowcontrol_signal(wlc
, qi
, OFF
, ALLPRIO
);
3731 void brcms_c_init(struct brcms_c_info
*wlc
)
3733 struct d11regs __iomem
*regs
;
3737 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3742 * This will happen if a big-hammer was executed. In
3743 * that case, we want to go back to the channel that
3744 * we were on and not new channel
3746 if (wlc
->pub
->associated
)
3747 chanspec
= wlc
->home_chanspec
;
3749 chanspec
= brcms_c_init_chanspec(wlc
);
3751 brcms_b_init(wlc
->hw
, chanspec
, mute
);
3753 /* update beacon listen interval */
3754 brcms_c_bcn_li_upd(wlc
);
3756 /* write ethernet address to core */
3757 brcms_c_set_mac(wlc
->bsscfg
);
3758 brcms_c_set_bssid(wlc
->bsscfg
);
3760 /* Update tsf_cfprep if associated and up */
3761 if (wlc
->pub
->associated
&& wlc
->bsscfg
->up
) {
3764 /* get beacon period and convert to uS */
3765 bi
= wlc
->bsscfg
->current_bss
->beacon_period
<< 10;
3767 * update since init path would reset
3770 W_REG(®s
->tsf_cfprep
,
3771 (bi
<< CFPREP_CBI_SHIFT
));
3773 /* Update maccontrol PM related bits */
3774 brcms_c_set_ps_ctrl(wlc
);
3777 brcms_c_bandinit_ordered(wlc
, chanspec
);
3779 /* init probe response timeout */
3780 brcms_b_write_shm(wlc
->hw
, M_PRS_MAXTIME
, wlc
->prb_resp_timeout
);
3782 /* init max burst txop (framebursting) */
3783 brcms_b_write_shm(wlc
->hw
, M_MBURST_TXOP
,
3785 _rifs
? (EDCF_AC_VO_TXOP_AP
<< 5) : MAXFRAMEBURST_TXOP
));
3787 /* initialize maximum allowed duty cycle */
3788 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_ofdm
, true, true);
3789 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_cck
, false, true);
3792 * Update some shared memory locations related to
3793 * max AMPDU size allowed to received
3795 brcms_c_ampdu_shm_upd(wlc
->ampdu
);
3797 /* band-specific inits */
3798 brcms_c_bsinit(wlc
);
3800 /* Enable EDCF mode (while the MAC is suspended) */
3801 OR_REG(®s
->ifs_ctl
, IFS_USEEDCF
);
3802 brcms_c_edcf_setparams(wlc
, false);
3804 /* Init precedence maps for empty FIFOs */
3805 brcms_c_tx_prec_map_init(wlc
);
3807 /* read the ucode version if we have not yet done so */
3808 if (wlc
->ucode_rev
== 0) {
3810 brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MAJOR
) << NBITS(u16
);
3811 wlc
->ucode_rev
|= brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MINOR
);
3814 /* ..now really unleash hell (allow the MAC out of suspend) */
3815 brcms_c_enable_mac(wlc
);
3817 /* clear tx flow control */
3818 brcms_c_txflowcontrol_reset(wlc
);
3820 /* enable the RF Disable Delay timer */
3821 W_REG(&wlc
->regs
->rfdisabledly
, RFDISABLE_DEFAULT
);
3823 /* initialize mpc delay */
3824 wlc
->mpc_delay_off
= wlc
->mpc_dlycnt
= BRCMS_MPC_MIN_DELAYCNT
;
3827 * Initialize WME parameters; if they haven't been set by some other
3828 * mechanism (IOVar, etc) then read them from the hardware.
3830 if (GFIELD(wlc
->wme_retries
[0], EDCF_SHORT
) == 0) {
3831 /* Uninitialized; read from HW */
3834 for (ac
= 0; ac
< AC_COUNT
; ac
++)
3835 wlc
->wme_retries
[ac
] =
3836 brcms_b_read_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
));
3840 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info
*wlc
, bool promisc
)
3842 wlc
->bcnmisc_monitor
= promisc
;
3843 brcms_c_mac_bcn_promisc(wlc
);
3846 void brcms_c_mac_bcn_promisc(struct brcms_c_info
*wlc
)
3848 if (wlc
->bcnmisc_monitor
)
3849 brcms_c_mctrl(wlc
, MCTL_BCNS_PROMISC
, MCTL_BCNS_PROMISC
);
3851 brcms_c_mctrl(wlc
, MCTL_BCNS_PROMISC
, 0);
3854 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3855 void brcms_c_mac_promisc(struct brcms_c_info
*wlc
)
3857 u32 promisc_bits
= 0;
3860 * promiscuous mode just sets MCTL_PROMISC
3861 * Note: APs get all BSS traffic without the need to set
3862 * the MCTL_PROMISC bit since all BSS data traffic is
3863 * directed at the AP
3865 if (wlc
->pub
->promisc
)
3866 promisc_bits
|= MCTL_PROMISC
;
3868 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3869 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3870 * handled in brcms_c_mac_bcn_promisc()
3873 promisc_bits
|= MCTL_PROMISC
| MCTL_KEEPCONTROL
;
3875 brcms_c_mctrl(wlc
, MCTL_PROMISC
| MCTL_KEEPCONTROL
, promisc_bits
);
3878 /* push sw hps and wake state through hardware */
3879 void brcms_c_set_ps_ctrl(struct brcms_c_info
*wlc
)
3885 hps
= brcms_c_ps_allowed(wlc
);
3887 BCMMSG(wlc
->wiphy
, "wl%d: hps %d\n", wlc
->pub
->unit
, hps
);
3889 v1
= R_REG(&wlc
->regs
->maccontrol
);
3894 brcms_c_mctrl(wlc
, MCTL_WAKE
| MCTL_HPS
, v2
);
3896 awake_before
= ((v1
& MCTL_WAKE
) || ((v1
& MCTL_HPS
) == 0));
3899 brcms_b_wait_for_wake(wlc
->hw
);
3904 * Write this BSS config's MAC address to core.
3905 * Updates RXE match engine.
3907 int brcms_c_set_mac(struct brcms_bss_cfg
*bsscfg
)
3910 struct brcms_c_info
*wlc
= bsscfg
->wlc
;
3912 /* enter the MAC addr into the RXE match registers */
3913 brcms_c_set_addrmatch(wlc
, RCM_MAC_OFFSET
, bsscfg
->cur_etheraddr
);
3915 brcms_c_ampdu_macaddr_upd(wlc
);
3920 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3921 * Updates RXE match engine.
3923 void brcms_c_set_bssid(struct brcms_bss_cfg
*bsscfg
)
3925 /* we need to update BSSID in RXE match registers */
3926 brcms_c_set_addrmatch(bsscfg
->wlc
, RCM_BSSID_OFFSET
, bsscfg
->BSSID
);
3929 static void brcms_b_set_shortslot(struct brcms_hardware
*wlc_hw
, bool shortslot
)
3931 wlc_hw
->shortslot
= shortslot
;
3933 if (wlc_hw
->band
->bandtype
== BRCM_BAND_2G
&& wlc_hw
->up
) {
3934 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
3935 brcms_b_update_slot_timing(wlc_hw
, shortslot
);
3936 brcms_c_enable_mac(wlc_hw
->wlc
);
3941 * Suspend the the MAC and update the slot timing
3942 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3944 void brcms_c_switch_shortslot(struct brcms_c_info
*wlc
, bool shortslot
)
3946 /* use the override if it is set */
3947 if (wlc
->shortslot_override
!= BRCMS_SHORTSLOT_AUTO
)
3948 shortslot
= (wlc
->shortslot_override
== BRCMS_SHORTSLOT_ON
);
3950 if (wlc
->shortslot
== shortslot
)
3953 wlc
->shortslot
= shortslot
;
3955 brcms_b_set_shortslot(wlc
->hw
, shortslot
);
3958 void brcms_c_set_home_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
3960 if (wlc
->home_chanspec
!= chanspec
) {
3961 wlc
->home_chanspec
= chanspec
;
3963 if (wlc
->bsscfg
->associated
)
3964 wlc
->bsscfg
->current_bss
->chanspec
= chanspec
;
3969 brcms_b_set_chanspec(struct brcms_hardware
*wlc_hw
, u16 chanspec
,
3970 bool mute
, struct txpwr_limits
*txpwr
)
3974 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: 0x%x\n", wlc_hw
->unit
, chanspec
);
3976 wlc_hw
->chanspec
= chanspec
;
3978 /* Switch bands if necessary */
3979 if (wlc_hw
->_nbands
> 1) {
3980 bandunit
= chspec_bandunit(chanspec
);
3981 if (wlc_hw
->band
->bandunit
!= bandunit
) {
3982 /* brcms_b_setband disables other bandunit,
3983 * use light band switch if not up yet
3986 wlc_phy_chanspec_radio_set(wlc_hw
->
3987 bandstate
[bandunit
]->
3989 brcms_b_setband(wlc_hw
, bandunit
, chanspec
);
3991 brcms_c_setxband(wlc_hw
, bandunit
);
3996 wlc_phy_initcal_enable(wlc_hw
->band
->pi
, !mute
);
4000 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
,
4002 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
4004 wlc_phy_chanspec_set(wlc_hw
->band
->pi
, chanspec
);
4005 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
, chanspec
);
4007 /* Update muting of the channel */
4008 brcms_b_mute(wlc_hw
, mute
, 0);
4012 /* switch to and initialize new band */
4013 static void brcms_c_setband(struct brcms_c_info
*wlc
,
4016 wlc
->band
= wlc
->bandstate
[bandunit
];
4021 /* wait for at least one beacon before entering sleeping state */
4022 brcms_c_set_ps_ctrl(wlc
);
4024 /* band-specific initializations */
4025 brcms_c_bsinit(wlc
);
4028 void brcms_c_set_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
4031 bool switchband
= false;
4032 u16 old_chanspec
= wlc
->chanspec
;
4034 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chanspec
)) {
4035 wiphy_err(wlc
->wiphy
, "wl%d: %s: Bad channel %d\n",
4036 wlc
->pub
->unit
, __func__
, CHSPEC_CHANNEL(chanspec
));
4040 /* Switch bands if necessary */
4041 if (wlc
->pub
->_nbands
> 1) {
4042 bandunit
= chspec_bandunit(chanspec
);
4043 if (wlc
->band
->bandunit
!= bandunit
|| wlc
->bandinit_pending
) {
4045 if (wlc
->bandlocked
) {
4046 wiphy_err(wlc
->wiphy
, "wl%d: %s: chspec %d "
4047 "band is locked!\n",
4048 wlc
->pub
->unit
, __func__
,
4049 CHSPEC_CHANNEL(chanspec
));
4053 * should the setband call come after the
4054 * brcms_b_chanspec() ? if the setband updates
4055 * (brcms_c_bsinit) use low level calls to inspect and
4056 * set state, the state inspected may be from the wrong
4057 * band, or the following brcms_b_set_chanspec() may
4060 brcms_c_setband(wlc
, bandunit
);
4064 /* sync up phy/radio chanspec */
4065 brcms_c_set_phy_chanspec(wlc
, chanspec
);
4067 /* init antenna selection */
4068 if (brcms_chspec_bw(old_chanspec
) != brcms_chspec_bw(chanspec
)) {
4069 brcms_c_antsel_init(wlc
->asi
);
4071 /* Fix the hardware rateset based on bw.
4072 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4074 brcms_c_rateset_bw_mcs_filter(&wlc
->band
->hw_rateset
,
4075 wlc
->band
->mimo_cap_40
? brcms_chspec_bw(chanspec
) : 0);
4078 /* update some mac configuration since chanspec changed */
4079 brcms_c_ucode_mac_upd(wlc
);
4082 u32
brcms_c_lowest_basic_rspec(struct brcms_c_info
*wlc
,
4083 struct brcms_c_rateset
*rs
)
4085 u32 lowest_basic_rspec
;
4088 /* Use the lowest basic rate */
4089 lowest_basic_rspec
= rs
->rates
[0] & BRCMS_RATE_MASK
;
4090 for (i
= 0; i
< rs
->count
; i
++) {
4091 if (rs
->rates
[i
] & BRCMS_RATE_FLAG
) {
4092 lowest_basic_rspec
= rs
->rates
[i
] & BRCMS_RATE_MASK
;
4098 * pick siso/cdd as default for OFDM (note no basic
4099 * rate MCSs are supported yet)
4101 if (is_ofdm_rate(lowest_basic_rspec
))
4102 lowest_basic_rspec
|= (wlc
->stf
->ss_opmode
<< RSPEC_STF_SHIFT
);
4104 return lowest_basic_rspec
;
4108 * This function changes the phytxctl for beacon based on current
4109 * beacon ratespec AND txant setting as per this table:
4110 * ratespec CCK ant = wlc->stf->txant
4113 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info
*wlc
,
4117 u16 phytxant
= wlc
->stf
->phytxant
;
4118 u16 mask
= PHY_TXC_ANT_MASK
;
4120 /* for non-siso rates or default setting, use the available chains */
4121 if (BRCMS_PHY_11N_CAP(wlc
->band
))
4122 phytxant
= brcms_c_stf_phytxchain_sel(wlc
, bcn_rspec
);
4124 phyctl
= brcms_b_read_shm(wlc
->hw
, M_BCN_PCTLWD
);
4125 phyctl
= (phyctl
& ~mask
) | phytxant
;
4126 brcms_b_write_shm(wlc
->hw
, M_BCN_PCTLWD
, phyctl
);
4130 * centralized protection config change function to simplify debugging, no
4131 * consistency checking this should be called only on changes to avoid overhead
4132 * in periodic function
4134 void brcms_c_protection_upd(struct brcms_c_info
*wlc
, uint idx
, int val
)
4136 BCMMSG(wlc
->wiphy
, "idx %d, val %d\n", idx
, val
);
4139 case BRCMS_PROT_G_SPEC
:
4140 wlc
->protection
->_g
= (bool) val
;
4142 case BRCMS_PROT_G_OVR
:
4143 wlc
->protection
->g_override
= (s8
) val
;
4145 case BRCMS_PROT_G_USER
:
4146 wlc
->protection
->gmode_user
= (u8
) val
;
4148 case BRCMS_PROT_OVERLAP
:
4149 wlc
->protection
->overlap
= (s8
) val
;
4151 case BRCMS_PROT_N_USER
:
4152 wlc
->protection
->nmode_user
= (s8
) val
;
4154 case BRCMS_PROT_N_CFG
:
4155 wlc
->protection
->n_cfg
= (s8
) val
;
4157 case BRCMS_PROT_N_CFG_OVR
:
4158 wlc
->protection
->n_cfg_override
= (s8
) val
;
4160 case BRCMS_PROT_N_NONGF
:
4161 wlc
->protection
->nongf
= (bool) val
;
4163 case BRCMS_PROT_N_NONGF_OVR
:
4164 wlc
->protection
->nongf_override
= (s8
) val
;
4166 case BRCMS_PROT_N_PAM_OVR
:
4167 wlc
->protection
->n_pam_override
= (s8
) val
;
4169 case BRCMS_PROT_N_OBSS
:
4170 wlc
->protection
->n_obss
= (bool) val
;
4179 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info
*wlc
, int val
)
4182 brcms_c_update_beacon(wlc
);
4183 brcms_c_update_probe_resp(wlc
, true);
4187 static void brcms_c_ht_update_ldpc(struct brcms_c_info
*wlc
, s8 val
)
4189 wlc
->stf
->ldpc
= val
;
4192 brcms_c_update_beacon(wlc
);
4193 brcms_c_update_probe_resp(wlc
, true);
4194 wlc_phy_ldpc_override_set(wlc
->band
->pi
, (val
? true : false));
4198 void brcms_c_wme_setparams(struct brcms_c_info
*wlc
, u16 aci
,
4199 const struct ieee80211_tx_queue_params
*params
,
4203 struct shm_acparams acp_shm
;
4206 /* Only apply params if the core is out of reset and has clocks */
4208 wiphy_err(wlc
->wiphy
, "wl%d: %s : no-clock\n", wlc
->pub
->unit
,
4213 memset((char *)&acp_shm
, 0, sizeof(struct shm_acparams
));
4214 /* fill in shm ac params struct */
4215 acp_shm
.txop
= params
->txop
;
4216 /* convert from units of 32us to us for ucode */
4217 wlc
->edcf_txop
[aci
& 0x3] = acp_shm
.txop
=
4218 EDCF_TXOP2USEC(acp_shm
.txop
);
4219 acp_shm
.aifs
= (params
->aifs
& EDCF_AIFSN_MASK
);
4221 if (aci
== AC_VI
&& acp_shm
.txop
== 0
4222 && acp_shm
.aifs
< EDCF_AIFSN_MAX
)
4225 if (acp_shm
.aifs
< EDCF_AIFSN_MIN
4226 || acp_shm
.aifs
> EDCF_AIFSN_MAX
) {
4227 wiphy_err(wlc
->wiphy
, "wl%d: edcf_setparams: bad "
4228 "aifs %d\n", wlc
->pub
->unit
, acp_shm
.aifs
);
4230 acp_shm
.cwmin
= params
->cw_min
;
4231 acp_shm
.cwmax
= params
->cw_max
;
4232 acp_shm
.cwcur
= acp_shm
.cwmin
;
4234 R_REG(&wlc
->regs
->tsf_random
) & acp_shm
.cwcur
;
4235 acp_shm
.reggap
= acp_shm
.bslots
+ acp_shm
.aifs
;
4236 /* Indicate the new params to the ucode */
4237 acp_shm
.status
= brcms_b_read_shm(wlc
->hw
, (M_EDCF_QINFO
+
4240 M_EDCF_STATUS_OFF
));
4241 acp_shm
.status
|= WME_STATUS_NEWAC
;
4243 /* Fill in shm acparam table */
4244 shm_entry
= (u16
*) &acp_shm
;
4245 for (i
= 0; i
< (int)sizeof(struct shm_acparams
); i
+= 2)
4246 brcms_b_write_shm(wlc
->hw
,
4248 wme_ac2fifo
[aci
] * M_EDCF_QLEN
+ i
,
4253 brcms_c_suspend_mac_and_wait(wlc
);
4256 brcms_c_enable_mac(wlc
);
4260 void brcms_c_edcf_setparams(struct brcms_c_info
*wlc
, bool suspend
)
4264 struct ieee80211_tx_queue_params txq_pars
;
4265 static const struct edcf_acparam default_edcf_acparams
[] = {
4266 {EDCF_AC_BE_ACI_STA
, EDCF_AC_BE_ECW_STA
, EDCF_AC_BE_TXOP_STA
},
4267 {EDCF_AC_BK_ACI_STA
, EDCF_AC_BK_ECW_STA
, EDCF_AC_BK_TXOP_STA
},
4268 {EDCF_AC_VI_ACI_STA
, EDCF_AC_VI_ECW_STA
, EDCF_AC_VI_TXOP_STA
},
4269 {EDCF_AC_VO_ACI_STA
, EDCF_AC_VO_ECW_STA
, EDCF_AC_VO_TXOP_STA
}
4270 }; /* ucode needs these parameters during its initialization */
4271 const struct edcf_acparam
*edcf_acp
= &default_edcf_acparams
[0];
4273 for (i_ac
= 0; i_ac
< AC_COUNT
; i_ac
++, edcf_acp
++) {
4274 /* find out which ac this set of params applies to */
4275 aci
= (edcf_acp
->ACI
& EDCF_ACI_MASK
) >> EDCF_ACI_SHIFT
;
4277 /* fill in shm ac params struct */
4278 txq_pars
.txop
= edcf_acp
->TXOP
;
4279 txq_pars
.aifs
= edcf_acp
->ACI
;
4281 /* CWmin = 2^(ECWmin) - 1 */
4282 txq_pars
.cw_min
= EDCF_ECW2CW(edcf_acp
->ECW
& EDCF_ECWMIN_MASK
);
4283 /* CWmax = 2^(ECWmax) - 1 */
4284 txq_pars
.cw_max
= EDCF_ECW2CW((edcf_acp
->ECW
& EDCF_ECWMAX_MASK
)
4285 >> EDCF_ECWMAX_SHIFT
);
4286 brcms_c_wme_setparams(wlc
, aci
, &txq_pars
, suspend
);
4290 brcms_c_suspend_mac_and_wait(wlc
);
4293 brcms_c_enable_mac(wlc
);
4297 /* maintain LED behavior in down state */
4298 static void brcms_c_down_led_upd(struct brcms_c_info
*wlc
)
4301 * maintain LEDs while in down state, turn on sbclk if
4302 * not available yet. Turn on sbclk if necessary
4304 brcms_c_pllreq(wlc
, true, BRCMS_PLLREQ_FLIP
);
4305 brcms_c_pllreq(wlc
, false, BRCMS_PLLREQ_FLIP
);
4308 static void brcms_c_radio_monitor_start(struct brcms_c_info
*wlc
)
4310 /* Don't start the timer if HWRADIO feature is disabled */
4311 if (wlc
->radio_monitor
)
4314 wlc
->radio_monitor
= true;
4315 brcms_c_pllreq(wlc
, true, BRCMS_PLLREQ_RADIO_MON
);
4316 brcms_add_timer(wlc
->wl
, wlc
->radio_timer
, TIMER_INTERVAL_RADIOCHK
,
4320 void brcms_c_radio_disable(struct brcms_c_info
*wlc
)
4322 if (!wlc
->pub
->up
) {
4323 brcms_c_down_led_upd(wlc
);
4327 brcms_c_radio_monitor_start(wlc
);
4328 brcms_down(wlc
->wl
);
4331 static void brcms_c_radio_enable(struct brcms_c_info
*wlc
)
4336 if (brcms_deviceremoved(wlc
))
4342 bool brcms_c_radio_monitor_stop(struct brcms_c_info
*wlc
)
4344 if (!wlc
->radio_monitor
)
4347 wlc
->radio_monitor
= false;
4348 brcms_c_pllreq(wlc
, false, BRCMS_PLLREQ_RADIO_MON
);
4349 return brcms_del_timer(wlc
->wl
, wlc
->radio_timer
);
4352 /* read hwdisable state and propagate to wlc flag */
4353 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info
*wlc
)
4355 if (wlc
->pub
->hw_off
)
4358 if (brcms_b_radio_read_hwdisabled(wlc
->hw
))
4359 mboolset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4361 mboolclr(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4365 * centralized radio disable/enable function,
4366 * invoke radio enable/disable after updating hwradio status
4368 static void brcms_c_radio_upd(struct brcms_c_info
*wlc
)
4370 if (wlc
->pub
->radio_disabled
)
4371 brcms_c_radio_disable(wlc
);
4373 brcms_c_radio_enable(wlc
);
4376 /* update hwradio status and return it */
4377 bool brcms_c_check_radio_disabled(struct brcms_c_info
*wlc
)
4379 brcms_c_radio_hwdisable_upd(wlc
);
4381 return mboolisset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
) ?
4385 /* periodical query hw radio button while driver is "down" */
4386 static void brcms_c_radio_timer(void *arg
)
4388 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4390 if (brcms_deviceremoved(wlc
)) {
4391 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4393 brcms_down(wlc
->wl
);
4397 /* cap mpc off count */
4398 if (wlc
->mpc_offcnt
< BRCMS_MPC_MAX_DELAYCNT
)
4401 brcms_c_radio_hwdisable_upd(wlc
);
4402 brcms_c_radio_upd(wlc
);
4405 /* common low-level watchdog code */
4406 static void brcms_b_watchdog(void *arg
)
4408 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4409 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
4411 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
4416 /* increment second count */
4419 /* Check for FIFO error interrupts */
4420 brcms_b_fifoerrors(wlc_hw
);
4422 /* make sure RX dma has buffers */
4423 dma_rxfill(wlc
->hw
->di
[RX_FIFO
]);
4425 wlc_phy_watchdog(wlc_hw
->band
->pi
);
4428 /* common watchdog code */
4429 static void brcms_c_watchdog(void *arg
)
4431 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4433 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
4438 if (brcms_deviceremoved(wlc
)) {
4439 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4441 brcms_down(wlc
->wl
);
4445 /* increment second count */
4448 /* delay radio disable */
4449 if (wlc
->mpc_delay_off
) {
4450 if (--wlc
->mpc_delay_off
== 0) {
4451 mboolset(wlc
->pub
->radio_disabled
,
4452 WL_RADIO_MPC_DISABLE
);
4453 if (wlc
->mpc
&& brcms_c_ismpc(wlc
))
4454 wlc
->mpc_offcnt
= 0;
4459 brcms_c_radio_mpc_upd(wlc
);
4460 /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4461 brcms_c_radio_hwdisable_upd(wlc
);
4462 brcms_c_radio_upd(wlc
);
4463 /* if radio is disable, driver may be down, quit here */
4464 if (wlc
->pub
->radio_disabled
)
4467 brcms_b_watchdog(wlc
);
4470 * occasionally sample mac stat counters to
4471 * detect 16-bit counter wrap
4473 if ((wlc
->pub
->now
% SW_TIMER_MAC_STAT_UPD
) == 0)
4474 brcms_c_statsupd(wlc
);
4476 if (BRCMS_ISNPHY(wlc
->band
) &&
4477 ((wlc
->pub
->now
- wlc
->tempsense_lasttime
) >=
4478 BRCMS_TEMPSENSE_PERIOD
)) {
4479 wlc
->tempsense_lasttime
= wlc
->pub
->now
;
4480 brcms_c_tempsense_upd(wlc
);
4484 static void brcms_c_watchdog_by_timer(void *arg
)
4486 brcms_c_watchdog(arg
);
4489 bool brcms_c_timers_init(struct brcms_c_info
*wlc
, int unit
)
4491 wlc
->wdtimer
= brcms_init_timer(wlc
->wl
, brcms_c_watchdog_by_timer
,
4493 if (!wlc
->wdtimer
) {
4494 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for wdtimer "
4499 wlc
->radio_timer
= brcms_init_timer(wlc
->wl
, brcms_c_radio_timer
,
4501 if (!wlc
->radio_timer
) {
4502 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for radio_timer "
4514 * Initialize brcms_c_info default values ...
4515 * may get overrides later in this function
4517 void brcms_c_info_init(struct brcms_c_info
*wlc
, int unit
)
4521 /* Save our copy of the chanspec */
4522 wlc
->chanspec
= ch20mhz_chspec(1);
4524 /* various 802.11g modes */
4525 wlc
->shortslot
= false;
4526 wlc
->shortslot_override
= BRCMS_SHORTSLOT_AUTO
;
4528 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_OVR
, BRCMS_PROTECTION_AUTO
);
4529 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_SPEC
, false);
4531 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG_OVR
,
4532 BRCMS_PROTECTION_AUTO
);
4533 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG
, BRCMS_N_PROTECTION_OFF
);
4534 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF_OVR
,
4535 BRCMS_PROTECTION_AUTO
);
4536 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF
, false);
4537 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
, AUTO
);
4539 brcms_c_protection_upd(wlc
, BRCMS_PROT_OVERLAP
,
4540 BRCMS_PROTECTION_CTL_OVERLAP
);
4542 /* 802.11g draft 4.0 NonERP elt advertisement */
4543 wlc
->include_legacy_erp
= true;
4545 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_DEF
;
4546 wlc
->stf
->txant
= ANT_TX_DEF
;
4548 wlc
->prb_resp_timeout
= BRCMS_PRB_RESP_TIMEOUT
;
4550 wlc
->usr_fragthresh
= DOT11_DEFAULT_FRAG_LEN
;
4551 for (i
= 0; i
< NFIFO
; i
++)
4552 wlc
->fragthresh
[i
] = DOT11_DEFAULT_FRAG_LEN
;
4553 wlc
->RTSThresh
= DOT11_DEFAULT_RTS_LEN
;
4555 /* default rate fallback retry limits */
4556 wlc
->SFBL
= RETRY_SHORT_FB
;
4557 wlc
->LFBL
= RETRY_LONG_FB
;
4559 /* default mac retry limits */
4560 wlc
->SRL
= RETRY_SHORT_DEF
;
4561 wlc
->LRL
= RETRY_LONG_DEF
;
4563 /* WME QoS mode is Auto by default */
4564 wlc
->pub
->_ampdu
= AMPDU_AGG_HOST
;
4565 wlc
->pub
->bcmerror
= 0;
4567 /* initialize mpc delay */
4568 wlc
->mpc_delay_off
= wlc
->mpc_dlycnt
= BRCMS_MPC_MIN_DELAYCNT
;
4571 static bool brcms_c_state_bmac_sync(struct brcms_c_info
*wlc
)
4573 struct brcms_b_state state_bmac
= {0};
4575 if (brcms_b_state_get(wlc
->hw
, &state_bmac
) != 0)
4578 wlc
->machwcap
= state_bmac
.machwcap
;
4579 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
,
4580 (s8
) state_bmac
.preamble_ovr
);
4585 static uint
brcms_c_attach_module(struct brcms_c_info
*wlc
)
4589 unit
= wlc
->pub
->unit
;
4591 wlc
->asi
= brcms_c_antsel_attach(wlc
);
4592 if (wlc
->asi
== NULL
) {
4593 wiphy_err(wlc
->wiphy
, "wl%d: attach: antsel_attach "
4599 wlc
->ampdu
= brcms_c_ampdu_attach(wlc
);
4600 if (wlc
->ampdu
== NULL
) {
4601 wiphy_err(wlc
->wiphy
, "wl%d: attach: ampdu_attach "
4607 if ((brcms_c_stf_attach(wlc
) != 0)) {
4608 wiphy_err(wlc
->wiphy
, "wl%d: attach: stf_attach "
4617 struct brcms_pub
*brcms_c_pub(struct brcms_c_info
*wlc
)
4623 * run backplane attach, init nvram
4625 * initialize software state for each core and band
4626 * put the whole chip in reset(driver down state), no clock
4628 static int brcms_b_attach(struct brcms_c_info
*wlc
, u16 vendor
, u16 device
,
4629 uint unit
, bool piomode
, void __iomem
*regsva
,
4630 struct pci_dev
*btparam
)
4632 struct brcms_hardware
*wlc_hw
;
4633 struct d11regs __iomem
*regs
;
4634 char *macaddr
= NULL
;
4639 struct shared_phy_params sha_params
;
4640 struct wiphy
*wiphy
= wlc
->wiphy
;
4644 BCMMSG(wlc
->wiphy
, "wl%d: vendor 0x%x device 0x%x\n", unit
, vendor
,
4651 wlc_hw
->unit
= unit
;
4652 wlc_hw
->band
= wlc_hw
->bandstate
[0];
4653 wlc_hw
->_piomode
= piomode
;
4655 /* populate struct brcms_hardware with default values */
4656 brcms_b_info_init(wlc_hw
);
4659 * Do the hardware portion of the attach. Also initialize software
4660 * state that depends on the particular hardware we are running.
4662 wlc_hw
->sih
= ai_attach(regsva
, btparam
,
4663 &wlc_hw
->vars
, &wlc_hw
->vars_size
);
4664 if (wlc_hw
->sih
== NULL
) {
4665 wiphy_err(wiphy
, "wl%d: brcms_b_attach: si_attach failed\n",
4670 vars
= wlc_hw
->vars
;
4673 * Get vendid/devid nvram overwrites, which could be different
4674 * than those the BIOS recognizes for devices on PCMCIA_BUS,
4675 * SDIO_BUS, and SROMless devices on PCI_BUS.
4677 var
= getvar(vars
, "vendid");
4678 if (var
&& !kstrtoul(var
, 0, &res
)) {
4680 wiphy_err(wiphy
, "Overriding vendor id = 0x%x\n",
4683 var
= getvar(vars
, "devid");
4684 if (var
&& !kstrtoul(var
, 0, &res
)) {
4685 u16 devid
= (u16
)res
;
4686 if (devid
!= 0xffff) {
4688 wiphy_err(wiphy
, "Overriding device id = 0x%x"
4693 /* verify again the device is supported */
4694 if (!brcms_c_chipmatch(vendor
, device
)) {
4695 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported "
4696 "vendor/device (0x%x/0x%x)\n",
4697 unit
, vendor
, device
);
4702 wlc_hw
->vendorid
= vendor
;
4703 wlc_hw
->deviceid
= device
;
4705 /* set bar0 window to point at D11 core */
4706 wlc_hw
->regs
= (struct d11regs __iomem
*)
4707 ai_setcore(wlc_hw
->sih
, D11_CORE_ID
, 0);
4708 wlc_hw
->corerev
= ai_corerev(wlc_hw
->sih
);
4710 regs
= wlc_hw
->regs
;
4712 wlc
->regs
= wlc_hw
->regs
;
4714 /* validate chip, chiprev and corerev */
4715 if (!brcms_c_isgoodchip(wlc_hw
)) {
4720 /* initialize power control registers */
4721 ai_clkctl_init(wlc_hw
->sih
);
4723 /* request fastclock and force fastclock for the rest of attach
4724 * bring the d11 core out of reset.
4725 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4726 * is still false; But it will be called again inside wlc_corereset,
4727 * after d11 is out of reset.
4729 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
4730 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
4732 if (!brcms_b_validate_chip_access(wlc_hw
)) {
4733 wiphy_err(wiphy
, "wl%d: brcms_b_attach: validate_chip_access "
4739 /* get the board rev, used just below */
4740 j
= getintvar(vars
, "boardrev");
4741 /* promote srom boardrev of 0xFF to 1 */
4742 if (j
== BOARDREV_PROMOTABLE
)
4743 j
= BOARDREV_PROMOTED
;
4744 wlc_hw
->boardrev
= (u16
) j
;
4745 if (!brcms_c_validboardtype(wlc_hw
)) {
4746 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported Broadcom "
4747 "board type (0x%x)" " or revision level (0x%x)\n",
4748 unit
, wlc_hw
->sih
->boardtype
, wlc_hw
->boardrev
);
4752 wlc_hw
->sromrev
= (u8
) getintvar(vars
, "sromrev");
4753 wlc_hw
->boardflags
= (u32
) getintvar(vars
, "boardflags");
4754 wlc_hw
->boardflags2
= (u32
) getintvar(vars
, "boardflags2");
4756 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
4757 brcms_b_pllreq(wlc_hw
, true, BRCMS_PLLREQ_SHARED
);
4759 /* check device id(srom, nvram etc.) to set bands */
4760 if (wlc_hw
->deviceid
== BCM43224_D11N_ID
||
4761 wlc_hw
->deviceid
== BCM43224_D11N_ID_VEN1
)
4762 /* Dualband boards */
4763 wlc_hw
->_nbands
= 2;
4765 wlc_hw
->_nbands
= 1;
4767 if ((wlc_hw
->sih
->chip
== BCM43225_CHIP_ID
))
4768 wlc_hw
->_nbands
= 1;
4770 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4771 * unconditionally does the init of these values
4773 wlc
->vendorid
= wlc_hw
->vendorid
;
4774 wlc
->deviceid
= wlc_hw
->deviceid
;
4775 wlc
->pub
->sih
= wlc_hw
->sih
;
4776 wlc
->pub
->corerev
= wlc_hw
->corerev
;
4777 wlc
->pub
->sromrev
= wlc_hw
->sromrev
;
4778 wlc
->pub
->boardrev
= wlc_hw
->boardrev
;
4779 wlc
->pub
->boardflags
= wlc_hw
->boardflags
;
4780 wlc
->pub
->boardflags2
= wlc_hw
->boardflags2
;
4781 wlc
->pub
->_nbands
= wlc_hw
->_nbands
;
4783 wlc_hw
->physhim
= wlc_phy_shim_attach(wlc_hw
, wlc
->wl
, wlc
);
4785 if (wlc_hw
->physhim
== NULL
) {
4786 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4792 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4793 sha_params
.sih
= wlc_hw
->sih
;
4794 sha_params
.physhim
= wlc_hw
->physhim
;
4795 sha_params
.unit
= unit
;
4796 sha_params
.corerev
= wlc_hw
->corerev
;
4797 sha_params
.vars
= vars
;
4798 sha_params
.vid
= wlc_hw
->vendorid
;
4799 sha_params
.did
= wlc_hw
->deviceid
;
4800 sha_params
.chip
= wlc_hw
->sih
->chip
;
4801 sha_params
.chiprev
= wlc_hw
->sih
->chiprev
;
4802 sha_params
.chippkg
= wlc_hw
->sih
->chippkg
;
4803 sha_params
.sromrev
= wlc_hw
->sromrev
;
4804 sha_params
.boardtype
= wlc_hw
->sih
->boardtype
;
4805 sha_params
.boardrev
= wlc_hw
->boardrev
;
4806 sha_params
.boardvendor
= wlc_hw
->sih
->boardvendor
;
4807 sha_params
.boardflags
= wlc_hw
->boardflags
;
4808 sha_params
.boardflags2
= wlc_hw
->boardflags2
;
4809 sha_params
.buscorerev
= wlc_hw
->sih
->buscorerev
;
4811 /* alloc and save pointer to shared phy state area */
4812 wlc_hw
->phy_sh
= wlc_phy_shared_attach(&sha_params
);
4813 if (!wlc_hw
->phy_sh
) {
4818 /* initialize software state for each core and band */
4819 for (j
= 0; j
< wlc_hw
->_nbands
; j
++) {
4821 * band0 is always 2.4Ghz
4822 * band1, if present, is 5Ghz
4825 brcms_c_setxband(wlc_hw
, j
);
4827 wlc_hw
->band
->bandunit
= j
;
4828 wlc_hw
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4829 wlc
->band
->bandunit
= j
;
4830 wlc
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4831 wlc
->core
->coreidx
= ai_coreidx(wlc_hw
->sih
);
4833 wlc_hw
->machwcap
= R_REG(®s
->machwcap
);
4834 wlc_hw
->machwcap_backup
= wlc_hw
->machwcap
;
4836 /* init tx fifo size */
4837 wlc_hw
->xmtfifo_sz
=
4838 xmtfifo_sz
[(wlc_hw
->corerev
- XMTFIFOTBL_STARTREV
)];
4840 /* Get a phy for this band */
4842 wlc_phy_attach(wlc_hw
->phy_sh
, regs
,
4843 wlc_hw
->band
->bandtype
, vars
,
4845 if (wlc_hw
->band
->pi
== NULL
) {
4846 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_"
4847 "attach failed\n", unit
);
4852 wlc_phy_machwcap_set(wlc_hw
->band
->pi
, wlc_hw
->machwcap
);
4854 wlc_phy_get_phyversion(wlc_hw
->band
->pi
, &wlc_hw
->band
->phytype
,
4855 &wlc_hw
->band
->phyrev
,
4856 &wlc_hw
->band
->radioid
,
4857 &wlc_hw
->band
->radiorev
);
4858 wlc_hw
->band
->abgphy_encore
=
4859 wlc_phy_get_encore(wlc_hw
->band
->pi
);
4860 wlc
->band
->abgphy_encore
= wlc_phy_get_encore(wlc_hw
->band
->pi
);
4861 wlc_hw
->band
->core_flags
=
4862 wlc_phy_get_coreflags(wlc_hw
->band
->pi
);
4864 /* verify good phy_type & supported phy revision */
4865 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
4866 if (NCONF_HAS(wlc_hw
->band
->phyrev
))
4870 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
4871 if (LCNCONF_HAS(wlc_hw
->band
->phyrev
))
4877 wiphy_err(wiphy
, "wl%d: brcms_b_attach: unsupported "
4878 "phy type/rev (%d/%d)\n", unit
,
4879 wlc_hw
->band
->phytype
, wlc_hw
->band
->phyrev
);
4886 * BMAC_NOTE: wlc->band->pi should not be set below and should
4887 * be done in the high level attach. However we can not make
4888 * that change until all low level access is changed to
4889 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4890 * keeping wlc_hw->band->pi as well for incremental update of
4891 * low level fns, and cut over low only init when all fns
4894 wlc
->band
->pi
= wlc_hw
->band
->pi
;
4895 wlc
->band
->phytype
= wlc_hw
->band
->phytype
;
4896 wlc
->band
->phyrev
= wlc_hw
->band
->phyrev
;
4897 wlc
->band
->radioid
= wlc_hw
->band
->radioid
;
4898 wlc
->band
->radiorev
= wlc_hw
->band
->radiorev
;
4900 /* default contention windows size limits */
4901 wlc_hw
->band
->CWmin
= APHY_CWMIN
;
4902 wlc_hw
->band
->CWmax
= PHY_CWMAX
;
4904 if (!brcms_b_attach_dmapio(wlc
, j
, wme
)) {
4910 /* disable core to match driver "down" state */
4911 brcms_c_coredisable(wlc_hw
);
4913 /* Match driver "down" state */
4914 ai_pci_down(wlc_hw
->sih
);
4916 /* register sb interrupt callback functions */
4917 ai_register_intr_callback(wlc_hw
->sih
, (void *)brcms_c_wlintrsoff
,
4918 (void *)brcms_c_wlintrsrestore
, NULL
, wlc
);
4920 /* turn off pll and xtal to match driver "down" state */
4921 brcms_b_xtal(wlc_hw
, OFF
);
4923 /* *******************************************************************
4924 * The hardware is in the DOWN state at this point. D11 core
4925 * or cores are in reset with clocks off, and the board PLLs
4926 * are off if possible.
4928 * Beyond this point, wlc->sbclk == false and chip registers
4929 * should not be touched.
4930 *********************************************************************
4933 /* init etheraddr state variables */
4934 macaddr
= brcms_c_get_macaddr(wlc_hw
);
4935 if (macaddr
== NULL
) {
4936 wiphy_err(wiphy
, "wl%d: brcms_b_attach: macaddr not found\n",
4941 if (!mac_pton(macaddr
, wlc_hw
->etheraddr
) ||
4942 is_broadcast_ether_addr(wlc_hw
->etheraddr
) ||
4943 is_zero_ether_addr(wlc_hw
->etheraddr
)) {
4944 wiphy_err(wiphy
, "wl%d: brcms_b_attach: bad macaddr %s\n",
4951 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4952 wlc_hw
->deviceid
, wlc_hw
->_nbands
,
4953 wlc_hw
->sih
->boardtype
, macaddr
);
4958 wiphy_err(wiphy
, "wl%d: brcms_b_attach: failed with err %d\n", unit
,
4963 static void brcms_c_attach_antgain_init(struct brcms_c_info
*wlc
)
4966 unit
= wlc
->pub
->unit
;
4968 if ((wlc
->band
->antgain
== -1) && (wlc
->pub
->sromrev
== 1)) {
4969 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4970 wlc
->band
->antgain
= 8;
4971 } else if (wlc
->band
->antgain
== -1) {
4972 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
4973 " srom, using 2dB\n", unit
, __func__
);
4974 wlc
->band
->antgain
= 8;
4977 /* Older sroms specified gain in whole dbm only. In order
4978 * be able to specify qdbm granularity and remain backward
4979 * compatible the whole dbms are now encoded in only
4980 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4981 * 6 bit signed number ranges from -32 - 31.
4985 * 0xc1 = 1.75 db (1 + 3 quarters),
4986 * 0x3f = -1 (-1 + 0 quarters),
4987 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4988 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4990 gain
= wlc
->band
->antgain
& 0x3f;
4991 gain
<<= 2; /* Sign extend */
4993 fract
= (wlc
->band
->antgain
& 0xc0) >> 6;
4994 wlc
->band
->antgain
= 4 * gain
+ fract
;
4998 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info
*wlc
)
5005 unit
= wlc
->pub
->unit
;
5006 vars
= wlc
->pub
->vars
;
5007 bandtype
= wlc
->band
->bandtype
;
5009 /* get antennas available */
5010 aa
= (s8
) getintvar(vars
, bandtype
== BRCM_BAND_5G
? "aa5g" : "aa2g");
5012 aa
= (s8
) getintvar(vars
,
5013 bandtype
== BRCM_BAND_5G
? "aa1" : "aa0");
5014 if ((aa
< 1) || (aa
> 15)) {
5015 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
5016 " srom (0x%x), using 3\n", unit
, __func__
, aa
);
5020 /* reset the defaults if we have a single antenna */
5022 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_0
;
5023 wlc
->stf
->txant
= ANT_TX_FORCE_0
;
5024 } else if (aa
== 2) {
5025 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_1
;
5026 wlc
->stf
->txant
= ANT_TX_FORCE_1
;
5030 /* Compute Antenna Gain */
5031 wlc
->band
->antgain
=
5032 (s8
) getintvar(vars
, bandtype
== BRCM_BAND_5G
? "ag1" : "ag0");
5033 brcms_c_attach_antgain_init(wlc
);
5038 static void brcms_c_bss_default_init(struct brcms_c_info
*wlc
)
5041 struct brcms_band
*band
;
5042 struct brcms_bss_info
*bi
= wlc
->default_bss
;
5044 /* init default and target BSS with some sane initial values */
5045 memset((char *)(bi
), 0, sizeof(struct brcms_bss_info
));
5046 bi
->beacon_period
= BEACON_INTERVAL_DEFAULT
;
5048 /* fill the default channel as the first valid channel
5049 * starting from the 2G channels
5051 chanspec
= ch20mhz_chspec(1);
5052 wlc
->home_chanspec
= bi
->chanspec
= chanspec
;
5054 /* find the band of our default channel */
5056 if (wlc
->pub
->_nbands
> 1 &&
5057 band
->bandunit
!= chspec_bandunit(chanspec
))
5058 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
5060 /* init bss rates to the band specific default rate set */
5061 brcms_c_rateset_default(&bi
->rateset
, NULL
, band
->phytype
,
5062 band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
5063 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
5064 brcms_chspec_bw(chanspec
), wlc
->stf
->txstreams
);
5066 if (wlc
->pub
->_n_enab
& SUPPORT_11N
)
5067 bi
->flags
|= BRCMS_BSS_HT
;
5070 static struct brcms_txq_info
*brcms_c_txq_alloc(struct brcms_c_info
*wlc
)
5072 struct brcms_txq_info
*qi
, *p
;
5074 qi
= kzalloc(sizeof(struct brcms_txq_info
), GFP_ATOMIC
);
5077 * Have enough room for control packets along with HI watermark
5078 * Also, add room to txq for total psq packets if all the SCBs
5079 * leave PS mode. The watermark for flowcontrol to OS packets
5080 * will remain the same
5082 brcmu_pktq_init(&qi
->q
, BRCMS_PREC_COUNT
,
5083 2 * BRCMS_DATAHIWAT
+ PKTQ_LEN_DEFAULT
);
5085 /* add this queue to the the global list */
5088 wlc
->tx_queues
= qi
;
5090 while (p
->next
!= NULL
)
5098 static void brcms_c_txq_free(struct brcms_c_info
*wlc
,
5099 struct brcms_txq_info
*qi
)
5101 struct brcms_txq_info
*p
;
5106 /* remove the queue from the linked list */
5109 wlc
->tx_queues
= p
->next
;
5111 while (p
!= NULL
&& p
->next
!= qi
)
5114 p
->next
= p
->next
->next
;
5120 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info
*wlc
, u8 bwcap
)
5123 struct brcms_band
*band
;
5125 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
5126 band
= wlc
->bandstate
[i
];
5127 if (band
->bandtype
== BRCM_BAND_5G
) {
5128 if ((bwcap
== BRCMS_N_BW_40ALL
)
5129 || (bwcap
== BRCMS_N_BW_20IN2G_40IN5G
))
5130 band
->mimo_cap_40
= true;
5132 band
->mimo_cap_40
= false;
5134 if (bwcap
== BRCMS_N_BW_40ALL
)
5135 band
->mimo_cap_40
= true;
5137 band
->mimo_cap_40
= false;
5143 * The common driver entry routine. Error codes should be unique
5145 struct brcms_c_info
*
5146 brcms_c_attach(struct brcms_info
*wl
, u16 vendor
, u16 device
, uint unit
,
5147 bool piomode
, void __iomem
*regsva
, struct pci_dev
*btparam
,
5150 struct brcms_c_info
*wlc
;
5153 struct brcms_pub
*pub
;
5155 /* allocate struct brcms_c_info state and its substructures */
5156 wlc
= (struct brcms_c_info
*) brcms_c_attach_malloc(unit
, &err
, device
);
5159 wlc
->wiphy
= wl
->wiphy
;
5166 wlc
->band
= wlc
->bandstate
[0];
5167 wlc
->core
= wlc
->corestate
;
5170 pub
->_piomode
= piomode
;
5171 wlc
->bandinit_pending
= false;
5173 /* populate struct brcms_c_info with default values */
5174 brcms_c_info_init(wlc
, unit
);
5176 /* update sta/ap related parameters */
5177 brcms_c_ap_upd(wlc
);
5180 * low level attach steps(all hw accesses go
5181 * inside, no more in rest of the attach)
5183 err
= brcms_b_attach(wlc
, vendor
, device
, unit
, piomode
, regsva
,
5189 * for some states, due to different info pointer(e,g, wlc, wlc_hw) or
5190 * master/slave split, HIGH driver(both monolithic and HIGH_ONLY) needs
5191 * to sync states FROM BMAC portion driver
5193 if (!brcms_c_state_bmac_sync(wlc
)) {
5198 pub
->phy_11ncapable
= BRCMS_PHY_11N_CAP(wlc
->band
);
5200 /* propagate *vars* from BMAC driver to high driver */
5201 brcms_b_copyfrom_vars(wlc
->hw
, &pub
->vars
, &wlc
->vars_size
);
5204 /* set maximum allowed duty cycle */
5205 wlc
->tx_duty_cycle_ofdm
=
5206 (u16
) getintvar(pub
->vars
, "tx_duty_cycle_ofdm");
5207 wlc
->tx_duty_cycle_cck
=
5208 (u16
) getintvar(pub
->vars
, "tx_duty_cycle_cck");
5210 brcms_c_stf_phy_chain_calc(wlc
);
5212 /* txchain 1: txant 0, txchain 2: txant 1 */
5213 if (BRCMS_ISNPHY(wlc
->band
) && (wlc
->stf
->txstreams
== 1))
5214 wlc
->stf
->txant
= wlc
->stf
->hw_txchain
- 1;
5216 /* push to BMAC driver */
5217 wlc_phy_stf_chain_init(wlc
->band
->pi
, wlc
->stf
->hw_txchain
,
5218 wlc
->stf
->hw_rxchain
);
5220 /* pull up some info resulting from the low attach */
5221 for (i
= 0; i
< NFIFO
; i
++)
5222 wlc
->core
->txavail
[i
] = wlc
->hw
->txavail
[i
];
5224 memcpy(&wlc
->perm_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
5225 memcpy(&pub
->cur_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
5227 for (j
= 0; j
< wlc
->pub
->_nbands
; j
++) {
5228 wlc
->band
= wlc
->bandstate
[j
];
5230 if (!brcms_c_attach_stf_ant_init(wlc
)) {
5235 /* default contention windows size limits */
5236 wlc
->band
->CWmin
= APHY_CWMIN
;
5237 wlc
->band
->CWmax
= PHY_CWMAX
;
5239 /* init gmode value */
5240 if (wlc
->band
->bandtype
== BRCM_BAND_2G
) {
5241 wlc
->band
->gmode
= GMODE_AUTO
;
5242 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
,
5246 /* init _n_enab supported mode */
5247 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
5248 pub
->_n_enab
= SUPPORT_11N
;
5249 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_USER
,
5251 SUPPORT_11N
) ? WL_11N_2x2
:
5255 /* init per-band default rateset, depend on band->gmode */
5256 brcms_default_rateset(wlc
, &wlc
->band
->defrateset
);
5258 /* fill in hw_rateset */
5259 brcms_c_rateset_filter(&wlc
->band
->defrateset
,
5260 &wlc
->band
->hw_rateset
, false,
5261 BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
5262 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
5266 * update antenna config due to
5267 * wlc->stf->txant/txchain/ant_rx_ovr change
5269 brcms_c_stf_phy_txant_upd(wlc
);
5271 /* attach each modules */
5272 err
= brcms_c_attach_module(wlc
);
5276 if (!brcms_c_timers_init(wlc
, unit
)) {
5277 wiphy_err(wl
->wiphy
, "wl%d: %s: init_timer failed\n", unit
,
5283 /* depend on rateset, gmode */
5284 wlc
->cmi
= brcms_c_channel_mgr_attach(wlc
);
5286 wiphy_err(wl
->wiphy
, "wl%d: %s: channel_mgr_attach failed"
5287 "\n", unit
, __func__
);
5292 /* init default when all parameters are ready, i.e. ->rateset */
5293 brcms_c_bss_default_init(wlc
);
5296 * Complete the wlc default state initializations..
5299 /* allocate our initial queue */
5300 wlc
->pkt_queue
= brcms_c_txq_alloc(wlc
);
5301 if (wlc
->pkt_queue
== NULL
) {
5302 wiphy_err(wl
->wiphy
, "wl%d: %s: failed to malloc tx queue\n",
5308 wlc
->bsscfg
->wlc
= wlc
;
5310 wlc
->mimoft
= FT_HT
;
5311 wlc
->mimo_40txbw
= AUTO
;
5312 wlc
->ofdm_40txbw
= AUTO
;
5313 wlc
->cck_40txbw
= AUTO
;
5314 brcms_c_update_mimo_band_bwcap(wlc
, BRCMS_N_BW_20IN2G_40IN5G
);
5316 /* Set default values of SGI */
5317 if (BRCMS_SGI_CAP_PHY(wlc
)) {
5318 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
5320 } else if (BRCMS_ISSSLPNPHY(wlc
->band
)) {
5321 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
5324 brcms_c_ht_update_sgi_rx(wlc
, 0);
5327 /* initialize radio_mpc_disable according to wlc->mpc */
5328 brcms_c_radio_mpc_upd(wlc
);
5329 brcms_b_antsel_set(wlc
->hw
, wlc
->asi
->antsel_avail
);
5337 wiphy_err(wl
->wiphy
, "wl%d: %s: failed with err %d\n",
5338 unit
, __func__
, err
);
5340 brcms_c_detach(wlc
);
5347 static void brcms_c_timers_deinit(struct brcms_c_info
*wlc
)
5349 /* free timer state */
5351 brcms_free_timer(wlc
->wl
, wlc
->wdtimer
);
5352 wlc
->wdtimer
= NULL
;
5354 if (wlc
->radio_timer
) {
5355 brcms_free_timer(wlc
->wl
, wlc
->radio_timer
);
5356 wlc
->radio_timer
= NULL
;
5360 static void brcms_c_detach_module(struct brcms_c_info
*wlc
)
5363 brcms_c_antsel_detach(wlc
->asi
);
5368 brcms_c_ampdu_detach(wlc
->ampdu
);
5372 brcms_c_stf_detach(wlc
);
5378 static int brcms_b_detach(struct brcms_c_info
*wlc
)
5381 struct brcms_hw_band
*band
;
5382 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
5389 * detach interrupt sync mechanism since interrupt is disabled
5390 * and per-port interrupt object may has been freed. this must
5391 * be done before sb core switch
5393 ai_deregister_intr_callback(wlc_hw
->sih
);
5394 ai_pci_sleep(wlc_hw
->sih
);
5397 brcms_b_detach_dmapio(wlc_hw
);
5399 band
= wlc_hw
->band
;
5400 for (i
= 0; i
< wlc_hw
->_nbands
; i
++) {
5402 /* Detach this band's phy */
5403 wlc_phy_detach(band
->pi
);
5406 band
= wlc_hw
->bandstate
[OTHERBANDUNIT(wlc
)];
5409 /* Free shared phy state */
5410 kfree(wlc_hw
->phy_sh
);
5412 wlc_phy_shim_detach(wlc_hw
->physhim
);
5415 kfree(wlc_hw
->vars
);
5416 wlc_hw
->vars
= NULL
;
5419 ai_detach(wlc_hw
->sih
);
5428 * Return a count of the number of driver callbacks still pending.
5430 * General policy is that brcms_c_detach can only dealloc/free software states.
5431 * It can NOT touch hardware registers since the d11core may be in reset and
5432 * clock may not be available.
5433 * One exception is sb register access, which is possible if crystal is turned
5434 * on after "down" state, driver should avoid software timer with the exception
5437 uint
brcms_c_detach(struct brcms_c_info
*wlc
)
5444 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5446 callbacks
+= brcms_b_detach(wlc
);
5448 /* delete software timers */
5449 if (!brcms_c_radio_monitor_stop(wlc
))
5452 brcms_c_channel_mgr_detach(wlc
->cmi
);
5454 brcms_c_timers_deinit(wlc
);
5456 brcms_c_detach_module(wlc
);
5459 while (wlc
->tx_queues
!= NULL
)
5460 brcms_c_txq_free(wlc
, wlc
->tx_queues
);
5462 brcms_c_detach_mfree(wlc
);
5466 /* update state that depends on the current value of "ap" */
5467 void brcms_c_ap_upd(struct brcms_c_info
*wlc
)
5469 /* STA-BSS; short capable */
5470 wlc
->PLCPHdr_override
= BRCMS_PLCP_SHORT
;
5477 * return true if Minimum Power Consumption should
5478 * be entered, false otherwise
5480 bool brcms_c_is_non_delay_mpc(struct brcms_c_info
*wlc
)
5485 bool brcms_c_ismpc(struct brcms_c_info
*wlc
)
5487 return (wlc
->mpc_delay_off
== 0) && (brcms_c_is_non_delay_mpc(wlc
));
5490 void brcms_c_radio_mpc_upd(struct brcms_c_info
*wlc
)
5492 bool mpc_radio
, radio_state
;
5495 * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5496 * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5497 * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5498 * the radio is going down.
5501 if (!wlc
->pub
->radio_disabled
)
5503 mboolclr(wlc
->pub
->radio_disabled
, WL_RADIO_MPC_DISABLE
);
5504 brcms_c_radio_upd(wlc
);
5505 if (!wlc
->pub
->radio_disabled
)
5506 brcms_c_radio_monitor_stop(wlc
);
5511 * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5512 * wlc->pub->radio_disabled to go ON, always call radio_upd
5513 * synchronously to go OFF, postpone radio_upd to later when
5514 * context is safe(e.g. watchdog)
5517 (mboolisset(wlc
->pub
->radio_disabled
, WL_RADIO_MPC_DISABLE
) ? OFF
:
5519 mpc_radio
= (brcms_c_ismpc(wlc
) == true) ? OFF
: ON
;
5521 if (radio_state
== ON
&& mpc_radio
== OFF
)
5522 wlc
->mpc_delay_off
= wlc
->mpc_dlycnt
;
5523 else if (radio_state
== OFF
&& mpc_radio
== ON
) {
5524 mboolclr(wlc
->pub
->radio_disabled
, WL_RADIO_MPC_DISABLE
);
5525 brcms_c_radio_upd(wlc
);
5526 if (wlc
->mpc_offcnt
< BRCMS_MPC_THRESHOLD
)
5527 wlc
->mpc_dlycnt
= BRCMS_MPC_MAX_DELAYCNT
;
5529 wlc
->mpc_dlycnt
= BRCMS_MPC_MIN_DELAYCNT
;
5532 * Below logic is meant to capture the transition from mpc off
5533 * to mpc on for reasons other than wlc->mpc_delay_off keeping
5534 * the mpc off. In that case reset wlc->mpc_delay_off to
5535 * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5537 if ((wlc
->prev_non_delay_mpc
== false) &&
5538 (brcms_c_is_non_delay_mpc(wlc
) == true) && wlc
->mpc_delay_off
)
5539 wlc
->mpc_delay_off
= wlc
->mpc_dlycnt
;
5541 wlc
->prev_non_delay_mpc
= brcms_c_is_non_delay_mpc(wlc
);
5543 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5544 static void brcms_b_hw_up(struct brcms_hardware
*wlc_hw
)
5546 if (wlc_hw
->wlc
->pub
->hw_up
)
5549 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5552 * Enable pll and xtal, initialize the power control registers,
5553 * and force fastclock for the remainder of brcms_c_up().
5555 brcms_b_xtal(wlc_hw
, ON
);
5556 ai_clkctl_init(wlc_hw
->sih
);
5557 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5559 ai_pci_fixcfg(wlc_hw
->sih
);
5562 * AI chip doesn't restore bar0win2 on
5563 * hibernation/resume, need sw fixup
5565 if ((wlc_hw
->sih
->chip
== BCM43224_CHIP_ID
) ||
5566 (wlc_hw
->sih
->chip
== BCM43225_CHIP_ID
))
5567 wlc_hw
->regs
= (struct d11regs __iomem
*)
5568 ai_setcore(wlc_hw
->sih
, D11_CORE_ID
, 0);
5571 * Inform phy that a POR reset has occurred so
5572 * it does a complete phy init
5574 wlc_phy_por_inform(wlc_hw
->band
->pi
);
5576 wlc_hw
->ucode_loaded
= false;
5577 wlc_hw
->wlc
->pub
->hw_up
= true;
5579 if ((wlc_hw
->boardflags
& BFL_FEM
)
5580 && (wlc_hw
->sih
->chip
== BCM4313_CHIP_ID
)) {
5582 (wlc_hw
->boardrev
>= 0x1250
5583 && (wlc_hw
->boardflags
& BFL_FEM_BT
)))
5584 ai_epa_4313war(wlc_hw
->sih
);
5588 static int brcms_b_up_prep(struct brcms_hardware
*wlc_hw
)
5592 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5595 * Enable pll and xtal, initialize the power control registers,
5596 * and force fastclock for the remainder of brcms_c_up().
5598 brcms_b_xtal(wlc_hw
, ON
);
5599 ai_clkctl_init(wlc_hw
->sih
);
5600 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5603 * Configure pci/pcmcia here instead of in brcms_c_attach()
5604 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5606 coremask
= (1 << wlc_hw
->wlc
->core
->coreidx
);
5608 ai_pci_setup(wlc_hw
->sih
, coremask
);
5611 * Need to read the hwradio status here to cover the case where the
5612 * system is loaded with the hw radio disabled. We do not want to
5613 * bring the driver up in this case.
5615 if (brcms_b_radio_read_hwdisabled(wlc_hw
)) {
5616 /* put SB PCI in down state again */
5617 ai_pci_down(wlc_hw
->sih
);
5618 brcms_b_xtal(wlc_hw
, OFF
);
5622 ai_pci_up(wlc_hw
->sih
);
5624 /* reset the d11 core */
5625 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
5630 static int brcms_b_up_finish(struct brcms_hardware
*wlc_hw
)
5632 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5635 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, true);
5637 /* FULLY enable dynamic power control and d11 core interrupt */
5638 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
5639 brcms_intrson(wlc_hw
->wlc
->wl
);
5644 * Write WME tunable parameters for retransmit/max rate
5645 * from wlc struct to ucode
5647 static void brcms_c_wme_retries_write(struct brcms_c_info
*wlc
)
5651 /* Need clock to do this */
5655 for (ac
= 0; ac
< AC_COUNT
; ac
++)
5656 brcms_b_write_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
),
5657 wlc
->wme_retries
[ac
]);
5660 /* make interface operational */
5661 int brcms_c_up(struct brcms_c_info
*wlc
)
5663 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5665 /* HW is turned off so don't try to access it */
5666 if (wlc
->pub
->hw_off
|| brcms_deviceremoved(wlc
))
5669 if (!wlc
->pub
->hw_up
) {
5670 brcms_b_hw_up(wlc
->hw
);
5671 wlc
->pub
->hw_up
= true;
5674 if ((wlc
->pub
->boardflags
& BFL_FEM
)
5675 && (wlc
->pub
->sih
->chip
== BCM4313_CHIP_ID
)) {
5676 if (wlc
->pub
->boardrev
>= 0x1250
5677 && (wlc
->pub
->boardflags
& BFL_FEM_BT
))
5678 brcms_c_mhf(wlc
, MHF5
, MHF5_4313_GPIOCTRL
,
5679 MHF5_4313_GPIOCTRL
, BRCM_BAND_ALL
);
5681 brcms_c_mhf(wlc
, MHF4
, MHF4_EXTPA_ENABLE
,
5682 MHF4_EXTPA_ENABLE
, BRCM_BAND_ALL
);
5686 * Need to read the hwradio status here to cover the case where the
5687 * system is loaded with the hw radio disabled. We do not want to bring
5688 * the driver up in this case. If radio is disabled, abort up, lower
5689 * power, start radio timer and return 0(for NDIS) don't call
5690 * radio_update to avoid looping brcms_c_up.
5692 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5694 if (!wlc
->pub
->radio_disabled
) {
5695 int status
= brcms_b_up_prep(wlc
->hw
);
5696 if (status
== -ENOMEDIUM
) {
5698 (wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
)) {
5699 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
5700 mboolset(wlc
->pub
->radio_disabled
,
5701 WL_RADIO_HW_DISABLE
);
5703 if (bsscfg
->enable
&& bsscfg
->BSS
)
5704 wiphy_err(wlc
->wiphy
, "wl%d: up"
5706 "bsscfg_disable()\n",
5712 if (wlc
->pub
->radio_disabled
) {
5713 brcms_c_radio_monitor_start(wlc
);
5717 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5720 brcms_c_radio_monitor_stop(wlc
);
5722 /* Set EDCF hostflags */
5723 brcms_c_mhf(wlc
, MHF1
, MHF1_EDCF
, MHF1_EDCF
, BRCM_BAND_ALL
);
5725 brcms_init(wlc
->wl
);
5726 wlc
->pub
->up
= true;
5728 if (wlc
->bandinit_pending
) {
5729 brcms_c_suspend_mac_and_wait(wlc
);
5730 brcms_c_set_chanspec(wlc
, wlc
->default_bss
->chanspec
);
5731 wlc
->bandinit_pending
= false;
5732 brcms_c_enable_mac(wlc
);
5735 brcms_b_up_finish(wlc
->hw
);
5737 /* Program the TX wme params with the current settings */
5738 brcms_c_wme_retries_write(wlc
);
5740 /* start one second watchdog timer */
5741 brcms_add_timer(wlc
->wl
, wlc
->wdtimer
, TIMER_INTERVAL_WATCHDOG
, true);
5742 wlc
->WDarmed
= true;
5744 /* ensure antenna config is up to date */
5745 brcms_c_stf_phy_txant_upd(wlc
);
5746 /* ensure LDPC config is in sync */
5747 brcms_c_ht_update_ldpc(wlc
, wlc
->stf
->ldpc
);
5752 static uint
brcms_c_down_del_timer(struct brcms_c_info
*wlc
)
5759 static int brcms_b_bmac_down_prep(struct brcms_hardware
*wlc_hw
)
5764 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5769 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5771 /* disable interrupts */
5773 wlc_hw
->wlc
->macintmask
= 0;
5775 /* now disable interrupts */
5776 brcms_intrsoff(wlc_hw
->wlc
->wl
);
5778 /* ensure we're running on the pll clock again */
5779 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5781 /* down phy at the last of this stage */
5782 callbacks
+= wlc_phy_down(wlc_hw
->band
->pi
);
5787 static int brcms_b_down_finish(struct brcms_hardware
*wlc_hw
)
5792 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5798 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, false);
5800 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5803 wlc_hw
->sbclk
= false;
5804 wlc_hw
->clk
= false;
5805 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
5807 /* reclaim any posted packets */
5808 brcms_c_flushqueues(wlc_hw
->wlc
);
5811 /* Reset and disable the core */
5812 if (ai_iscoreup(wlc_hw
->sih
)) {
5813 if (R_REG(&wlc_hw
->regs
->maccontrol
) &
5815 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
5816 callbacks
+= brcms_reset(wlc_hw
->wlc
->wl
);
5817 brcms_c_coredisable(wlc_hw
);
5820 /* turn off primary xtal and pll */
5821 if (!wlc_hw
->noreset
) {
5822 ai_pci_down(wlc_hw
->sih
);
5823 brcms_b_xtal(wlc_hw
, OFF
);
5831 * Mark the interface nonoperational, stop the software mechanisms,
5832 * disable the hardware, free any transient buffer state.
5833 * Return a count of the number of driver callbacks still pending.
5835 uint
brcms_c_down(struct brcms_c_info
*wlc
)
5840 bool dev_gone
= false;
5841 struct brcms_txq_info
*qi
;
5843 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5845 /* check if we are already in the going down path */
5846 if (wlc
->going_down
) {
5847 wiphy_err(wlc
->wiphy
, "wl%d: %s: Driver going down so return"
5848 "\n", wlc
->pub
->unit
, __func__
);
5854 /* in between, mpc could try to bring down again.. */
5855 wlc
->going_down
= true;
5857 callbacks
+= brcms_b_bmac_down_prep(wlc
->hw
);
5859 dev_gone
= brcms_deviceremoved(wlc
);
5861 /* Call any registered down handlers */
5862 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5863 if (wlc
->modulecb
[i
].down_fn
)
5865 wlc
->modulecb
[i
].down_fn(wlc
->modulecb
[i
].hdl
);
5868 /* cancel the watchdog timer */
5870 if (!brcms_del_timer(wlc
->wl
, wlc
->wdtimer
))
5872 wlc
->WDarmed
= false;
5874 /* cancel all other timers */
5875 callbacks
+= brcms_c_down_del_timer(wlc
);
5877 wlc
->pub
->up
= false;
5879 wlc_phy_mute_upd(wlc
->band
->pi
, false, PHY_MUTE_ALL
);
5881 /* clear txq flow control */
5882 brcms_c_txflowcontrol_reset(wlc
);
5884 /* flush tx queues */
5885 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
)
5886 brcmu_pktq_flush(&qi
->q
, true, NULL
, NULL
);
5888 callbacks
+= brcms_b_down_finish(wlc
->hw
);
5890 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5893 wlc
->going_down
= false;
5897 /* Set the current gmode configuration */
5898 int brcms_c_set_gmode(struct brcms_c_info
*wlc
, u8 gmode
, bool config
)
5902 struct brcms_c_rateset rs
;
5903 /* Default to 54g Auto */
5904 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5905 s8 shortslot
= BRCMS_SHORTSLOT_AUTO
;
5906 bool shortslot_restrict
= false; /* Restrict association to stations
5907 * that support shortslot
5909 bool ofdm_basic
= false; /* Make 6, 12, and 24 basic rates */
5910 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5911 int preamble
= BRCMS_PLCP_LONG
;
5912 bool preamble_restrict
= false; /* Restrict association to stations
5913 * that support short preambles
5915 struct brcms_band
*band
;
5917 /* if N-support is enabled, allow Gmode set as long as requested
5918 * Gmode is not GMODE_LEGACY_B
5920 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && gmode
== GMODE_LEGACY_B
)
5923 /* verify that we are dealing with 2G band and grab the band pointer */
5924 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
5926 else if ((wlc
->pub
->_nbands
> 1) &&
5927 (wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->bandtype
== BRCM_BAND_2G
))
5928 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
5932 /* Legacy or bust when no OFDM is supported by regulatory */
5933 if ((brcms_c_channel_locale_flags_in_band(wlc
->cmi
, band
->bandunit
) &
5934 BRCMS_NO_OFDM
) && (gmode
!= GMODE_LEGACY_B
))
5937 /* update configuration value */
5939 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
, gmode
);
5941 /* Clear rateset override */
5942 memset(&rs
, 0, sizeof(struct brcms_c_rateset
));
5945 case GMODE_LEGACY_B
:
5946 shortslot
= BRCMS_SHORTSLOT_OFF
;
5947 brcms_c_rateset_copy(&gphy_legacy_rates
, &rs
);
5955 /* Accept defaults */
5960 preamble
= BRCMS_PLCP_SHORT
;
5961 preamble_restrict
= true;
5964 case GMODE_PERFORMANCE
:
5965 shortslot
= BRCMS_SHORTSLOT_ON
;
5966 shortslot_restrict
= true;
5968 preamble
= BRCMS_PLCP_SHORT
;
5969 preamble_restrict
= true;
5974 wiphy_err(wlc
->wiphy
, "wl%d: %s: invalid gmode %d\n",
5975 wlc
->pub
->unit
, __func__
, gmode
);
5979 band
->gmode
= gmode
;
5981 wlc
->shortslot_override
= shortslot
;
5983 /* Use the default 11g rateset */
5985 brcms_c_rateset_copy(&cck_ofdm_rates
, &rs
);
5988 for (i
= 0; i
< rs
.count
; i
++) {
5989 if (rs
.rates
[i
] == BRCM_RATE_6M
5990 || rs
.rates
[i
] == BRCM_RATE_12M
5991 || rs
.rates
[i
] == BRCM_RATE_24M
)
5992 rs
.rates
[i
] |= BRCMS_RATE_FLAG
;
5996 /* Set default bss rateset */
5997 wlc
->default_bss
->rateset
.count
= rs
.count
;
5998 memcpy(wlc
->default_bss
->rateset
.rates
, rs
.rates
,
5999 sizeof(wlc
->default_bss
->rateset
.rates
));
6004 static int brcms_c_nmode_validate(struct brcms_c_info
*wlc
, s32 nmode
)
6016 if (!(BRCMS_PHY_11N_CAP(wlc
->band
)))
6028 int brcms_c_set_nmode(struct brcms_c_info
*wlc
)
6034 err
= brcms_c_nmode_validate(wlc
, nmode
);
6038 if (wlc
->stf
->txstreams
== WL_11N_3x3
)
6043 /* force GMODE_AUTO if NMODE is ON */
6044 brcms_c_set_gmode(wlc
, GMODE_AUTO
, true);
6045 if (nmode
== WL_11N_3x3
)
6046 wlc
->pub
->_n_enab
= SUPPORT_HT
;
6048 wlc
->pub
->_n_enab
= SUPPORT_11N
;
6049 wlc
->default_bss
->flags
|= BRCMS_BSS_HT
;
6050 /* add the mcs rates to the default and hw ratesets */
6051 brcms_c_rateset_mcs_build(&wlc
->default_bss
->rateset
,
6052 wlc
->stf
->txstreams
);
6053 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++)
6054 memcpy(wlc
->bandstate
[i
]->hw_rateset
.mcs
,
6055 wlc
->default_bss
->rateset
.mcs
, MCSSET_LEN
);
6061 brcms_c_set_internal_rateset(struct brcms_c_info
*wlc
,
6062 struct brcms_c_rateset
*rs_arg
)
6064 struct brcms_c_rateset rs
, new;
6067 memcpy(&rs
, rs_arg
, sizeof(struct brcms_c_rateset
));
6069 /* check for bad count value */
6070 if ((rs
.count
== 0) || (rs
.count
> BRCMS_NUMRATES
))
6073 /* try the current band */
6074 bandunit
= wlc
->band
->bandunit
;
6075 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
6076 if (brcms_c_rate_hwrs_filter_sort_validate
6077 (&new, &wlc
->bandstate
[bandunit
]->hw_rateset
, true,
6078 wlc
->stf
->txstreams
))
6081 /* try the other band */
6082 if (brcms_is_mband_unlocked(wlc
)) {
6083 bandunit
= OTHERBANDUNIT(wlc
);
6084 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
6085 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
6087 bandstate
[bandunit
]->
6089 wlc
->stf
->txstreams
))
6096 /* apply new rateset */
6097 memcpy(&wlc
->default_bss
->rateset
, &new,
6098 sizeof(struct brcms_c_rateset
));
6099 memcpy(&wlc
->bandstate
[bandunit
]->defrateset
, &new,
6100 sizeof(struct brcms_c_rateset
));
6104 static void brcms_c_ofdm_rateset_war(struct brcms_c_info
*wlc
)
6109 if (wlc
->bsscfg
->associated
)
6110 r
= wlc
->bsscfg
->current_bss
->rateset
.rates
[0];
6112 r
= wlc
->default_bss
->rateset
.rates
[0];
6114 wlc_phy_ofdm_rateset_war(wlc
->band
->pi
, war
);
6117 int brcms_c_set_channel(struct brcms_c_info
*wlc
, u16 channel
)
6119 u16 chspec
= ch20mhz_chspec(channel
);
6121 if (channel
< 0 || channel
> MAXCHANNEL
)
6124 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chspec
))
6128 if (!wlc
->pub
->up
&& brcms_is_mband_unlocked(wlc
)) {
6129 if (wlc
->band
->bandunit
!= chspec_bandunit(chspec
))
6130 wlc
->bandinit_pending
= true;
6132 wlc
->bandinit_pending
= false;
6135 wlc
->default_bss
->chanspec
= chspec
;
6136 /* brcms_c_BSSinit() will sanitize the rateset before
6138 if (wlc
->pub
->up
&& (wlc_phy_chanspec_get(wlc
->band
->pi
) != chspec
)) {
6139 brcms_c_set_home_chanspec(wlc
, chspec
);
6140 brcms_c_suspend_mac_and_wait(wlc
);
6141 brcms_c_set_chanspec(wlc
, chspec
);
6142 brcms_c_enable_mac(wlc
);
6147 int brcms_c_set_rate_limit(struct brcms_c_info
*wlc
, u16 srl
, u16 lrl
)
6151 if (srl
< 1 || srl
> RETRY_SHORT_MAX
||
6152 lrl
< 1 || lrl
> RETRY_SHORT_MAX
)
6158 brcms_b_retrylimit_upd(wlc
->hw
, wlc
->SRL
, wlc
->LRL
);
6160 for (ac
= 0; ac
< AC_COUNT
; ac
++) {
6161 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
6162 EDCF_SHORT
, wlc
->SRL
);
6163 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
6164 EDCF_LONG
, wlc
->LRL
);
6166 brcms_c_wme_retries_write(wlc
);
6171 void brcms_c_get_current_rateset(struct brcms_c_info
*wlc
,
6172 struct brcm_rateset
*currs
)
6174 struct brcms_c_rateset
*rs
;
6176 if (wlc
->pub
->associated
)
6177 rs
= &wlc
->bsscfg
->current_bss
->rateset
;
6179 rs
= &wlc
->default_bss
->rateset
;
6181 /* Copy only legacy rateset section */
6182 currs
->count
= rs
->count
;
6183 memcpy(&currs
->rates
, &rs
->rates
, rs
->count
);
6186 int brcms_c_set_rateset(struct brcms_c_info
*wlc
, struct brcm_rateset
*rs
)
6188 struct brcms_c_rateset internal_rs
;
6191 if (rs
->count
> BRCMS_NUMRATES
)
6194 memset(&internal_rs
, 0, sizeof(struct brcms_c_rateset
));
6196 /* Copy only legacy rateset section */
6197 internal_rs
.count
= rs
->count
;
6198 memcpy(&internal_rs
.rates
, &rs
->rates
, internal_rs
.count
);
6200 /* merge rateset coming in with the current mcsset */
6201 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
6202 struct brcms_bss_info
*mcsset_bss
;
6203 if (wlc
->bsscfg
->associated
)
6204 mcsset_bss
= wlc
->bsscfg
->current_bss
;
6206 mcsset_bss
= wlc
->default_bss
;
6207 memcpy(internal_rs
.mcs
, &mcsset_bss
->rateset
.mcs
[0],
6211 bcmerror
= brcms_c_set_internal_rateset(wlc
, &internal_rs
);
6213 brcms_c_ofdm_rateset_war(wlc
);
6218 int brcms_c_set_beacon_period(struct brcms_c_info
*wlc
, u16 period
)
6220 if (period
< DOT11_MIN_BEACON_PERIOD
||
6221 period
> DOT11_MAX_BEACON_PERIOD
)
6224 wlc
->default_bss
->beacon_period
= period
;
6228 u16
brcms_c_get_phy_type(struct brcms_c_info
*wlc
, int phyidx
)
6230 return wlc
->band
->phytype
;
6233 void brcms_c_set_shortslot_override(struct brcms_c_info
*wlc
, s8 sslot_override
)
6235 wlc
->shortslot_override
= sslot_override
;
6238 * shortslot is an 11g feature, so no more work if we are
6239 * currently on the 5G band
6241 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
6244 if (wlc
->pub
->up
&& wlc
->pub
->associated
) {
6245 /* let watchdog or beacon processing update shortslot */
6246 } else if (wlc
->pub
->up
) {
6247 /* unassociated shortslot is off */
6248 brcms_c_switch_shortslot(wlc
, false);
6250 /* driver is down, so just update the brcms_c_info
6252 if (wlc
->shortslot_override
== BRCMS_SHORTSLOT_AUTO
)
6253 wlc
->shortslot
= false;
6256 (wlc
->shortslot_override
==
6257 BRCMS_SHORTSLOT_ON
);
6262 * register watchdog and down handlers.
6264 int brcms_c_module_register(struct brcms_pub
*pub
,
6265 const char *name
, struct brcms_info
*hdl
,
6266 int (*d_fn
)(void *handle
))
6268 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
6271 /* find an empty entry and just add, no duplication check! */
6272 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
6273 if (wlc
->modulecb
[i
].name
[0] == '\0') {
6274 strncpy(wlc
->modulecb
[i
].name
, name
,
6275 sizeof(wlc
->modulecb
[i
].name
) - 1);
6276 wlc
->modulecb
[i
].hdl
= hdl
;
6277 wlc
->modulecb
[i
].down_fn
= d_fn
;
6285 /* unregister module callbacks */
6286 int brcms_c_module_unregister(struct brcms_pub
*pub
, const char *name
,
6287 struct brcms_info
*hdl
)
6289 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
6295 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
6296 if (!strcmp(wlc
->modulecb
[i
].name
, name
) &&
6297 (wlc
->modulecb
[i
].hdl
== hdl
)) {
6298 memset(&wlc
->modulecb
[i
], 0, sizeof(struct modulecb
));
6303 /* table not found! */
6308 static const char * const supr_reason
[] = {
6309 "None", "PMQ Entry", "Flush request",
6310 "Previous frag failure", "Channel mismatch",
6311 "Lifetime Expiry", "Underflow"
6314 static void brcms_c_print_txs_status(u16 s
)
6316 printk(KERN_DEBUG
"[15:12] %d frame attempts\n",
6317 (s
& TX_STATUS_FRM_RTX_MASK
) >> TX_STATUS_FRM_RTX_SHIFT
);
6318 printk(KERN_DEBUG
" [11:8] %d rts attempts\n",
6319 (s
& TX_STATUS_RTS_RTX_MASK
) >> TX_STATUS_RTS_RTX_SHIFT
);
6320 printk(KERN_DEBUG
" [7] %d PM mode indicated\n",
6321 ((s
& TX_STATUS_PMINDCTD
) ? 1 : 0));
6322 printk(KERN_DEBUG
" [6] %d intermediate status\n",
6323 ((s
& TX_STATUS_INTERMEDIATE
) ? 1 : 0));
6324 printk(KERN_DEBUG
" [5] %d AMPDU\n",
6325 (s
& TX_STATUS_AMPDU
) ? 1 : 0);
6326 printk(KERN_DEBUG
" [4:2] %d Frame Suppressed Reason (%s)\n",
6327 ((s
& TX_STATUS_SUPR_MASK
) >> TX_STATUS_SUPR_SHIFT
),
6328 supr_reason
[(s
& TX_STATUS_SUPR_MASK
) >> TX_STATUS_SUPR_SHIFT
]);
6329 printk(KERN_DEBUG
" [1] %d acked\n",
6330 ((s
& TX_STATUS_ACK_RCV
) ? 1 : 0));
6334 void brcms_c_print_txstatus(struct tx_status
*txs
)
6337 u16 s
= txs
->status
;
6338 u16 ackphyrxsh
= txs
->ackphyrxsh
;
6340 printk(KERN_DEBUG
"\ntxpkt (MPDU) Complete\n");
6342 printk(KERN_DEBUG
"FrameID: %04x ", txs
->frameid
);
6343 printk(KERN_DEBUG
"TxStatus: %04x", s
);
6344 printk(KERN_DEBUG
"\n");
6346 brcms_c_print_txs_status(s
);
6348 printk(KERN_DEBUG
"LastTxTime: %04x ", txs
->lasttxtime
);
6349 printk(KERN_DEBUG
"Seq: %04x ", txs
->sequence
);
6350 printk(KERN_DEBUG
"PHYTxStatus: %04x ", txs
->phyerr
);
6351 printk(KERN_DEBUG
"RxAckRSSI: %04x ",
6352 (ackphyrxsh
& PRXS1_JSSI_MASK
) >> PRXS1_JSSI_SHIFT
);
6353 printk(KERN_DEBUG
"RxAckSQ: %04x",
6354 (ackphyrxsh
& PRXS1_SQ_MASK
) >> PRXS1_SQ_SHIFT
);
6355 printk(KERN_DEBUG
"\n");
6356 #endif /* defined(BCMDBG) */
6359 void brcms_c_statsupd(struct brcms_c_info
*wlc
)
6362 struct macstat macstats
;
6369 /* if driver down, make no sense to update stats */
6374 /* save last rx fifo 0 overflow count */
6375 rxf0ovfl
= wlc
->core
->macstat_snapshot
->rxf0ovfl
;
6377 /* save last tx fifo underflow count */
6378 for (i
= 0; i
< NFIFO
; i
++)
6379 txfunfl
[i
] = wlc
->core
->macstat_snapshot
->txfunfl
[i
];
6382 /* Read mac stats from contiguous shared memory */
6383 brcms_b_copyfrom_objmem(wlc
->hw
, M_UCODE_MACSTAT
, &macstats
,
6384 sizeof(struct macstat
), OBJADDR_SHM_SEL
);
6387 /* check for rx fifo 0 overflow */
6388 delta
= (u16
) (wlc
->core
->macstat_snapshot
->rxf0ovfl
- rxf0ovfl
);
6390 wiphy_err(wlc
->wiphy
, "wl%d: %u rx fifo 0 overflows!\n",
6391 wlc
->pub
->unit
, delta
);
6393 /* check for tx fifo underflows */
6394 for (i
= 0; i
< NFIFO
; i
++) {
6396 (u16
) (wlc
->core
->macstat_snapshot
->txfunfl
[i
] -
6399 wiphy_err(wlc
->wiphy
, "wl%d: %u tx fifo %d underflows!"
6400 "\n", wlc
->pub
->unit
, delta
, i
);
6404 /* merge counters from dma module */
6405 for (i
= 0; i
< NFIFO
; i
++) {
6407 dma_counterreset(wlc
->hw
->di
[i
]);
6411 bool brcms_c_chipmatch(u16 vendor
, u16 device
)
6413 if (vendor
!= PCI_VENDOR_ID_BROADCOM
) {
6414 pr_err("chipmatch: unknown vendor id %04x\n", vendor
);
6418 if (device
== BCM43224_D11N_ID_VEN1
)
6420 if ((device
== BCM43224_D11N_ID
) || (device
== BCM43225_D11N2G_ID
))
6422 if (device
== BCM4313_D11N2G_ID
)
6424 if ((device
== BCM43236_D11N_ID
) || (device
== BCM43236_D11N2G_ID
))
6427 pr_err("chipmatch: unknown device id %04x\n", device
);
6432 void brcms_c_print_txdesc(struct d11txh
*txh
)
6434 u16 mtcl
= le16_to_cpu(txh
->MacTxControlLow
);
6435 u16 mtch
= le16_to_cpu(txh
->MacTxControlHigh
);
6436 u16 mfc
= le16_to_cpu(txh
->MacFrameControl
);
6437 u16 tfest
= le16_to_cpu(txh
->TxFesTimeNormal
);
6438 u16 ptcw
= le16_to_cpu(txh
->PhyTxControlWord
);
6439 u16 ptcw_1
= le16_to_cpu(txh
->PhyTxControlWord_1
);
6440 u16 ptcw_1_Fbr
= le16_to_cpu(txh
->PhyTxControlWord_1_Fbr
);
6441 u16 ptcw_1_Rts
= le16_to_cpu(txh
->PhyTxControlWord_1_Rts
);
6442 u16 ptcw_1_FbrRts
= le16_to_cpu(txh
->PhyTxControlWord_1_FbrRts
);
6443 u16 mainrates
= le16_to_cpu(txh
->MainRates
);
6444 u16 xtraft
= le16_to_cpu(txh
->XtraFrameTypes
);
6446 u8
*ra
= txh
->TxFrameRA
;
6447 u16 tfestfb
= le16_to_cpu(txh
->TxFesTimeFallback
);
6448 u8
*rtspfb
= txh
->RTSPLCPFallback
;
6449 u16 rtsdfb
= le16_to_cpu(txh
->RTSDurFallback
);
6450 u8
*fragpfb
= txh
->FragPLCPFallback
;
6451 u16 fragdfb
= le16_to_cpu(txh
->FragDurFallback
);
6452 u16 mmodelen
= le16_to_cpu(txh
->MModeLen
);
6453 u16 mmodefbrlen
= le16_to_cpu(txh
->MModeFbrLen
);
6454 u16 tfid
= le16_to_cpu(txh
->TxFrameID
);
6455 u16 txs
= le16_to_cpu(txh
->TxStatus
);
6456 u16 mnmpdu
= le16_to_cpu(txh
->MaxNMpdus
);
6457 u16 mabyte
= le16_to_cpu(txh
->MaxABytes_MRT
);
6458 u16 mabyte_f
= le16_to_cpu(txh
->MaxABytes_FBR
);
6459 u16 mmbyte
= le16_to_cpu(txh
->MinMBytes
);
6461 u8
*rtsph
= txh
->RTSPhyHeader
;
6462 struct ieee80211_rts rts
= txh
->rts_frame
;
6465 /* add plcp header along with txh descriptor */
6466 printk(KERN_DEBUG
"Raw TxDesc + plcp header:\n");
6467 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
6468 txh
, sizeof(struct d11txh
) + 48);
6470 printk(KERN_DEBUG
"TxCtlLow: %04x ", mtcl
);
6471 printk(KERN_DEBUG
"TxCtlHigh: %04x ", mtch
);
6472 printk(KERN_DEBUG
"FC: %04x ", mfc
);
6473 printk(KERN_DEBUG
"FES Time: %04x\n", tfest
);
6474 printk(KERN_DEBUG
"PhyCtl: %04x%s ", ptcw
,
6475 (ptcw
& PHY_TXC_SHORT_HDR
) ? " short" : "");
6476 printk(KERN_DEBUG
"PhyCtl_1: %04x ", ptcw_1
);
6477 printk(KERN_DEBUG
"PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr
);
6478 printk(KERN_DEBUG
"PhyCtl_1_Rts: %04x ", ptcw_1_Rts
);
6479 printk(KERN_DEBUG
"PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts
);
6480 printk(KERN_DEBUG
"MainRates: %04x ", mainrates
);
6481 printk(KERN_DEBUG
"XtraFrameTypes: %04x ", xtraft
);
6482 printk(KERN_DEBUG
"\n");
6484 brcmu_format_hex(hexbuf
, iv
, sizeof(txh
->IV
));
6485 printk(KERN_DEBUG
"SecIV: %s\n", hexbuf
);
6486 brcmu_format_hex(hexbuf
, ra
, sizeof(txh
->TxFrameRA
));
6487 printk(KERN_DEBUG
"RA: %s\n", hexbuf
);
6489 printk(KERN_DEBUG
"Fb FES Time: %04x ", tfestfb
);
6490 brcmu_format_hex(hexbuf
, rtspfb
, sizeof(txh
->RTSPLCPFallback
));
6491 printk(KERN_DEBUG
"RTS PLCP: %s ", hexbuf
);
6492 printk(KERN_DEBUG
"RTS DUR: %04x ", rtsdfb
);
6493 brcmu_format_hex(hexbuf
, fragpfb
, sizeof(txh
->FragPLCPFallback
));
6494 printk(KERN_DEBUG
"PLCP: %s ", hexbuf
);
6495 printk(KERN_DEBUG
"DUR: %04x", fragdfb
);
6496 printk(KERN_DEBUG
"\n");
6498 printk(KERN_DEBUG
"MModeLen: %04x ", mmodelen
);
6499 printk(KERN_DEBUG
"MModeFbrLen: %04x\n", mmodefbrlen
);
6501 printk(KERN_DEBUG
"FrameID: %04x\n", tfid
);
6502 printk(KERN_DEBUG
"TxStatus: %04x\n", txs
);
6504 printk(KERN_DEBUG
"MaxNumMpdu: %04x\n", mnmpdu
);
6505 printk(KERN_DEBUG
"MaxAggbyte: %04x\n", mabyte
);
6506 printk(KERN_DEBUG
"MaxAggbyte_fb: %04x\n", mabyte_f
);
6507 printk(KERN_DEBUG
"MinByte: %04x\n", mmbyte
);
6509 brcmu_format_hex(hexbuf
, rtsph
, sizeof(txh
->RTSPhyHeader
));
6510 printk(KERN_DEBUG
"RTS PLCP: %s ", hexbuf
);
6511 brcmu_format_hex(hexbuf
, (u8
*) &rts
, sizeof(txh
->rts_frame
));
6512 printk(KERN_DEBUG
"RTS Frame: %s", hexbuf
);
6513 printk(KERN_DEBUG
"\n");
6515 #endif /* defined(BCMDBG) */
6518 void brcms_c_print_rxh(struct d11rxhdr
*rxh
)
6520 u16 len
= rxh
->RxFrameSize
;
6521 u16 phystatus_0
= rxh
->PhyRxStatus_0
;
6522 u16 phystatus_1
= rxh
->PhyRxStatus_1
;
6523 u16 phystatus_2
= rxh
->PhyRxStatus_2
;
6524 u16 phystatus_3
= rxh
->PhyRxStatus_3
;
6525 u16 macstatus1
= rxh
->RxStatus1
;
6526 u16 macstatus2
= rxh
->RxStatus2
;
6529 static const struct brcmu_bit_desc macstat_flags
[] = {
6530 {RXS_FCSERR
, "FCSErr"},
6531 {RXS_RESPFRAMETX
, "Reply"},
6532 {RXS_PBPRES
, "PADDING"},
6533 {RXS_DECATMPT
, "DeCr"},
6534 {RXS_DECERR
, "DeCrErr"},
6535 {RXS_BCNSENT
, "Bcn"},
6539 printk(KERN_DEBUG
"Raw RxDesc:\n");
6540 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
, rxh
,
6541 sizeof(struct d11rxhdr
));
6543 brcmu_format_flags(macstat_flags
, macstatus1
, flagstr
, 64);
6545 snprintf(lenbuf
, sizeof(lenbuf
), "0x%x", len
);
6547 printk(KERN_DEBUG
"RxFrameSize: %6s (%d)%s\n", lenbuf
, len
,
6548 (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
) ? " short preamble" : "");
6549 printk(KERN_DEBUG
"RxPHYStatus: %04x %04x %04x %04x\n",
6550 phystatus_0
, phystatus_1
, phystatus_2
, phystatus_3
);
6551 printk(KERN_DEBUG
"RxMACStatus: %x %s\n", macstatus1
, flagstr
);
6552 printk(KERN_DEBUG
"RXMACaggtype: %x\n",
6553 (macstatus2
& RXS_AGGTYPE_MASK
));
6554 printk(KERN_DEBUG
"RxTSFTime: %04x\n", rxh
->RxTSFTime
);
6556 #endif /* defined(BCMDBG) */
6558 u16
brcms_b_rate_shm_offset(struct brcms_hardware
*wlc_hw
, u8 rate
)
6563 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6564 if (is_ofdm_rate(rate
))
6565 table_ptr
= M_RT_DIRMAP_A
;
6567 table_ptr
= M_RT_DIRMAP_B
;
6569 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6570 * the index into the rate table.
6572 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
6573 index
= phy_rate
& 0xf;
6575 /* Find the SHM pointer to the rate table entry by looking in the
6578 return 2 * brcms_b_read_shm(wlc_hw
, table_ptr
+ (index
* 2));
6581 static u16
brcms_c_rate_shm_offset(struct brcms_c_info
*wlc
, u8 rate
)
6583 return brcms_b_rate_shm_offset(wlc
->hw
, rate
);
6586 /* Callback for device removed */
6589 * Attempts to queue a packet onto a multiple-precedence queue,
6590 * if necessary evicting a lower precedence packet from the queue.
6592 * 'prec' is the precedence number that has already been mapped
6593 * from the packet priority.
6595 * Returns true if packet consumed (queued), false if not.
6597 static bool brcms_c_prec_enq(struct brcms_c_info
*wlc
, struct pktq
*q
,
6598 struct sk_buff
*pkt
, int prec
)
6600 return brcms_c_prec_enq_head(wlc
, q
, pkt
, prec
, false);
6604 brcms_c_prec_enq_head(struct brcms_c_info
*wlc
, struct pktq
*q
,
6605 struct sk_buff
*pkt
, int prec
, bool head
)
6608 int eprec
= -1; /* precedence to evict from */
6610 /* Determine precedence from which to evict packet, if any */
6611 if (pktq_pfull(q
, prec
))
6613 else if (pktq_full(q
)) {
6614 p
= brcmu_pktq_peek_tail(q
, &eprec
);
6616 wiphy_err(wlc
->wiphy
, "%s: Failing: eprec %d > prec %d"
6617 "\n", __func__
, eprec
, prec
);
6622 /* Evict if needed */
6624 bool discard_oldest
;
6626 discard_oldest
= ac_bitmap_tst(0, eprec
);
6628 /* Refuse newer packet unless configured to discard oldest */
6629 if (eprec
== prec
&& !discard_oldest
) {
6630 wiphy_err(wlc
->wiphy
, "%s: No where to go, prec == %d"
6631 "\n", __func__
, prec
);
6635 /* Evict packet according to discard policy */
6636 p
= discard_oldest
? brcmu_pktq_pdeq(q
, eprec
) :
6637 brcmu_pktq_pdeq_tail(q
, eprec
);
6638 brcmu_pkt_buf_free_skb(p
);
6643 p
= brcmu_pktq_penq_head(q
, prec
, pkt
);
6645 p
= brcmu_pktq_penq(q
, prec
, pkt
);
6650 void brcms_c_txq_enq(struct brcms_c_info
*wlc
, struct scb
*scb
,
6651 struct sk_buff
*sdu
, uint prec
)
6653 struct brcms_txq_info
*qi
= wlc
->pkt_queue
; /* Check me */
6654 struct pktq
*q
= &qi
->q
;
6657 prio
= sdu
->priority
;
6659 if (!brcms_c_prec_enq(wlc
, q
, sdu
, prec
)) {
6661 * we might hit this condtion in case
6662 * packet flooding from mac80211 stack
6664 brcmu_pkt_buf_free_skb(sdu
);
6669 * bcmc_fid_generate:
6670 * Generate frame ID for a BCMC packet. The frag field is not used
6671 * for MC frames so is used as part of the sequence number.
6674 bcmc_fid_generate(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*bsscfg
,
6679 frameid
= le16_to_cpu(txh
->TxFrameID
) & ~(TXFID_SEQ_MASK
|
6683 mc_fid_counter
++) << TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
6690 brcms_c_calc_ack_time(struct brcms_c_info
*wlc
, u32 rspec
,
6695 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d\n",
6696 wlc
->pub
->unit
, rspec
, preamble_type
);
6698 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6699 * is less than or equal to the rate of the immediately previous
6702 rspec
= brcms_basic_rate(wlc
, rspec
);
6703 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6705 brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6706 (DOT11_ACK_LEN
+ FCS_LEN
));
6711 brcms_c_calc_cts_time(struct brcms_c_info
*wlc
, u32 rspec
,
6714 BCMMSG(wlc
->wiphy
, "wl%d: ratespec 0x%x, preamble_type %d\n",
6715 wlc
->pub
->unit
, rspec
, preamble_type
);
6716 return brcms_c_calc_ack_time(wlc
, rspec
, preamble_type
);
6720 brcms_c_calc_ba_time(struct brcms_c_info
*wlc
, u32 rspec
,
6723 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, "
6724 "preamble_type %d\n", wlc
->pub
->unit
, rspec
, preamble_type
);
6726 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6727 * is less than or equal to the rate of the immediately previous
6730 rspec
= brcms_basic_rate(wlc
, rspec
);
6731 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6732 return brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6733 (DOT11_BA_LEN
+ DOT11_BA_BITMAP_LEN
+
6737 /* brcms_c_compute_frame_dur()
6739 * Calculate the 802.11 MAC header DUR field for MPDU
6740 * DUR for a single frame = 1 SIFS + 1 ACK
6741 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6743 * rate MPDU rate in unit of 500kbps
6744 * next_frag_len next MPDU length in bytes
6745 * preamble_type use short/GF or long/MM PLCP header
6748 brcms_c_compute_frame_dur(struct brcms_c_info
*wlc
, u32 rate
,
6749 u8 preamble_type
, uint next_frag_len
)
6753 sifs
= get_sifs(wlc
->band
);
6756 dur
+= (u16
) brcms_c_calc_ack_time(wlc
, rate
, preamble_type
);
6758 if (next_frag_len
) {
6759 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6761 /* add another SIFS and the frag time */
6764 (u16
) brcms_c_calc_frame_time(wlc
, rate
, preamble_type
,
6770 /* The opposite of brcms_c_calc_frame_time */
6772 brcms_c_calc_frame_len(struct brcms_c_info
*wlc
, u32 ratespec
,
6773 u8 preamble_type
, uint dur
)
6775 uint nsyms
, mac_len
, Ndps
, kNdps
;
6776 uint rate
= rspec2rate(ratespec
);
6778 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6779 wlc
->pub
->unit
, ratespec
, preamble_type
, dur
);
6781 if (is_mcs_rate(ratespec
)) {
6782 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
6783 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
6784 dur
-= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
6785 /* payload calculation matches that of regular ofdm */
6786 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
6787 dur
-= DOT11_OFDM_SIGNAL_EXTENSION
;
6788 /* kNdbps = kbps * 4 */
6789 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
6790 rspec_issgi(ratespec
)) * 4;
6791 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6794 ((APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
) * 1000)) / 8000;
6795 } else if (is_ofdm_rate(ratespec
)) {
6796 dur
-= APHY_PREAMBLE_TIME
;
6797 dur
-= APHY_SIGNAL_TIME
;
6798 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6800 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6803 (APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
)) / 8;
6805 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
6806 dur
-= BPHY_PLCP_SHORT_TIME
;
6808 dur
-= BPHY_PLCP_TIME
;
6809 mac_len
= dur
* rate
;
6810 /* divide out factor of 2 in rate (1/2 mbps) */
6811 mac_len
= mac_len
/ 8 / 2;
6817 mac80211_wlc_set_nrate(struct brcms_c_info
*wlc
, struct brcms_band
*cur_band
,
6820 u8 stf
= (int_val
& NRATE_STF_MASK
) >> NRATE_STF_SHIFT
;
6821 u8 rate
= int_val
& NRATE_RATE_MASK
;
6823 bool ismcs
= ((int_val
& NRATE_MCS_INUSE
) == NRATE_MCS_INUSE
);
6824 bool issgi
= ((int_val
& NRATE_SGI_MASK
) >> NRATE_SGI_SHIFT
);
6825 bool override_mcs_only
= ((int_val
& NRATE_OVERRIDE_MCS_ONLY
)
6826 == NRATE_OVERRIDE_MCS_ONLY
);
6832 /* validate the combination of rate/mcs/stf is allowed */
6833 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && ismcs
) {
6834 /* mcs only allowed when nmode */
6835 if (stf
> PHY_TXC1_MODE_SDM
) {
6836 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid stf\n",
6837 wlc
->pub
->unit
, __func__
);
6842 /* mcs 32 is a special case, DUP mode 40 only */
6844 if (!CHSPEC_IS40(wlc
->home_chanspec
) ||
6845 ((stf
!= PHY_TXC1_MODE_SISO
)
6846 && (stf
!= PHY_TXC1_MODE_CDD
))) {
6847 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid mcs "
6848 "32\n", wlc
->pub
->unit
, __func__
);
6852 /* mcs > 7 must use stf SDM */
6853 } else if (rate
> HIGHEST_SINGLE_STREAM_MCS
) {
6854 /* mcs > 7 must use stf SDM */
6855 if (stf
!= PHY_TXC1_MODE_SDM
) {
6856 BCMMSG(wlc
->wiphy
, "wl%d: enabling "
6857 "SDM mode for mcs %d\n",
6858 wlc
->pub
->unit
, rate
);
6859 stf
= PHY_TXC1_MODE_SDM
;
6863 * MCS 0-7 may use SISO, CDD, and for
6866 if ((stf
> PHY_TXC1_MODE_STBC
) ||
6867 (!BRCMS_STBC_CAP_PHY(wlc
)
6868 && (stf
== PHY_TXC1_MODE_STBC
))) {
6869 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid STBC"
6870 "\n", wlc
->pub
->unit
, __func__
);
6875 } else if (is_ofdm_rate(rate
)) {
6876 if ((stf
!= PHY_TXC1_MODE_CDD
) && (stf
!= PHY_TXC1_MODE_SISO
)) {
6877 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid OFDM\n",
6878 wlc
->pub
->unit
, __func__
);
6882 } else if (is_cck_rate(rate
)) {
6883 if ((cur_band
->bandtype
!= BRCM_BAND_2G
)
6884 || (stf
!= PHY_TXC1_MODE_SISO
)) {
6885 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid CCK\n",
6886 wlc
->pub
->unit
, __func__
);
6891 wiphy_err(wlc
->wiphy
, "wl%d: %s: Unknown rate type\n",
6892 wlc
->pub
->unit
, __func__
);
6896 /* make sure multiple antennae are available for non-siso rates */
6897 if ((stf
!= PHY_TXC1_MODE_SISO
) && (wlc
->stf
->txstreams
== 1)) {
6898 wiphy_err(wlc
->wiphy
, "wl%d: %s: SISO antenna but !SISO "
6899 "request\n", wlc
->pub
->unit
, __func__
);
6906 rspec
|= RSPEC_MIMORATE
;
6907 /* For STBC populate the STC field of the ratespec */
6908 if (stf
== PHY_TXC1_MODE_STBC
) {
6910 stc
= 1; /* Nss for single stream is always 1 */
6911 rspec
|= (stc
<< RSPEC_STC_SHIFT
);
6915 rspec
|= (stf
<< RSPEC_STF_SHIFT
);
6917 if (override_mcs_only
)
6918 rspec
|= RSPEC_OVERRIDE_MCS_ONLY
;
6921 rspec
|= RSPEC_SHORT_GI
;
6924 && !brcms_c_valid_rate(wlc
, rspec
, cur_band
->bandtype
, true))
6933 * Add struct d11txh, struct cck_phy_hdr.
6935 * 'p' data must start with 802.11 MAC header
6936 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6938 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6942 brcms_c_d11hdrs_mac80211(struct brcms_c_info
*wlc
, struct ieee80211_hw
*hw
,
6943 struct sk_buff
*p
, struct scb
*scb
, uint frag
,
6944 uint nfrags
, uint queue
, uint next_frag_len
)
6946 struct ieee80211_hdr
*h
;
6948 u8
*plcp
, plcp_fallback
[D11_PHY_HDR_LEN
];
6949 int len
, phylen
, rts_phylen
;
6950 u16 mch
, phyctl
, xfts
, mainrates
;
6951 u16 seq
= 0, mcl
= 0, status
= 0, frameid
= 0;
6952 u32 rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6953 u32 rts_rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6954 bool use_rts
= false;
6955 bool use_cts
= false;
6956 bool use_rifs
= false;
6957 bool short_preamble
[2] = { false, false };
6958 u8 preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6959 u8 rts_preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6960 u8
*rts_plcp
, rts_plcp_fallback
[D11_PHY_HDR_LEN
];
6961 struct ieee80211_rts
*rts
= NULL
;
6964 bool hwtkmic
= false;
6965 u16 mimo_ctlchbw
= PHY_TXC1_BW_20MHZ
;
6966 #define ANTCFG_NONE 0xFF
6967 u8 antcfg
= ANTCFG_NONE
;
6968 u8 fbantcfg
= ANTCFG_NONE
;
6969 uint phyctl1_stf
= 0;
6971 struct ieee80211_tx_rate
*txrate
[2];
6973 struct ieee80211_tx_info
*tx_info
;
6976 u8 mimo_preamble_type
;
6978 /* locate 802.11 MAC header */
6979 h
= (struct ieee80211_hdr
*)(p
->data
);
6980 qos
= ieee80211_is_data_qos(h
->frame_control
);
6982 /* compute length of frame in bytes for use in PLCP computations */
6983 len
= brcmu_pkttotlen(p
);
6984 phylen
= len
+ FCS_LEN
;
6987 tx_info
= IEEE80211_SKB_CB(p
);
6990 plcp
= skb_push(p
, D11_PHY_HDR_LEN
);
6992 /* add Broadcom tx descriptor header */
6993 txh
= (struct d11txh
*) skb_push(p
, D11_TXH_LEN
);
6994 memset(txh
, 0, D11_TXH_LEN
);
6997 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
6998 /* non-AP STA should never use BCMC queue */
6999 if (queue
== TX_BCMC_FIFO
) {
7000 wiphy_err(wlc
->wiphy
, "wl%d: %s: ASSERT queue == "
7001 "TX_BCMC!\n", wlc
->pub
->unit
, __func__
);
7002 frameid
= bcmc_fid_generate(wlc
, NULL
, txh
);
7004 /* Increment the counter for first fragment */
7005 if (tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
7006 scb
->seqnum
[p
->priority
]++;
7008 /* extract fragment number from frame first */
7009 seq
= le16_to_cpu(h
->seq_ctrl
) & FRAGNUM_MASK
;
7010 seq
|= (scb
->seqnum
[p
->priority
] << SEQNUM_SHIFT
);
7011 h
->seq_ctrl
= cpu_to_le16(seq
);
7013 frameid
= ((seq
<< TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
7014 (queue
& TXFID_QUEUE_MASK
);
7017 frameid
|= queue
& TXFID_QUEUE_MASK
;
7019 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
7020 if (ieee80211_is_beacon(h
->frame_control
))
7021 mcl
|= TXC_IGNOREPMQ
;
7023 txrate
[0] = tx_info
->control
.rates
;
7024 txrate
[1] = txrate
[0] + 1;
7027 * if rate control algorithm didn't give us a fallback
7028 * rate, use the primary rate
7030 if (txrate
[1]->idx
< 0)
7031 txrate
[1] = txrate
[0];
7033 for (k
= 0; k
< hw
->max_rates
; k
++) {
7034 is_mcs
= txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
? true : false;
7036 if ((txrate
[k
]->idx
>= 0)
7037 && (txrate
[k
]->idx
<
7038 hw
->wiphy
->bands
[tx_info
->band
]->n_bitrates
)) {
7040 hw
->wiphy
->bands
[tx_info
->band
]->
7041 bitrates
[txrate
[k
]->idx
].hw_value
;
7044 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
?
7047 rspec
[k
] = BRCM_RATE_1M
;
7050 rspec
[k
] = mac80211_wlc_set_nrate(wlc
, wlc
->band
,
7051 NRATE_MCS_INUSE
| txrate
[k
]->idx
);
7055 * Currently only support same setting for primay and
7056 * fallback rates. Unify flags for each rate into a
7057 * single value for the frame
7061 flags
& IEEE80211_TX_RC_USE_RTS_CTS
? true : false;
7064 flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
? true : false;
7069 * determine and validate primary rate
7070 * and fallback rates
7072 if (!rspec_active(rspec
[k
])) {
7073 rspec
[k
] = BRCM_RATE_1M
;
7075 if (!is_multicast_ether_addr(h
->addr1
)) {
7076 /* set tx antenna config */
7077 brcms_c_antsel_antcfg_get(wlc
->asi
, false,
7078 false, 0, 0, &antcfg
, &fbantcfg
);
7083 phyctl1_stf
= wlc
->stf
->ss_opmode
;
7085 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
7086 for (k
= 0; k
< hw
->max_rates
; k
++) {
7088 * apply siso/cdd to single stream mcs's or ofdm
7089 * if rspec is auto selected
7091 if (((is_mcs_rate(rspec
[k
]) &&
7092 is_single_stream(rspec
[k
] & RSPEC_RATE_MASK
)) ||
7093 is_ofdm_rate(rspec
[k
]))
7094 && ((rspec
[k
] & RSPEC_OVERRIDE_MCS_ONLY
)
7095 || !(rspec
[k
] & RSPEC_OVERRIDE
))) {
7096 rspec
[k
] &= ~(RSPEC_STF_MASK
| RSPEC_STC_MASK
);
7098 /* For SISO MCS use STBC if possible */
7099 if (is_mcs_rate(rspec
[k
])
7100 && BRCMS_STF_SS_STBC_TX(wlc
, scb
)) {
7103 /* Nss for single stream is always 1 */
7105 rspec
[k
] |= (PHY_TXC1_MODE_STBC
<<
7107 (stc
<< RSPEC_STC_SHIFT
);
7110 (phyctl1_stf
<< RSPEC_STF_SHIFT
);
7114 * Is the phy configured to use 40MHZ frames? If
7115 * so then pick the desired txbw
7117 if (brcms_chspec_bw(wlc
->chanspec
) == BRCMS_40_MHZ
) {
7118 /* default txbw is 20in40 SB */
7119 mimo_ctlchbw
= mimo_txbw
=
7120 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
7122 ? PHY_TXC1_BW_20MHZ_UP
: PHY_TXC1_BW_20MHZ
;
7124 if (is_mcs_rate(rspec
[k
])) {
7125 /* mcs 32 must be 40b/w DUP */
7126 if ((rspec
[k
] & RSPEC_RATE_MASK
)
7129 PHY_TXC1_BW_40MHZ_DUP
;
7131 } else if (wlc
->mimo_40txbw
!= AUTO
)
7132 mimo_txbw
= wlc
->mimo_40txbw
;
7133 /* else check if dst is using 40 Mhz */
7134 else if (scb
->flags
& SCB_IS40
)
7135 mimo_txbw
= PHY_TXC1_BW_40MHZ
;
7136 } else if (is_ofdm_rate(rspec
[k
])) {
7137 if (wlc
->ofdm_40txbw
!= AUTO
)
7138 mimo_txbw
= wlc
->ofdm_40txbw
;
7139 } else if (wlc
->cck_40txbw
!= AUTO
) {
7140 mimo_txbw
= wlc
->cck_40txbw
;
7144 * mcs32 is 40 b/w only.
7145 * This is possible for probe packets on
7148 if ((rspec
[k
] & RSPEC_RATE_MASK
) == 32)
7150 rspec
[k
] = RSPEC_MIMORATE
;
7152 mimo_txbw
= PHY_TXC1_BW_20MHZ
;
7155 /* Set channel width */
7156 rspec
[k
] &= ~RSPEC_BW_MASK
;
7157 if ((k
== 0) || ((k
> 0) && is_mcs_rate(rspec
[k
])))
7158 rspec
[k
] |= (mimo_txbw
<< RSPEC_BW_SHIFT
);
7160 rspec
[k
] |= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
7162 /* Disable short GI, not supported yet */
7163 rspec
[k
] &= ~RSPEC_SHORT_GI
;
7165 mimo_preamble_type
= BRCMS_MM_PREAMBLE
;
7166 if (txrate
[k
]->flags
& IEEE80211_TX_RC_GREEN_FIELD
)
7167 mimo_preamble_type
= BRCMS_GF_PREAMBLE
;
7169 if ((txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
)
7170 && (!is_mcs_rate(rspec
[k
]))) {
7171 wiphy_err(wlc
->wiphy
, "wl%d: %s: IEEE80211_TX_"
7172 "RC_MCS != is_mcs_rate(rspec)\n",
7173 wlc
->pub
->unit
, __func__
);
7176 if (is_mcs_rate(rspec
[k
])) {
7177 preamble_type
[k
] = mimo_preamble_type
;
7180 * if SGI is selected, then forced mm
7183 if ((rspec
[k
] & RSPEC_SHORT_GI
)
7184 && is_single_stream(rspec
[k
] &
7186 preamble_type
[k
] = BRCMS_MM_PREAMBLE
;
7189 /* should be better conditionalized */
7190 if (!is_mcs_rate(rspec
[0])
7191 && (tx_info
->control
.rates
[0].
7192 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
))
7193 preamble_type
[k
] = BRCMS_SHORT_PREAMBLE
;
7196 for (k
= 0; k
< hw
->max_rates
; k
++) {
7197 /* Set ctrlchbw as 20Mhz */
7198 rspec
[k
] &= ~RSPEC_BW_MASK
;
7199 rspec
[k
] |= (PHY_TXC1_BW_20MHZ
<< RSPEC_BW_SHIFT
);
7201 /* for nphy, stf of ofdm frames must follow policies */
7202 if (BRCMS_ISNPHY(wlc
->band
) && is_ofdm_rate(rspec
[k
])) {
7203 rspec
[k
] &= ~RSPEC_STF_MASK
;
7204 rspec
[k
] |= phyctl1_stf
<< RSPEC_STF_SHIFT
;
7209 /* Reset these for use with AMPDU's */
7210 txrate
[0]->count
= 0;
7211 txrate
[1]->count
= 0;
7213 /* (2) PROTECTION, may change rspec */
7214 if ((ieee80211_is_data(h
->frame_control
) ||
7215 ieee80211_is_mgmt(h
->frame_control
)) &&
7216 (phylen
> wlc
->RTSThresh
) && !is_multicast_ether_addr(h
->addr1
))
7219 /* (3) PLCP: determine PLCP header and MAC duration,
7220 * fill struct d11txh */
7221 brcms_c_compute_plcp(wlc
, rspec
[0], phylen
, plcp
);
7222 brcms_c_compute_plcp(wlc
, rspec
[1], phylen
, plcp_fallback
);
7223 memcpy(&txh
->FragPLCPFallback
,
7224 plcp_fallback
, sizeof(txh
->FragPLCPFallback
));
7226 /* Length field now put in CCK FBR CRC field */
7227 if (is_cck_rate(rspec
[1])) {
7228 txh
->FragPLCPFallback
[4] = phylen
& 0xff;
7229 txh
->FragPLCPFallback
[5] = (phylen
& 0xff00) >> 8;
7232 /* MIMO-RATE: need validation ?? */
7233 mainrates
= is_ofdm_rate(rspec
[0]) ?
7234 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr
*) plcp
) :
7237 /* DUR field for main rate */
7238 if (!ieee80211_is_pspoll(h
->frame_control
) &&
7239 !is_multicast_ether_addr(h
->addr1
) && !use_rifs
) {
7241 brcms_c_compute_frame_dur(wlc
, rspec
[0], preamble_type
[0],
7243 h
->duration_id
= cpu_to_le16(durid
);
7244 } else if (use_rifs
) {
7245 /* NAV protect to end of next max packet size */
7247 (u16
) brcms_c_calc_frame_time(wlc
, rspec
[0],
7249 DOT11_MAX_FRAG_LEN
);
7250 durid
+= RIFS_11N_TIME
;
7251 h
->duration_id
= cpu_to_le16(durid
);
7254 /* DUR field for fallback rate */
7255 if (ieee80211_is_pspoll(h
->frame_control
))
7256 txh
->FragDurFallback
= h
->duration_id
;
7257 else if (is_multicast_ether_addr(h
->addr1
) || use_rifs
)
7258 txh
->FragDurFallback
= 0;
7260 durid
= brcms_c_compute_frame_dur(wlc
, rspec
[1],
7261 preamble_type
[1], next_frag_len
);
7262 txh
->FragDurFallback
= cpu_to_le16(durid
);
7265 /* (4) MAC-HDR: MacTxControlLow */
7267 mcl
|= TXC_STARTMSDU
;
7269 if (!is_multicast_ether_addr(h
->addr1
))
7270 mcl
|= TXC_IMMEDACK
;
7272 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
7273 mcl
|= TXC_FREQBAND_5G
;
7275 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc
->band
->pi
)))
7278 /* set AMIC bit if using hardware TKIP MIC */
7282 txh
->MacTxControlLow
= cpu_to_le16(mcl
);
7284 /* MacTxControlHigh */
7287 /* Set fallback rate preamble type */
7288 if ((preamble_type
[1] == BRCMS_SHORT_PREAMBLE
) ||
7289 (preamble_type
[1] == BRCMS_GF_PREAMBLE
)) {
7290 if (rspec2rate(rspec
[1]) != BRCM_RATE_1M
)
7291 mch
|= TXC_PREAMBLE_DATA_FB_SHORT
;
7294 /* MacFrameControl */
7295 memcpy(&txh
->MacFrameControl
, &h
->frame_control
, sizeof(u16
));
7296 txh
->TxFesTimeNormal
= cpu_to_le16(0);
7298 txh
->TxFesTimeFallback
= cpu_to_le16(0);
7301 memcpy(&txh
->TxFrameRA
, &h
->addr1
, ETH_ALEN
);
7304 txh
->TxFrameID
= cpu_to_le16(frameid
);
7307 * TxStatus, Note the case of recreating the first frag of a suppressed
7308 * frame then we may need to reset the retry cnt's via the status reg
7310 txh
->TxStatus
= cpu_to_le16(status
);
7313 * extra fields for ucode AMPDU aggregation, the new fields are added to
7314 * the END of previous structure so that it's compatible in driver.
7316 txh
->MaxNMpdus
= cpu_to_le16(0);
7317 txh
->MaxABytes_MRT
= cpu_to_le16(0);
7318 txh
->MaxABytes_FBR
= cpu_to_le16(0);
7319 txh
->MinMBytes
= cpu_to_le16(0);
7321 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7322 * furnish struct d11txh */
7323 /* RTS PLCP header and RTS frame */
7324 if (use_rts
|| use_cts
) {
7325 if (use_rts
&& use_cts
)
7328 for (k
= 0; k
< 2; k
++) {
7329 rts_rspec
[k
] = brcms_c_rspec_to_rts_rspec(wlc
, rspec
[k
],
7334 if (!is_ofdm_rate(rts_rspec
[0]) &&
7335 !((rspec2rate(rts_rspec
[0]) == BRCM_RATE_1M
) ||
7336 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
7337 rts_preamble_type
[0] = BRCMS_SHORT_PREAMBLE
;
7338 mch
|= TXC_PREAMBLE_RTS_MAIN_SHORT
;
7341 if (!is_ofdm_rate(rts_rspec
[1]) &&
7342 !((rspec2rate(rts_rspec
[1]) == BRCM_RATE_1M
) ||
7343 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
7344 rts_preamble_type
[1] = BRCMS_SHORT_PREAMBLE
;
7345 mch
|= TXC_PREAMBLE_RTS_FB_SHORT
;
7348 /* RTS/CTS additions to MacTxControlLow */
7350 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDCTS
);
7352 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDRTS
);
7353 txh
->MacTxControlLow
|= cpu_to_le16(TXC_LONGFRAME
);
7356 /* RTS PLCP header */
7357 rts_plcp
= txh
->RTSPhyHeader
;
7359 rts_phylen
= DOT11_CTS_LEN
+ FCS_LEN
;
7361 rts_phylen
= DOT11_RTS_LEN
+ FCS_LEN
;
7363 brcms_c_compute_plcp(wlc
, rts_rspec
[0], rts_phylen
, rts_plcp
);
7365 /* fallback rate version of RTS PLCP header */
7366 brcms_c_compute_plcp(wlc
, rts_rspec
[1], rts_phylen
,
7368 memcpy(&txh
->RTSPLCPFallback
, rts_plcp_fallback
,
7369 sizeof(txh
->RTSPLCPFallback
));
7371 /* RTS frame fields... */
7372 rts
= (struct ieee80211_rts
*)&txh
->rts_frame
;
7374 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
, rts_rspec
[0],
7375 rspec
[0], rts_preamble_type
[0],
7376 preamble_type
[0], phylen
, false);
7377 rts
->duration
= cpu_to_le16(durid
);
7378 /* fallback rate version of RTS DUR field */
7379 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
,
7380 rts_rspec
[1], rspec
[1],
7381 rts_preamble_type
[1],
7382 preamble_type
[1], phylen
, false);
7383 txh
->RTSDurFallback
= cpu_to_le16(durid
);
7386 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7387 IEEE80211_STYPE_CTS
);
7389 memcpy(&rts
->ra
, &h
->addr2
, ETH_ALEN
);
7391 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7392 IEEE80211_STYPE_RTS
);
7394 memcpy(&rts
->ra
, &h
->addr1
, 2 * ETH_ALEN
);
7398 * low 8 bits: main frag rate/mcs,
7399 * high 8 bits: rts/cts rate/mcs
7401 mainrates
|= (is_ofdm_rate(rts_rspec
[0]) ?
7403 (struct ofdm_phy_hdr
*) rts_plcp
) :
7406 memset((char *)txh
->RTSPhyHeader
, 0, D11_PHY_HDR_LEN
);
7407 memset((char *)&txh
->rts_frame
, 0,
7408 sizeof(struct ieee80211_rts
));
7409 memset((char *)txh
->RTSPLCPFallback
, 0,
7410 sizeof(txh
->RTSPLCPFallback
));
7411 txh
->RTSDurFallback
= 0;
7414 #ifdef SUPPORT_40MHZ
7415 /* add null delimiter count */
7416 if ((tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && is_mcs_rate(rspec
))
7417 txh
->RTSPLCPFallback
[AMPDU_FBR_NULL_DELIM
] =
7418 brcm_c_ampdu_null_delim_cnt(wlc
->ampdu
, scb
, rspec
, phylen
);
7423 * Now that RTS/RTS FB preamble types are updated, write
7426 txh
->MacTxControlHigh
= cpu_to_le16(mch
);
7429 * MainRates (both the rts and frag plcp rates have
7430 * been calculated now)
7432 txh
->MainRates
= cpu_to_le16(mainrates
);
7434 /* XtraFrameTypes */
7435 xfts
= frametype(rspec
[1], wlc
->mimoft
);
7436 xfts
|= (frametype(rts_rspec
[0], wlc
->mimoft
) << XFTS_RTS_FT_SHIFT
);
7437 xfts
|= (frametype(rts_rspec
[1], wlc
->mimoft
) << XFTS_FBRRTS_FT_SHIFT
);
7438 xfts
|= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc
->band
->pi
)) <<
7440 txh
->XtraFrameTypes
= cpu_to_le16(xfts
);
7442 /* PhyTxControlWord */
7443 phyctl
= frametype(rspec
[0], wlc
->mimoft
);
7444 if ((preamble_type
[0] == BRCMS_SHORT_PREAMBLE
) ||
7445 (preamble_type
[0] == BRCMS_GF_PREAMBLE
)) {
7446 if (rspec2rate(rspec
[0]) != BRCM_RATE_1M
)
7447 phyctl
|= PHY_TXC_SHORT_HDR
;
7450 /* phytxant is properly bit shifted */
7451 phyctl
|= brcms_c_stf_d11hdrs_phyctl_txant(wlc
, rspec
[0]);
7452 txh
->PhyTxControlWord
= cpu_to_le16(phyctl
);
7454 /* PhyTxControlWord_1 */
7455 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7458 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[0]);
7459 txh
->PhyTxControlWord_1
= cpu_to_le16(phyctl1
);
7460 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[1]);
7461 txh
->PhyTxControlWord_1_Fbr
= cpu_to_le16(phyctl1
);
7463 if (use_rts
|| use_cts
) {
7464 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[0]);
7465 txh
->PhyTxControlWord_1_Rts
= cpu_to_le16(phyctl1
);
7466 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[1]);
7467 txh
->PhyTxControlWord_1_FbrRts
= cpu_to_le16(phyctl1
);
7471 * For mcs frames, if mixedmode(overloaded with long preamble)
7472 * is going to be set, fill in non-zero MModeLen and/or
7473 * MModeFbrLen it will be unnecessary if they are separated
7475 if (is_mcs_rate(rspec
[0]) &&
7476 (preamble_type
[0] == BRCMS_MM_PREAMBLE
)) {
7478 brcms_c_calc_lsig_len(wlc
, rspec
[0], phylen
);
7479 txh
->MModeLen
= cpu_to_le16(mmodelen
);
7482 if (is_mcs_rate(rspec
[1]) &&
7483 (preamble_type
[1] == BRCMS_MM_PREAMBLE
)) {
7485 brcms_c_calc_lsig_len(wlc
, rspec
[1], phylen
);
7486 txh
->MModeFbrLen
= cpu_to_le16(mmodefbrlen
);
7490 ac
= skb_get_queue_mapping(p
);
7491 if ((scb
->flags
& SCB_WMECAP
) && qos
&& wlc
->edcf_txop
[ac
]) {
7492 uint frag_dur
, dur
, dur_fallback
;
7494 /* WME: Update TXOP threshold */
7495 if (!(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && frag
== 0) {
7497 brcms_c_calc_frame_time(wlc
, rspec
[0],
7498 preamble_type
[0], phylen
);
7501 /* 1 RTS or CTS-to-self frame */
7503 brcms_c_calc_cts_time(wlc
, rts_rspec
[0],
7504 rts_preamble_type
[0]);
7506 brcms_c_calc_cts_time(wlc
, rts_rspec
[1],
7507 rts_preamble_type
[1]);
7508 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7509 dur
+= le16_to_cpu(rts
->duration
);
7511 le16_to_cpu(txh
->RTSDurFallback
);
7512 } else if (use_rifs
) {
7516 /* frame + SIFS + ACK */
7519 brcms_c_compute_frame_dur(wlc
, rspec
[0],
7520 preamble_type
[0], 0);
7523 brcms_c_calc_frame_time(wlc
, rspec
[1],
7527 brcms_c_compute_frame_dur(wlc
, rspec
[1],
7528 preamble_type
[1], 0);
7530 /* NEED to set TxFesTimeNormal (hard) */
7531 txh
->TxFesTimeNormal
= cpu_to_le16((u16
) dur
);
7533 * NEED to set fallback rate version of
7534 * TxFesTimeNormal (hard)
7536 txh
->TxFesTimeFallback
=
7537 cpu_to_le16((u16
) dur_fallback
);
7540 * update txop byte threshold (txop minus intraframe
7543 if (wlc
->edcf_txop
[ac
] >= (dur
- frag_dur
)) {
7547 brcms_c_calc_frame_len(wlc
,
7548 rspec
[0], preamble_type
[0],
7549 (wlc
->edcf_txop
[ac
] -
7551 /* range bound the fragthreshold */
7552 if (newfragthresh
< DOT11_MIN_FRAG_LEN
)
7555 else if (newfragthresh
>
7556 wlc
->usr_fragthresh
)
7558 wlc
->usr_fragthresh
;
7559 /* update the fragthresh and do txc update */
7560 if (wlc
->fragthresh
[queue
] !=
7561 (u16
) newfragthresh
)
7562 wlc
->fragthresh
[queue
] =
7563 (u16
) newfragthresh
;
7565 wiphy_err(wlc
->wiphy
, "wl%d: %s txop invalid "
7567 wlc
->pub
->unit
, fifo_names
[queue
],
7568 rspec2rate(rspec
[0]));
7571 if (dur
> wlc
->edcf_txop
[ac
])
7572 wiphy_err(wlc
->wiphy
, "wl%d: %s: %s txop "
7573 "exceeded phylen %d/%d dur %d/%d\n",
7574 wlc
->pub
->unit
, __func__
,
7576 phylen
, wlc
->fragthresh
[queue
],
7577 dur
, wlc
->edcf_txop
[ac
]);
7584 void brcms_c_sendpkt_mac80211(struct brcms_c_info
*wlc
, struct sk_buff
*sdu
,
7585 struct ieee80211_hw
*hw
)
7589 struct scb
*scb
= &wlc
->pri_scb
;
7590 struct ieee80211_hdr
*d11_header
= (struct ieee80211_hdr
*)(sdu
->data
);
7593 * 802.11 standard requires management traffic
7594 * to go at highest priority
7596 prio
= ieee80211_is_data(d11_header
->frame_control
) ? sdu
->priority
:
7598 fifo
= prio2fifo
[prio
];
7599 if (brcms_c_d11hdrs_mac80211(wlc
, hw
, sdu
, scb
, 0, 1, fifo
, 0))
7601 brcms_c_txq_enq(wlc
, scb
, sdu
, BRCMS_PRIO_TO_PREC(prio
));
7602 brcms_c_send_q(wlc
);
7605 void brcms_c_send_q(struct brcms_c_info
*wlc
)
7607 struct sk_buff
*pkt
[DOT11_MAXNUMFRAGS
];
7610 int err
= 0, i
, count
;
7612 struct brcms_txq_info
*qi
= wlc
->pkt_queue
;
7613 struct pktq
*q
= &qi
->q
;
7614 struct ieee80211_tx_info
*tx_info
;
7616 prec_map
= wlc
->tx_prec_map
;
7618 /* Send all the enq'd pkts that we can.
7619 * Dequeue packets with precedence with empty HW fifo only
7621 while (prec_map
&& (pkt
[0] = brcmu_pktq_mdeq(q
, prec_map
, &prec
))) {
7622 tx_info
= IEEE80211_SKB_CB(pkt
[0]);
7623 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
7624 err
= brcms_c_sendampdu(wlc
->ampdu
, qi
, pkt
, prec
);
7627 err
= brcms_c_prep_pdu(wlc
, pkt
[0], &fifo
);
7629 for (i
= 0; i
< count
; i
++)
7630 brcms_c_txfifo(wlc
, fifo
, pkt
[i
], true,
7635 if (err
== -EBUSY
) {
7636 brcmu_pktq_penq_head(q
, prec
, pkt
[0]);
7638 * If send failed due to any other reason than a
7639 * change in HW FIFO condition, quit. Otherwise,
7640 * read the new prec_map!
7642 if (prec_map
== wlc
->tx_prec_map
)
7644 prec_map
= wlc
->tx_prec_map
;
7650 brcms_c_txfifo(struct brcms_c_info
*wlc
, uint fifo
, struct sk_buff
*p
,
7651 bool commit
, s8 txpktpend
)
7653 u16 frameid
= INVALIDFID
;
7656 txh
= (struct d11txh
*) (p
->data
);
7658 /* When a BC/MC frame is being committed to the BCMC fifo
7659 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7661 if (fifo
== TX_BCMC_FIFO
)
7662 frameid
= le16_to_cpu(txh
->TxFrameID
);
7665 * Bump up pending count for if not using rpc. If rpc is
7666 * used, this will be handled in brcms_b_txfifo()
7669 wlc
->core
->txpktpend
[fifo
] += txpktpend
;
7670 BCMMSG(wlc
->wiphy
, "pktpend inc %d to %d\n",
7671 txpktpend
, wlc
->core
->txpktpend
[fifo
]);
7674 /* Commit BCMC sequence number in the SHM frame ID location */
7675 if (frameid
!= INVALIDFID
) {
7677 * To inform the ucode of the last mcast frame posted
7678 * so that it can clear moredata bit
7680 brcms_b_write_shm(wlc
->hw
, M_BCMC_FID
, frameid
);
7683 if (dma_txfast(wlc
->hw
->di
[fifo
], p
, commit
) < 0)
7684 wiphy_err(wlc
->wiphy
, "txfifo: fatal, toss frames !!!\n");
7688 * Compute PLCP, but only requires actual rate and length of pkt.
7689 * Rate is given in the driver standard multiple of 500 kbps.
7690 * le is set for 11 Mbps rate if necessary.
7691 * Broken out for PRQ.
7694 static void brcms_c_cck_plcp_set(struct brcms_c_info
*wlc
, int rate_500
,
7695 uint length
, u8
*plcp
)
7708 usec
= (length
<< 4) / 11;
7709 if ((length
<< 4) - (usec
* 11) > 0)
7713 usec
= (length
<< 3) / 11;
7714 if ((length
<< 3) - (usec
* 11) > 0) {
7716 if ((usec
* 11) - (length
<< 3) >= 8)
7717 le
= D11B_PLCP_SIGNAL_LE
;
7722 wiphy_err(wlc
->wiphy
,
7723 "brcms_c_cck_plcp_set: unsupported rate %d\n",
7725 rate_500
= BRCM_RATE_1M
;
7729 /* PLCP signal byte */
7730 plcp
[0] = rate_500
* 5; /* r (500kbps) * 5 == r (100kbps) */
7731 /* PLCP service byte */
7732 plcp
[1] = (u8
) (le
| D11B_PLCP_SIGNAL_LOCKED
);
7733 /* PLCP length u16, little endian */
7734 plcp
[2] = usec
& 0xff;
7735 plcp
[3] = (usec
>> 8) & 0xff;
7741 /* Rate: 802.11 rate code, length: PSDU length in octets */
7742 static void brcms_c_compute_mimo_plcp(u32 rspec
, uint length
, u8
*plcp
)
7744 u8 mcs
= (u8
) (rspec
& RSPEC_RATE_MASK
);
7746 if (rspec_is40mhz(rspec
) || (mcs
== 32))
7747 plcp
[0] |= MIMO_PLCP_40MHZ
;
7748 BRCMS_SET_MIMO_PLCP_LEN(plcp
, length
);
7749 plcp
[3] = rspec_mimoplcp3(rspec
); /* rspec already holds this byte */
7750 plcp
[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7751 plcp
[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7755 /* Rate: 802.11 rate code, length: PSDU length in octets */
7757 brcms_c_compute_ofdm_plcp(u32 rspec
, u32 length
, u8
*plcp
)
7761 int rate
= rspec2rate(rspec
);
7764 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7767 rate_signal
= rate_info
[rate
] & BRCMS_RATE_MASK
;
7768 memset(plcp
, 0, D11_PHY_HDR_LEN
);
7769 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr
*) plcp
, rate_signal
);
7771 tmp
= (length
& 0xfff) << 5;
7772 plcp
[2] |= (tmp
>> 16) & 0xff;
7773 plcp
[1] |= (tmp
>> 8) & 0xff;
7774 plcp
[0] |= tmp
& 0xff;
7777 /* Rate: 802.11 rate code, length: PSDU length in octets */
7778 static void brcms_c_compute_cck_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
7779 uint length
, u8
*plcp
)
7781 int rate
= rspec2rate(rspec
);
7783 brcms_c_cck_plcp_set(wlc
, rate
, length
, plcp
);
7787 brcms_c_compute_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
7788 uint length
, u8
*plcp
)
7790 if (is_mcs_rate(rspec
))
7791 brcms_c_compute_mimo_plcp(rspec
, length
, plcp
);
7792 else if (is_ofdm_rate(rspec
))
7793 brcms_c_compute_ofdm_plcp(rspec
, length
, plcp
);
7795 brcms_c_compute_cck_plcp(wlc
, rspec
, length
, plcp
);
7798 /* brcms_c_compute_rtscts_dur()
7800 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7801 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7802 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
7804 * cts cts-to-self or rts/cts
7805 * rts_rate rts or cts rate in unit of 500kbps
7806 * rate next MPDU rate in unit of 500kbps
7807 * frame_len next MPDU frame length in bytes
7810 brcms_c_compute_rtscts_dur(struct brcms_c_info
*wlc
, bool cts_only
,
7812 u32 frame_rate
, u8 rts_preamble_type
,
7813 u8 frame_preamble_type
, uint frame_len
, bool ba
)
7817 sifs
= get_sifs(wlc
->band
);
7823 (u16
) brcms_c_calc_cts_time(wlc
, rts_rate
,
7831 (u16
) brcms_c_calc_frame_time(wlc
, frame_rate
, frame_preamble_type
,
7835 (u16
) brcms_c_calc_ba_time(wlc
, frame_rate
,
7836 BRCMS_SHORT_PREAMBLE
);
7839 (u16
) brcms_c_calc_ack_time(wlc
, frame_rate
,
7840 frame_preamble_type
);
7844 u16
brcms_c_phytxctl1_calc(struct brcms_c_info
*wlc
, u32 rspec
)
7849 if (BRCMS_ISLCNPHY(wlc
->band
)) {
7850 bw
= PHY_TXC1_BW_20MHZ
;
7852 bw
= rspec_get_bw(rspec
);
7853 /* 10Mhz is not supported yet */
7854 if (bw
< PHY_TXC1_BW_20MHZ
) {
7855 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: bw %d is "
7856 "not supported yet, set to 20L\n", bw
);
7857 bw
= PHY_TXC1_BW_20MHZ
;
7861 if (is_mcs_rate(rspec
)) {
7862 uint mcs
= rspec
& RSPEC_RATE_MASK
;
7864 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7865 phyctl1
= rspec_phytxbyte2(rspec
);
7866 /* set the upper byte of phyctl1 */
7867 phyctl1
|= (mcs_table
[mcs
].tx_phy_ctl3
<< 8);
7868 } else if (is_cck_rate(rspec
) && !BRCMS_ISLCNPHY(wlc
->band
)
7869 && !BRCMS_ISSSLPNPHY(wlc
->band
)) {
7871 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7872 * Data Rate. Eventually MIMOPHY would also be converted to
7875 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7876 phyctl1
= (bw
| (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
7877 } else { /* legacy OFDM/CCK */
7879 /* get the phyctl byte from rate phycfg table */
7880 phycfg
= brcms_c_rate_legacy_phyctl(rspec2rate(rspec
));
7882 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: wrong "
7883 "legacy OFDM/CCK rate\n");
7886 /* set the upper byte of phyctl1 */
7888 (bw
| (phycfg
<< 8) |
7889 (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
7895 brcms_c_rspec_to_rts_rspec(struct brcms_c_info
*wlc
, u32 rspec
,
7896 bool use_rspec
, u16 mimo_ctlchbw
)
7901 /* use frame rate as rts rate */
7903 else if (wlc
->band
->gmode
&& wlc
->protection
->_g
&& !is_cck_rate(rspec
))
7904 /* Use 11Mbps as the g protection RTS target rate and fallback.
7905 * Use the brcms_basic_rate() lookup to find the best basic rate
7906 * under the target in case 11 Mbps is not Basic.
7907 * 6 and 9 Mbps are not usually selected by rate selection, but
7908 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7911 rts_rspec
= brcms_basic_rate(wlc
, BRCM_RATE_11M
);
7913 /* calculate RTS rate and fallback rate based on the frame rate
7914 * RTS must be sent at a basic rate since it is a
7915 * control frame, sec 9.6 of 802.11 spec
7917 rts_rspec
= brcms_basic_rate(wlc
, rspec
);
7919 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7920 /* set rts txbw to correct side band */
7921 rts_rspec
&= ~RSPEC_BW_MASK
;
7924 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7925 * 20MHz channel (DUP), otherwise send RTS on control channel
7927 if (rspec_is40mhz(rspec
) && !is_cck_rate(rts_rspec
))
7928 rts_rspec
|= (PHY_TXC1_BW_40MHZ_DUP
<< RSPEC_BW_SHIFT
);
7930 rts_rspec
|= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
7932 /* pick siso/cdd as default for ofdm */
7933 if (is_ofdm_rate(rts_rspec
)) {
7934 rts_rspec
&= ~RSPEC_STF_MASK
;
7935 rts_rspec
|= (wlc
->stf
->ss_opmode
<< RSPEC_STF_SHIFT
);
7941 void brcms_c_tbtt(struct brcms_c_info
*wlc
)
7943 if (!wlc
->bsscfg
->BSS
)
7945 * DirFrmQ is now valid...defer setting until end
7948 wlc
->qvalid
|= MCMD_DIRFRMQVAL
;
7952 brcms_c_txfifo_complete(struct brcms_c_info
*wlc
, uint fifo
, s8 txpktpend
)
7954 wlc
->core
->txpktpend
[fifo
] -= txpktpend
;
7955 BCMMSG(wlc
->wiphy
, "pktpend dec %d to %d\n", txpktpend
,
7956 wlc
->core
->txpktpend
[fifo
]);
7958 /* There is more room; mark precedences related to this FIFO sendable */
7959 wlc
->tx_prec_map
|= wlc
->fifo2prec_map
[fifo
];
7961 /* figure out which bsscfg is being worked on... */
7964 /* Update beacon listen interval in shared memory */
7965 void brcms_c_bcn_li_upd(struct brcms_c_info
*wlc
)
7967 /* wake up every DTIM is the default */
7968 if (wlc
->bcn_li_dtim
== 1)
7969 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
, 0);
7971 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
,
7972 (wlc
->bcn_li_dtim
<< 8) | wlc
->bcn_li_bcn
);
7976 brcms_b_read_tsf(struct brcms_hardware
*wlc_hw
, u32
*tsf_l_ptr
,
7979 struct d11regs __iomem
*regs
= wlc_hw
->regs
;
7981 /* read the tsf timer low, then high to get an atomic read */
7982 *tsf_l_ptr
= R_REG(®s
->tsf_timerlow
);
7983 *tsf_h_ptr
= R_REG(®s
->tsf_timerhigh
);
7987 * recover 64bit TSF value from the 16bit TSF value in the rx header
7988 * given the assumption that the TSF passed in header is within 65ms
7989 * of the current tsf.
7992 * 3.......6.......8.......0.......2.......4.......6.......8......0
7993 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7995 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7996 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7997 * receive call sequence after rx interrupt. Only the higher 16 bits
7998 * are used. Finally, the tsf_h is read from the tsf register.
8000 static u64
brcms_c_recover_tsf64(struct brcms_c_info
*wlc
,
8001 struct d11rxhdr
*rxh
)
8004 u16 rx_tsf_0_15
, rx_tsf_16_31
;
8006 brcms_b_read_tsf(wlc
->hw
, &tsf_l
, &tsf_h
);
8008 rx_tsf_16_31
= (u16
)(tsf_l
>> 16);
8009 rx_tsf_0_15
= rxh
->RxTSFTime
;
8012 * a greater tsf time indicates the low 16 bits of
8013 * tsf_l wrapped, so decrement the high 16 bits.
8015 if ((u16
)tsf_l
< rx_tsf_0_15
) {
8017 if (rx_tsf_16_31
== 0xffff)
8021 return ((u64
)tsf_h
<< 32) | (((u32
)rx_tsf_16_31
<< 16) + rx_tsf_0_15
);
8025 prep_mac80211_status(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
8027 struct ieee80211_rx_status
*rx_status
)
8032 unsigned char *plcp
;
8034 /* fill in TSF and flag its presence */
8035 rx_status
->mactime
= brcms_c_recover_tsf64(wlc
, rxh
);
8036 rx_status
->flag
|= RX_FLAG_MACTIME_MPDU
;
8038 channel
= BRCMS_CHAN_CHANNEL(rxh
->RxChan
);
8041 rx_status
->band
= IEEE80211_BAND_5GHZ
;
8042 rx_status
->freq
= ieee80211_ofdm_chan_to_freq(
8043 WF_CHAN_FACTOR_5_G
/2, channel
);
8046 rx_status
->band
= IEEE80211_BAND_2GHZ
;
8047 rx_status
->freq
= ieee80211_dsss_chan_to_freq(channel
);
8050 rx_status
->signal
= wlc_phy_rssi_compute(wlc
->hw
->band
->pi
, rxh
);
8054 rx_status
->antenna
=
8055 (rxh
->PhyRxStatus_0
& PRXS0_RXANT_UPSUBBAND
) ? 1 : 0;
8059 rspec
= brcms_c_compute_rspec(rxh
, plcp
);
8060 if (is_mcs_rate(rspec
)) {
8061 rx_status
->rate_idx
= rspec
& RSPEC_RATE_MASK
;
8062 rx_status
->flag
|= RX_FLAG_HT
;
8063 if (rspec_is40mhz(rspec
))
8064 rx_status
->flag
|= RX_FLAG_40MHZ
;
8066 switch (rspec2rate(rspec
)) {
8068 rx_status
->rate_idx
= 0;
8071 rx_status
->rate_idx
= 1;
8074 rx_status
->rate_idx
= 2;
8077 rx_status
->rate_idx
= 3;
8080 rx_status
->rate_idx
= 4;
8083 rx_status
->rate_idx
= 5;
8086 rx_status
->rate_idx
= 6;
8089 rx_status
->rate_idx
= 7;
8092 rx_status
->rate_idx
= 8;
8095 rx_status
->rate_idx
= 9;
8098 rx_status
->rate_idx
= 10;
8101 rx_status
->rate_idx
= 11;
8104 wiphy_err(wlc
->wiphy
, "%s: Unknown rate\n", __func__
);
8108 * For 5GHz, we should decrease the index as it is
8109 * a subset of the 2.4G rates. See bitrates field
8110 * of brcms_band_5GHz_nphy (in mac80211_if.c).
8112 if (rx_status
->band
== IEEE80211_BAND_5GHZ
)
8113 rx_status
->rate_idx
-= BRCMS_LEGACY_5G_RATE_OFFSET
;
8115 /* Determine short preamble and rate_idx */
8117 if (is_cck_rate(rspec
)) {
8118 if (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
)
8119 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
8120 } else if (is_ofdm_rate(rspec
)) {
8121 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
8123 wiphy_err(wlc
->wiphy
, "%s: Unknown modulation\n",
8128 if (plcp3_issgi(plcp
[3]))
8129 rx_status
->flag
|= RX_FLAG_SHORT_GI
;
8131 if (rxh
->RxStatus1
& RXS_DECERR
) {
8132 rx_status
->flag
|= RX_FLAG_FAILED_PLCP_CRC
;
8133 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
8136 if (rxh
->RxStatus1
& RXS_FCSERR
) {
8137 rx_status
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
8138 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_FCS_CRC\n",
8144 brcms_c_recvctl(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
8148 struct ieee80211_rx_status rx_status
;
8150 memset(&rx_status
, 0, sizeof(rx_status
));
8151 prep_mac80211_status(wlc
, rxh
, p
, &rx_status
);
8153 /* mac header+body length, exclude CRC and plcp header */
8154 len_mpdu
= p
->len
- D11_PHY_HDR_LEN
- FCS_LEN
;
8155 skb_pull(p
, D11_PHY_HDR_LEN
);
8156 __skb_trim(p
, len_mpdu
);
8158 memcpy(IEEE80211_SKB_RXCB(p
), &rx_status
, sizeof(rx_status
));
8159 ieee80211_rx_irqsafe(wlc
->pub
->ieee_hw
, p
);
8162 /* Process received frames */
8164 * Return true if more frames need to be processed. false otherwise.
8165 * Param 'bound' indicates max. # frames to process before break out.
8167 void brcms_c_recv(struct brcms_c_info
*wlc
, struct sk_buff
*p
)
8169 struct d11rxhdr
*rxh
;
8170 struct ieee80211_hdr
*h
;
8174 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
8176 /* frame starts with rxhdr */
8177 rxh
= (struct d11rxhdr
*) (p
->data
);
8179 /* strip off rxhdr */
8180 skb_pull(p
, BRCMS_HWRXOFF
);
8182 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8183 if (rxh
->RxStatus1
& RXS_PBPRES
) {
8185 wiphy_err(wlc
->wiphy
, "wl%d: recv: rcvd runt of "
8186 "len %d\n", wlc
->pub
->unit
, p
->len
);
8192 h
= (struct ieee80211_hdr
*)(p
->data
+ D11_PHY_HDR_LEN
);
8195 if (rxh
->RxStatus1
& RXS_FCSERR
) {
8196 if (wlc
->pub
->mac80211_state
& MAC80211_PROMISC_BCNS
) {
8197 wiphy_err(wlc
->wiphy
, "FCSERR while scanning******* -"
8201 wiphy_err(wlc
->wiphy
, "RCSERR!!!\n");
8206 /* check received pkt has at least frame control field */
8207 if (len
< D11_PHY_HDR_LEN
+ sizeof(h
->frame_control
))
8210 /* not supporting A-MSDU */
8211 is_amsdu
= rxh
->RxStatus2
& RXS_AMSDU_MASK
;
8215 brcms_c_recvctl(wlc
, rxh
, p
);
8219 brcmu_pkt_buf_free_skb(p
);
8222 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8223 * number of bytes goes in the length field
8225 * Formula given by HT PHY Spec v 1.13
8226 * len = 3(nsyms + nstream + 3) - 3
8229 brcms_c_calc_lsig_len(struct brcms_c_info
*wlc
, u32 ratespec
,
8232 uint nsyms
, len
= 0, kNdps
;
8234 BCMMSG(wlc
->wiphy
, "wl%d: rate %d, len%d\n",
8235 wlc
->pub
->unit
, rspec2rate(ratespec
), mac_len
);
8237 if (is_mcs_rate(ratespec
)) {
8238 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
8239 int tot_streams
= (mcs_2_txstreams(mcs
) + 1) +
8240 rspec_stc(ratespec
);
8243 * the payload duration calculation matches that
8246 /* 1000Ndbps = kbps * 4 */
8247 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
8248 rspec_issgi(ratespec
)) * 4;
8250 if (rspec_stc(ratespec
) == 0)
8252 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
8253 APHY_TAIL_NBITS
) * 1000, kNdps
);
8255 /* STBC needs to have even number of symbols */
8258 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
8259 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
8261 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8262 nsyms
+= (tot_streams
+ 3);
8264 * 3 bytes/symbol @ legacy 6Mbps rate
8265 * (-3) excluding service bits and tail bits
8267 len
= (3 * nsyms
) - 3;
8274 * calculate frame duration of a given rate and length, return
8278 brcms_c_calc_frame_time(struct brcms_c_info
*wlc
, u32 ratespec
,
8279 u8 preamble_type
, uint mac_len
)
8281 uint nsyms
, dur
= 0, Ndps
, kNdps
;
8282 uint rate
= rspec2rate(ratespec
);
8285 wiphy_err(wlc
->wiphy
, "wl%d: WAR: using rate of 1 mbps\n",
8287 rate
= BRCM_RATE_1M
;
8290 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8291 wlc
->pub
->unit
, ratespec
, preamble_type
, mac_len
);
8293 if (is_mcs_rate(ratespec
)) {
8294 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
8295 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
8297 dur
= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
8298 if (preamble_type
== BRCMS_MM_PREAMBLE
)
8300 /* 1000Ndbps = kbps * 4 */
8301 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
8302 rspec_issgi(ratespec
)) * 4;
8304 if (rspec_stc(ratespec
) == 0)
8306 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
8307 APHY_TAIL_NBITS
) * 1000, kNdps
);
8309 /* STBC needs to have even number of symbols */
8312 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
8313 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
8315 dur
+= APHY_SYMBOL_TIME
* nsyms
;
8316 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
8317 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
8318 } else if (is_ofdm_rate(rate
)) {
8319 dur
= APHY_PREAMBLE_TIME
;
8320 dur
+= APHY_SIGNAL_TIME
;
8321 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8323 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8325 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+ APHY_TAIL_NBITS
),
8327 dur
+= APHY_SYMBOL_TIME
* nsyms
;
8328 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
8329 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
8332 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8335 mac_len
= mac_len
* 8 * 2;
8336 /* calc ceiling of bits/rate = microseconds of air time */
8337 dur
= (mac_len
+ rate
- 1) / rate
;
8338 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
8339 dur
+= BPHY_PLCP_SHORT_TIME
;
8341 dur
+= BPHY_PLCP_TIME
;
8346 /* derive wlc->band->basic_rate[] table from 'rateset' */
8347 void brcms_c_rate_lookup_init(struct brcms_c_info
*wlc
,
8348 struct brcms_c_rateset
*rateset
)
8354 u8
*br
= wlc
->band
->basic_rate
;
8357 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8358 memset(br
, 0, BRCM_MAXRATE
+ 1);
8360 /* For each basic rate in the rates list, make an entry in the
8361 * best basic lookup.
8363 for (i
= 0; i
< rateset
->count
; i
++) {
8364 /* only make an entry for a basic rate */
8365 if (!(rateset
->rates
[i
] & BRCMS_RATE_FLAG
))
8368 /* mask off basic bit */
8369 rate
= (rateset
->rates
[i
] & BRCMS_RATE_MASK
);
8371 if (rate
> BRCM_MAXRATE
) {
8372 wiphy_err(wlc
->wiphy
, "brcms_c_rate_lookup_init: "
8373 "invalid rate 0x%X in rate set\n",
8381 /* The rate lookup table now has non-zero entries for each
8382 * basic rate, equal to the basic rate: br[basicN] = basicN
8384 * To look up the best basic rate corresponding to any
8385 * particular rate, code can use the basic_rate table
8388 * basic_rate = wlc->band->basic_rate[tx_rate]
8390 * Make sure there is a best basic rate entry for
8391 * every rate by walking up the table from low rates
8392 * to high, filling in holes in the lookup table
8395 for (i
= 0; i
< wlc
->band
->hw_rateset
.count
; i
++) {
8396 rate
= wlc
->band
->hw_rateset
.rates
[i
];
8398 if (br
[rate
] != 0) {
8399 /* This rate is a basic rate.
8400 * Keep track of the best basic rate so far by
8403 if (is_ofdm_rate(rate
))
8411 /* This rate is not a basic rate so figure out the
8412 * best basic rate less than this rate and fill in
8413 * the hole in the table
8416 br
[rate
] = is_ofdm_rate(rate
) ? ofdm_basic
: cck_basic
;
8421 if (is_ofdm_rate(rate
)) {
8423 * In 11g and 11a, the OFDM mandatory rates
8424 * are 6, 12, and 24 Mbps
8426 if (rate
>= BRCM_RATE_24M
)
8427 mandatory
= BRCM_RATE_24M
;
8428 else if (rate
>= BRCM_RATE_12M
)
8429 mandatory
= BRCM_RATE_12M
;
8431 mandatory
= BRCM_RATE_6M
;
8433 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8437 br
[rate
] = mandatory
;
8441 static void brcms_c_write_rate_shm(struct brcms_c_info
*wlc
, u8 rate
,
8445 u8 basic_phy_rate
, basic_index
;
8446 u16 dir_table
, basic_table
;
8449 /* Shared memory address for the table we are reading */
8450 dir_table
= is_ofdm_rate(basic_rate
) ? M_RT_DIRMAP_A
: M_RT_DIRMAP_B
;
8452 /* Shared memory address for the table we are writing */
8453 basic_table
= is_ofdm_rate(rate
) ? M_RT_BBRSMAP_A
: M_RT_BBRSMAP_B
;
8456 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8457 * the index into the rate table.
8459 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
8460 basic_phy_rate
= rate_info
[basic_rate
] & BRCMS_RATE_MASK
;
8461 index
= phy_rate
& 0xf;
8462 basic_index
= basic_phy_rate
& 0xf;
8464 /* Find the SHM pointer to the ACK rate entry by looking in the
8467 basic_ptr
= brcms_b_read_shm(wlc
->hw
, (dir_table
+ basic_index
* 2));
8469 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8470 * to the correct basic rate for the given incoming rate
8472 brcms_b_write_shm(wlc
->hw
, (basic_table
+ index
* 2), basic_ptr
);
8475 static const struct brcms_c_rateset
*
8476 brcms_c_rateset_get_hwrs(struct brcms_c_info
*wlc
)
8478 const struct brcms_c_rateset
*rs_dflt
;
8480 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
8481 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
8482 rs_dflt
= &ofdm_mimo_rates
;
8484 rs_dflt
= &cck_ofdm_mimo_rates
;
8485 } else if (wlc
->band
->gmode
)
8486 rs_dflt
= &cck_ofdm_rates
;
8488 rs_dflt
= &cck_rates
;
8493 void brcms_c_set_ratetable(struct brcms_c_info
*wlc
)
8495 const struct brcms_c_rateset
*rs_dflt
;
8496 struct brcms_c_rateset rs
;
8497 u8 rate
, basic_rate
;
8500 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
8502 brcms_c_rateset_copy(rs_dflt
, &rs
);
8503 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
8505 /* walk the phy rate table and update SHM basic rate lookup table */
8506 for (i
= 0; i
< rs
.count
; i
++) {
8507 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
8509 /* for a given rate brcms_basic_rate returns the rate at
8510 * which a response ACK/CTS should be sent.
8512 basic_rate
= brcms_basic_rate(wlc
, rate
);
8513 if (basic_rate
== 0)
8514 /* This should only happen if we are using a
8515 * restricted rateset.
8517 basic_rate
= rs
.rates
[0] & BRCMS_RATE_MASK
;
8519 brcms_c_write_rate_shm(wlc
, rate
, basic_rate
);
8524 * Return true if the specified rate is supported by the specified band.
8525 * BRCM_BAND_AUTO indicates the current band.
8527 bool brcms_c_valid_rate(struct brcms_c_info
*wlc
, u32 rspec
, int band
,
8530 struct brcms_c_rateset
*hw_rateset
;
8533 if ((band
== BRCM_BAND_AUTO
) || (band
== wlc
->band
->bandtype
))
8534 hw_rateset
= &wlc
->band
->hw_rateset
;
8535 else if (wlc
->pub
->_nbands
> 1)
8536 hw_rateset
= &wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->hw_rateset
;
8538 /* other band specified and we are a single band device */
8541 /* check if this is a mimo rate */
8542 if (is_mcs_rate(rspec
)) {
8543 if ((rspec
& RSPEC_RATE_MASK
) >= MCS_TABLE_SIZE
)
8546 return isset(hw_rateset
->mcs
, (rspec
& RSPEC_RATE_MASK
));
8549 for (i
= 0; i
< hw_rateset
->count
; i
++)
8550 if (hw_rateset
->rates
[i
] == rspec2rate(rspec
))
8554 wiphy_err(wlc
->wiphy
, "wl%d: valid_rate: rate spec 0x%x "
8555 "not in hw_rateset\n", wlc
->pub
->unit
, rspec
);
8560 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info
*wlc
, uint frame_len
)
8562 const struct brcms_c_rateset
*rs_dflt
;
8563 struct brcms_c_rateset rs
;
8566 u8 plcp
[D11_PHY_HDR_LEN
];
8570 sifs
= get_sifs(wlc
->band
);
8572 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
8574 brcms_c_rateset_copy(rs_dflt
, &rs
);
8575 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
8578 * walk the phy rate table and update MAC core SHM
8579 * basic rate table entries
8581 for (i
= 0; i
< rs
.count
; i
++) {
8582 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
8584 entry_ptr
= brcms_c_rate_shm_offset(wlc
, rate
);
8586 /* Calculate the Probe Response PLCP for the given rate */
8587 brcms_c_compute_plcp(wlc
, rate
, frame_len
, plcp
);
8590 * Calculate the duration of the Probe Response
8591 * frame plus SIFS for the MAC
8593 dur
= (u16
) brcms_c_calc_frame_time(wlc
, rate
,
8594 BRCMS_LONG_PREAMBLE
, frame_len
);
8597 /* Update the SHM Rate Table entry Probe Response values */
8598 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
,
8599 (u16
) (plcp
[0] + (plcp
[1] << 8)));
8600 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
+ 2,
8601 (u16
) (plcp
[2] + (plcp
[3] << 8)));
8602 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_DUR_POS
, dur
);
8606 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
8608 * PLCP header is 6 bytes.
8609 * 802.11 A3 header is 24 bytes.
8610 * Max beacon frame body template length is 112 bytes.
8611 * Max probe resp frame body template length is 110 bytes.
8613 * *len on input contains the max length of the packet available.
8615 * The *len value is set to the number of bytes in buf used, and starts
8616 * with the PLCP and included up to, but not including, the 4 byte FCS.
8619 brcms_c_bcn_prb_template(struct brcms_c_info
*wlc
, u16 type
,
8621 struct brcms_bss_cfg
*cfg
, u16
*buf
, int *len
)
8623 static const u8 ether_bcast
[ETH_ALEN
] = {255, 255, 255, 255, 255, 255};
8624 struct cck_phy_hdr
*plcp
;
8625 struct ieee80211_mgmt
*h
;
8626 int hdr_len
, body_len
;
8628 hdr_len
= D11_PHY_HDR_LEN
+ DOT11_MAC_HDR_LEN
;
8630 /* calc buffer size provided for frame body */
8631 body_len
= *len
- hdr_len
;
8632 /* return actual size */
8633 *len
= hdr_len
+ body_len
;
8635 /* format PHY and MAC headers */
8636 memset((char *)buf
, 0, hdr_len
);
8638 plcp
= (struct cck_phy_hdr
*) buf
;
8641 * PLCP for Probe Response frames are filled in from
8644 if (type
== IEEE80211_STYPE_BEACON
)
8646 brcms_c_compute_plcp(wlc
, bcn_rspec
,
8647 (DOT11_MAC_HDR_LEN
+ body_len
+ FCS_LEN
),
8650 /* "Regular" and 16 MBSS but not for 4 MBSS */
8651 /* Update the phytxctl for the beacon based on the rspec */
8652 brcms_c_beacon_phytxctl_txant_upd(wlc
, bcn_rspec
);
8654 h
= (struct ieee80211_mgmt
*)&plcp
[1];
8656 /* fill in 802.11 header */
8657 h
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
| type
);
8659 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8660 /* A1 filled in by MAC for prb resp, broadcast for bcn */
8661 if (type
== IEEE80211_STYPE_BEACON
)
8662 memcpy(&h
->da
, ðer_bcast
, ETH_ALEN
);
8663 memcpy(&h
->sa
, &cfg
->cur_etheraddr
, ETH_ALEN
);
8664 memcpy(&h
->bssid
, &cfg
->BSSID
, ETH_ALEN
);
8666 /* SEQ filled in by MAC */
8669 int brcms_c_get_header_len(void)
8675 * Update all beacons for the system.
8677 void brcms_c_update_beacon(struct brcms_c_info
*wlc
)
8679 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
8681 if (bsscfg
->up
&& !bsscfg
->BSS
)
8682 /* Clear the soft intmask */
8683 wlc
->defmacintmask
&= ~MI_BCNTPL
;
8686 /* Write ssid into shared memory */
8687 void brcms_c_shm_ssid_upd(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*cfg
)
8689 u8
*ssidptr
= cfg
->SSID
;
8691 u8 ssidbuf
[IEEE80211_MAX_SSID_LEN
];
8693 /* padding the ssid with zero and copy it into shm */
8694 memset(ssidbuf
, 0, IEEE80211_MAX_SSID_LEN
);
8695 memcpy(ssidbuf
, ssidptr
, cfg
->SSID_len
);
8697 brcms_c_copyto_shm(wlc
, base
, ssidbuf
, IEEE80211_MAX_SSID_LEN
);
8698 brcms_b_write_shm(wlc
->hw
, M_SSIDLEN
, (u16
) cfg
->SSID_len
);
8701 void brcms_c_update_probe_resp(struct brcms_c_info
*wlc
, bool suspend
)
8703 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
8705 /* update AP or IBSS probe responses */
8706 if (bsscfg
->up
&& !bsscfg
->BSS
)
8707 brcms_c_bss_update_probe_resp(wlc
, bsscfg
, suspend
);
8711 brcms_c_bss_update_probe_resp(struct brcms_c_info
*wlc
,
8712 struct brcms_bss_cfg
*cfg
,
8715 u16 prb_resp
[BCN_TMPL_LEN
/ 2];
8716 int len
= BCN_TMPL_LEN
;
8719 * write the probe response to hardware, or save in
8720 * the config structure
8723 /* create the probe response template */
8724 brcms_c_bcn_prb_template(wlc
, IEEE80211_STYPE_PROBE_RESP
, 0,
8725 cfg
, prb_resp
, &len
);
8728 brcms_c_suspend_mac_and_wait(wlc
);
8730 /* write the probe response into the template region */
8731 brcms_b_write_template_ram(wlc
->hw
, T_PRS_TPL_BASE
,
8732 (len
+ 3) & ~3, prb_resp
);
8734 /* write the length of the probe response frame (+PLCP/-FCS) */
8735 brcms_b_write_shm(wlc
->hw
, M_PRB_RESP_FRM_LEN
, (u16
) len
);
8737 /* write the SSID and SSID length */
8738 brcms_c_shm_ssid_upd(wlc
, cfg
);
8741 * Write PLCP headers and durations for probe response frames
8742 * at all rates. Use the actual frame length covered by the
8743 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8744 * by subtracting the PLCP len and adding the FCS.
8746 len
+= (-D11_PHY_HDR_LEN
+ FCS_LEN
);
8747 brcms_c_mod_prb_rsp_rate_table(wlc
, (u16
) len
);
8750 brcms_c_enable_mac(wlc
);
8753 /* prepares pdu for transmission. returns BCM error codes */
8754 int brcms_c_prep_pdu(struct brcms_c_info
*wlc
, struct sk_buff
*pdu
, uint
*fifop
)
8758 struct ieee80211_hdr
*h
;
8761 txh
= (struct d11txh
*) (pdu
->data
);
8762 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
8764 /* get the pkt queue info. This was put at brcms_c_sendctl or
8765 * brcms_c_send for PDU */
8766 fifo
= le16_to_cpu(txh
->TxFrameID
) & TXFID_QUEUE_MASK
;
8772 /* return if insufficient dma resources */
8773 if (*wlc
->core
->txavail
[fifo
] < MAX_DMA_SEGS
) {
8774 /* Mark precedences related to this FIFO, unsendable */
8775 /* A fifo is full. Clear precedences related to that FIFO */
8776 wlc
->tx_prec_map
&= ~(wlc
->fifo2prec_map
[fifo
]);
8782 void brcms_default_rateset(struct brcms_c_info
*wlc
, struct brcms_c_rateset
*rs
)
8784 brcms_c_rateset_default(rs
, NULL
, wlc
->band
->phytype
,
8785 wlc
->band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
8786 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
8787 brcms_chspec_bw(wlc
->default_bss
->chanspec
),
8788 wlc
->stf
->txstreams
);
8791 /* Copy a buffer to shared memory.
8792 * SHM 'offset' needs to be an even address and
8793 * Buffer length 'len' must be an even number of bytes
8795 void brcms_c_copyto_shm(struct brcms_c_info
*wlc
, uint offset
, const void *buf
,
8798 brcms_b_copyto_objmem(wlc
->hw
, offset
, buf
, len
, OBJADDR_SHM_SEL
);
8801 /* wrapper BMAC functions to for HIGH driver access */
8802 void brcms_c_mctrl(struct brcms_c_info
*wlc
, u32 mask
, u32 val
)
8804 brcms_b_mctrl(wlc
->hw
, mask
, val
);
8807 void brcms_c_mhf(struct brcms_c_info
*wlc
, u8 idx
, u16 mask
, u16 val
, int bands
)
8809 brcms_b_mhf(wlc
->hw
, idx
, mask
, val
, bands
);
8812 int brcms_b_xmtfifo_sz_get(struct brcms_hardware
*wlc_hw
, uint fifo
,
8818 *blocks
= wlc_hw
->xmtfifo_sz
[fifo
];
8823 void brcms_c_write_template_ram(struct brcms_c_info
*wlc
, int offset
, int len
,
8826 brcms_b_write_template_ram(wlc
->hw
, offset
, len
, buf
);
8830 brcms_c_set_addrmatch(struct brcms_c_info
*wlc
, int match_reg_offset
,
8833 brcms_b_set_addrmatch(wlc
->hw
, match_reg_offset
, addr
);
8834 if (match_reg_offset
== RCM_BSSID_OFFSET
)
8835 memcpy(wlc
->bsscfg
->BSSID
, addr
, ETH_ALEN
);
8838 void brcms_c_pllreq(struct brcms_c_info
*wlc
, bool set
, u32 req_bit
)
8840 brcms_b_pllreq(wlc
->hw
, set
, req_bit
);
8843 /* check for the particular priority flow control bit being set */
8845 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info
*wlc
,
8846 struct brcms_txq_info
*q
,
8851 if (prio
== ALLPRIO
)
8852 prio_mask
= TXQ_STOP_FOR_PRIOFC_MASK
;
8854 prio_mask
= NBITVAL(prio
);
8856 return (q
->stopped
& prio_mask
) == prio_mask
;
8859 /* propagate the flow control to all interfaces using the given tx queue */
8860 void brcms_c_txflowcontrol(struct brcms_c_info
*wlc
,
8861 struct brcms_txq_info
*qi
,
8867 BCMMSG(wlc
->wiphy
, "flow control kicks in\n");
8869 if (prio
== ALLPRIO
)
8870 prio_bits
= TXQ_STOP_FOR_PRIOFC_MASK
;
8872 prio_bits
= NBITVAL(prio
);
8874 cur_bits
= qi
->stopped
& prio_bits
;
8876 /* Check for the case of no change and return early
8877 * Otherwise update the bit and continue
8880 if (cur_bits
== prio_bits
)
8883 mboolset(qi
->stopped
, prio_bits
);
8888 mboolclr(qi
->stopped
, prio_bits
);
8891 /* If there is a flow control override we will not change the external
8892 * flow control state.
8894 if (qi
->stopped
& ~TXQ_STOP_FOR_PRIOFC_MASK
)
8897 brcms_c_txflowcontrol_signal(wlc
, qi
, on
, prio
);
8901 brcms_c_txflowcontrol_override(struct brcms_c_info
*wlc
,
8902 struct brcms_txq_info
*qi
,
8903 bool on
, uint override
)
8907 prev_override
= (qi
->stopped
& ~TXQ_STOP_FOR_PRIOFC_MASK
);
8909 /* Update the flow control bits and do an early return if there is
8910 * no change in the external flow control state.
8913 mboolset(qi
->stopped
, override
);
8914 /* if there was a previous override bit on, then setting this
8915 * makes no difference.
8920 brcms_c_txflowcontrol_signal(wlc
, qi
, ON
, ALLPRIO
);
8922 mboolclr(qi
->stopped
, override
);
8923 /* clearing an override bit will only make a difference for
8924 * flow control if it was the only bit set. For any other
8925 * override setting, just return
8927 if (prev_override
!= override
)
8930 if (qi
->stopped
== 0) {
8931 brcms_c_txflowcontrol_signal(wlc
, qi
, OFF
, ALLPRIO
);
8935 for (prio
= MAXPRIO
; prio
>= 0; prio
--) {
8936 if (!mboolisset(qi
->stopped
, NBITVAL(prio
)))
8937 brcms_c_txflowcontrol_signal(
8938 wlc
, qi
, OFF
, prio
);
8945 * Flag 'scan in progress' to withhold dynamic phy calibration
8947 void brcms_c_scan_start(struct brcms_c_info
*wlc
)
8949 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, true);
8952 void brcms_c_scan_stop(struct brcms_c_info
*wlc
)
8954 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, false);
8957 void brcms_c_associate_upd(struct brcms_c_info
*wlc
, bool state
)
8959 wlc
->pub
->associated
= state
;
8960 wlc
->bsscfg
->associated
= state
;
8964 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8965 * AMPDU traffic, packets pending in hardware have to be invalidated so that
8966 * when later on hardware releases them, they can be handled appropriately.
8968 void brcms_c_inval_dma_pkts(struct brcms_hardware
*hw
,
8969 struct ieee80211_sta
*sta
,
8970 void (*dma_callback_fn
))
8972 struct dma_pub
*dmah
;
8974 for (i
= 0; i
< NFIFO
; i
++) {
8977 dma_walk_packets(dmah
, dma_callback_fn
, sta
);
8981 int brcms_c_get_curband(struct brcms_c_info
*wlc
)
8983 return wlc
->band
->bandunit
;
8986 void brcms_c_wait_for_tx_completion(struct brcms_c_info
*wlc
, bool drop
)
8988 /* flush packet queue when requested */
8990 brcmu_pktq_flush(&wlc
->pkt_queue
->q
, false, NULL
, NULL
);
8992 /* wait for queue and DMA fifos to run dry */
8993 while (!pktq_empty(&wlc
->pkt_queue
->q
) || brcms_txpktpendtot(wlc
) > 0)
8994 brcms_msleep(wlc
->wl
, 1);
8997 void brcms_c_set_beacon_listen_interval(struct brcms_c_info
*wlc
, u8 interval
)
8999 wlc
->bcn_li_bcn
= interval
;
9001 brcms_c_bcn_li_upd(wlc
);
9004 int brcms_c_set_tx_power(struct brcms_c_info
*wlc
, int txpwr
)
9008 /* Remove override bit and clip to max qdbm value */
9009 qdbm
= min_t(uint
, txpwr
* BRCMS_TXPWR_DB_FACTOR
, 0xff);
9010 return wlc_phy_txpower_set(wlc
->band
->pi
, qdbm
, false);
9013 int brcms_c_get_tx_power(struct brcms_c_info
*wlc
)
9018 wlc_phy_txpower_get(wlc
->band
->pi
, &qdbm
, &override
);
9020 /* Return qdbm units */
9021 return (int)(qdbm
/ BRCMS_TXPWR_DB_FACTOR
);
9024 void brcms_c_set_radio_mpc(struct brcms_c_info
*wlc
, bool mpc
)
9027 brcms_c_radio_mpc_upd(wlc
);
9031 * Search the name=value vars for a specific one and return its value.
9032 * Returns NULL if not found.
9034 char *getvar(char *vars
, const char *name
)
9046 /* first look in vars[] */
9047 for (s
= vars
; s
&& *s
;) {
9048 if ((memcmp(s
, name
, len
) == 0) && (s
[len
] == '='))
9059 * Search the vars for a specific one and return its value as
9060 * an integer. Returns 0 if not found.
9062 int getintvar(char *vars
, const char *name
)
9067 val
= getvar(vars
, name
);
9068 if (val
&& !kstrtoul(val
, 0, &res
))