Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[zen-stable.git] / drivers / base / regmap / regcache.c
blob666f6f5011dc85339287f9b982f991e22081626b
1 /*
2 * Register cache access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/slab.h>
14 #include <linux/export.h>
15 #include <trace/events/regmap.h>
16 #include <linux/bsearch.h>
17 #include <linux/sort.h>
19 #include "internal.h"
21 static const struct regcache_ops *cache_types[] = {
22 &regcache_indexed_ops,
23 &regcache_rbtree_ops,
24 &regcache_lzo_ops,
27 static int regcache_hw_init(struct regmap *map)
29 int i, j;
30 int ret;
31 int count;
32 unsigned int val;
33 void *tmp_buf;
35 if (!map->num_reg_defaults_raw)
36 return -EINVAL;
38 if (!map->reg_defaults_raw) {
39 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
40 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
41 if (!tmp_buf)
42 return -EINVAL;
43 ret = regmap_bulk_read(map, 0, tmp_buf,
44 map->num_reg_defaults_raw);
45 if (ret < 0) {
46 kfree(tmp_buf);
47 return ret;
49 map->reg_defaults_raw = tmp_buf;
50 map->cache_free = 1;
53 /* calculate the size of reg_defaults */
54 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
55 val = regcache_get_val(map->reg_defaults_raw,
56 i, map->cache_word_size);
57 if (!val)
58 continue;
59 count++;
62 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
63 GFP_KERNEL);
64 if (!map->reg_defaults)
65 return -ENOMEM;
67 /* fill the reg_defaults */
68 map->num_reg_defaults = count;
69 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
70 val = regcache_get_val(map->reg_defaults_raw,
71 i, map->cache_word_size);
72 if (!val)
73 continue;
74 map->reg_defaults[j].reg = i;
75 map->reg_defaults[j].def = val;
76 j++;
79 return 0;
82 int regcache_init(struct regmap *map)
84 int ret;
85 int i;
86 void *tmp_buf;
88 if (map->cache_type == REGCACHE_NONE) {
89 map->cache_bypass = true;
90 return 0;
93 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
94 if (cache_types[i]->type == map->cache_type)
95 break;
97 if (i == ARRAY_SIZE(cache_types)) {
98 dev_err(map->dev, "Could not match compress type: %d\n",
99 map->cache_type);
100 return -EINVAL;
103 map->cache = NULL;
104 map->cache_ops = cache_types[i];
106 if (!map->cache_ops->read ||
107 !map->cache_ops->write ||
108 !map->cache_ops->name)
109 return -EINVAL;
111 /* We still need to ensure that the reg_defaults
112 * won't vanish from under us. We'll need to make
113 * a copy of it.
115 if (map->reg_defaults) {
116 if (!map->num_reg_defaults)
117 return -EINVAL;
118 tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
119 sizeof(struct reg_default), GFP_KERNEL);
120 if (!tmp_buf)
121 return -ENOMEM;
122 map->reg_defaults = tmp_buf;
123 } else if (map->num_reg_defaults_raw) {
124 /* Some devices such as PMICs don't have cache defaults,
125 * we cope with this by reading back the HW registers and
126 * crafting the cache defaults by hand.
128 ret = regcache_hw_init(map);
129 if (ret < 0)
130 return ret;
133 if (!map->max_register)
134 map->max_register = map->num_reg_defaults_raw;
136 if (map->cache_ops->init) {
137 dev_dbg(map->dev, "Initializing %s cache\n",
138 map->cache_ops->name);
139 return map->cache_ops->init(map);
141 return 0;
144 void regcache_exit(struct regmap *map)
146 if (map->cache_type == REGCACHE_NONE)
147 return;
149 BUG_ON(!map->cache_ops);
151 kfree(map->reg_defaults);
152 if (map->cache_free)
153 kfree(map->reg_defaults_raw);
155 if (map->cache_ops->exit) {
156 dev_dbg(map->dev, "Destroying %s cache\n",
157 map->cache_ops->name);
158 map->cache_ops->exit(map);
163 * regcache_read: Fetch the value of a given register from the cache.
165 * @map: map to configure.
166 * @reg: The register index.
167 * @value: The value to be returned.
169 * Return a negative value on failure, 0 on success.
171 int regcache_read(struct regmap *map,
172 unsigned int reg, unsigned int *value)
174 if (map->cache_type == REGCACHE_NONE)
175 return -ENOSYS;
177 BUG_ON(!map->cache_ops);
179 if (!regmap_readable(map, reg))
180 return -EIO;
182 if (!regmap_volatile(map, reg))
183 return map->cache_ops->read(map, reg, value);
185 return -EINVAL;
187 EXPORT_SYMBOL_GPL(regcache_read);
190 * regcache_write: Set the value of a given register in the cache.
192 * @map: map to configure.
193 * @reg: The register index.
194 * @value: The new register value.
196 * Return a negative value on failure, 0 on success.
198 int regcache_write(struct regmap *map,
199 unsigned int reg, unsigned int value)
201 if (map->cache_type == REGCACHE_NONE)
202 return 0;
204 BUG_ON(!map->cache_ops);
206 if (!regmap_writeable(map, reg))
207 return -EIO;
209 if (!regmap_volatile(map, reg))
210 return map->cache_ops->write(map, reg, value);
212 return 0;
214 EXPORT_SYMBOL_GPL(regcache_write);
217 * regcache_sync: Sync the register cache with the hardware.
219 * @map: map to configure.
221 * Any registers that should not be synced should be marked as
222 * volatile. In general drivers can choose not to use the provided
223 * syncing functionality if they so require.
225 * Return a negative value on failure, 0 on success.
227 int regcache_sync(struct regmap *map)
229 int ret = 0;
230 unsigned int val;
231 unsigned int i;
232 const char *name;
233 unsigned int bypass;
235 BUG_ON(!map->cache_ops);
237 mutex_lock(&map->lock);
238 /* Remember the initial bypass state */
239 bypass = map->cache_bypass;
240 dev_dbg(map->dev, "Syncing %s cache\n",
241 map->cache_ops->name);
242 name = map->cache_ops->name;
243 trace_regcache_sync(map->dev, name, "start");
244 if (map->cache_ops->sync) {
245 ret = map->cache_ops->sync(map);
246 } else {
247 for (i = 0; i < map->num_reg_defaults; i++) {
248 ret = regcache_read(map, i, &val);
249 if (ret < 0)
250 goto out;
251 map->cache_bypass = 1;
252 ret = _regmap_write(map, i, val);
253 map->cache_bypass = 0;
254 if (ret < 0)
255 goto out;
256 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
257 map->reg_defaults[i].reg,
258 map->reg_defaults[i].def);
262 out:
263 trace_regcache_sync(map->dev, name, "stop");
264 /* Restore the bypass state */
265 map->cache_bypass = bypass;
266 mutex_unlock(&map->lock);
268 return ret;
270 EXPORT_SYMBOL_GPL(regcache_sync);
273 * regcache_cache_only: Put a register map into cache only mode
275 * @map: map to configure
276 * @cache_only: flag if changes should be written to the hardware
278 * When a register map is marked as cache only writes to the register
279 * map API will only update the register cache, they will not cause
280 * any hardware changes. This is useful for allowing portions of
281 * drivers to act as though the device were functioning as normal when
282 * it is disabled for power saving reasons.
284 void regcache_cache_only(struct regmap *map, bool enable)
286 mutex_lock(&map->lock);
287 WARN_ON(map->cache_bypass && enable);
288 map->cache_only = enable;
289 mutex_unlock(&map->lock);
291 EXPORT_SYMBOL_GPL(regcache_cache_only);
294 * regcache_cache_bypass: Put a register map into cache bypass mode
296 * @map: map to configure
297 * @cache_bypass: flag if changes should not be written to the hardware
299 * When a register map is marked with the cache bypass option, writes
300 * to the register map API will only update the hardware and not the
301 * the cache directly. This is useful when syncing the cache back to
302 * the hardware.
304 void regcache_cache_bypass(struct regmap *map, bool enable)
306 mutex_lock(&map->lock);
307 WARN_ON(map->cache_only && enable);
308 map->cache_bypass = enable;
309 mutex_unlock(&map->lock);
311 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
313 bool regcache_set_val(void *base, unsigned int idx,
314 unsigned int val, unsigned int word_size)
316 switch (word_size) {
317 case 1: {
318 u8 *cache = base;
319 if (cache[idx] == val)
320 return true;
321 cache[idx] = val;
322 break;
324 case 2: {
325 u16 *cache = base;
326 if (cache[idx] == val)
327 return true;
328 cache[idx] = val;
329 break;
331 default:
332 BUG();
334 /* unreachable */
335 return false;
338 unsigned int regcache_get_val(const void *base, unsigned int idx,
339 unsigned int word_size)
341 if (!base)
342 return -EINVAL;
344 switch (word_size) {
345 case 1: {
346 const u8 *cache = base;
347 return cache[idx];
349 case 2: {
350 const u16 *cache = base;
351 return cache[idx];
353 default:
354 BUG();
356 /* unreachable */
357 return -1;
360 static int regcache_default_cmp(const void *a, const void *b)
362 const struct reg_default *_a = a;
363 const struct reg_default *_b = b;
365 return _a->reg - _b->reg;
368 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
370 struct reg_default key;
371 struct reg_default *r;
373 key.reg = reg;
374 key.def = 0;
376 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
377 sizeof(struct reg_default), regcache_default_cmp);
379 if (r)
380 return r - map->reg_defaults;
381 else
382 return -ENOENT;
385 int regcache_insert_reg(struct regmap *map, unsigned int reg,
386 unsigned int val)
388 void *tmp;
390 tmp = krealloc(map->reg_defaults,
391 (map->num_reg_defaults + 1) * sizeof(struct reg_default),
392 GFP_KERNEL);
393 if (!tmp)
394 return -ENOMEM;
395 map->reg_defaults = tmp;
396 map->num_reg_defaults++;
397 map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
398 map->reg_defaults[map->num_reg_defaults - 1].def = val;
399 sort(map->reg_defaults, map->num_reg_defaults,
400 sizeof(struct reg_default), regcache_default_cmp, NULL);
401 return 0;