arch/x86/include/asm/amd_nb.h

   1 #ifndef _ASM_X86_AMD_NB_H
   2 #define _ASM_X86_AMD_NB_H
   3
   4 #include <linux/ioport.h>
   5 #include <linux/pci.h>
   6
   7 struct amd_nb_bus_dev_range {
   8         u8 bus;
   9         u8 dev_base;
  10         u8 dev_limit;
  11 };
  12
  13 extern const struct pci_device_id amd_nb_misc_ids[];
  14 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
  15
  16 extern bool early_is_amd_nb(u32 value);
  17 extern struct resource *amd_get_mmconfig_range(struct resource *res);
  18 extern int amd_cache_northbridges(void);
  19 extern void amd_flush_garts(void);
  20 extern int amd_numa_init(void);
  21 extern int amd_get_subcaches(int);
  22 extern int amd_set_subcaches(int, int);
  23
  24 struct amd_l3_cache {
  25         unsigned indices;
  26         u8       subcaches[4];
  27 };
  28
  29 struct amd_northbridge {
  30         struct pci_dev *misc;
  31         struct pci_dev *link;
  32         struct amd_l3_cache l3_cache;
  33 };
  34
  35 struct amd_northbridge_info {
  36         u16 num;
  37         u64 flags;
  38         struct amd_northbridge *nb;
  39 };
  40 extern struct amd_northbridge_info amd_northbridges;
  41
  42 #define AMD_NB_GART                     BIT(0)
  43 #define AMD_NB_L3_INDEX_DISABLE         BIT(1)
  44 #define AMD_NB_L3_PARTITIONING          BIT(2)
  45
  46 #ifdef CONFIG_AMD_NB
  47
  48 static inline u16 amd_nb_num(void)
  49 {
  50         return amd_northbridges.num;
  51 }
  52
  53 static inline bool amd_nb_has_feature(unsigned feature)
  54 {
  55         return ((amd_northbridges.flags & feature) == feature);
  56 }
  57
  58 static inline struct amd_northbridge *node_to_amd_nb(int node)
  59 {
  60         return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
  61 }
  62
  63 #else
  64
  65 #define amd_nb_num(x)           0
  66 #define amd_nb_has_feature(x)   false
  67 #define node_to_amd_nb(x)       NULL
  68
  69 #endif
  70
  71
  72 #endif /* _ASM_X86_AMD_NB_H */