1 Integrated Flash Controller
5 - compatible : should contain "fsl,ifc". The version of the integrated
6 flash controller can be found in the IFC_REV register at
9 - #address-cells : Should be either two or three. The first cell is the
10 chipselect number, and the remaining cells are the
11 offset into the chipselect.
12 - #size-cells : Either one or two, depending on how large each chipselect
14 - reg : Offset and length of the register set for the device
15 - interrupts : IFC has two interrupts. The first one is the "common"
16 interrupt(CM_EVTER_STAT), and second is the NAND interrupt
19 - ranges : Each range corresponds to a single chipselect, and covers
20 the entire access window as configured.
22 Child device nodes describe the devices connected to IFC such as NOR (e.g.
23 cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
24 like FPGAs, CPLDs, etc.
29 compatible = "fsl,ifc", "simple-bus";
32 reg = <0x0 0xffe1e000 0 0x2000>;
33 interrupts = <16 2 19 2>;
35 /* NOR, NAND Flashes and CPLD on board */
36 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
37 0x1 0x0 0x0 0xffa00000 0x00010000
38 0x3 0x0 0x0 0xffb00000 0x00020000>;
43 compatible = "cfi-flash";
44 reg = <0x0 0x0 0x2000000>;
49 /* 32MB for user data */
50 reg = <0x0 0x02000000>;
58 compatible = "fsl,ifc-nand";
59 reg = <0x1 0x0 0x10000>;
62 /* This location must not be altered */
63 /* 1MB for u-boot Bootloader Image */
64 reg = <0x0 0x00100000>;
65 label = "NAND U-Boot Image";
73 compatible = "fsl,p1010rdb-cpld";
74 reg = <0x3 0x0 0x000001f>;