arch/arm/mach-omap1/board-fsample.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-fsample.c
   3  *
   4  * Modified from board-perseus2.c
   5  *
   6  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
   7  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13 #include <linux/gpio.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/delay.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/input.h>
  23 #include <linux/smc91x.h>
  24
  25 #include <mach/hardware.h>
  26 #include <asm/mach-types.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <plat/tc.h>
  31 #include <plat/mux.h>
  32 #include <plat/flash.h>
  33 #include <plat/fpga.h>
  34 #include <plat/keypad.h>
  35 #include "common.h"
  36 #include <plat/board.h>
  37
  38 /* fsample is pretty close to p2-sample */
  39
  40 #define fsample_cpld_read(reg) __raw_readb(reg)
  41 #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
  42
  43 #define FSAMPLE_CPLD_BASE    0xE8100000
  44 #define FSAMPLE_CPLD_SIZE    SZ_4K
  45 #define FSAMPLE_CPLD_START   0x05080000
  46
  47 #define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
  48 #define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
  49 #define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
  50 #define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
  51 #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
  52 #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
  53
  54 #define FSAMPLE_CPLD_BIT_BT_RESET         0
  55 #define FSAMPLE_CPLD_BIT_LCD_RESET        1
  56 #define FSAMPLE_CPLD_BIT_CAM_PWDN         2
  57 #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
  58 #define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
  59 #define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
  60 #define FSAMPLE_CPLD_BIT_BACKLIGHT        6
  61 #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
  62 #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
  63 #define FSAMPLE_CPLD_BIT_OTG_RESET        9
  64
  65 #define fsample_cpld_set(bit) \
  66     fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
  67
  68 #define fsample_cpld_clear(bit) \
  69     fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
  70
  71 static const unsigned int fsample_keymap[] = {
  72         KEY(0, 0, KEY_UP),
  73         KEY(1, 0, KEY_RIGHT),
  74         KEY(2, 0, KEY_LEFT),
  75         KEY(3, 0, KEY_DOWN),
  76         KEY(4, 0, KEY_ENTER),
  77         KEY(0, 1, KEY_F10),
  78         KEY(1, 1, KEY_SEND),
  79         KEY(2, 1, KEY_END),
  80         KEY(3, 1, KEY_VOLUMEDOWN),
  81         KEY(4, 1, KEY_VOLUMEUP),
  82         KEY(5, 1, KEY_RECORD),
  83         KEY(0, 2, KEY_F9),
  84         KEY(1, 2, KEY_3),
  85         KEY(2, 2, KEY_6),
  86         KEY(3, 2, KEY_9),
  87         KEY(4, 2, KEY_KPDOT),
  88         KEY(0, 3, KEY_BACK),
  89         KEY(1, 3, KEY_2),
  90         KEY(2, 3, KEY_5),
  91         KEY(3, 3, KEY_8),
  92         KEY(4, 3, KEY_0),
  93         KEY(5, 3, KEY_KPSLASH),
  94         KEY(0, 4, KEY_HOME),
  95         KEY(1, 4, KEY_1),
  96         KEY(2, 4, KEY_4),
  97         KEY(3, 4, KEY_7),
  98         KEY(4, 4, KEY_KPASTERISK),
  99         KEY(5, 4, KEY_POWER),
 100 };
 101
 102 static struct smc91x_platdata smc91x_info = {
 103         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 104         .leda   = RPC_LED_100_10,
 105         .ledb   = RPC_LED_TX_RX,
 106 };
 107
 108 static struct resource smc91x_resources[] = {
 109         [0] = {
 110                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
 111                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
 112                 .flags  = IORESOURCE_MEM,
 113         },
 114         [1] = {
 115                 .start  = INT_7XX_MPU_EXT_NIRQ,
 116                 .end    = 0,
 117                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 118         },
 119 };
 120
 121 static void __init fsample_init_smc91x(void)
 122 {
 123         fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
 124         mdelay(50);
 125         fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
 126                    H2P2_DBG_FPGA_LAN_RESET);
 127         mdelay(50);
 128 }
 129
 130 static struct mtd_partition nor_partitions[] = {
 131         /* bootloader (U-Boot, etc) in first sector */
 132         {
 133               .name             = "bootloader",
 134               .offset           = 0,
 135               .size             = SZ_128K,
 136               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 137         },
 138         /* bootloader params in the next sector */
 139         {
 140               .name             = "params",
 141               .offset           = MTDPART_OFS_APPEND,
 142               .size             = SZ_128K,
 143               .mask_flags       = 0,
 144         },
 145         /* kernel */
 146         {
 147               .name             = "kernel",
 148               .offset           = MTDPART_OFS_APPEND,
 149               .size             = SZ_2M,
 150               .mask_flags       = 0
 151         },
 152         /* rest of flash is a file system */
 153         {
 154               .name             = "rootfs",
 155               .offset           = MTDPART_OFS_APPEND,
 156               .size             = MTDPART_SIZ_FULL,
 157               .mask_flags       = 0
 158         },
 159 };
 160
 161 static struct physmap_flash_data nor_data = {
 162         .width          = 2,
 163         .set_vpp        = omap1_set_vpp,
 164         .parts          = nor_partitions,
 165         .nr_parts       = ARRAY_SIZE(nor_partitions),
 166 };
 167
 168 static struct resource nor_resource = {
 169         .start          = OMAP_CS0_PHYS,
 170         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
 171         .flags          = IORESOURCE_MEM,
 172 };
 173
 174 static struct platform_device nor_device = {
 175         .name           = "physmap-flash",
 176         .id             = 0,
 177         .dev            = {
 178                 .platform_data  = &nor_data,
 179         },
 180         .num_resources  = 1,
 181         .resource       = &nor_resource,
 182 };
 183
 184 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 185 {
 186         struct nand_chip *this = mtd->priv;
 187         unsigned long mask;
 188
 189         if (cmd == NAND_CMD_NONE)
 190                 return;
 191
 192         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
 193         if (ctrl & NAND_ALE)
 194                 mask |= 0x04;
 195         writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
 196 }
 197
 198 #define FSAMPLE_NAND_RB_GPIO_PIN        62
 199
 200 static int nand_dev_ready(struct mtd_info *mtd)
 201 {
 202         return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
 203 }
 204
 205 static const char *part_probes[] = { "cmdlinepart", NULL };
 206
 207 static struct platform_nand_data nand_data = {
 208         .chip   = {
 209                 .nr_chips               = 1,
 210                 .chip_offset            = 0,
 211                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 212                 .part_probe_types       = part_probes,
 213         },
 214         .ctrl   = {
 215                 .cmd_ctrl       = nand_cmd_ctl,
 216                 .dev_ready      = nand_dev_ready,
 217         },
 218 };
 219
 220 static struct resource nand_resource = {
 221         .start          = OMAP_CS3_PHYS,
 222         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
 223         .flags          = IORESOURCE_MEM,
 224 };
 225
 226 static struct platform_device nand_device = {
 227         .name           = "gen_nand",
 228         .id             = 0,
 229         .dev            = {
 230                 .platform_data  = &nand_data,
 231         },
 232         .num_resources  = 1,
 233         .resource       = &nand_resource,
 234 };
 235
 236 static struct platform_device smc91x_device = {
 237         .name           = "smc91x",
 238         .id             = 0,
 239         .dev    = {
 240                 .platform_data  = &smc91x_info,
 241         },
 242         .num_resources  = ARRAY_SIZE(smc91x_resources),
 243         .resource       = smc91x_resources,
 244 };
 245
 246 static struct resource kp_resources[] = {
 247         [0] = {
 248                 .start  = INT_7XX_MPUIO_KEYPAD,
 249                 .end    = INT_7XX_MPUIO_KEYPAD,
 250                 .flags  = IORESOURCE_IRQ,
 251         },
 252 };
 253
 254 static const struct matrix_keymap_data fsample_keymap_data = {
 255         .keymap         = fsample_keymap,
 256         .keymap_size    = ARRAY_SIZE(fsample_keymap),
 257 };
 258
 259 static struct omap_kp_platform_data kp_data = {
 260         .rows           = 8,
 261         .cols           = 8,
 262         .keymap_data    = &fsample_keymap_data,
 263         .delay          = 4,
 264 };
 265
 266 static struct platform_device kp_device = {
 267         .name           = "omap-keypad",
 268         .id             = -1,
 269         .dev            = {
 270                 .platform_data = &kp_data,
 271         },
 272         .num_resources  = ARRAY_SIZE(kp_resources),
 273         .resource       = kp_resources,
 274 };
 275
 276 static struct platform_device lcd_device = {
 277         .name           = "lcd_p2",
 278         .id             = -1,
 279 };
 280
 281 static struct platform_device *devices[] __initdata = {
 282         &nor_device,
 283         &nand_device,
 284         &smc91x_device,
 285         &kp_device,
 286         &lcd_device,
 287 };
 288
 289 static struct omap_lcd_config fsample_lcd_config = {
 290         .ctrl_name      = "internal",
 291 };
 292
 293 static struct omap_board_config_kernel fsample_config[] __initdata = {
 294         { OMAP_TAG_LCD,         &fsample_lcd_config },
 295 };
 296
 297 static void __init omap_fsample_init(void)
 298 {
 299         /* Early, board-dependent init */
 300
 301         /*
 302          * Hold GSM Reset until needed
 303          */
 304         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 305
 306         /*
 307          * UARTs -> done automagically by 8250 driver
 308          */
 309
 310         /*
 311          * CSx timings, GPIO Mux ... setup
 312          */
 313
 314         /* Flash: CS0 timings setup */
 315         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
 316         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 317
 318         /*
 319          * Ethernet support through the debug board
 320          * CS1 timings setup
 321          */
 322         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
 323         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 324
 325         /*
 326          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 327          * It is used as the Ethernet controller interrupt
 328          */
 329         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
 330                         OMAP7XX_IO_CONF_9);
 331
 332         fsample_init_smc91x();
 333
 334         if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
 335                 BUG();
 336         gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
 337
 338         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 339         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 340
 341         /* Mux pins for keypad */
 342         omap_cfg_reg(E2_7XX_KBR0);
 343         omap_cfg_reg(J7_7XX_KBR1);
 344         omap_cfg_reg(E1_7XX_KBR2);
 345         omap_cfg_reg(F3_7XX_KBR3);
 346         omap_cfg_reg(D2_7XX_KBR4);
 347         omap_cfg_reg(C2_7XX_KBC0);
 348         omap_cfg_reg(D3_7XX_KBC1);
 349         omap_cfg_reg(E4_7XX_KBC2);
 350         omap_cfg_reg(F4_7XX_KBC3);
 351         omap_cfg_reg(E3_7XX_KBC4);
 352
 353         platform_add_devices(devices, ARRAY_SIZE(devices));
 354
 355         omap_board_config = fsample_config;
 356         omap_board_config_size = ARRAY_SIZE(fsample_config);
 357         omap_serial_init();
 358         omap_register_i2c_bus(1, 100, NULL, 0);
 359 }
 360
 361 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 362 static struct map_desc omap_fsample_io_desc[] __initdata = {
 363         {
 364                 .virtual        = H2P2_DBG_FPGA_BASE,
 365                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
 366                 .length         = H2P2_DBG_FPGA_SIZE,
 367                 .type           = MT_DEVICE
 368         },
 369         {
 370                 .virtual        = FSAMPLE_CPLD_BASE,
 371                 .pfn            = __phys_to_pfn(FSAMPLE_CPLD_START),
 372                 .length         = FSAMPLE_CPLD_SIZE,
 373                 .type           = MT_DEVICE
 374         }
 375 };
 376
 377 static void __init omap_fsample_map_io(void)
 378 {
 379         omap15xx_map_io();
 380         iotable_init(omap_fsample_io_desc,
 381                      ARRAY_SIZE(omap_fsample_io_desc));
 382 }
 383
 384 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
 385 /* Maintainer: Brian Swetland <swetland@google.com> */
 386         .atag_offset    = 0x100,
 387         .map_io         = omap_fsample_map_io,
 388         .init_early     = omap1_init_early,
 389         .reserve        = omap_reserve,
 390         .init_irq       = omap1_init_irq,
 391         .init_machine   = omap_fsample_init,
 392         .timer          = &omap1_timer,
 393         .restart        = omap1_restart,
 394 MACHINE_END