1 /* linux/arch/arm/mach-s3c64xx/mach-real6410.c
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/types.h>
28 #include <asm/hardware/vic.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
34 #include <mach/regs-gpio.h>
35 #include <mach/regs-modem.h>
36 #include <mach/regs-srom.h>
40 #include <plat/devs.h>
42 #include <plat/nand.h>
43 #include <plat/regs-serial.h>
45 #include <plat/regs-fb-v4.h>
47 #include <video/platform_lcd.h>
51 #define UCON S3C2410_UCON_DEFAULT
52 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
53 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
55 static struct s3c2410_uartcfg real6410_uartcfgs
[] __initdata
= {
86 /* DM9000AEP 10/100 ethernet controller */
88 static struct resource real6410_dm9k_resource
[] = {
90 .start
= S3C64XX_PA_XM0CSN1
,
91 .end
= S3C64XX_PA_XM0CSN1
+ 1,
92 .flags
= IORESOURCE_MEM
95 .start
= S3C64XX_PA_XM0CSN1
+ 4,
96 .end
= S3C64XX_PA_XM0CSN1
+ 5,
97 .flags
= IORESOURCE_MEM
100 .start
= S3C_EINT(7),
102 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
106 static struct dm9000_plat_data real6410_dm9k_pdata
= {
107 .flags
= (DM9000_PLATF_16BITONLY
| DM9000_PLATF_NO_EEPROM
),
110 static struct platform_device real6410_device_eth
= {
113 .num_resources
= ARRAY_SIZE(real6410_dm9k_resource
),
114 .resource
= real6410_dm9k_resource
,
116 .platform_data
= &real6410_dm9k_pdata
,
120 static struct s3c_fb_pd_win real6410_fb_win
[] = {
122 .win_mode
= { /* 4.3" 480x272 */
135 .win_mode
= { /* 7.0" 800x480 */
150 static struct s3c_fb_platdata real6410_lcd_pdata __initdata
= {
151 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
152 .win
[0] = &real6410_fb_win
[0],
153 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
154 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
157 static struct mtd_partition real6410_nand_part
[] = {
170 .size
= MTDPART_SIZ_FULL
,
171 .offset
= SZ_1M
+ SZ_2M
,
175 static struct s3c2410_nand_set real6410_nand_sets
[] = {
179 .nr_partitions
= ARRAY_SIZE(real6410_nand_part
),
180 .partitions
= real6410_nand_part
,
184 static struct s3c2410_platform_nand real6410_nand_info
= {
188 .nr_sets
= ARRAY_SIZE(real6410_nand_sets
),
189 .sets
= real6410_nand_sets
,
192 static struct platform_device
*real6410_devices
[] __initdata
= {
193 &real6410_device_eth
,
203 static void __init
real6410_map_io(void)
207 s3c64xx_init_io(NULL
, 0);
208 s3c24xx_init_clocks(12000000);
209 s3c24xx_init_uarts(real6410_uartcfgs
, ARRAY_SIZE(real6410_uartcfgs
));
211 /* set the LCD type */
212 tmp
= __raw_readl(S3C64XX_SPCON
);
213 tmp
&= ~S3C64XX_SPCON_LCD_SEL_MASK
;
214 tmp
|= S3C64XX_SPCON_LCD_SEL_RGB
;
215 __raw_writel(tmp
, S3C64XX_SPCON
);
217 /* remove the LCD bypass */
218 tmp
= __raw_readl(S3C64XX_MODEM_MIFPCON
);
219 tmp
&= ~MIFPCON_LCD_BYPASS
;
220 __raw_writel(tmp
, S3C64XX_MODEM_MIFPCON
);
224 * real6410_features string
226 * 0-9 LCD configuration
229 static char real6410_features_str
[12] __initdata
= "0";
231 static int __init
real6410_features_setup(char *str
)
234 strlcpy(real6410_features_str
, str
,
235 sizeof(real6410_features_str
));
239 __setup("real6410=", real6410_features_setup
);
241 #define FEATURE_SCREEN (1 << 0)
243 struct real6410_features_t
{
248 static void real6410_parse_features(
249 struct real6410_features_t
*features
,
250 const char *features_str
)
252 const char *fp
= features_str
;
255 features
->lcd_index
= 0;
261 case '0'...'9': /* tft screen */
262 if (features
->done
& FEATURE_SCREEN
) {
263 printk(KERN_INFO
"REAL6410: '%c' ignored, "
264 "screen type already set\n", f
);
267 if (li
>= ARRAY_SIZE(real6410_fb_win
))
268 printk(KERN_INFO
"REAL6410: '%c' out "
269 "of range LCD mode\n", f
);
271 features
->lcd_index
= li
;
274 features
->done
|= FEATURE_SCREEN
;
280 static void __init
real6410_machine_init(void)
283 struct real6410_features_t features
= { 0 };
285 printk(KERN_INFO
"REAL6410: Option string real6410=%s\n",
286 real6410_features_str
);
288 /* Parse the feature string */
289 real6410_parse_features(&features
, real6410_features_str
);
291 real6410_lcd_pdata
.win
[0] = &real6410_fb_win
[features
.lcd_index
];
293 printk(KERN_INFO
"REAL6410: selected LCD display is %dx%d\n",
294 real6410_lcd_pdata
.win
[0]->win_mode
.xres
,
295 real6410_lcd_pdata
.win
[0]->win_mode
.yres
);
297 s3c_fb_set_platdata(&real6410_lcd_pdata
);
298 s3c_nand_set_platdata(&real6410_nand_info
);
299 s3c24xx_ts_set_platdata(NULL
);
301 /* configure nCS1 width to 16 bits */
303 cs1
= __raw_readl(S3C64XX_SROM_BW
) &
304 ~(S3C64XX_SROM_BW__CS_MASK
<< S3C64XX_SROM_BW__NCS1__SHIFT
);
305 cs1
|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT
) |
306 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT
) |
307 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT
)) <<
308 S3C64XX_SROM_BW__NCS1__SHIFT
;
309 __raw_writel(cs1
, S3C64XX_SROM_BW
);
311 /* set timing for nCS1 suitable for ethernet chip */
313 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT
) |
314 (6 << S3C64XX_SROM_BCX__TACP__SHIFT
) |
315 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT
) |
316 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT
) |
317 (13 << S3C64XX_SROM_BCX__TACC__SHIFT
) |
318 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT
) |
319 (0 << S3C64XX_SROM_BCX__TACS__SHIFT
), S3C64XX_SROM_BC1
);
321 gpio_request(S3C64XX_GPF(15), "LCD power");
323 platform_add_devices(real6410_devices
, ARRAY_SIZE(real6410_devices
));
326 MACHINE_START(REAL6410
, "REAL6410")
327 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
328 .atag_offset
= 0x100,
330 .init_irq
= s3c6410_init_irq
,
331 .handle_irq
= vic_handle_irq
,
332 .map_io
= real6410_map_io
,
333 .init_machine
= real6410_machine_init
,
334 .timer
= &s3c24xx_timer
,
335 .restart
= s3c64xx_restart
,