arch/arm/plat-samsung/include/plat/nand.h

   1 /* arch/arm/mach-s3c2410/include/mach/nand.h
   2  *
   3  * Copyright (c) 2004 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 - NAND device controller platform_device info
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 /**
  14  * struct s3c2410_nand_set - define a set of one or more nand chips
  15  * @disable_ecc:        Entirely disable ECC - Dangerous
  16  * @flash_bbt:          Openmoko u-boot can create a Bad Block Table
  17  *                      Setting this flag will allow the kernel to
  18  *                      look for it at boot time and also skip the NAND
  19  *                      scan.
  20  * @options:            Default value to set into 'struct nand_chip' options.
  21  * @nr_chips:           Number of chips in this set
  22  * @nr_partitions:      Number of partitions pointed to by @partitions
  23  * @name:               Name of set (optional)
  24  * @nr_map:             Map for low-layer logical to physical chip numbers (option)
  25  * @partitions:         The mtd partition list
  26  *
  27  * define a set of one or more nand chips registered with an unique mtd. Also
  28  * allows to pass flag to the underlying NAND layer. 'disable_ecc' will trigger
  29  * a warning at boot time.
  30  */
  31 struct s3c2410_nand_set {
  32         unsigned int            disable_ecc:1;
  33         unsigned int            flash_bbt:1;
  34
  35         unsigned int            options;
  36         int                     nr_chips;
  37         int                     nr_partitions;
  38         char                    *name;
  39         int                     *nr_map;
  40         struct mtd_partition    *partitions;
  41         struct nand_ecclayout   *ecc_layout;
  42 };
  43
  44 struct s3c2410_platform_nand {
  45         /* timing information for controller, all times in nanoseconds */
  46
  47         int     tacls;  /* time for active CLE/ALE to nWE/nOE */
  48         int     twrph0; /* active time for nWE/nOE */
  49         int     twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
  50
  51         unsigned int    ignore_unset_ecc:1;
  52
  53         int                     nr_sets;
  54         struct s3c2410_nand_set *sets;
  55
  56         void                    (*select_chip)(struct s3c2410_nand_set *,
  57                                                int chip);
  58 };
  59
  60 /**
  61  * s3c_nand_set_platdata() - register NAND platform data.
  62  * @nand: The NAND platform data to register with s3c_device_nand.
  63  *
  64  * This function copies the given NAND platform data, @nand and registers
  65  * it with the s3c_device_nand. This allows @nand to be __initdata.
  66 */
  67 extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand);