spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / arch / mips / include / asm / mach-lantiq / lantiq.h
blobce2f02929d22f284cb99b554952d382e70b18a92
1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */
8 #ifndef _LANTIQ_H__
9 #define _LANTIQ_H__
11 #include <linux/irq.h>
13 /* generic reg access functions */
14 #define ltq_r32(reg) __raw_readl(reg)
15 #define ltq_w32(val, reg) __raw_writel(val, reg)
16 #define ltq_w32_mask(clear, set, reg) \
17 ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
18 #define ltq_r8(reg) __raw_readb(reg)
19 #define ltq_w8(val, reg) __raw_writeb(val, reg)
21 /* register access macros for EBU and CGU */
22 #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y))
23 #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x))
24 #define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y))
25 #define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x))
27 extern __iomem void *ltq_ebu_membase;
28 extern __iomem void *ltq_cgu_membase;
30 extern unsigned int ltq_get_cpu_ver(void);
31 extern unsigned int ltq_get_soc_type(void);
33 /* clock speeds */
34 #define CLOCK_60M 60000000
35 #define CLOCK_83M 83333333
36 #define CLOCK_111M 111111111
37 #define CLOCK_133M 133333333
38 #define CLOCK_167M 166666667
39 #define CLOCK_200M 200000000
40 #define CLOCK_266M 266666666
41 #define CLOCK_333M 333333333
42 #define CLOCK_400M 400000000
44 /* spinlock all ebu i/o */
45 extern spinlock_t ebu_lock;
47 /* some irq helpers */
48 extern void ltq_disable_irq(struct irq_data *data);
49 extern void ltq_mask_and_ack_irq(struct irq_data *data);
50 extern void ltq_enable_irq(struct irq_data *data);
52 /* find out what caused the last cpu reset */
53 extern int ltq_reset_cause(void);
54 #define LTQ_RST_CAUSE_WDTRST 0x20
56 #define IOPORT_RESOURCE_START 0x10000000
57 #define IOPORT_RESOURCE_END 0xffffffff
58 #define IOMEM_RESOURCE_START 0x10000000
59 #define IOMEM_RESOURCE_END 0xffffffff
60 #define LTQ_FLASH_START 0x10000000
61 #define LTQ_FLASH_MAX 0x04000000
63 #endif