arch/mips/loongson/common/irq.c

   1 /*
   2  * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
   3  * Author: Fuxin Zhang, zhangfx@lemote.com
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  */
  10 #include <linux/delay.h>
  11 #include <linux/interrupt.h>
  12
  13 #include <loongson.h>
  14 /*
  15  * the first level int-handler will jump here if it is a bonito irq
  16  */
  17 void bonito_irqdispatch(void)
  18 {
  19         u32 int_status;
  20         int i;
  21
  22         /* workaround the IO dma problem: let cpu looping to allow DMA finish */
  23         int_status = LOONGSON_INTISR;
  24         while (int_status & (1 << 10)) {
  25                 udelay(1);
  26                 int_status = LOONGSON_INTISR;
  27         }
  28
  29         /* Get pending sources, masked by current enables */
  30         int_status = LOONGSON_INTISR & LOONGSON_INTEN;
  31
  32         if (int_status) {
  33                 i = __ffs(int_status);
  34                 do_IRQ(LOONGSON_IRQ_BASE + i);
  35         }
  36 }
  37
  38 asmlinkage void plat_irq_dispatch(void)
  39 {
  40         unsigned int pending;
  41
  42         pending = read_c0_cause() & read_c0_status() & ST0_IM;
  43
  44         /* machine-specific plat_irq_dispatch */
  45         mach_irq_dispatch(pending);
  46 }
  47
  48 void __init arch_init_irq(void)
  49 {
  50         /*
  51          * Clear all of the interrupts while we change the able around a bit.
  52          * int-handler is not on bootstrap
  53          */
  54         clear_c0_status(ST0_IM | ST0_BEV);
  55
  56         /* no steer */
  57         LOONGSON_INTSTEER = 0;
  58
  59         /*
  60          * Mask out all interrupt by writing "1" to all bit position in
  61          * the interrupt reset reg.
  62          */
  63         LOONGSON_INTENCLR = ~0;
  64
  65         /* machine specific irq init */
  66         mach_init_irq();
  67 }