spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / arch / parisc / include / asm / asmregs.h
blobd93c646e1887e18590a3ec6948b80a1bda48d50e
1 /*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
7 * any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #ifndef _PARISC_ASMREGS_H
20 #define _PARISC_ASMREGS_H
22 ;! General Registers
24 rp: .reg %r2
25 arg3: .reg %r23
26 arg2: .reg %r24
27 arg1: .reg %r25
28 arg0: .reg %r26
29 dp: .reg %r27
30 ret0: .reg %r28
31 ret1: .reg %r29
32 sl: .reg %r29
33 sp: .reg %r30
35 #if 0
36 /* PA20_REVISIT */
37 arg7: .reg r19
38 arg6: .reg r20
39 arg5: .reg r21
40 arg4: .reg r22
41 gp: .reg r27
42 ap: .reg r29
43 #endif
46 r0: .reg %r0
47 r1: .reg %r1
48 r2: .reg %r2
49 r3: .reg %r3
50 r4: .reg %r4
51 r5: .reg %r5
52 r6: .reg %r6
53 r7: .reg %r7
54 r8: .reg %r8
55 r9: .reg %r9
56 r10: .reg %r10
57 r11: .reg %r11
58 r12: .reg %r12
59 r13: .reg %r13
60 r14: .reg %r14
61 r15: .reg %r15
62 r16: .reg %r16
63 r17: .reg %r17
64 r18: .reg %r18
65 r19: .reg %r19
66 r20: .reg %r20
67 r21: .reg %r21
68 r22: .reg %r22
69 r23: .reg %r23
70 r24: .reg %r24
71 r25: .reg %r25
72 r26: .reg %r26
73 r27: .reg %r27
74 r28: .reg %r28
75 r29: .reg %r29
76 r30: .reg %r30
77 r31: .reg %r31
80 ;! Space Registers
82 sr0: .reg %sr0
83 sr1: .reg %sr1
84 sr2: .reg %sr2
85 sr3: .reg %sr3
86 sr4: .reg %sr4
87 sr5: .reg %sr5
88 sr6: .reg %sr6
89 sr7: .reg %sr7
92 ;! Floating Point Registers
94 fr0: .reg %fr0
95 fr1: .reg %fr1
96 fr2: .reg %fr2
97 fr3: .reg %fr3
98 fr4: .reg %fr4
99 fr5: .reg %fr5
100 fr6: .reg %fr6
101 fr7: .reg %fr7
102 fr8: .reg %fr8
103 fr9: .reg %fr9
104 fr10: .reg %fr10
105 fr11: .reg %fr11
106 fr12: .reg %fr12
107 fr13: .reg %fr13
108 fr14: .reg %fr14
109 fr15: .reg %fr15
110 fr16: .reg %fr16
111 fr17: .reg %fr17
112 fr18: .reg %fr18
113 fr19: .reg %fr19
114 fr20: .reg %fr20
115 fr21: .reg %fr21
116 fr22: .reg %fr22
117 fr23: .reg %fr23
118 fr24: .reg %fr24
119 fr25: .reg %fr25
120 fr26: .reg %fr26
121 fr27: .reg %fr27
122 fr28: .reg %fr28
123 fr29: .reg %fr29
124 fr30: .reg %fr30
125 fr31: .reg %fr31
128 ;! Control Registers
130 rctr: .reg %cr0
131 pidr1: .reg %cr8
132 pidr2: .reg %cr9
133 ccr: .reg %cr10
134 sar: .reg %cr11
135 pidr3: .reg %cr12
136 pidr4: .reg %cr13
137 iva: .reg %cr14
138 eiem: .reg %cr15
139 itmr: .reg %cr16
140 pcsq: .reg %cr17
141 pcoq: .reg %cr18
142 iir: .reg %cr19
143 isr: .reg %cr20
144 ior: .reg %cr21
145 ipsw: .reg %cr22
146 eirr: .reg %cr23
147 tr0: .reg %cr24
148 tr1: .reg %cr25
149 tr2: .reg %cr26
150 tr3: .reg %cr27
151 tr4: .reg %cr28
152 tr5: .reg %cr29
153 tr6: .reg %cr30
154 tr7: .reg %cr31
157 cr0: .reg %cr0
158 cr8: .reg %cr8
159 cr9: .reg %cr9
160 cr10: .reg %cr10
161 cr11: .reg %cr11
162 cr12: .reg %cr12
163 cr13: .reg %cr13
164 cr14: .reg %cr14
165 cr15: .reg %cr15
166 cr16: .reg %cr16
167 cr17: .reg %cr17
168 cr18: .reg %cr18
169 cr19: .reg %cr19
170 cr20: .reg %cr20
171 cr21: .reg %cr21
172 cr22: .reg %cr22
173 cr23: .reg %cr23
174 cr24: .reg %cr24
175 cr25: .reg %cr25
176 cr26: .reg %cr26
177 cr27: .reg %cr27
178 cr28: .reg %cr28
179 cr29: .reg %cr29
180 cr30: .reg %cr30
181 cr31: .reg %cr31
183 #endif