arch/powerpc/platforms/85xx/sbc8548.c

   1 /*
   2  * Wind River SBC8548 setup and early boot code.
   3  *
   4  * Copyright 2007 Wind River Systems Inc.
   5  *
   6  * By Paul Gortmaker (see MAINTAINERS for contact information)
   7  *
   8  * Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc.
   9  *
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/seq_file.h>
  28 #include <linux/initrd.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/of_platform.h>
  32
  33 #include <asm/system.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/page.h>
  36 #include <linux/atomic.h>
  37 #include <asm/time.h>
  38 #include <asm/io.h>
  39 #include <asm/machdep.h>
  40 #include <asm/ipic.h>
  41 #include <asm/pci-bridge.h>
  42 #include <asm/irq.h>
  43 #include <mm/mmu_decl.h>
  44 #include <asm/prom.h>
  45 #include <asm/udbg.h>
  46 #include <asm/mpic.h>
  47
  48 #include <sysdev/fsl_soc.h>
  49 #include <sysdev/fsl_pci.h>
  50
  51 #include "mpc85xx.h"
  52
  53 static int sbc_rev;
  54
  55 static void __init sbc8548_pic_init(void)
  56 {
  57         struct mpic *mpic = mpic_alloc(NULL, 0,
  58                         MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  59                         0, 256, " OpenPIC  ");
  60         BUG_ON(mpic == NULL);
  61         mpic_init(mpic);
  62 }
  63
  64 /* Extract the HW Rev from the EPLD on the board */
  65 static int __init sbc8548_hw_rev(void)
  66 {
  67         struct device_node *np;
  68         struct resource res;
  69         unsigned int *rev;
  70         int board_rev = 0;
  71
  72         np = of_find_compatible_node(NULL, NULL, "hw-rev");
  73         if (np == NULL) {
  74                 printk("No HW-REV found in DTB.\n");
  75                 return -ENODEV;
  76         }
  77
  78         of_address_to_resource(np, 0, &res);
  79         of_node_put(np);
  80
  81         rev = ioremap(res.start,sizeof(unsigned int));
  82         board_rev = (*rev) >> 28;
  83         iounmap(rev);
  84
  85         return board_rev;
  86 }
  87
  88 /*
  89  * Setup the architecture
  90  */
  91 static void __init sbc8548_setup_arch(void)
  92 {
  93 #ifdef CONFIG_PCI
  94         struct device_node *np;
  95 #endif
  96
  97         if (ppc_md.progress)
  98                 ppc_md.progress("sbc8548_setup_arch()", 0);
  99
 100 #ifdef CONFIG_PCI
 101         for_each_node_by_type(np, "pci") {
 102                 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
 103                     of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
 104                         struct resource rsrc;
 105                         of_address_to_resource(np, 0, &rsrc);
 106                         if ((rsrc.start & 0xfffff) == 0x8000)
 107                                 fsl_add_bridge(np, 1);
 108                         else
 109                                 fsl_add_bridge(np, 0);
 110                 }
 111         }
 112 #endif
 113         sbc_rev = sbc8548_hw_rev();
 114 }
 115
 116 static void sbc8548_show_cpuinfo(struct seq_file *m)
 117 {
 118         uint pvid, svid, phid1;
 119
 120         pvid = mfspr(SPRN_PVR);
 121         svid = mfspr(SPRN_SVR);
 122
 123         seq_printf(m, "Vendor\t\t: Wind River\n");
 124         seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
 125         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 126         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 127
 128         /* Display cpu Pll setting */
 129         phid1 = mfspr(SPRN_HID1);
 130         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 131 }
 132
 133 machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
 134
 135 /*
 136  * Called very early, device-tree isn't unflattened
 137  */
 138 static int __init sbc8548_probe(void)
 139 {
 140         unsigned long root = of_get_flat_dt_root();
 141
 142         return of_flat_dt_is_compatible(root, "SBC8548");
 143 }
 144
 145 define_machine(sbc8548) {
 146         .name           = "SBC8548",
 147         .probe          = sbc8548_probe,
 148         .setup_arch     = sbc8548_setup_arch,
 149         .init_IRQ       = sbc8548_pic_init,
 150         .show_cpuinfo   = sbc8548_show_cpuinfo,
 151         .get_irq        = mpic_get_irq,
 152         .restart        = fsl_rstcr_restart,
 153 #ifdef CONFIG_PCI
 154         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 155 #endif
 156         .calibrate_decr = generic_calibrate_decr,
 157         .progress       = udbg_progress,
 158 };