arch/powerpc/platforms/86xx/gef_sbc610.c

   1 /*
   2  * GE SBC610 board support
   3  *
   4  * Author: Martyn Welch <martyn.welch@ge.com>
   5  *
   6  * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
  14  * Copyright 2006 Freescale Semiconductor Inc.
  15  *
  16  * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
  17  */
  18
  19 #include <linux/stddef.h>
  20 #include <linux/kernel.h>
  21 #include <linux/pci.h>
  22 #include <linux/kdev_t.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of_platform.h>
  26
  27 #include <asm/system.h>
  28 #include <asm/time.h>
  29 #include <asm/machdep.h>
  30 #include <asm/pci-bridge.h>
  31 #include <asm/prom.h>
  32 #include <mm/mmu_decl.h>
  33 #include <asm/udbg.h>
  34
  35 #include <asm/mpic.h>
  36 #include <asm/nvram.h>
  37
  38 #include <sysdev/fsl_pci.h>
  39 #include <sysdev/fsl_soc.h>
  40
  41 #include "mpc86xx.h"
  42 #include "gef_pic.h"
  43
  44 #undef DEBUG
  45
  46 #ifdef DEBUG
  47 #define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
  48 #else
  49 #define DBG (fmt...) do { } while (0)
  50 #endif
  51
  52 void __iomem *sbc610_regs;
  53
  54 static void __init gef_sbc610_init_irq(void)
  55 {
  56         struct device_node *cascade_node = NULL;
  57
  58         mpc86xx_init_irq();
  59
  60         /*
  61          * There is a simple interrupt handler in the main FPGA, this needs
  62          * to be cascaded into the MPIC
  63          */
  64         cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
  65         if (!cascade_node) {
  66                 printk(KERN_WARNING "SBC610: No FPGA PIC\n");
  67                 return;
  68         }
  69
  70         gef_pic_init(cascade_node);
  71         of_node_put(cascade_node);
  72 }
  73
  74 static void __init gef_sbc610_setup_arch(void)
  75 {
  76         struct device_node *regs;
  77 #ifdef CONFIG_PCI
  78         struct device_node *np;
  79
  80         for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
  81                 fsl_add_bridge(np, 1);
  82         }
  83 #endif
  84
  85         printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
  86
  87 #ifdef CONFIG_SMP
  88         mpc86xx_smp_init();
  89 #endif
  90
  91         /* Remap basic board registers */
  92         regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
  93         if (regs) {
  94                 sbc610_regs = of_iomap(regs, 0);
  95                 if (sbc610_regs == NULL)
  96                         printk(KERN_WARNING "Unable to map board registers\n");
  97                 of_node_put(regs);
  98         }
  99
 100 #if defined(CONFIG_MMIO_NVRAM)
 101         mmio_nvram_init();
 102 #endif
 103 }
 104
 105 /* Return the PCB revision */
 106 static unsigned int gef_sbc610_get_pcb_rev(void)
 107 {
 108         unsigned int reg;
 109
 110         reg = ioread32(sbc610_regs);
 111         return (reg >> 8) & 0xff;
 112 }
 113
 114 /* Return the board (software) revision */
 115 static unsigned int gef_sbc610_get_board_rev(void)
 116 {
 117         unsigned int reg;
 118
 119         reg = ioread32(sbc610_regs);
 120         return (reg >> 16) & 0xff;
 121 }
 122
 123 /* Return the FPGA revision */
 124 static unsigned int gef_sbc610_get_fpga_rev(void)
 125 {
 126         unsigned int reg;
 127
 128         reg = ioread32(sbc610_regs);
 129         return (reg >> 24) & 0xf;
 130 }
 131
 132 static void gef_sbc610_show_cpuinfo(struct seq_file *m)
 133 {
 134         uint svid = mfspr(SPRN_SVR);
 135
 136         seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 137
 138         seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
 139                 ('A' + gef_sbc610_get_board_rev() - 1));
 140         seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
 141
 142         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 143 }
 144
 145 static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
 146 {
 147         unsigned int val;
 148
 149         /* Do not do the fixup on other platforms! */
 150         if (!machine_is(gef_sbc610))
 151                 return;
 152
 153         printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
 154
 155         /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
 156         pci_read_config_dword(pdev, 0xe0, &val);
 157         pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
 158
 159         /* System clock is 48-MHz Oscillator and EHCI Enabled. */
 160         pci_write_config_dword(pdev, 0xe4, 1 << 5);
 161 }
 162 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
 163         gef_sbc610_nec_fixup);
 164
 165 /*
 166  * Called very early, device-tree isn't unflattened
 167  *
 168  * This function is called to determine whether the BSP is compatible with the
 169  * supplied device-tree, which is assumed to be the correct one for the actual
 170  * board. It is expected thati, in the future, a kernel may support multiple
 171  * boards.
 172  */
 173 static int __init gef_sbc610_probe(void)
 174 {
 175         unsigned long root = of_get_flat_dt_root();
 176
 177         if (of_flat_dt_is_compatible(root, "gef,sbc610"))
 178                 return 1;
 179
 180         return 0;
 181 }
 182
 183 static long __init mpc86xx_time_init(void)
 184 {
 185         unsigned int temp;
 186
 187         /* Set the time base to zero */
 188         mtspr(SPRN_TBWL, 0);
 189         mtspr(SPRN_TBWU, 0);
 190
 191         temp = mfspr(SPRN_HID0);
 192         temp |= HID0_TBEN;
 193         mtspr(SPRN_HID0, temp);
 194         asm volatile("isync");
 195
 196         return 0;
 197 }
 198
 199 static __initdata struct of_device_id of_bus_ids[] = {
 200         { .compatible = "simple-bus", },
 201         { .compatible = "gianfar", },
 202         {},
 203 };
 204
 205 static int __init declare_of_platform_devices(void)
 206 {
 207         printk(KERN_DEBUG "Probe platform devices\n");
 208         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 209
 210         return 0;
 211 }
 212 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
 213
 214 define_machine(gef_sbc610) {
 215         .name                   = "GE SBC610",
 216         .probe                  = gef_sbc610_probe,
 217         .setup_arch             = gef_sbc610_setup_arch,
 218         .init_IRQ               = gef_sbc610_init_irq,
 219         .show_cpuinfo           = gef_sbc610_show_cpuinfo,
 220         .get_irq                = mpic_get_irq,
 221         .restart                = fsl_rstcr_restart,
 222         .time_init              = mpc86xx_time_init,
 223         .calibrate_decr         = generic_calibrate_decr,
 224         .progress               = udbg_progress,
 225 #ifdef CONFIG_PCI
 226         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 227 #endif
 228 };