spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / arch / powerpc / platforms / 8xx / mpc86xads.h
blob17b1fe75e0b234441d5fe5c940ace0a78a536680
1 /*
2 * A collection of structures, addresses, and values associated with
3 * the Freescale MPC86xADS board.
4 * Copied from the FADS stuff.
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
9 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is licensed
11 * "as is" without any warranty of any kind, whether express or implied.
14 #ifdef __KERNEL__
15 #ifndef __ASM_MPC86XADS_H__
16 #define __ASM_MPC86XADS_H__
18 /* Bits of interest in the BCSRs.
20 #define BCSR1_ETHEN ((uint)0x20000000)
21 #define BCSR1_IRDAEN ((uint)0x10000000)
22 #define BCSR1_RS232EN_1 ((uint)0x01000000)
23 #define BCSR1_PCCEN ((uint)0x00800000)
24 #define BCSR1_PCCVCC0 ((uint)0x00400000)
25 #define BCSR1_PCCVPP0 ((uint)0x00200000)
26 #define BCSR1_PCCVPP1 ((uint)0x00100000)
27 #define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
28 #define BCSR1_RS232EN_2 ((uint)0x00040000)
29 #define BCSR1_PCCVCC1 ((uint)0x00010000)
30 #define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
32 #define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/
33 #define BCSR4_USB_LO_SPD ((uint)0x04000000)
34 #define BCSR4_USB_VCC ((uint)0x02000000)
35 #define BCSR4_USB_FULL_SPD ((uint)0x00040000)
36 #define BCSR4_USB_EN ((uint)0x00020000)
38 #define BCSR5_MII2_EN 0x40
39 #define BCSR5_MII2_RST 0x20
40 #define BCSR5_T1_RST 0x10
41 #define BCSR5_ATM155_RST 0x08
42 #define BCSR5_ATM25_RST 0x04
43 #define BCSR5_MII1_EN 0x02
44 #define BCSR5_MII1_RST 0x01
46 #endif /* __ASM_MPC86XADS_H__ */
47 #endif /* __KERNEL__ */