arch/s390/kernel/head31.S

   1 /*
   2  * arch/s390/kernel/head31.S
   3  *
   4  * Copyright (C) IBM Corp. 2005,2010
   5  *
   6  *   Author(s): Hartmut Penner <hp@de.ibm.com>
   7  *              Martin Schwidefsky <schwidefsky@de.ibm.com>
   8  *              Rob van der Heij <rvdhei@iae.nl>
   9  *              Heiko Carstens <heiko.carstens@de.ibm.com>
  10  *
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/linkage.h>
  15 #include <asm/asm-offsets.h>
  16 #include <asm/thread_info.h>
  17 #include <asm/page.h>
  18
  19 __HEAD
  20 ENTRY(startup_continue)
  21         basr    %r13,0                  # get base
  22 .LPG1:
  23
  24         l       %r1,.Lbase_cc-.LPG1(%r13)
  25         mvc     0(8,%r1),__LC_LAST_UPDATE_CLOCK
  26         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  27         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
  28                                         # move IPL device to lowcore
  29 #
  30 # Setup stack
  31 #
  32         l       %r15,.Linittu-.LPG1(%r13)
  33         st      %r15,__LC_THREAD_INFO   # cache thread info in lowcore
  34         mvc     __LC_CURRENT(4),__TI_task(%r15)
  35         ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
  36         st      %r15,__LC_KERNEL_STACK  # set end of kernel stack
  37         ahi     %r15,-96
  38 #
  39 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
  40 # and create a kernel NSS if the SAVESYS= parm is defined
  41 #
  42         l       %r14,.Lstartup_init-.LPG1(%r13)
  43         basr    %r14,%r14
  44         lpsw  .Lentry-.LPG1(13)         # jump to _stext in primary-space,
  45                                         # virtual and never return ...
  46         .align  8
  47 .Lentry:.long   0x00080000,0x80000000 + _stext
  48 .Lctl:  .long   0x04b50000              # cr0: various things
  49         .long   0                       # cr1: primary space segment table
  50         .long   .Lduct                  # cr2: dispatchable unit control table
  51         .long   0                       # cr3: instruction authorization
  52         .long   0                       # cr4: instruction authorization
  53         .long   .Lduct                  # cr5: primary-aste origin
  54         .long   0                       # cr6:  I/O interrupts
  55         .long   0                       # cr7:  secondary space segment table
  56         .long   0                       # cr8:  access registers translation
  57         .long   0                       # cr9:  tracing off
  58         .long   0                       # cr10: tracing off
  59         .long   0                       # cr11: tracing off
  60         .long   0                       # cr12: tracing off
  61         .long   0                       # cr13: home space segment table
  62         .long   0xc0000000              # cr14: machine check handling off
  63         .long   0                       # cr15: linkage stack operations
  64 .Lmchunk:.long  memory_chunk
  65 .Lbss_bgn:  .long __bss_start
  66 .Lbss_end:  .long _end
  67 .Lparmaddr: .long PARMAREA
  68 .Linittu:   .long init_thread_union
  69 .Lstartup_init:
  70             .long startup_init
  71         .align  64
  72 .Lduct: .long   0,0,0,0,.Lduald,0,0,0
  73         .long   0,0,0,0,0,0,0,0
  74         .align  128
  75 .Lduald:.rept   8
  76         .long   0x80000000,0,0,0        # invalid access-list entries
  77         .endr
  78 .Lbase_cc:
  79         .long   sched_clock_base_cc
  80
  81 ENTRY(_ehead)
  82
  83 #ifdef CONFIG_SHARED_KERNEL
  84         .org    0x100000 - 0x11000      # head.o ends at 0x11000
  85 #endif
  86
  87 #
  88 # startup-code, running in absolute addressing mode
  89 #
  90 ENTRY(_stext)
  91         basr    %r13,0                  # get base
  92 .LPG3:
  93 # check control registers
  94         stctl   %c0,%c15,0(%r15)
  95         oi      2(%r15),0x60            # enable sigp emergency & external call
  96         oi      0(%r15),0x10            # switch on low address protection
  97         lctl    %c0,%c15,0(%r15)
  98
  99 #
 100         lam     0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
 101         l       %r14,.Lstart-.LPG3(%r13)
 102         basr    %r14,%r14               # call start_kernel
 103 #
 104 # We returned from start_kernel ?!? PANIK
 105 #
 106         basr    %r13,0
 107         lpsw    .Ldw-.(%r13)            # load disabled wait psw
 108 #
 109         .align  8
 110 .Ldw:   .long   0x000a0000,0x00000000
 111 .Lstart:.long   start_kernel
 112 .Laregs:.long   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0