spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / arch / x86 / include / asm / smp.h
blob0434c400287cffa9c8d80075c5a31defa4097629
1 #ifndef _ASM_X86_SMP_H
2 #define _ASM_X86_SMP_H
3 #ifndef __ASSEMBLY__
4 #include <linux/cpumask.h>
5 #include <linux/init.h>
6 #include <asm/percpu.h>
8 /*
9 * We need the APIC definitions automatically as part of 'smp.h'
11 #ifdef CONFIG_X86_LOCAL_APIC
12 # include <asm/mpspec.h>
13 # include <asm/apic.h>
14 # ifdef CONFIG_X86_IO_APIC
15 # include <asm/io_apic.h>
16 # endif
17 #endif
18 #include <asm/thread_info.h>
19 #include <asm/cpumask.h>
20 #include <asm/cpufeature.h>
22 extern int smp_num_siblings;
23 extern unsigned int num_processors;
25 static inline bool cpu_has_ht_siblings(void)
27 bool has_siblings = false;
28 #ifdef CONFIG_SMP
29 has_siblings = cpu_has_ht && smp_num_siblings > 1;
30 #endif
31 return has_siblings;
34 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
35 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
36 /* cpus sharing the last level cache: */
37 DECLARE_PER_CPU(cpumask_var_t, cpu_llc_shared_map);
38 DECLARE_PER_CPU(u16, cpu_llc_id);
39 DECLARE_PER_CPU(int, cpu_number);
41 static inline struct cpumask *cpu_sibling_mask(int cpu)
43 return per_cpu(cpu_sibling_map, cpu);
46 static inline struct cpumask *cpu_core_mask(int cpu)
48 return per_cpu(cpu_core_map, cpu);
51 static inline struct cpumask *cpu_llc_shared_mask(int cpu)
53 return per_cpu(cpu_llc_shared_map, cpu);
56 DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
57 DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
58 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
59 DECLARE_EARLY_PER_CPU(int, x86_cpu_to_logical_apicid);
60 #endif
62 /* Static state in head.S used to set up a CPU */
63 extern unsigned long stack_start; /* Initial stack pointer address */
65 struct smp_ops {
66 void (*smp_prepare_boot_cpu)(void);
67 void (*smp_prepare_cpus)(unsigned max_cpus);
68 void (*smp_cpus_done)(unsigned max_cpus);
70 void (*stop_other_cpus)(int wait);
71 void (*smp_send_reschedule)(int cpu);
73 int (*cpu_up)(unsigned cpu);
74 int (*cpu_disable)(void);
75 void (*cpu_die)(unsigned int cpu);
76 void (*play_dead)(void);
78 void (*send_call_func_ipi)(const struct cpumask *mask);
79 void (*send_call_func_single_ipi)(int cpu);
82 /* Globals due to paravirt */
83 extern void set_cpu_sibling_map(int cpu);
85 #ifdef CONFIG_SMP
86 #ifndef CONFIG_PARAVIRT
87 #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
88 #endif
89 extern struct smp_ops smp_ops;
91 static inline void smp_send_stop(void)
93 smp_ops.stop_other_cpus(0);
96 static inline void stop_other_cpus(void)
98 smp_ops.stop_other_cpus(1);
101 static inline void smp_prepare_boot_cpu(void)
103 smp_ops.smp_prepare_boot_cpu();
106 static inline void smp_prepare_cpus(unsigned int max_cpus)
108 smp_ops.smp_prepare_cpus(max_cpus);
111 static inline void smp_cpus_done(unsigned int max_cpus)
113 smp_ops.smp_cpus_done(max_cpus);
116 static inline int __cpu_up(unsigned int cpu)
118 return smp_ops.cpu_up(cpu);
121 static inline int __cpu_disable(void)
123 return smp_ops.cpu_disable();
126 static inline void __cpu_die(unsigned int cpu)
128 smp_ops.cpu_die(cpu);
131 static inline void play_dead(void)
133 smp_ops.play_dead();
136 static inline void smp_send_reschedule(int cpu)
138 smp_ops.smp_send_reschedule(cpu);
141 static inline void arch_send_call_function_single_ipi(int cpu)
143 smp_ops.send_call_func_single_ipi(cpu);
146 static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
148 smp_ops.send_call_func_ipi(mask);
151 void cpu_disable_common(void);
152 void native_smp_prepare_boot_cpu(void);
153 void native_smp_prepare_cpus(unsigned int max_cpus);
154 void native_smp_cpus_done(unsigned int max_cpus);
155 int native_cpu_up(unsigned int cpunum);
156 int native_cpu_disable(void);
157 void native_cpu_die(unsigned int cpu);
158 void native_play_dead(void);
159 void play_dead_common(void);
160 void wbinvd_on_cpu(int cpu);
161 int wbinvd_on_all_cpus(void);
163 void native_send_call_func_ipi(const struct cpumask *mask);
164 void native_send_call_func_single_ipi(int cpu);
166 void smp_store_cpu_info(int id);
167 #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
169 /* We don't mark CPUs online until __cpu_up(), so we need another measure */
170 static inline int num_booting_cpus(void)
172 return cpumask_weight(cpu_callout_mask);
174 #else /* !CONFIG_SMP */
175 #define wbinvd_on_cpu(cpu) wbinvd()
176 static inline int wbinvd_on_all_cpus(void)
178 wbinvd();
179 return 0;
181 #endif /* CONFIG_SMP */
183 extern unsigned disabled_cpus __cpuinitdata;
185 #ifdef CONFIG_X86_32_SMP
187 * This function is needed by all SMP systems. It must _always_ be valid
188 * from the initial startup. We map APIC_BASE very early in page_setup(),
189 * so this is correct in the x86 case.
191 #define raw_smp_processor_id() (percpu_read(cpu_number))
192 extern int safe_smp_processor_id(void);
194 #elif defined(CONFIG_X86_64_SMP)
195 #define raw_smp_processor_id() (percpu_read(cpu_number))
197 #define stack_smp_processor_id() \
198 ({ \
199 struct thread_info *ti; \
200 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
201 ti->cpu; \
203 #define safe_smp_processor_id() smp_processor_id()
205 #endif
207 #ifdef CONFIG_X86_LOCAL_APIC
209 #ifndef CONFIG_X86_64
210 static inline int logical_smp_processor_id(void)
212 /* we don't want to mark this access volatile - bad code generation */
213 return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
216 #endif
218 extern int hard_smp_processor_id(void);
220 #else /* CONFIG_X86_LOCAL_APIC */
222 # ifndef CONFIG_SMP
223 # define hard_smp_processor_id() 0
224 # endif
226 #endif /* CONFIG_X86_LOCAL_APIC */
228 #ifdef CONFIG_DEBUG_NMI_SELFTEST
229 extern void nmi_selftest(void);
230 #else
231 #define nmi_selftest() do { } while (0)
232 #endif
234 #endif /* __ASSEMBLY__ */
235 #endif /* _ASM_X86_SMP_H */