spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / i2c / algos / i2c-algo-pca.c
blobbeb9ffe2564bc77ffb474ef1346a49c2600c89a5
1 /*
2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3 * Copyright (C) 2004 Arcom Control Systems
4 * Copyright (C) 2008 Pengutronix
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/delay.h>
25 #include <linux/jiffies.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c-algo-pca.h>
31 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
32 printk(KERN_DEBUG fmt, ## args); } while (0)
33 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
34 printk(KERN_DEBUG fmt, ## args); } while (0)
35 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
36 printk(KERN_DEBUG fmt, ## args); } while (0)
38 static int i2c_debug;
40 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
41 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
43 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
44 #define pca_clock(adap) adap->i2c_clock
45 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
46 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
47 #define pca_wait(adap) adap->wait_for_completion(adap->data)
48 #define pca_reset(adap) adap->reset_chip(adap->data)
50 static void pca9665_reset(void *pd)
52 struct i2c_algo_pca_data *adap = pd;
53 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
54 pca_outw(adap, I2C_PCA_IND, 0xA5);
55 pca_outw(adap, I2C_PCA_IND, 0x5A);
59 * Generate a start condition on the i2c bus.
61 * returns after the start condition has occurred
63 static int pca_start(struct i2c_algo_pca_data *adap)
65 int sta = pca_get_con(adap);
66 DEB2("=== START\n");
67 sta |= I2C_PCA_CON_STA;
68 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
69 pca_set_con(adap, sta);
70 return pca_wait(adap);
74 * Generate a repeated start condition on the i2c bus
76 * return after the repeated start condition has occurred
78 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
80 int sta = pca_get_con(adap);
81 DEB2("=== REPEATED START\n");
82 sta |= I2C_PCA_CON_STA;
83 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
84 pca_set_con(adap, sta);
85 return pca_wait(adap);
89 * Generate a stop condition on the i2c bus
91 * returns after the stop condition has been generated
93 * STOPs do not generate an interrupt or set the SI flag, since the
94 * part returns the idle state (0xf8). Hence we don't need to
95 * pca_wait here.
97 static void pca_stop(struct i2c_algo_pca_data *adap)
99 int sta = pca_get_con(adap);
100 DEB2("=== STOP\n");
101 sta |= I2C_PCA_CON_STO;
102 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
103 pca_set_con(adap, sta);
107 * Send the slave address and R/W bit
109 * returns after the address has been sent
111 static int pca_address(struct i2c_algo_pca_data *adap,
112 struct i2c_msg *msg)
114 int sta = pca_get_con(adap);
115 int addr;
117 addr = ((0x7f & msg->addr) << 1);
118 if (msg->flags & I2C_M_RD)
119 addr |= 1;
120 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
121 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
123 pca_outw(adap, I2C_PCA_DAT, addr);
125 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
126 pca_set_con(adap, sta);
128 return pca_wait(adap);
132 * Transmit a byte.
134 * Returns after the byte has been transmitted
136 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
137 __u8 b)
139 int sta = pca_get_con(adap);
140 DEB2("=== WRITE %#04x\n", b);
141 pca_outw(adap, I2C_PCA_DAT, b);
143 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
144 pca_set_con(adap, sta);
146 return pca_wait(adap);
150 * Receive a byte
152 * returns immediately.
154 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
155 __u8 *b, int ack)
157 *b = pca_inw(adap, I2C_PCA_DAT);
158 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
162 * Setup ACK or NACK for next received byte and wait for it to arrive.
164 * Returns after next byte has arrived.
166 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
167 int ack)
169 int sta = pca_get_con(adap);
171 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
173 if (ack)
174 sta |= I2C_PCA_CON_AA;
176 pca_set_con(adap, sta);
177 return pca_wait(adap);
180 static int pca_xfer(struct i2c_adapter *i2c_adap,
181 struct i2c_msg *msgs,
182 int num)
184 struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
185 struct i2c_msg *msg = NULL;
186 int curmsg;
187 int numbytes = 0;
188 int state;
189 int ret;
190 int completed = 1;
191 unsigned long timeout = jiffies + i2c_adap->timeout;
193 while ((state = pca_status(adap)) != 0xf8) {
194 if (time_before(jiffies, timeout)) {
195 msleep(10);
196 } else {
197 dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
198 "%#04x\n", state);
199 return -EBUSY;
203 DEB1("{{{ XFER %d messages\n", num);
205 if (i2c_debug >= 2) {
206 for (curmsg = 0; curmsg < num; curmsg++) {
207 int addr, i;
208 msg = &msgs[curmsg];
210 addr = (0x7f & msg->addr) ;
212 if (msg->flags & I2C_M_RD)
213 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
214 curmsg, msg->len, addr, (addr << 1) | 1);
215 else {
216 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
217 curmsg, msg->len, addr, addr << 1,
218 msg->len == 0 ? "" : ", ");
219 for (i = 0; i < msg->len; i++)
220 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
221 printk("]\n");
226 curmsg = 0;
227 ret = -EIO;
228 while (curmsg < num) {
229 state = pca_status(adap);
231 DEB3("STATE is 0x%02x\n", state);
232 msg = &msgs[curmsg];
234 switch (state) {
235 case 0xf8: /* On reset or stop the bus is idle */
236 completed = pca_start(adap);
237 break;
239 case 0x08: /* A START condition has been transmitted */
240 case 0x10: /* A repeated start condition has been transmitted */
241 completed = pca_address(adap, msg);
242 break;
244 case 0x18: /* SLA+W has been transmitted; ACK has been received */
245 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
246 if (numbytes < msg->len) {
247 completed = pca_tx_byte(adap,
248 msg->buf[numbytes]);
249 numbytes++;
250 break;
252 curmsg++; numbytes = 0;
253 if (curmsg == num)
254 pca_stop(adap);
255 else
256 completed = pca_repeated_start(adap);
257 break;
259 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
260 DEB2("NOT ACK received after SLA+W\n");
261 pca_stop(adap);
262 ret = -ENXIO;
263 goto out;
265 case 0x40: /* SLA+R has been transmitted; ACK has been received */
266 completed = pca_rx_ack(adap, msg->len > 1);
267 break;
269 case 0x50: /* Data bytes has been received; ACK has been returned */
270 if (numbytes < msg->len) {
271 pca_rx_byte(adap, &msg->buf[numbytes], 1);
272 numbytes++;
273 completed = pca_rx_ack(adap,
274 numbytes < msg->len - 1);
275 break;
277 curmsg++; numbytes = 0;
278 if (curmsg == num)
279 pca_stop(adap);
280 else
281 completed = pca_repeated_start(adap);
282 break;
284 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
285 DEB2("NOT ACK received after SLA+R\n");
286 pca_stop(adap);
287 ret = -ENXIO;
288 goto out;
290 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
291 DEB2("NOT ACK received after data byte\n");
292 pca_stop(adap);
293 goto out;
295 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
296 DEB2("Arbitration lost\n");
298 * The PCA9564 data sheet (2006-09-01) says "A
299 * START condition will be transmitted when the
300 * bus becomes free (STOP or SCL and SDA high)"
301 * when the STA bit is set (p. 11).
303 * In case this won't work, try pca_reset()
304 * instead.
306 pca_start(adap);
307 goto out;
309 case 0x58: /* Data byte has been received; NOT ACK has been returned */
310 if (numbytes == msg->len - 1) {
311 pca_rx_byte(adap, &msg->buf[numbytes], 0);
312 curmsg++; numbytes = 0;
313 if (curmsg == num)
314 pca_stop(adap);
315 else
316 completed = pca_repeated_start(adap);
317 } else {
318 DEB2("NOT ACK sent after data byte received. "
319 "Not final byte. numbytes %d. len %d\n",
320 numbytes, msg->len);
321 pca_stop(adap);
322 goto out;
324 break;
325 case 0x70: /* Bus error - SDA stuck low */
326 DEB2("BUS ERROR - SDA Stuck low\n");
327 pca_reset(adap);
328 goto out;
329 case 0x90: /* Bus error - SCL stuck low */
330 DEB2("BUS ERROR - SCL Stuck low\n");
331 pca_reset(adap);
332 goto out;
333 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
334 DEB2("BUS ERROR - Illegal START or STOP\n");
335 pca_reset(adap);
336 goto out;
337 default:
338 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
339 break;
342 if (!completed)
343 goto out;
346 ret = curmsg;
347 out:
348 DEB1("}}} transferred %d/%d messages. "
349 "status is %#04x. control is %#04x\n",
350 curmsg, num, pca_status(adap),
351 pca_get_con(adap));
352 return ret;
355 static u32 pca_func(struct i2c_adapter *adap)
357 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
360 static const struct i2c_algorithm pca_algo = {
361 .master_xfer = pca_xfer,
362 .functionality = pca_func,
365 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
367 struct i2c_algo_pca_data *pca_data = adap->algo_data;
368 /* The trick here is to check if there is an indirect register
369 * available. If there is one, we will read the value we first
370 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
371 * we wrote on I2C_PCA_ADR
373 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
374 pca_outw(pca_data, I2C_PCA_IND, 0xAA);
375 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
376 pca_outw(pca_data, I2C_PCA_IND, 0x00);
377 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
378 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
379 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
380 return I2C_PCA_CHIP_9665;
381 } else {
382 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
383 return I2C_PCA_CHIP_9564;
387 static int pca_init(struct i2c_adapter *adap)
389 struct i2c_algo_pca_data *pca_data = adap->algo_data;
391 adap->algo = &pca_algo;
393 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
394 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
395 int clock;
397 if (pca_data->i2c_clock > 7) {
398 switch (pca_data->i2c_clock) {
399 case 330000:
400 pca_data->i2c_clock = I2C_PCA_CON_330kHz;
401 break;
402 case 288000:
403 pca_data->i2c_clock = I2C_PCA_CON_288kHz;
404 break;
405 case 217000:
406 pca_data->i2c_clock = I2C_PCA_CON_217kHz;
407 break;
408 case 146000:
409 pca_data->i2c_clock = I2C_PCA_CON_146kHz;
410 break;
411 case 88000:
412 pca_data->i2c_clock = I2C_PCA_CON_88kHz;
413 break;
414 case 59000:
415 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
416 break;
417 case 44000:
418 pca_data->i2c_clock = I2C_PCA_CON_44kHz;
419 break;
420 case 36000:
421 pca_data->i2c_clock = I2C_PCA_CON_36kHz;
422 break;
423 default:
424 printk(KERN_WARNING
425 "%s: Invalid I2C clock speed selected."
426 " Using default 59kHz.\n", adap->name);
427 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
429 } else {
430 printk(KERN_WARNING "%s: "
431 "Choosing the clock frequency based on "
432 "index is deprecated."
433 " Use the nominal frequency.\n", adap->name);
436 pca_reset(pca_data);
438 clock = pca_clock(pca_data);
439 printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
440 adap->name, freqs[clock]);
442 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
443 } else {
444 int clock;
445 int mode;
446 int tlow, thi;
447 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
448 int min_tlow, min_thi;
449 /* These values are the maximum raise and fall values allowed
450 * by the I2C operation mode (Standard, Fast or Fast+)
451 * They are used (added) below to calculate the clock dividers
452 * of PCA9665. Note that they are slightly different of the
453 * real maximum, to allow the change on mode exactly on the
454 * maximum clock rate for each mode
456 int raise_fall_time;
458 /* Ignore the reset function from the module,
459 * we can use the parallel bus reset
461 pca_data->reset_chip = pca9665_reset;
463 if (pca_data->i2c_clock > 1265800) {
464 printk(KERN_WARNING "%s: I2C clock speed too high."
465 " Using 1265.8kHz.\n", adap->name);
466 pca_data->i2c_clock = 1265800;
469 if (pca_data->i2c_clock < 60300) {
470 printk(KERN_WARNING "%s: I2C clock speed too low."
471 " Using 60.3kHz.\n", adap->name);
472 pca_data->i2c_clock = 60300;
475 /* To avoid integer overflow, use clock/100 for calculations */
476 clock = pca_clock(pca_data) / 100;
478 if (pca_data->i2c_clock > 10000) {
479 mode = I2C_PCA_MODE_TURBO;
480 min_tlow = 14;
481 min_thi = 5;
482 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
483 } else if (pca_data->i2c_clock > 4000) {
484 mode = I2C_PCA_MODE_FASTP;
485 min_tlow = 17;
486 min_thi = 9;
487 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
488 } else if (pca_data->i2c_clock > 1000) {
489 mode = I2C_PCA_MODE_FAST;
490 min_tlow = 44;
491 min_thi = 20;
492 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
493 } else {
494 mode = I2C_PCA_MODE_STD;
495 min_tlow = 157;
496 min_thi = 134;
497 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
500 /* The minimum clock that respects the thi/tlow = 134/157 is
501 * 64800 Hz. Below that, we have to fix the tlow to 255 and
502 * calculate the thi factor.
504 if (clock < 648) {
505 tlow = 255;
506 thi = 1000000 - clock * raise_fall_time;
507 thi /= (I2C_PCA_OSC_PER * clock) - tlow;
508 } else {
509 tlow = (1000000 - clock * raise_fall_time) * min_tlow;
510 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
511 thi = tlow * min_thi / min_tlow;
514 pca_reset(pca_data);
516 printk(KERN_INFO
517 "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
519 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
520 pca_outw(pca_data, I2C_PCA_IND, mode);
521 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
522 pca_outw(pca_data, I2C_PCA_IND, tlow);
523 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
524 pca_outw(pca_data, I2C_PCA_IND, thi);
526 pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
528 udelay(500); /* 500 us for oscilator to stabilise */
530 return 0;
534 * registering functions to load algorithms at runtime
536 int i2c_pca_add_bus(struct i2c_adapter *adap)
538 int rval;
540 rval = pca_init(adap);
541 if (rval)
542 return rval;
544 return i2c_add_adapter(adap);
546 EXPORT_SYMBOL(i2c_pca_add_bus);
548 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
550 int rval;
552 rval = pca_init(adap);
553 if (rval)
554 return rval;
556 return i2c_add_numbered_adapter(adap);
558 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
560 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
561 "Wolfram Sang <w.sang@pengutronix.de>");
562 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
563 MODULE_LICENSE("GPL");
565 module_param(i2c_debug, int, 0);