drivers/net/ethernet/brocade/bna/bfi.h

   1 /*
   2  * Linux network driver for Brocade Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15  * All rights reserved
  16  * www.brocade.com
  17  */
  18 #ifndef __BFI_H__
  19 #define __BFI_H__
  20
  21 #include "bfa_defs.h"
  22
  23 #pragma pack(1)
  24
  25 /**
  26  * BFI FW image type
  27  */
  28 #define BFI_FLASH_CHUNK_SZ                      256     /*!< Flash chunk size */
  29 #define BFI_FLASH_CHUNK_SZ_WORDS        (BFI_FLASH_CHUNK_SZ/sizeof(u32))
  30
  31 /**
  32  * Msg header common to all msgs
  33  */
  34 struct bfi_mhdr {
  35         u8              msg_class;      /*!< @ref enum bfi_mclass           */
  36         u8              msg_id;         /*!< msg opcode with in the class   */
  37         union {
  38                 struct {
  39                         u8      qid;
  40                         u8      fn_lpu; /*!< msg destination                */
  41                 } h2i;
  42                 u16     i2htok; /*!< token in msgs to host          */
  43         } mtag;
  44 };
  45
  46 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
  47 #define bfi_mhdr_2_fn(_mh)      ((_mh)->mtag.h2i.fn_lpu >> 1)
  48 #define bfi_mhdr_2_qid(_mh)     ((_mh)->mtag.h2i.qid)
  49
  50 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {                \
  51         (_mh).msg_class                 = (_mc);                \
  52         (_mh).msg_id                    = (_op);                \
  53         (_mh).mtag.h2i.fn_lpu   = (_fn_lpu);                    \
  54 } while (0)
  55
  56 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {                \
  57         (_mh).msg_class                 = (_mc);                \
  58         (_mh).msg_id                    = (_op);                \
  59         (_mh).mtag.i2htok               = (_i2htok);            \
  60 } while (0)
  61
  62 /*
  63  * Message opcodes: 0-127 to firmware, 128-255 to host
  64  */
  65 #define BFI_I2H_OPCODE_BASE     128
  66 #define BFA_I2HM(_x)                    ((_x) + BFI_I2H_OPCODE_BASE)
  67
  68 /**
  69  ****************************************************************************
  70  *
  71  * Scatter Gather Element and Page definition
  72  *
  73  ****************************************************************************
  74  */
  75
  76 /**
  77  * DMA addresses
  78  */
  79 union bfi_addr_u {
  80         struct {
  81                 u32     addr_lo;
  82                 u32     addr_hi;
  83         } a32;
  84 };
  85
  86 /**
  87  * Generic DMA addr-len pair.
  88  */
  89 struct bfi_alen {
  90         union bfi_addr_u        al_addr;        /* DMA addr of buffer   */
  91         u32                     al_len;         /* length of buffer */
  92 };
  93
  94 /*
  95  * Large Message structure - 128 Bytes size Msgs
  96  */
  97 #define BFI_LMSG_SZ             128
  98 #define BFI_LMSG_PL_WSZ \
  99                         ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
 100
 101 /**
 102  * Mailbox message structure
 103  */
 104 #define BFI_MBMSG_SZ            7
 105 struct bfi_mbmsg {
 106         struct bfi_mhdr mh;
 107         u32             pl[BFI_MBMSG_SZ];
 108 };
 109
 110 /**
 111  * Supported PCI function class codes (personality)
 112  */
 113 enum bfi_pcifn_class {
 114         BFI_PCIFN_CLASS_FC      = 0x0c04,
 115         BFI_PCIFN_CLASS_ETH     = 0x0200,
 116 };
 117
 118 /**
 119  * Message Classes
 120  */
 121 enum bfi_mclass {
 122         BFI_MC_IOC              = 1,    /*!< IO Controller (IOC)            */
 123         BFI_MC_DIAG             = 2,    /*!< Diagnostic Msgs                */
 124         BFI_MC_FLASH            = 3,    /*!< Flash message class            */
 125         BFI_MC_CEE              = 4,    /*!< CEE                            */
 126         BFI_MC_FCPORT           = 5,    /*!< FC port                        */
 127         BFI_MC_IOCFC            = 6,    /*!< FC - IO Controller (IOC)       */
 128         BFI_MC_LL               = 7,    /*!< Link Layer                     */
 129         BFI_MC_UF               = 8,    /*!< Unsolicited frame receive      */
 130         BFI_MC_FCXP             = 9,    /*!< FC Transport                   */
 131         BFI_MC_LPS              = 10,   /*!< lport fc login services        */
 132         BFI_MC_RPORT            = 11,   /*!< Remote port                    */
 133         BFI_MC_ITNIM            = 12,   /*!< I-T nexus (Initiator mode)     */
 134         BFI_MC_IOIM_READ        = 13,   /*!< read IO (Initiator mode)       */
 135         BFI_MC_IOIM_WRITE       = 14,   /*!< write IO (Initiator mode)      */
 136         BFI_MC_IOIM_IO          = 15,   /*!< IO (Initiator mode)            */
 137         BFI_MC_IOIM             = 16,   /*!< IO (Initiator mode)            */
 138         BFI_MC_IOIM_IOCOM       = 17,   /*!< good IO completion             */
 139         BFI_MC_TSKIM            = 18,   /*!< Initiator Task management      */
 140         BFI_MC_SBOOT            = 19,   /*!< SAN boot services              */
 141         BFI_MC_IPFC             = 20,   /*!< IP over FC Msgs                */
 142         BFI_MC_PORT             = 21,   /*!< Physical port                  */
 143         BFI_MC_SFP              = 22,   /*!< SFP module                     */
 144         BFI_MC_MSGQ             = 23,   /*!< MSGQ                           */
 145         BFI_MC_ENET             = 24,   /*!< ENET commands/responses        */
 146         BFI_MC_PHY              = 25,   /*!< External PHY message class     */
 147         BFI_MC_NBOOT            = 26,   /*!< Network Boot                   */
 148         BFI_MC_TIO_READ         = 27,   /*!< read IO (Target mode)          */
 149         BFI_MC_TIO_WRITE        = 28,   /*!< write IO (Target mode)         */
 150         BFI_MC_TIO_DATA_XFERED  = 29,   /*!< ds transferred (target mode)   */
 151         BFI_MC_TIO_IO           = 30,   /*!< IO (Target mode)               */
 152         BFI_MC_TIO              = 31,   /*!< IO (target mode)               */
 153         BFI_MC_MFG              = 32,   /*!< MFG/ASIC block commands        */
 154         BFI_MC_EDMA             = 33,   /*!< EDMA copy commands             */
 155         BFI_MC_MAX              = 34
 156 };
 157
 158 #define BFI_IOC_MSGLEN_MAX      32      /* 32 bytes */
 159
 160 #define BFI_FWBOOT_ENV_OS               0
 161
 162 /**
 163  *----------------------------------------------------------------------
 164  *                              IOC
 165  *----------------------------------------------------------------------
 166  */
 167
 168 /**
 169  * Different asic generations
 170  */
 171 enum bfi_asic_gen {
 172         BFI_ASIC_GEN_CB         = 1,
 173         BFI_ASIC_GEN_CT         = 2,
 174         BFI_ASIC_GEN_CT2        = 3,
 175 };
 176
 177 enum bfi_asic_mode {
 178         BFI_ASIC_MODE_FC        = 1,    /* FC upto 8G speed             */
 179         BFI_ASIC_MODE_FC16      = 2,    /* FC upto 16G speed            */
 180         BFI_ASIC_MODE_ETH       = 3,    /* Ethernet ports               */
 181         BFI_ASIC_MODE_COMBO     = 4,    /* FC 16G and Ethernet 10G port */
 182 };
 183
 184 enum bfi_ioc_h2i_msgs {
 185         BFI_IOC_H2I_ENABLE_REQ          = 1,
 186         BFI_IOC_H2I_DISABLE_REQ         = 2,
 187         BFI_IOC_H2I_GETATTR_REQ         = 3,
 188         BFI_IOC_H2I_DBG_SYNC            = 4,
 189         BFI_IOC_H2I_DBG_DUMP            = 5,
 190 };
 191
 192 enum bfi_ioc_i2h_msgs {
 193         BFI_IOC_I2H_ENABLE_REPLY        = BFA_I2HM(1),
 194         BFI_IOC_I2H_DISABLE_REPLY       = BFA_I2HM(2),
 195         BFI_IOC_I2H_GETATTR_REPLY       = BFA_I2HM(3),
 196         BFI_IOC_I2H_HBEAT               = BFA_I2HM(4),
 197 };
 198
 199 /**
 200  * BFI_IOC_H2I_GETATTR_REQ message
 201  */
 202 struct bfi_ioc_getattr_req {
 203         struct bfi_mhdr mh;
 204         union bfi_addr_u        attr_addr;
 205 };
 206
 207 struct bfi_ioc_attr {
 208         u64             mfg_pwwn;       /*!< Mfg port wwn          */
 209         u64             mfg_nwwn;       /*!< Mfg node wwn          */
 210         mac_t           mfg_mac;        /*!< Mfg mac               */
 211         u8              port_mode;      /* enum bfi_port_mode      */
 212         u8              rsvd_a;
 213         u64             pwwn;
 214         u64             nwwn;
 215         mac_t           mac;            /*!< PBC or Mfg mac        */
 216         u16     rsvd_b;
 217         mac_t           fcoe_mac;
 218         u16     rsvd_c;
 219         char            brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
 220         u8              pcie_gen;
 221         u8              pcie_lanes_orig;
 222         u8              pcie_lanes;
 223         u8              rx_bbcredit;    /*!< receive buffer credits */
 224         u32     adapter_prop;   /*!< adapter properties     */
 225         u16     maxfrsize;      /*!< max receive frame size */
 226         char            asic_rev;
 227         u8              rsvd_d;
 228         char            fw_version[BFA_VERSION_LEN];
 229         char            optrom_version[BFA_VERSION_LEN];
 230         struct bfa_mfg_vpd vpd;
 231         u32     card_type;      /*!< card type                  */
 232 };
 233
 234 /**
 235  * BFI_IOC_I2H_GETATTR_REPLY message
 236  */
 237 struct bfi_ioc_getattr_reply {
 238         struct bfi_mhdr mh;     /*!< Common msg header          */
 239         u8                      status; /*!< cfg reply status           */
 240         u8                      rsvd[3];
 241 };
 242
 243 /**
 244  * Firmware memory page offsets
 245  */
 246 #define BFI_IOC_SMEM_PG0_CB     (0x40)
 247 #define BFI_IOC_SMEM_PG0_CT     (0x180)
 248
 249 /**
 250  * Firmware statistic offset
 251  */
 252 #define BFI_IOC_FWSTATS_OFF     (0x6B40)
 253 #define BFI_IOC_FWSTATS_SZ      (4096)
 254
 255 /**
 256  * Firmware trace offset
 257  */
 258 #define BFI_IOC_TRC_OFF         (0x4b00)
 259 #define BFI_IOC_TRC_ENTS        256
 260 #define BFI_IOC_TRC_ENT_SZ      16
 261 #define BFI_IOC_TRC_HDR_SZ      32
 262
 263 #define BFI_IOC_FW_SIGNATURE    (0xbfadbfad)
 264 #define BFI_IOC_MD5SUM_SZ       4
 265 struct bfi_ioc_image_hdr {
 266         u32     signature;      /*!< constant signature */
 267         u8      asic_gen;       /*!< asic generation */
 268         u8      asic_mode;
 269         u8      port0_mode;     /*!< device mode for port 0 */
 270         u8      port1_mode;     /*!< device mode for port 1 */
 271         u32     exec;           /*!< exec vector        */
 272         u32     bootenv;        /*!< firmware boot env */
 273         u32     rsvd_b[4];
 274         u32     md5sum[BFI_IOC_MD5SUM_SZ];
 275 };
 276
 277 #define BFI_FWBOOT_DEVMODE_OFF          4
 278 #define BFI_FWBOOT_TYPE_OFF             8
 279 #define BFI_FWBOOT_ENV_OFF              12
 280 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
 281         (((u32)(__asic_gen)) << 24 |    \
 282          ((u32)(__asic_mode)) << 16 |   \
 283          ((u32)(__p0_mode)) << 8 |      \
 284          ((u32)(__p1_mode)))
 285
 286 enum bfi_fwboot_type {
 287         BFI_FWBOOT_TYPE_NORMAL  = 0,
 288         BFI_FWBOOT_TYPE_FLASH   = 1,
 289         BFI_FWBOOT_TYPE_MEMTEST = 2,
 290 };
 291
 292 enum bfi_port_mode {
 293         BFI_PORT_MODE_FC        = 1,
 294         BFI_PORT_MODE_ETH       = 2,
 295 };
 296
 297 struct bfi_ioc_hbeat {
 298         struct bfi_mhdr mh;             /*!< common msg header          */
 299         u32        hb_count;    /*!< current heart beat count   */
 300 };
 301
 302 /**
 303  * IOC hardware/firmware state
 304  */
 305 enum bfi_ioc_state {
 306         BFI_IOC_UNINIT          = 0,    /*!< not initialized                 */
 307         BFI_IOC_INITING         = 1,    /*!< h/w is being initialized        */
 308         BFI_IOC_HWINIT          = 2,    /*!< h/w is initialized              */
 309         BFI_IOC_CFG             = 3,    /*!< IOC configuration in progress   */
 310         BFI_IOC_OP              = 4,    /*!< IOC is operational              */
 311         BFI_IOC_DISABLING       = 5,    /*!< IOC is being disabled           */
 312         BFI_IOC_DISABLED        = 6,    /*!< IOC is disabled                 */
 313         BFI_IOC_CFG_DISABLED    = 7,    /*!< IOC is being disabled;transient */
 314         BFI_IOC_FAIL            = 8,    /*!< IOC heart-beat failure          */
 315         BFI_IOC_MEMTEST         = 9,    /*!< IOC is doing memtest            */
 316 };
 317
 318 #define BFI_IOC_ENDIAN_SIG  0x12345678
 319
 320 enum {
 321         BFI_ADAPTER_TYPE_FC     = 0x01,         /*!< FC adapters           */
 322         BFI_ADAPTER_TYPE_MK     = 0x0f0000,     /*!< adapter type mask     */
 323         BFI_ADAPTER_TYPE_SH     = 16,           /*!< adapter type shift    */
 324         BFI_ADAPTER_NPORTS_MK   = 0xff00,       /*!< number of ports mask  */
 325         BFI_ADAPTER_NPORTS_SH   = 8,            /*!< number of ports shift */
 326         BFI_ADAPTER_SPEED_MK    = 0xff,         /*!< adapter speed mask    */
 327         BFI_ADAPTER_SPEED_SH    = 0,            /*!< adapter speed shift   */
 328         BFI_ADAPTER_PROTO       = 0x100000,     /*!< prototype adapaters   */
 329         BFI_ADAPTER_TTV         = 0x200000,     /*!< TTV debug capable     */
 330         BFI_ADAPTER_UNSUPP      = 0x400000,     /*!< unknown adapter type  */
 331 };
 332
 333 #define BFI_ADAPTER_GETP(__prop, __adap_prop)                   \
 334         (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >>     \
 335                 BFI_ADAPTER_ ## __prop ## _SH)
 336 #define BFI_ADAPTER_SETP(__prop, __val)                         \
 337         ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
 338 #define BFI_ADAPTER_IS_PROTO(__adap_type)                       \
 339         ((__adap_type) & BFI_ADAPTER_PROTO)
 340 #define BFI_ADAPTER_IS_TTV(__adap_type)                         \
 341         ((__adap_type) & BFI_ADAPTER_TTV)
 342 #define BFI_ADAPTER_IS_UNSUPP(__adap_type)                      \
 343         ((__adap_type) & BFI_ADAPTER_UNSUPP)
 344 #define BFI_ADAPTER_IS_SPECIAL(__adap_type)                     \
 345         ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
 346                         BFI_ADAPTER_UNSUPP))
 347
 348 /**
 349  * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
 350  */
 351 struct bfi_ioc_ctrl_req {
 352         struct bfi_mhdr mh;
 353         u16                     clscode;
 354         u16                     rsvd;
 355         u32             tv_sec;
 356 };
 357
 358 /**
 359  * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
 360  */
 361 struct bfi_ioc_ctrl_reply {
 362         struct bfi_mhdr mh;                     /*!< Common msg header     */
 363         u8                      status;         /*!< enable/disable status */
 364         u8                      port_mode;      /*!< enum bfa_mode */
 365         u8                      cap_bm;         /*!< capability bit mask */
 366         u8                      rsvd;
 367 };
 368
 369 #define BFI_IOC_MSGSZ   8
 370 /**
 371  * H2I Messages
 372  */
 373 union bfi_ioc_h2i_msg_u {
 374         struct bfi_mhdr mh;
 375         struct bfi_ioc_ctrl_req enable_req;
 376         struct bfi_ioc_ctrl_req disable_req;
 377         struct bfi_ioc_getattr_req getattr_req;
 378         u32                     mboxmsg[BFI_IOC_MSGSZ];
 379 };
 380
 381 /**
 382  * I2H Messages
 383  */
 384 union bfi_ioc_i2h_msg_u {
 385         struct bfi_mhdr mh;
 386         struct bfi_ioc_ctrl_reply fw_event;
 387         u32                     mboxmsg[BFI_IOC_MSGSZ];
 388 };
 389
 390 /**
 391  *----------------------------------------------------------------------
 392  *                              MSGQ
 393  *----------------------------------------------------------------------
 394  */
 395
 396 enum bfi_msgq_h2i_msgs {
 397         BFI_MSGQ_H2I_INIT_REQ      = 1,
 398         BFI_MSGQ_H2I_DOORBELL_PI        = 2,
 399         BFI_MSGQ_H2I_DOORBELL_CI        = 3,
 400         BFI_MSGQ_H2I_CMDQ_COPY_RSP      = 4,
 401 };
 402
 403 enum bfi_msgq_i2h_msgs {
 404         BFI_MSGQ_I2H_INIT_RSP      = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
 405         BFI_MSGQ_I2H_DOORBELL_PI        = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
 406         BFI_MSGQ_I2H_DOORBELL_CI        = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
 407         BFI_MSGQ_I2H_CMDQ_COPY_REQ      = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
 408 };
 409
 410 /* Messages(commands/responsed/AENS will have the following header */
 411 struct bfi_msgq_mhdr {
 412         u8      msg_class;
 413         u8      msg_id;
 414         u16     msg_token;
 415         u16     num_entries;
 416         u8      enet_id;
 417         u8      rsvd[1];
 418 };
 419
 420 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {  \
 421         (_mh).msg_class  = (_mc);       \
 422         (_mh).msg_id        = (_mid);       \
 423         (_mh).msg_token  = (_tok);       \
 424         (_mh).enet_id      = (_enet_id);   \
 425 } while (0)
 426
 427 /*
 428  * Mailbox  for messaging interface
 429  */
 430 #define BFI_MSGQ_CMD_ENTRY_SIZE  (64)    /* TBD */
 431 #define BFI_MSGQ_RSP_ENTRY_SIZE  (64)    /* TBD */
 432
 433 #define bfi_msgq_num_cmd_entries(_size)                          \
 434         (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
 435
 436 struct bfi_msgq {
 437         union bfi_addr_u addr;
 438         u16 q_depth;     /* Total num of entries in the queue */
 439         u8 rsvd[2];
 440 };
 441
 442 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
 443 struct bfi_msgq_cfg_req {
 444         struct bfi_mhdr mh;
 445         struct bfi_msgq cmdq;
 446         struct bfi_msgq rspq;
 447 };
 448
 449 /* BFI_ENET_MSGQ_CFG_RSP */
 450 struct bfi_msgq_cfg_rsp {
 451         struct bfi_mhdr mh;
 452         u8 cmd_status;
 453         u8 rsvd[3];
 454 };
 455
 456 /* BFI_MSGQ_H2I_DOORBELL */
 457 struct bfi_msgq_h2i_db {
 458         struct bfi_mhdr mh;
 459         union {
 460                 u16 cmdq_pi;
 461                 u16 rspq_ci;
 462         } idx;
 463 };
 464
 465 /* BFI_MSGQ_I2H_DOORBELL */
 466 struct bfi_msgq_i2h_db {
 467         struct bfi_mhdr mh;
 468         union {
 469                 u16 rspq_pi;
 470                 u16 cmdq_ci;
 471         } idx;
 472 };
 473
 474 #define BFI_CMD_COPY_SZ 28
 475
 476 /* BFI_MSGQ_H2I_CMD_COPY_RSP */
 477 struct bfi_msgq_h2i_cmdq_copy_rsp {
 478         struct bfi_mhdr mh;
 479         u8            data[BFI_CMD_COPY_SZ];
 480 };
 481
 482 /* BFI_MSGQ_I2H_CMD_COPY_REQ */
 483 struct bfi_msgq_i2h_cmdq_copy_req {
 484         struct bfi_mhdr mh;
 485         u16     offset;
 486         u16     len;
 487 };
 488
 489 /*
 490  *      FLASH module specific
 491  */
 492 enum bfi_flash_h2i_msgs {
 493         BFI_FLASH_H2I_QUERY_REQ = 1,
 494         BFI_FLASH_H2I_ERASE_REQ = 2,
 495         BFI_FLASH_H2I_WRITE_REQ = 3,
 496         BFI_FLASH_H2I_READ_REQ = 4,
 497         BFI_FLASH_H2I_BOOT_VER_REQ = 5,
 498 };
 499
 500 enum bfi_flash_i2h_msgs {
 501         BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
 502         BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
 503         BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
 504         BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
 505         BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
 506         BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
 507 };
 508
 509 /*
 510  * Flash query request
 511  */
 512 struct bfi_flash_query_req {
 513         struct bfi_mhdr mh;   /* Common msg header */
 514         struct bfi_alen alen;
 515 };
 516
 517 /*
 518  * Flash write request
 519  */
 520 struct bfi_flash_write_req {
 521         struct bfi_mhdr mh;     /* Common msg header */
 522         struct bfi_alen alen;
 523         u32     type;   /* partition type */
 524         u8      instance; /* partition instance */
 525         u8      last;
 526         u8      rsv[2];
 527         u32     offset;
 528         u32     length;
 529 };
 530
 531 /*
 532  * Flash read request
 533  */
 534 struct bfi_flash_read_req {
 535         struct bfi_mhdr mh;     /* Common msg header */
 536         u32     type;           /* partition type */
 537         u8      instance;       /* partition instance */
 538         u8      rsv[3];
 539         u32     offset;
 540         u32     length;
 541         struct bfi_alen alen;
 542 };
 543
 544 /*
 545  * Flash query response
 546  */
 547 struct bfi_flash_query_rsp {
 548         struct bfi_mhdr mh;     /* Common msg header */
 549         u32     status;
 550 };
 551
 552 /*
 553  * Flash read response
 554  */
 555 struct bfi_flash_read_rsp {
 556         struct bfi_mhdr mh;     /* Common msg header */
 557         u32     type;           /* partition type */
 558         u8      instance;       /* partition instance */
 559         u8      rsv[3];
 560         u32     status;
 561         u32     length;
 562 };
 563
 564 /*
 565  * Flash write response
 566  */
 567 struct bfi_flash_write_rsp {
 568         struct bfi_mhdr mh;     /* Common msg header */
 569         u32     type;           /* partition type */
 570         u8      instance;       /* partition instance */
 571         u8      rsv[3];
 572         u32     status;
 573         u32     length;
 574 };
 575
 576 #pragma pack()
 577
 578 #endif /* __BFI_H__ */