drivers/net/ethernet/neterion/vxge/vxge-main.h

   1 /******************************************************************************
   2  * This software may be used and distributed according to the terms of
   3  * the GNU General Public License (GPL), incorporated herein by reference.
   4  * Drivers based on or derived from this code fall under the GPL and must
   5  * retain the authorship, copyright and license notice.  This file is not
   6  * a complete program and may only be used when the entire operating
   7  * system is licensed under the GPL.
   8  * See the file COPYING in this distribution for more information.
   9  *
  10  * vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11  *              Virtualized Server Adapter.
  12  * Copyright(c) 2002-2010 Exar Corp.
  13  ******************************************************************************/
  14 #ifndef VXGE_MAIN_H
  15 #define VXGE_MAIN_H
  16
  17 #include "vxge-traffic.h"
  18 #include "vxge-config.h"
  19 #include "vxge-version.h"
  20 #include <linux/list.h>
  21 #include <linux/bitops.h>
  22 #include <linux/if_vlan.h>
  23
  24 #define VXGE_DRIVER_NAME                "vxge"
  25 #define VXGE_DRIVER_VENDOR              "Neterion, Inc"
  26 #define VXGE_DRIVER_FW_VERSION_MAJOR    1
  27
  28 #define DRV_VERSION     VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
  29         VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
  30         VXGE_VERSION_FOR
  31
  32 #define PCI_DEVICE_ID_TITAN_WIN         0x5733
  33 #define PCI_DEVICE_ID_TITAN_UNI         0x5833
  34 #define VXGE_HW_TITAN1_PCI_REVISION     1
  35 #define VXGE_HW_TITAN1A_PCI_REVISION    2
  36
  37 #define VXGE_USE_DEFAULT                0xffffffff
  38 #define VXGE_HW_VPATH_MSIX_ACTIVE       4
  39 #define VXGE_ALARM_MSIX_ID              2
  40 #define VXGE_HW_RXSYNC_FREQ_CNT         4
  41 #define VXGE_LL_WATCH_DOG_TIMEOUT       (15 * HZ)
  42 #define VXGE_LL_RX_COPY_THRESHOLD       256
  43 #define VXGE_DEF_FIFO_LENGTH            84
  44
  45 #define NO_STEERING             0
  46 #define PORT_STEERING           0x1
  47 #define RTH_STEERING            0x2
  48 #define RX_TOS_STEERING         0x3
  49 #define RX_VLAN_STEERING        0x4
  50 #define RTH_BUCKET_SIZE         4
  51
  52 #define TX_PRIORITY_STEERING    1
  53 #define TX_VLAN_STEERING        2
  54 #define TX_PORT_STEERING        3
  55 #define TX_MULTIQ_STEERING      4
  56
  57 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
  58
  59 #define VXGE_TTI_BTIMER_VAL 250000
  60
  61 #define VXGE_TTI_LTIMER_VAL     1000
  62 #define VXGE_T1A_TTI_LTIMER_VAL 80
  63 #define VXGE_TTI_RTIMER_VAL     0
  64 #define VXGE_TTI_RTIMER_ADAPT_VAL       10
  65 #define VXGE_T1A_TTI_RTIMER_VAL 400
  66 #define VXGE_RTI_BTIMER_VAL     250
  67 #define VXGE_RTI_LTIMER_VAL     100
  68 #define VXGE_RTI_RTIMER_VAL     0
  69 #define VXGE_RTI_RTIMER_ADAPT_VAL       15
  70 #define VXGE_FIFO_INDICATE_MAX_PKTS     VXGE_DEF_FIFO_LENGTH
  71 #define VXGE_ISR_POLLING_CNT    8
  72 #define VXGE_MAX_CONFIG_DEV     0xFF
  73 #define VXGE_EXEC_MODE_DISABLE  0
  74 #define VXGE_EXEC_MODE_ENABLE   1
  75 #define VXGE_MAX_CONFIG_PORT    1
  76 #define VXGE_ALL_VID_DISABLE    0
  77 #define VXGE_ALL_VID_ENABLE     1
  78 #define VXGE_PAUSE_CTRL_DISABLE 0
  79 #define VXGE_PAUSE_CTRL_ENABLE  1
  80
  81 #define TTI_TX_URANGE_A 5
  82 #define TTI_TX_URANGE_B 15
  83 #define TTI_TX_URANGE_C 40
  84 #define TTI_TX_UFC_A    5
  85 #define TTI_TX_UFC_B    40
  86 #define TTI_TX_UFC_C    60
  87 #define TTI_TX_UFC_D    100
  88 #define TTI_T1A_TX_UFC_A        30
  89 #define TTI_T1A_TX_UFC_B        80
  90 /* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */
  91 /* Slope - 93 */
  92 /* 60 - 9k Mtu, 140 - 1.5k mtu */
  93 #define TTI_T1A_TX_UFC_C(mtu)   (60 + ((VXGE_HW_MAX_MTU - mtu) / 93))
  94
  95 /* Slope - 37 */
  96 /* 100 - 9k Mtu, 300 - 1.5k mtu */
  97 #define TTI_T1A_TX_UFC_D(mtu)   (100 + ((VXGE_HW_MAX_MTU - mtu) / 37))
  98
  99
 100 #define RTI_RX_URANGE_A         5
 101 #define RTI_RX_URANGE_B         15
 102 #define RTI_RX_URANGE_C         40
 103 #define RTI_T1A_RX_URANGE_A     1
 104 #define RTI_T1A_RX_URANGE_B     20
 105 #define RTI_T1A_RX_URANGE_C     50
 106 #define RTI_RX_UFC_A            1
 107 #define RTI_RX_UFC_B            5
 108 #define RTI_RX_UFC_C            10
 109 #define RTI_RX_UFC_D            15
 110 #define RTI_T1A_RX_UFC_B        20
 111 #define RTI_T1A_RX_UFC_C        50
 112 #define RTI_T1A_RX_UFC_D        60
 113
 114 /*
 115  * The interrupt rate is maintained at 3k per second with the moderation
 116  * parameters for most traffic but not all. This is the maximum interrupt
 117  * count allowed per function with INTA or per vector in the case of
 118  * MSI-X in a 10 millisecond time period. Enabled only for Titan 1A.
 119  */
 120 #define VXGE_T1A_MAX_INTERRUPT_COUNT    100
 121 #define VXGE_T1A_MAX_TX_INTERRUPT_COUNT 200
 122
 123 /* Milli secs timer period */
 124 #define VXGE_TIMER_DELAY                10000
 125
 126 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
 127
 128 #define is_sriov(function_mode) \
 129         ((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
 130         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
 131         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
 132
 133 enum vxge_reset_event {
 134         /* reset events */
 135         VXGE_LL_VPATH_RESET     = 0,
 136         VXGE_LL_DEVICE_RESET    = 1,
 137         VXGE_LL_FULL_RESET      = 2,
 138         VXGE_LL_START_RESET     = 3,
 139         VXGE_LL_COMPL_RESET     = 4
 140 };
 141 /* These flags represent the devices temporary state */
 142 enum vxge_device_state_t {
 143 __VXGE_STATE_RESET_CARD = 0,
 144 __VXGE_STATE_CARD_UP
 145 };
 146
 147 enum vxge_mac_addr_state {
 148         /* mac address states */
 149         VXGE_LL_MAC_ADDR_IN_LIST        = 0,
 150         VXGE_LL_MAC_ADDR_IN_DA_TABLE    = 1
 151 };
 152
 153 struct vxge_drv_config {
 154         int config_dev_cnt;
 155         int total_dev_cnt;
 156         int g_no_cpus;
 157         unsigned int vpath_per_dev;
 158 };
 159
 160 struct macInfo {
 161         unsigned char macaddr[ETH_ALEN];
 162         unsigned char macmask[ETH_ALEN];
 163         unsigned int vpath_no;
 164         enum vxge_mac_addr_state state;
 165 };
 166
 167 struct vxge_config {
 168         int             tx_pause_enable;
 169         int             rx_pause_enable;
 170
 171 #define NEW_NAPI_WEIGHT 64
 172         int             napi_weight;
 173         int             intr_type;
 174 #define INTA    0
 175 #define MSI     1
 176 #define MSI_X   2
 177
 178         int             addr_learn_en;
 179
 180         u32             rth_steering:2,
 181                         rth_algorithm:2,
 182                         rth_hash_type_tcpipv4:1,
 183                         rth_hash_type_ipv4:1,
 184                         rth_hash_type_tcpipv6:1,
 185                         rth_hash_type_ipv6:1,
 186                         rth_hash_type_tcpipv6ex:1,
 187                         rth_hash_type_ipv6ex:1,
 188                         rth_bkt_sz:8;
 189         int             rth_jhash_golden_ratio;
 190         int             tx_steering_type;
 191         int     fifo_indicate_max_pkts;
 192         struct vxge_hw_device_hw_info device_hw_info;
 193 };
 194
 195 struct vxge_msix_entry {
 196         /* Mimicing the msix_entry struct of Kernel. */
 197         u16 vector;
 198         u16 entry;
 199         u16 in_use;
 200         void *arg;
 201 };
 202
 203 /* Software Statistics */
 204
 205 struct vxge_sw_stats {
 206
 207         /* Virtual Path */
 208         unsigned long vpaths_open;
 209         unsigned long vpath_open_fail;
 210
 211         /* Misc. */
 212         unsigned long link_up;
 213         unsigned long link_down;
 214 };
 215
 216 struct vxge_mac_addrs {
 217         struct list_head item;
 218         u64 macaddr;
 219         u64 macmask;
 220         enum vxge_mac_addr_state state;
 221 };
 222
 223 struct vxgedev;
 224
 225 struct vxge_fifo_stats {
 226         struct u64_stats_sync   syncp;
 227         u64 tx_frms;
 228         u64 tx_bytes;
 229
 230         unsigned long tx_errors;
 231         unsigned long txd_not_free;
 232         unsigned long txd_out_of_desc;
 233         unsigned long pci_map_fail;
 234 };
 235
 236 struct vxge_fifo {
 237         struct net_device *ndev;
 238         struct pci_dev *pdev;
 239         struct __vxge_hw_fifo *handle;
 240         struct netdev_queue *txq;
 241
 242         int tx_steering_type;
 243         int indicate_max_pkts;
 244
 245         /* Adaptive interrupt moderation parameters used in T1A */
 246         unsigned long interrupt_count;
 247         unsigned long jiffies;
 248
 249         u32 tx_vector_no;
 250         /* Tx stats */
 251         struct vxge_fifo_stats stats;
 252 } ____cacheline_aligned;
 253
 254 struct vxge_ring_stats {
 255         struct u64_stats_sync syncp;
 256         u64 rx_frms;
 257         u64 rx_mcast;
 258         u64 rx_bytes;
 259
 260         unsigned long rx_errors;
 261         unsigned long rx_dropped;
 262         unsigned long prev_rx_frms;
 263         unsigned long pci_map_fail;
 264         unsigned long skb_alloc_fail;
 265 };
 266
 267 struct vxge_ring {
 268         struct net_device       *ndev;
 269         struct pci_dev          *pdev;
 270         struct __vxge_hw_ring   *handle;
 271         /* The vpath id maintained in the driver -
 272          * 0 to 'maximum_vpaths_in_function - 1'
 273          */
 274         int driver_id;
 275
 276         /* Adaptive interrupt moderation parameters used in T1A */
 277         unsigned long interrupt_count;
 278         unsigned long jiffies;
 279
 280         /* copy of the flag indicating whether rx_hwts is to be used */
 281         u32 rx_hwts:1;
 282
 283         int pkts_processed;
 284         int budget;
 285
 286         struct napi_struct napi;
 287         struct napi_struct *napi_p;
 288
 289 #define VXGE_MAX_MAC_ADDR_COUNT         30
 290
 291         int vlan_tag_strip;
 292         u32 rx_vector_no;
 293         enum vxge_hw_status last_status;
 294
 295         /* Rx stats */
 296         struct vxge_ring_stats stats;
 297 } ____cacheline_aligned;
 298
 299 struct vxge_vpath {
 300         struct vxge_fifo fifo;
 301         struct vxge_ring ring;
 302
 303         struct __vxge_hw_vpath_handle *handle;
 304
 305         /* Actual vpath id for this vpath in the device - 0 to 16 */
 306         int device_id;
 307         int max_mac_addr_cnt;
 308         int is_configured;
 309         int is_open;
 310         struct vxgedev *vdev;
 311         u8 macaddr[ETH_ALEN];
 312         u8 macmask[ETH_ALEN];
 313
 314 #define VXGE_MAX_LEARN_MAC_ADDR_CNT     2048
 315         /* mac addresses currently programmed into NIC */
 316         u16 mac_addr_cnt;
 317         u16 mcast_addr_cnt;
 318         struct list_head mac_addr_list;
 319
 320         u32 level_err;
 321         u32 level_trace;
 322 };
 323 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) {  \
 324         for (i = 0; i < vdev->no_of_vpath; i++) {               \
 325                 vdev->vpaths[i].level_err = err;                \
 326                 vdev->vpaths[i].level_trace = trace;            \
 327         }                                                       \
 328         vdev->level_err = err;                                  \
 329         vdev->level_trace = trace;                              \
 330 }
 331
 332 struct vxgedev {
 333         struct net_device       *ndev;
 334         struct pci_dev          *pdev;
 335         struct __vxge_hw_device *devh;
 336         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 337         int vlan_tag_strip;
 338         struct vxge_config      config;
 339         unsigned long   state;
 340
 341         /* Indicates which vpath to reset */
 342         unsigned long  vp_reset;
 343
 344         /* Timer used for polling vpath resets */
 345         struct timer_list vp_reset_timer;
 346
 347         /* Timer used for polling vpath lockup */
 348         struct timer_list vp_lockup_timer;
 349
 350         /*
 351          * Flags to track whether device is in All Multicast
 352          * or in promiscuous mode.
 353          */
 354         u16             all_multi_flg;
 355
 356         /* A flag indicating whether rx_hwts is to be used or not. */
 357         u32     rx_hwts:1,
 358                 titan1:1;
 359
 360         struct vxge_msix_entry *vxge_entries;
 361         struct msix_entry *entries;
 362         /*
 363          * 4 for each vpath * 17;
 364          * total is 68
 365          */
 366 #define VXGE_MAX_REQUESTED_MSIX 68
 367 #define VXGE_INTR_STRLEN 80
 368         char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
 369
 370         enum vxge_hw_event cric_err_event;
 371
 372         int max_vpath_supported;
 373         int no_of_vpath;
 374
 375         struct napi_struct napi;
 376         /* A debug option, when enabled and if error condition occurs,
 377          * the driver will do following steps:
 378          * - mask all interrupts
 379          * - Not clear the source of the alarm
 380          * - gracefully stop all I/O
 381          * A diagnostic dump of register and stats at this point
 382          * reveals very useful information.
 383          */
 384         int exec_mode;
 385         int max_config_port;
 386         struct vxge_vpath       *vpaths;
 387
 388         struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
 389         void __iomem *bar0;
 390         struct vxge_sw_stats    stats;
 391         int             mtu;
 392         /* Below variables are used for vpath selection to transmit a packet */
 393         u8              vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
 394         u64             vpaths_deployed;
 395
 396         u32             intr_cnt;
 397         u32             level_err;
 398         u32             level_trace;
 399         char            fw_version[VXGE_HW_FW_STRLEN];
 400         struct work_struct reset_task;
 401 };
 402
 403 struct vxge_rx_priv {
 404         struct sk_buff          *skb;
 405         unsigned char           *skb_data;
 406         dma_addr_t              data_dma;
 407         dma_addr_t              data_size;
 408 };
 409
 410 struct vxge_tx_priv {
 411         struct sk_buff          *skb;
 412         dma_addr_t              dma_buffers[MAX_SKB_FRAGS+1];
 413 };
 414
 415 #define VXGE_MODULE_PARAM_INT(p, val) \
 416         static int p = val; \
 417         module_param(p, int, 0)
 418
 419 #define vxge_os_timer(timer, handle, arg, exp) do { \
 420                 init_timer(&timer); \
 421                 timer.function = handle; \
 422                 timer.data = (unsigned long) arg; \
 423                 mod_timer(&timer, (jiffies + exp)); \
 424         } while (0);
 425
 426 void vxge_initialize_ethtool_ops(struct net_device *ndev);
 427 enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
 428 int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
 429
 430 /**
 431  * #define VXGE_DEBUG_INIT: debug for initialization functions
 432  * #define VXGE_DEBUG_TX         : debug transmit related functions
 433  * #define VXGE_DEBUG_RX  : debug recevice related functions
 434  * #define VXGE_DEBUG_MEM : debug memory module
 435  * #define VXGE_DEBUG_LOCK: debug locks
 436  * #define VXGE_DEBUG_SEM : debug semaphore
 437  * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
 438 */
 439 #define VXGE_DEBUG_INIT         0x00000001
 440 #define VXGE_DEBUG_TX           0x00000002
 441 #define VXGE_DEBUG_RX           0x00000004
 442 #define VXGE_DEBUG_MEM          0x00000008
 443 #define VXGE_DEBUG_LOCK         0x00000010
 444 #define VXGE_DEBUG_SEM          0x00000020
 445 #define VXGE_DEBUG_ENTRYEXIT    0x00000040
 446 #define VXGE_DEBUG_INTR         0x00000080
 447 #define VXGE_DEBUG_LL_CONFIG    0x00000100
 448
 449 /* Debug tracing for VXGE driver */
 450 #ifndef VXGE_DEBUG_MASK
 451 #define VXGE_DEBUG_MASK 0x0
 452 #endif
 453
 454 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
 455 #define vxge_debug_ll_config(level, fmt, ...) \
 456         vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
 457 #else
 458 #define vxge_debug_ll_config(level, fmt, ...)
 459 #endif
 460
 461 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
 462 #define vxge_debug_init(level, fmt, ...) \
 463         vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
 464 #else
 465 #define vxge_debug_init(level, fmt, ...)
 466 #endif
 467
 468 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
 469 #define vxge_debug_tx(level, fmt, ...) \
 470         vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
 471 #else
 472 #define vxge_debug_tx(level, fmt, ...)
 473 #endif
 474
 475 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
 476 #define vxge_debug_rx(level, fmt, ...) \
 477         vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
 478 #else
 479 #define vxge_debug_rx(level, fmt, ...)
 480 #endif
 481
 482 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
 483 #define vxge_debug_mem(level, fmt, ...) \
 484         vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
 485 #else
 486 #define vxge_debug_mem(level, fmt, ...)
 487 #endif
 488
 489 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
 490 #define vxge_debug_entryexit(level, fmt, ...) \
 491         vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
 492 #else
 493 #define vxge_debug_entryexit(level, fmt, ...)
 494 #endif
 495
 496 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
 497 #define vxge_debug_intr(level, fmt, ...) \
 498         vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
 499 #else
 500 #define vxge_debug_intr(level, fmt, ...)
 501 #endif
 502
 503 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
 504         vxge_hw_device_debug_set((struct __vxge_hw_device  *)vdev->devh, \
 505                 level, mask);\
 506         VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
 507                 vxge_hw_device_error_level_get((struct __vxge_hw_device  *) \
 508                         vdev->devh), \
 509                 vxge_hw_device_trace_level_get((struct __vxge_hw_device  *) \
 510                         vdev->devh));\
 511 }
 512
 513 #ifdef NETIF_F_GSO
 514 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
 515 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
 516 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
 517 #endif
 518
 519 #endif