drivers/net/wireless/ath/ath9k/ar9003_mci.h

   1 /*
   2  * Copyright (c) 2010-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef AR9003_MCI_H
  18 #define AR9003_MCI_H
  19
  20 #define MCI_FLAG_DISABLE_TIMESTAMP      0x00000001      /* Disable time stamp */
  21
  22 /* Default remote BT device MCI COEX version */
  23 #define MCI_GPM_COEX_MAJOR_VERSION_DEFAULT  3
  24 #define MCI_GPM_COEX_MINOR_VERSION_DEFAULT  0
  25
  26 /* Local WLAN MCI COEX version */
  27 #define MCI_GPM_COEX_MAJOR_VERSION_WLAN     3
  28 #define MCI_GPM_COEX_MINOR_VERSION_WLAN     0
  29
  30 enum mci_gpm_coex_query_type {
  31         MCI_GPM_COEX_QUERY_BT_ALL_INFO      = BIT(0),
  32         MCI_GPM_COEX_QUERY_BT_TOPOLOGY      = BIT(1),
  33         MCI_GPM_COEX_QUERY_BT_DEBUG         = BIT(2),
  34 };
  35
  36 enum mci_gpm_coex_halt_bt_gpm {
  37         MCI_GPM_COEX_BT_GPM_UNHALT,
  38         MCI_GPM_COEX_BT_GPM_HALT
  39 };
  40
  41 enum mci_gpm_coex_bt_update_flags_op {
  42         MCI_GPM_COEX_BT_FLAGS_READ,
  43         MCI_GPM_COEX_BT_FLAGS_SET,
  44         MCI_GPM_COEX_BT_FLAGS_CLEAR
  45 };
  46
  47 #define MCI_NUM_BT_CHANNELS     79
  48
  49 #define MCI_BT_MCI_FLAGS_UPDATE_CORR          0x00000002
  50 #define MCI_BT_MCI_FLAGS_UPDATE_HDR           0x00000004
  51 #define MCI_BT_MCI_FLAGS_UPDATE_PLD           0x00000008
  52 #define MCI_BT_MCI_FLAGS_LNA_CTRL             0x00000010
  53 #define MCI_BT_MCI_FLAGS_DEBUG                0x00000020
  54 #define MCI_BT_MCI_FLAGS_SCHED_MSG            0x00000040
  55 #define MCI_BT_MCI_FLAGS_CONT_MSG             0x00000080
  56 #define MCI_BT_MCI_FLAGS_COEX_GPM             0x00000100
  57 #define MCI_BT_MCI_FLAGS_CPU_INT_MSG          0x00000200
  58 #define MCI_BT_MCI_FLAGS_MCI_MODE             0x00000400
  59 #define MCI_BT_MCI_FLAGS_AR9462_MODE          0x00001000
  60 #define MCI_BT_MCI_FLAGS_OTHER                0x00010000
  61
  62 #define MCI_DEFAULT_BT_MCI_FLAGS              0x00011dde
  63
  64 #define MCI_TOGGLE_BT_MCI_FLAGS  (MCI_BT_MCI_FLAGS_UPDATE_CORR | \
  65                                   MCI_BT_MCI_FLAGS_UPDATE_HDR  | \
  66                                   MCI_BT_MCI_FLAGS_UPDATE_PLD  | \
  67                                   MCI_BT_MCI_FLAGS_MCI_MODE)
  68
  69 #define MCI_2G_FLAGS_CLEAR_MASK   0x00000000
  70 #define MCI_2G_FLAGS_SET_MASK     MCI_TOGGLE_BT_MCI_FLAGS
  71 #define MCI_2G_FLAGS              MCI_DEFAULT_BT_MCI_FLAGS
  72
  73 #define MCI_5G_FLAGS_CLEAR_MASK   MCI_TOGGLE_BT_MCI_FLAGS
  74 #define MCI_5G_FLAGS_SET_MASK     0x00000000
  75 #define MCI_5G_FLAGS              (MCI_DEFAULT_BT_MCI_FLAGS & \
  76                                    ~MCI_TOGGLE_BT_MCI_FLAGS)
  77
  78 /*
  79  * Default value for AR9462 is 0x00002201
  80  */
  81 #define ATH_MCI_CONFIG_CONCUR_TX            0x00000003
  82 #define ATH_MCI_CONFIG_MCI_OBS_MCI          0x00000004
  83 #define ATH_MCI_CONFIG_MCI_OBS_TXRX         0x00000008
  84 #define ATH_MCI_CONFIG_MCI_OBS_BT           0x00000010
  85 #define ATH_MCI_CONFIG_DISABLE_MCI_CAL      0x00000020
  86 #define ATH_MCI_CONFIG_DISABLE_OSLA         0x00000040
  87 #define ATH_MCI_CONFIG_DISABLE_FTP_STOMP    0x00000080
  88 #define ATH_MCI_CONFIG_AGGR_THRESH          0x00000700
  89 #define ATH_MCI_CONFIG_AGGR_THRESH_S        8
  90 #define ATH_MCI_CONFIG_DISABLE_AGGR_THRESH  0x00000800
  91 #define ATH_MCI_CONFIG_CLK_DIV              0x00003000
  92 #define ATH_MCI_CONFIG_CLK_DIV_S            12
  93 #define ATH_MCI_CONFIG_DISABLE_TUNING       0x00004000
  94 #define ATH_MCI_CONFIG_MCI_WEIGHT_DBG       0x40000000
  95 #define ATH_MCI_CONFIG_DISABLE_MCI          0x80000000
  96
  97 #define ATH_MCI_CONFIG_MCI_OBS_MASK     (ATH_MCI_CONFIG_MCI_OBS_MCI  | \
  98                                          ATH_MCI_CONFIG_MCI_OBS_TXRX | \
  99                                          ATH_MCI_CONFIG_MCI_OBS_BT)
 100 #define ATH_MCI_CONFIG_MCI_OBS_GPIO     0x0000002F
 101
 102 #endif