spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / net / wireless / ath / ath9k / common.c
blob905f1b313961914ef3faf81aa6ed210248846196
1 /*
2 * Copyright (c) 2009-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 * Module for common driver code between ath9k and ath9k_htc
21 #include <linux/kernel.h>
22 #include <linux/module.h>
24 #include "common.h"
26 MODULE_AUTHOR("Atheros Communications");
27 MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
28 MODULE_LICENSE("Dual BSD/GPL");
30 int ath9k_cmn_padpos(__le16 frame_control)
32 int padpos = 24;
33 if (ieee80211_has_a4(frame_control)) {
34 padpos += ETH_ALEN;
36 if (ieee80211_is_data_qos(frame_control)) {
37 padpos += IEEE80211_QOS_CTL_LEN;
40 return padpos;
42 EXPORT_SYMBOL(ath9k_cmn_padpos);
44 int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb)
46 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
48 if (tx_info->control.hw_key) {
49 switch (tx_info->control.hw_key->cipher) {
50 case WLAN_CIPHER_SUITE_WEP40:
51 case WLAN_CIPHER_SUITE_WEP104:
52 return ATH9K_KEY_TYPE_WEP;
53 case WLAN_CIPHER_SUITE_TKIP:
54 return ATH9K_KEY_TYPE_TKIP;
55 case WLAN_CIPHER_SUITE_CCMP:
56 return ATH9K_KEY_TYPE_AES;
57 default:
58 break;
62 return ATH9K_KEY_TYPE_CLEAR;
64 EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_keytype);
66 static u32 ath9k_get_extchanmode(struct ieee80211_channel *chan,
67 enum nl80211_channel_type channel_type)
69 u32 chanmode = 0;
71 switch (chan->band) {
72 case IEEE80211_BAND_2GHZ:
73 switch (channel_type) {
74 case NL80211_CHAN_NO_HT:
75 case NL80211_CHAN_HT20:
76 chanmode = CHANNEL_G_HT20;
77 break;
78 case NL80211_CHAN_HT40PLUS:
79 chanmode = CHANNEL_G_HT40PLUS;
80 break;
81 case NL80211_CHAN_HT40MINUS:
82 chanmode = CHANNEL_G_HT40MINUS;
83 break;
85 break;
86 case IEEE80211_BAND_5GHZ:
87 switch (channel_type) {
88 case NL80211_CHAN_NO_HT:
89 case NL80211_CHAN_HT20:
90 chanmode = CHANNEL_A_HT20;
91 break;
92 case NL80211_CHAN_HT40PLUS:
93 chanmode = CHANNEL_A_HT40PLUS;
94 break;
95 case NL80211_CHAN_HT40MINUS:
96 chanmode = CHANNEL_A_HT40MINUS;
97 break;
99 break;
100 default:
101 break;
104 return chanmode;
108 * Update internal channel flags.
110 void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
111 struct ieee80211_channel *chan,
112 enum nl80211_channel_type channel_type)
114 ichan->channel = chan->center_freq;
115 ichan->chan = chan;
117 if (chan->band == IEEE80211_BAND_2GHZ) {
118 ichan->chanmode = CHANNEL_G;
119 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM;
120 } else {
121 ichan->chanmode = CHANNEL_A;
122 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
125 if (channel_type != NL80211_CHAN_NO_HT)
126 ichan->chanmode = ath9k_get_extchanmode(chan, channel_type);
128 EXPORT_SYMBOL(ath9k_cmn_update_ichannel);
131 * Get the internal channel reference.
133 struct ath9k_channel *ath9k_cmn_get_curchannel(struct ieee80211_hw *hw,
134 struct ath_hw *ah)
136 struct ieee80211_channel *curchan = hw->conf.channel;
137 struct ath9k_channel *channel;
138 u8 chan_idx;
140 chan_idx = curchan->hw_value;
141 channel = &ah->channels[chan_idx];
142 ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
144 return channel;
146 EXPORT_SYMBOL(ath9k_cmn_get_curchannel);
148 int ath9k_cmn_count_streams(unsigned int chainmask, int max)
150 int streams = 0;
152 do {
153 if (++streams == max)
154 break;
155 } while ((chainmask = chainmask & (chainmask - 1)));
157 return streams;
159 EXPORT_SYMBOL(ath9k_cmn_count_streams);
161 void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
162 u16 new_txpow, u16 *txpower)
164 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
166 if (reg->power_limit != new_txpow) {
167 ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
168 /* read back in case value is clamped */
169 *txpower = reg->max_power_level;
172 EXPORT_SYMBOL(ath9k_cmn_update_txpow);
174 void ath9k_cmn_init_crypto(struct ath_hw *ah)
176 struct ath_common *common = ath9k_hw_common(ah);
177 int i = 0;
179 /* Get the hardware key cache size. */
180 common->keymax = AR_KEYTABLE_SIZE;
183 * Check whether the separate key cache entries
184 * are required to handle both tx+rx MIC keys.
185 * With split mic keys the number of stations is limited
186 * to 27 otherwise 59.
188 if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
189 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
192 * Reset the key cache since some parts do not
193 * reset the contents on initial power up.
195 for (i = 0; i < common->keymax; i++)
196 ath_hw_keyreset(common, (u16) i);
198 EXPORT_SYMBOL(ath9k_cmn_init_crypto);
200 static int __init ath9k_cmn_init(void)
202 return 0;
204 module_init(ath9k_cmn_init);
206 static void __exit ath9k_cmn_exit(void)
208 return;
210 module_exit(ath9k_cmn_exit);