2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
36 * Indication for txflowcontrol that all priority bits in
37 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 /* watchdog timer, in unit of ms */
42 #define TIMER_INTERVAL_WATCHDOG 1000
43 /* radio monitor timer, in unit of ms */
44 #define TIMER_INTERVAL_RADIOCHK 800
46 /* beacon interval, in unit of 1024TU */
47 #define BEACON_INTERVAL_DEFAULT 100
49 /* n-mode support capability */
50 /* 2x2 includes both 1x1 & 2x2 devices
51 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
52 * control it independently
58 #define EDCF_ACI_MASK 0x60
59 #define EDCF_ACI_SHIFT 5
60 #define EDCF_ECWMIN_MASK 0x0f
61 #define EDCF_ECWMAX_SHIFT 4
62 #define EDCF_AIFSN_MASK 0x0f
63 #define EDCF_AIFSN_MAX 15
64 #define EDCF_ECWMAX_MASK 0xf0
66 #define EDCF_AC_BE_TXOP_STA 0x0000
67 #define EDCF_AC_BK_TXOP_STA 0x0000
68 #define EDCF_AC_VO_ACI_STA 0x62
69 #define EDCF_AC_VO_ECW_STA 0x32
70 #define EDCF_AC_VI_ACI_STA 0x42
71 #define EDCF_AC_VI_ECW_STA 0x43
72 #define EDCF_AC_BK_ECW_STA 0xA4
73 #define EDCF_AC_VI_TXOP_STA 0x005e
74 #define EDCF_AC_VO_TXOP_STA 0x002f
75 #define EDCF_AC_BE_ACI_STA 0x03
76 #define EDCF_AC_BE_ECW_STA 0xA4
77 #define EDCF_AC_BK_ACI_STA 0x27
78 #define EDCF_AC_VO_TXOP_AP 0x002f
80 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
81 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
83 #define APHY_SYMBOL_TIME 4
84 #define APHY_PREAMBLE_TIME 16
85 #define APHY_SIGNAL_TIME 4
86 #define APHY_SIFS_TIME 16
87 #define APHY_SERVICE_NBITS 16
88 #define APHY_TAIL_NBITS 6
89 #define BPHY_SIFS_TIME 10
90 #define BPHY_PLCP_SHORT_TIME 96
92 #define PREN_PREAMBLE 24
93 #define PREN_MM_EXT 12
94 #define PREN_PREAMBLE_EXT 4
96 #define DOT11_MAC_HDR_LEN 24
97 #define DOT11_ACK_LEN 10
98 #define DOT11_BA_LEN 4
99 #define DOT11_OFDM_SIGNAL_EXTENSION 6
100 #define DOT11_MIN_FRAG_LEN 256
101 #define DOT11_RTS_LEN 16
102 #define DOT11_CTS_LEN 10
103 #define DOT11_BA_BITMAP_LEN 128
104 #define DOT11_MIN_BEACON_PERIOD 1
105 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
106 #define DOT11_MAXNUMFRAGS 16
107 #define DOT11_MAX_FRAG_LEN 2346
109 #define BPHY_PLCP_TIME 192
110 #define RIFS_11N_TIME 2
112 /* length of the BCN template area */
113 #define BCN_TMPL_LEN 512
115 /* brcms_bss_info flag bit values */
116 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
118 /* chip rx buffer offset */
119 #define BRCMS_HWRXOFF 38
121 /* rfdisable delay timer 500 ms, runs of ALP clock */
122 #define RFDISABLE_DEFAULT 10000000
124 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
126 /* precedences numbers for wlc queues. These are twice as may levels as
128 * Odd numbers are used for HI priority traffic at same precedence levels
129 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
132 #define _BRCMS_PREC_NONE 0 /* None = - */
133 #define _BRCMS_PREC_BK 2 /* BK - Background */
134 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
135 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
136 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
137 #define _BRCMS_PREC_VI 10 /* Vi - Video */
138 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
139 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
141 /* synthpu_dly times in us */
142 #define SYNTHPU_DLY_APHY_US 3700
143 #define SYNTHPU_DLY_BPHY_US 1050
144 #define SYNTHPU_DLY_NPHY_US 2048
145 #define SYNTHPU_DLY_LPPHY_US 300
147 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */
149 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
150 #define EDCF_SHORT_S 0
152 #define EDCF_LONG_S 8
153 #define EDCF_LFB_S 12
154 #define EDCF_SHORT_M BITFIELD_MASK(4)
155 #define EDCF_SFB_M BITFIELD_MASK(4)
156 #define EDCF_LONG_M BITFIELD_MASK(4)
157 #define EDCF_LFB_M BITFIELD_MASK(4)
159 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
160 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
161 #define RETRY_LONG_DEF 4 /* Default Long retry count */
162 #define RETRY_SHORT_FB 3 /* Short count for fb rate */
163 #define RETRY_LONG_FB 2 /* Long count for fb rate */
165 #define APHY_CWMIN 15
166 #define PHY_CWMAX 1023
168 #define EDCF_AIFSN_MIN 1
170 #define FRAGNUM_MASK 0xF
172 #define APHY_SLOT_TIME 9
173 #define BPHY_SLOT_TIME 20
175 #define WL_SPURAVOID_OFF 0
176 #define WL_SPURAVOID_ON1 1
177 #define WL_SPURAVOID_ON2 2
179 /* invalid core flags, use the saved coreflags */
180 #define BRCMS_USE_COREFLAGS 0xffffffff
182 /* values for PLCPHdr_override */
183 #define BRCMS_PLCP_AUTO -1
184 #define BRCMS_PLCP_SHORT 0
185 #define BRCMS_PLCP_LONG 1
187 /* values for g_protection_override and n_protection_override */
188 #define BRCMS_PROTECTION_AUTO -1
189 #define BRCMS_PROTECTION_OFF 0
190 #define BRCMS_PROTECTION_ON 1
191 #define BRCMS_PROTECTION_MMHDR_ONLY 2
192 #define BRCMS_PROTECTION_CTS_ONLY 3
194 /* values for g_protection_control and n_protection_control */
195 #define BRCMS_PROTECTION_CTL_OFF 0
196 #define BRCMS_PROTECTION_CTL_LOCAL 1
197 #define BRCMS_PROTECTION_CTL_OVERLAP 2
199 /* values for n_protection */
200 #define BRCMS_N_PROTECTION_OFF 0
201 #define BRCMS_N_PROTECTION_OPTIONAL 1
202 #define BRCMS_N_PROTECTION_20IN40 2
203 #define BRCMS_N_PROTECTION_MIXEDMODE 3
205 /* values for band specific 40MHz capabilities */
206 #define BRCMS_N_BW_20ALL 0
207 #define BRCMS_N_BW_40ALL 1
208 #define BRCMS_N_BW_20IN2G_40IN5G 2
210 /* bitflags for SGI support (sgi_rx iovar) */
211 #define BRCMS_N_SGI_20 0x01
212 #define BRCMS_N_SGI_40 0x02
214 /* defines used by the nrate iovar */
215 /* MSC in use,indicates b0-6 holds an mcs */
216 #define NRATE_MCS_INUSE 0x00000080
218 #define NRATE_RATE_MASK 0x0000007f
219 /* stf mode mask: siso, cdd, stbc, sdm */
220 #define NRATE_STF_MASK 0x0000ff00
222 #define NRATE_STF_SHIFT 8
223 /* bit indicate to override mcs only */
224 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
225 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
226 #define NRATE_SGI_SHIFT 23 /* sgi mode */
227 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
228 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
230 #define NRATE_STF_SISO 0 /* stf mode SISO */
231 #define NRATE_STF_CDD 1 /* stf mode CDD */
232 #define NRATE_STF_STBC 2 /* stf mode STBC */
233 #define NRATE_STF_SDM 3 /* stf mode SDM */
235 #define MAX_DMA_SEGS 4
237 /* Max # of entries in Tx FIFO based on 4kb page size */
239 /* Max # of entries in Rx FIFO based on 4kb page size */
242 /* try to keep this # rbufs posted to the chip */
243 #define NRXBUFPOST 32
245 /* data msg txq hiwat mark */
246 #define BRCMS_DATAHIWAT 50
248 /* max # frames to process in brcms_c_recv() */
250 /* max # tx status to process in wlc_txstatus() */
253 /* brcmu_format_flags() bit description structure */
254 struct brcms_c_bit_desc
{
260 * The following table lists the buffer memory allocated to xmt fifos in HW.
261 * the size is in units of 256bytes(one block), total size is HW dependent
262 * ucode has default fifo partition, sw can overwrite if necessary
264 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
265 * the twiki is updated before making changes.
268 /* Starting corerev for the fifo size table */
269 #define XMTFIFOTBL_STARTREV 20
277 struct edcf_acparam
{
283 const u8 prio2fifo
[NUMPRIO
] = {
284 TX_AC_BE_FIFO
, /* 0 BE AC_BE Best Effort */
285 TX_AC_BK_FIFO
, /* 1 BK AC_BK Background */
286 TX_AC_BK_FIFO
, /* 2 -- AC_BK Background */
287 TX_AC_BE_FIFO
, /* 3 EE AC_BE Best Effort */
288 TX_AC_VI_FIFO
, /* 4 CL AC_VI Video */
289 TX_AC_VI_FIFO
, /* 5 VI AC_VI Video */
290 TX_AC_VO_FIFO
, /* 6 VO AC_VO Voice */
291 TX_AC_VO_FIFO
/* 7 NC AC_VO Voice */
295 uint brcm_msg_level
=
302 /* TX FIFO number to WME/802.1E Access Category */
303 static const u8 wme_fifo2ac
[] = {
312 /* ieee80211 Access Category to TX FIFO number */
313 static const u8 wme_ac2fifo
[] = {
320 /* 802.1D Priority to precedence queue mapping */
321 const u8 wlc_prio2prec_map
[] = {
322 _BRCMS_PREC_BE
, /* 0 BE - Best-effort */
323 _BRCMS_PREC_BK
, /* 1 BK - Background */
324 _BRCMS_PREC_NONE
, /* 2 None = - */
325 _BRCMS_PREC_EE
, /* 3 EE - Excellent-effort */
326 _BRCMS_PREC_CL
, /* 4 CL - Controlled Load */
327 _BRCMS_PREC_VI
, /* 5 Vi - Video */
328 _BRCMS_PREC_VO
, /* 6 Vo - Voice */
329 _BRCMS_PREC_NC
, /* 7 NC - Network Control */
332 static const u16 xmtfifo_sz
[][NFIFO
] = {
333 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
334 {20, 192, 192, 21, 17, 5},
335 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
336 {9, 58, 22, 14, 14, 5},
337 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
338 {20, 192, 192, 21, 17, 5},
339 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
340 {20, 192, 192, 21, 17, 5},
341 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
342 {9, 58, 22, 14, 14, 5},
346 static const char * const fifo_names
[] = {
347 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
349 static const char fifo_names
[6][0];
353 /* pointer to most recently allocated wl/wlc */
354 static struct brcms_c_info
*wlc_info_dbg
= (struct brcms_c_info
*) (NULL
);
357 /* Find basic rate for a given rate */
358 static u8
brcms_basic_rate(struct brcms_c_info
*wlc
, u32 rspec
)
360 if (is_mcs_rate(rspec
))
361 return wlc
->band
->basic_rate
[mcs_table
[rspec
& RSPEC_RATE_MASK
]
363 return wlc
->band
->basic_rate
[rspec
& RSPEC_RATE_MASK
];
366 static u16
frametype(u32 rspec
, u8 mimoframe
)
368 if (is_mcs_rate(rspec
))
370 return is_cck_rate(rspec
) ? FT_CCK
: FT_OFDM
;
373 /* currently the best mechanism for determining SIFS is the band in use */
374 static u16
get_sifs(struct brcms_band
*band
)
376 return band
->bandtype
== BRCM_BAND_5G
? APHY_SIFS_TIME
:
381 * Detect Card removed.
382 * Even checking an sbconfig register read will not false trigger when the core
383 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
384 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
385 * reg with fixed 0/1 pattern (some platforms return all 0).
386 * If clocks are present, call the sb routine which will figure out if the
389 static bool brcms_deviceremoved(struct brcms_c_info
*wlc
)
394 return ai_deviceremoved(wlc
->hw
->sih
);
395 macctrl
= bcma_read32(wlc
->hw
->d11core
,
396 D11REGOFFS(maccontrol
));
397 return (macctrl
& (MCTL_PSM_JMP_0
| MCTL_IHR_EN
)) != MCTL_IHR_EN
;
400 /* sum the individual fifo tx pending packet counts */
401 static s16
brcms_txpktpendtot(struct brcms_c_info
*wlc
)
403 return wlc
->core
->txpktpend
[0] + wlc
->core
->txpktpend
[1] +
404 wlc
->core
->txpktpend
[2] + wlc
->core
->txpktpend
[3];
407 static bool brcms_is_mband_unlocked(struct brcms_c_info
*wlc
)
409 return wlc
->pub
->_nbands
> 1 && !wlc
->bandlocked
;
412 static int brcms_chspec_bw(u16 chanspec
)
414 if (CHSPEC_IS40(chanspec
))
416 if (CHSPEC_IS20(chanspec
))
422 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg
*cfg
)
427 kfree(cfg
->current_bss
);
431 static void brcms_c_detach_mfree(struct brcms_c_info
*wlc
)
436 brcms_c_bsscfg_mfree(wlc
->bsscfg
);
438 kfree(wlc
->modulecb
);
439 kfree(wlc
->default_bss
);
440 kfree(wlc
->protection
);
442 kfree(wlc
->bandstate
[0]);
443 kfree(wlc
->corestate
->macstat_snapshot
);
444 kfree(wlc
->corestate
);
445 kfree(wlc
->hw
->bandstate
[0]);
453 static struct brcms_bss_cfg
*brcms_c_bsscfg_malloc(uint unit
)
455 struct brcms_bss_cfg
*cfg
;
457 cfg
= kzalloc(sizeof(struct brcms_bss_cfg
), GFP_ATOMIC
);
461 cfg
->current_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
462 if (cfg
->current_bss
== NULL
)
468 brcms_c_bsscfg_mfree(cfg
);
472 static struct brcms_c_info
*
473 brcms_c_attach_malloc(uint unit
, uint
*err
, uint devid
)
475 struct brcms_c_info
*wlc
;
477 wlc
= kzalloc(sizeof(struct brcms_c_info
), GFP_ATOMIC
);
483 /* allocate struct brcms_c_pub state structure */
484 wlc
->pub
= kzalloc(sizeof(struct brcms_pub
), GFP_ATOMIC
);
485 if (wlc
->pub
== NULL
) {
491 /* allocate struct brcms_hardware state structure */
493 wlc
->hw
= kzalloc(sizeof(struct brcms_hardware
), GFP_ATOMIC
);
494 if (wlc
->hw
== NULL
) {
500 wlc
->hw
->bandstate
[0] =
501 kzalloc(sizeof(struct brcms_hw_band
) * MAXBANDS
, GFP_ATOMIC
);
502 if (wlc
->hw
->bandstate
[0] == NULL
) {
508 for (i
= 1; i
< MAXBANDS
; i
++)
509 wlc
->hw
->bandstate
[i
] = (struct brcms_hw_band
*)
510 ((unsigned long)wlc
->hw
->bandstate
[0] +
511 (sizeof(struct brcms_hw_band
) * i
));
515 kzalloc(sizeof(struct modulecb
) * BRCMS_MAXMODULES
, GFP_ATOMIC
);
516 if (wlc
->modulecb
== NULL
) {
521 wlc
->default_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
522 if (wlc
->default_bss
== NULL
) {
527 wlc
->bsscfg
= brcms_c_bsscfg_malloc(unit
);
528 if (wlc
->bsscfg
== NULL
) {
533 wlc
->protection
= kzalloc(sizeof(struct brcms_protection
),
535 if (wlc
->protection
== NULL
) {
540 wlc
->stf
= kzalloc(sizeof(struct brcms_stf
), GFP_ATOMIC
);
541 if (wlc
->stf
== NULL
) {
547 kzalloc(sizeof(struct brcms_band
)*MAXBANDS
, GFP_ATOMIC
);
548 if (wlc
->bandstate
[0] == NULL
) {
554 for (i
= 1; i
< MAXBANDS
; i
++)
555 wlc
->bandstate
[i
] = (struct brcms_band
*)
556 ((unsigned long)wlc
->bandstate
[0]
557 + (sizeof(struct brcms_band
)*i
));
560 wlc
->corestate
= kzalloc(sizeof(struct brcms_core
), GFP_ATOMIC
);
561 if (wlc
->corestate
== NULL
) {
566 wlc
->corestate
->macstat_snapshot
=
567 kzalloc(sizeof(struct macstat
), GFP_ATOMIC
);
568 if (wlc
->corestate
->macstat_snapshot
== NULL
) {
576 brcms_c_detach_mfree(wlc
);
581 * Update the slot timing for standard 11b/g (20us slots)
582 * or shortslot 11g (9us slots)
583 * The PSM needs to be suspended for this call.
585 static void brcms_b_update_slot_timing(struct brcms_hardware
*wlc_hw
,
588 struct bcma_device
*core
= wlc_hw
->d11core
;
591 /* 11g short slot: 11a timing */
592 bcma_write16(core
, D11REGOFFS(ifs_slot
), 0x0207);
593 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, APHY_SLOT_TIME
);
595 /* 11g long slot: 11b timing */
596 bcma_write16(core
, D11REGOFFS(ifs_slot
), 0x0212);
597 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, BPHY_SLOT_TIME
);
602 * calculate frame duration of a given rate and length, return
605 static uint
brcms_c_calc_frame_time(struct brcms_c_info
*wlc
, u32 ratespec
,
606 u8 preamble_type
, uint mac_len
)
608 uint nsyms
, dur
= 0, Ndps
, kNdps
;
609 uint rate
= rspec2rate(ratespec
);
612 wiphy_err(wlc
->wiphy
, "wl%d: WAR: using rate of 1 mbps\n",
617 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
618 wlc
->pub
->unit
, ratespec
, preamble_type
, mac_len
);
620 if (is_mcs_rate(ratespec
)) {
621 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
622 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
624 dur
= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
625 if (preamble_type
== BRCMS_MM_PREAMBLE
)
627 /* 1000Ndbps = kbps * 4 */
628 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
629 rspec_issgi(ratespec
)) * 4;
631 if (rspec_stc(ratespec
) == 0)
633 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
634 APHY_TAIL_NBITS
) * 1000, kNdps
);
636 /* STBC needs to have even number of symbols */
639 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
640 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
642 dur
+= APHY_SYMBOL_TIME
* nsyms
;
643 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
644 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
645 } else if (is_ofdm_rate(rate
)) {
646 dur
= APHY_PREAMBLE_TIME
;
647 dur
+= APHY_SIGNAL_TIME
;
648 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
650 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
652 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+ APHY_TAIL_NBITS
),
654 dur
+= APHY_SYMBOL_TIME
* nsyms
;
655 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
656 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
659 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
662 mac_len
= mac_len
* 8 * 2;
663 /* calc ceiling of bits/rate = microseconds of air time */
664 dur
= (mac_len
+ rate
- 1) / rate
;
665 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
666 dur
+= BPHY_PLCP_SHORT_TIME
;
668 dur
+= BPHY_PLCP_TIME
;
673 static void brcms_c_write_inits(struct brcms_hardware
*wlc_hw
,
674 const struct d11init
*inits
)
676 struct bcma_device
*core
= wlc_hw
->d11core
;
682 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
684 for (i
= 0; inits
[i
].addr
!= cpu_to_le16(0xffff); i
++) {
685 size
= le16_to_cpu(inits
[i
].size
);
686 offset
= le16_to_cpu(inits
[i
].addr
);
687 value
= le32_to_cpu(inits
[i
].value
);
689 bcma_write16(core
, offset
, value
);
691 bcma_write32(core
, offset
, value
);
697 static void brcms_c_write_mhf(struct brcms_hardware
*wlc_hw
, u16
*mhfs
)
701 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
705 for (idx
= 0; idx
< MHFMAX
; idx
++)
706 brcms_b_write_shm(wlc_hw
, addr
[idx
], mhfs
[idx
]);
709 static void brcms_c_ucode_bsinit(struct brcms_hardware
*wlc_hw
)
711 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
712 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
714 /* init microcode host flags */
715 brcms_c_write_mhf(wlc_hw
, wlc_hw
->band
->mhfs
);
717 /* do band-specific ucode IHR, SHM, and SCR inits */
718 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
719 if (BRCMS_ISNPHY(wlc_hw
->band
))
720 brcms_c_write_inits(wlc_hw
, ucode
->d11n0bsinitvals16
);
722 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
723 " %d\n", __func__
, wlc_hw
->unit
,
726 if (D11REV_IS(wlc_hw
->corerev
, 24)) {
727 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
728 brcms_c_write_inits(wlc_hw
,
729 ucode
->d11lcn0bsinitvals24
);
731 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in"
732 " core rev %d\n", __func__
,
733 wlc_hw
->unit
, wlc_hw
->corerev
);
735 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
736 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
741 static void brcms_b_core_ioctl(struct brcms_hardware
*wlc_hw
, u32 m
, u32 v
)
743 struct bcma_device
*core
= wlc_hw
->d11core
;
744 u32 ioctl
= bcma_aread32(core
, BCMA_IOCTL
) & ~m
;
746 bcma_awrite32(core
, BCMA_IOCTL
, ioctl
| v
);
749 static void brcms_b_core_phy_clk(struct brcms_hardware
*wlc_hw
, bool clk
)
751 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: clk %d\n", wlc_hw
->unit
, clk
);
753 wlc_hw
->phyclk
= clk
;
755 if (OFF
== clk
) { /* clear gmode bit, put phy into reset */
757 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
| SICF_GMODE
),
758 (SICF_PRST
| SICF_FGC
));
760 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
), SICF_PRST
);
763 } else { /* take phy out of reset */
765 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
), SICF_FGC
);
767 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, 0);
773 /* low-level band switch utility routine */
774 static void brcms_c_setxband(struct brcms_hardware
*wlc_hw
, uint bandunit
)
776 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
779 wlc_hw
->band
= wlc_hw
->bandstate
[bandunit
];
783 * until we eliminate need for wlc->band refs in low level code
785 wlc_hw
->wlc
->band
= wlc_hw
->wlc
->bandstate
[bandunit
];
787 /* set gmode core flag */
788 if (wlc_hw
->sbclk
&& !wlc_hw
->noreset
) {
794 brcms_b_core_ioctl(wlc_hw
, SICF_GMODE
, gmode
);
798 /* switch to new band but leave it inactive */
799 static u32
brcms_c_setband_inact(struct brcms_c_info
*wlc
, uint bandunit
)
801 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
805 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
806 macctrl
= bcma_read32(wlc_hw
->d11core
,
807 D11REGOFFS(maccontrol
));
808 WARN_ON((macctrl
& MCTL_EN_MAC
) != 0);
810 /* disable interrupts */
811 macintmask
= brcms_intrsoff(wlc
->wl
);
814 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
816 brcms_b_core_phy_clk(wlc_hw
, OFF
);
818 brcms_c_setxband(wlc_hw
, bandunit
);
823 /* process an individual struct tx_status */
825 brcms_c_dotxstatus(struct brcms_c_info
*wlc
, struct tx_status
*txs
)
830 struct scb
*scb
= NULL
;
832 int tx_rts
, tx_frame_count
, tx_rts_count
;
833 uint totlen
, supr_status
;
835 struct ieee80211_hdr
*h
;
837 struct ieee80211_tx_info
*tx_info
;
838 struct ieee80211_tx_rate
*txrate
;
841 /* discard intermediate indications for ucode with one legitimate case:
842 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
843 * but the subsequent tx of DATA failed. so it will start rts/cts
844 * from the beginning (resetting the rts transmission count)
846 if (!(txs
->status
& TX_STATUS_AMPDU
)
847 && (txs
->status
& TX_STATUS_INTERMEDIATE
)) {
848 wiphy_err(wlc
->wiphy
, "%s: INTERMEDIATE but not AMPDU\n",
853 queue
= txs
->frameid
& TXFID_QUEUE_MASK
;
854 if (queue
>= NFIFO
) {
859 p
= dma_getnexttxp(wlc
->hw
->di
[queue
], DMA_RANGE_TRANSMITTED
);
863 txh
= (struct d11txh
*) (p
->data
);
864 mcl
= le16_to_cpu(txh
->MacTxControlLow
);
867 if (brcm_msg_level
& LOG_ERROR_VAL
) {
868 wiphy_err(wlc
->wiphy
, "phyerr 0x%x, rate 0x%x\n",
869 txs
->phyerr
, txh
->MainRates
);
870 brcms_c_print_txdesc(txh
);
872 brcms_c_print_txstatus(txs
);
875 if (txs
->frameid
!= le16_to_cpu(txh
->TxFrameID
))
877 tx_info
= IEEE80211_SKB_CB(p
);
878 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
880 if (tx_info
->control
.sta
)
883 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
884 brcms_c_ampdu_dotxstatus(wlc
->ampdu
, scb
, p
, txs
);
888 supr_status
= txs
->status
& TX_STATUS_SUPR_MASK
;
889 if (supr_status
== TX_STATUS_SUPR_BADCH
)
891 "%s: Pkt tx suppressed, possibly channel %d\n",
892 __func__
, CHSPEC_CHANNEL(wlc
->default_bss
->chanspec
));
894 tx_rts
= le16_to_cpu(txh
->MacTxControlLow
) & TXC_SENDRTS
;
896 (txs
->status
& TX_STATUS_FRM_RTX_MASK
) >> TX_STATUS_FRM_RTX_SHIFT
;
898 (txs
->status
& TX_STATUS_RTS_RTX_MASK
) >> TX_STATUS_RTS_RTX_SHIFT
;
900 lastframe
= !ieee80211_has_morefrags(h
->frame_control
);
903 wiphy_err(wlc
->wiphy
, "Not last frame!\n");
906 * Set information to be consumed by Minstrel ht.
908 * The "fallback limit" is the number of tx attempts a given
909 * MPDU is sent at the "primary" rate. Tx attempts beyond that
910 * limit are sent at the "secondary" rate.
911 * A 'short frame' does not exceed RTS treshold.
913 u16 sfbl
, /* Short Frame Rate Fallback Limit */
914 lfbl
, /* Long Frame Rate Fallback Limit */
917 if (queue
< IEEE80211_NUM_ACS
) {
918 sfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
920 lfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
927 txrate
= tx_info
->status
.rates
;
928 if (txrate
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
)
933 ieee80211_tx_info_clear_status(tx_info
);
935 if ((tx_frame_count
> fbl
) && (txrate
[1].idx
>= 0)) {
937 * rate selection requested a fallback rate
940 txrate
[0].count
= fbl
;
941 txrate
[1].count
= tx_frame_count
- fbl
;
944 * rate selection did not request fallback rate, or
947 txrate
[0].count
= tx_frame_count
;
949 * rc80211_minstrel.c:minstrel_tx_status() expects
950 * unused rates to be marked with idx = -1
956 /* clear the rest of the rates */
957 for (i
= 2; i
< IEEE80211_TX_MAX_RATES
; i
++) {
962 if (txs
->status
& TX_STATUS_ACK_RCV
)
963 tx_info
->flags
|= IEEE80211_TX_STAT_ACK
;
969 brcms_c_txfifo_complete(wlc
, queue
, 1);
972 /* remove PLCP & Broadcom tx descriptor header */
973 skb_pull(p
, D11_PHY_HDR_LEN
);
974 skb_pull(p
, D11_TXH_LEN
);
975 ieee80211_tx_status_irqsafe(wlc
->pub
->ieee_hw
, p
);
977 wiphy_err(wlc
->wiphy
, "%s: Not last frame => not calling "
978 "tx_status\n", __func__
);
985 brcmu_pkt_buf_free_skb(p
);
991 /* process tx completion events in BMAC
992 * Return true if more tx status need to be processed. false otherwise.
995 brcms_b_txstatus(struct brcms_hardware
*wlc_hw
, bool bound
, bool *fatal
)
997 bool morepending
= false;
998 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
999 struct bcma_device
*core
;
1000 struct tx_status txstatus
, *txs
;
1004 * Param 'max_tx_num' indicates max. # tx status to process before
1007 uint max_tx_num
= bound
? TXSBND
: -1;
1009 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1012 core
= wlc_hw
->d11core
;
1014 s1
= bcma_read32(core
, D11REGOFFS(frmtxstatus
));
1018 if (s1
== 0xffffffff) {
1019 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n",
1020 wlc_hw
->unit
, __func__
);
1023 s2
= bcma_read32(core
, D11REGOFFS(frmtxstatus2
));
1025 txs
->status
= s1
& TXS_STATUS_MASK
;
1026 txs
->frameid
= (s1
& TXS_FID_MASK
) >> TXS_FID_SHIFT
;
1027 txs
->sequence
= s2
& TXS_SEQ_MASK
;
1028 txs
->phyerr
= (s2
& TXS_PTX_MASK
) >> TXS_PTX_SHIFT
;
1029 txs
->lasttxtime
= 0;
1031 *fatal
= brcms_c_dotxstatus(wlc_hw
->wlc
, txs
);
1033 /* !give others some time to run! */
1034 if (++n
>= max_tx_num
)
1036 s1
= bcma_read32(core
, D11REGOFFS(frmtxstatus
));
1042 if (n
>= max_tx_num
)
1045 if (!pktq_empty(&wlc
->pkt_queue
->q
))
1046 brcms_c_send_q(wlc
);
1051 static void brcms_c_tbtt(struct brcms_c_info
*wlc
)
1053 if (!wlc
->bsscfg
->BSS
)
1055 * DirFrmQ is now valid...defer setting until end
1058 wlc
->qvalid
|= MCMD_DIRFRMQVAL
;
1061 /* set initial host flags value */
1063 brcms_c_mhfdef(struct brcms_c_info
*wlc
, u16
*mhfs
, u16 mhf2_init
)
1065 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1067 memset(mhfs
, 0, MHFMAX
* sizeof(u16
));
1069 mhfs
[MHF2
] |= mhf2_init
;
1071 /* prohibit use of slowclock on multifunction boards */
1072 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
1073 mhfs
[MHF1
] |= MHF1_FORCEFASTCLK
;
1075 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_LT(wlc_hw
->band
->phyrev
, 2)) {
1076 mhfs
[MHF2
] |= MHF2_NPHY40MHZ_WAR
;
1077 mhfs
[MHF1
] |= MHF1_IQSWAP_WAR
;
1082 dmareg(uint direction
, uint fifonum
)
1084 if (direction
== DMA_TX
)
1085 return offsetof(struct d11regs
, fifo64regs
[fifonum
].dmaxmt
);
1086 return offsetof(struct d11regs
, fifo64regs
[fifonum
].dmarcv
);
1089 static bool brcms_b_attach_dmapio(struct brcms_c_info
*wlc
, uint j
, bool wme
)
1094 * ucode host flag 2 needed for pio mode, independent of band and fifo
1097 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1098 uint unit
= wlc_hw
->unit
;
1099 struct wiphy
*wiphy
= wlc
->wiphy
;
1101 /* name and offsets for dma_attach */
1102 snprintf(name
, sizeof(name
), "wl%d", unit
);
1104 if (wlc_hw
->di
[0] == NULL
) { /* Init FIFOs */
1105 int dma_attach_err
= 0;
1109 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1110 * RX: RX_FIFO (RX data packets)
1112 wlc_hw
->di
[0] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1113 (wme
? dmareg(DMA_TX
, 0) : 0),
1115 (wme
? NTXD
: 0), NRXD
,
1116 RXBUFSZ
, -1, NRXBUFPOST
,
1117 BRCMS_HWRXOFF
, &brcm_msg_level
);
1118 dma_attach_err
|= (NULL
== wlc_hw
->di
[0]);
1122 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1123 * (legacy) TX_DATA_FIFO (TX data packets)
1126 wlc_hw
->di
[1] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1127 dmareg(DMA_TX
, 1), 0,
1128 NTXD
, 0, 0, -1, 0, 0,
1130 dma_attach_err
|= (NULL
== wlc_hw
->di
[1]);
1134 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1137 wlc_hw
->di
[2] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1138 dmareg(DMA_TX
, 2), 0,
1139 NTXD
, 0, 0, -1, 0, 0,
1141 dma_attach_err
|= (NULL
== wlc_hw
->di
[2]);
1144 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1145 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1147 wlc_hw
->di
[3] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1150 0, 0, &brcm_msg_level
);
1151 dma_attach_err
|= (NULL
== wlc_hw
->di
[3]);
1152 /* Cleaner to leave this as if with AP defined */
1154 if (dma_attach_err
) {
1155 wiphy_err(wiphy
, "wl%d: wlc_attach: dma_attach failed"
1160 /* get pointer to dma engine tx flow control variable */
1161 for (i
= 0; i
< NFIFO
; i
++)
1163 wlc_hw
->txavail
[i
] =
1164 (uint
*) dma_getvar(wlc_hw
->di
[i
],
1168 /* initial ucode host flags */
1169 brcms_c_mhfdef(wlc
, wlc_hw
->band
->mhfs
, pio_mhf2
);
1174 static void brcms_b_detach_dmapio(struct brcms_hardware
*wlc_hw
)
1178 for (j
= 0; j
< NFIFO
; j
++) {
1179 if (wlc_hw
->di
[j
]) {
1180 dma_detach(wlc_hw
->di
[j
]);
1181 wlc_hw
->di
[j
] = NULL
;
1187 * Initialize brcms_c_info default values ...
1188 * may get overrides later in this function
1189 * BMAC_NOTES, move low out and resolve the dangling ones
1191 static void brcms_b_info_init(struct brcms_hardware
*wlc_hw
)
1193 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1195 /* set default sw macintmask value */
1196 wlc
->defmacintmask
= DEF_MACINTMASK
;
1198 /* various 802.11g modes */
1199 wlc_hw
->shortslot
= false;
1201 wlc_hw
->SFBL
= RETRY_SHORT_FB
;
1202 wlc_hw
->LFBL
= RETRY_LONG_FB
;
1204 /* default mac retry limits */
1205 wlc_hw
->SRL
= RETRY_SHORT_DEF
;
1206 wlc_hw
->LRL
= RETRY_LONG_DEF
;
1207 wlc_hw
->chanspec
= ch20mhz_chspec(1);
1210 static void brcms_b_wait_for_wake(struct brcms_hardware
*wlc_hw
)
1212 /* delay before first read of ucode state */
1215 /* wait until ucode is no longer asleep */
1216 SPINWAIT((brcms_b_read_shm(wlc_hw
, M_UCODE_DBGST
) ==
1217 DBGST_ASLEEP
), wlc_hw
->wlc
->fastpwrup_dly
);
1220 /* control chip clock to save power, enable dynamic clock or force fast clock */
1221 static void brcms_b_clkctl_clk(struct brcms_hardware
*wlc_hw
, uint mode
)
1223 if (ai_get_cccaps(wlc_hw
->sih
) & CC_CAP_PMU
) {
1224 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1225 * on backplane, but mac core will still run on ALP(not HT) when
1226 * it enters powersave mode, which means the FCA bit may not be
1227 * set. Should wakeup mac if driver wants it to run on HT.
1231 if (mode
== CLK_FAST
) {
1232 bcma_set32(wlc_hw
->d11core
,
1233 D11REGOFFS(clk_ctl_st
),
1239 ((bcma_read32(wlc_hw
->d11core
,
1240 D11REGOFFS(clk_ctl_st
)) &
1242 PMU_MAX_TRANSITION_DLY
);
1243 WARN_ON(!(bcma_read32(wlc_hw
->d11core
,
1244 D11REGOFFS(clk_ctl_st
)) &
1247 if ((ai_get_pmurev(wlc_hw
->sih
) == 0) &&
1248 (bcma_read32(wlc_hw
->d11core
,
1249 D11REGOFFS(clk_ctl_st
)) &
1250 (CCS_FORCEHT
| CCS_HTAREQ
)))
1252 ((bcma_read32(wlc_hw
->d11core
,
1253 offsetof(struct d11regs
,
1256 PMU_MAX_TRANSITION_DLY
);
1257 bcma_mask32(wlc_hw
->d11core
,
1258 D11REGOFFS(clk_ctl_st
),
1262 wlc_hw
->forcefastclk
= (mode
== CLK_FAST
);
1265 /* old chips w/o PMU, force HT through cc,
1266 * then use FCA to verify mac is running fast clock
1269 wlc_hw
->forcefastclk
= ai_clkctl_cc(wlc_hw
->sih
, mode
);
1271 /* check fast clock is available (if core is not in reset) */
1272 if (wlc_hw
->forcefastclk
&& wlc_hw
->clk
)
1273 WARN_ON(!(bcma_aread32(wlc_hw
->d11core
, BCMA_IOST
) &
1277 * keep the ucode wake bit on if forcefastclk is on since we
1278 * do not want ucode to put us back to slow clock when it dozes
1279 * for PM mode. Code below matches the wake override bit with
1280 * current forcefastclk state. Only setting bit in wake_override
1281 * instead of waking ucode immediately since old code had this
1282 * behavior. Older code set wlc->forcefastclk but only had the
1283 * wake happen if the wakup_ucode work (protected by an up
1284 * check) was executed just below.
1286 if (wlc_hw
->forcefastclk
)
1287 mboolset(wlc_hw
->wake_override
,
1288 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1290 mboolclr(wlc_hw
->wake_override
,
1291 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1295 /* set or clear ucode host flag bits
1296 * it has an optimization for no-change write
1297 * it only writes through shared memory when the core has clock;
1298 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1301 * bands values are: BRCM_BAND_AUTO <--- Current band only
1302 * BRCM_BAND_5G <--- 5G band only
1303 * BRCM_BAND_2G <--- 2G band only
1304 * BRCM_BAND_ALL <--- All bands
1307 brcms_b_mhf(struct brcms_hardware
*wlc_hw
, u8 idx
, u16 mask
, u16 val
,
1311 u16 addr
[MHFMAX
] = {
1312 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
1315 struct brcms_hw_band
*band
;
1317 if ((val
& ~mask
) || idx
>= MHFMAX
)
1318 return; /* error condition */
1321 /* Current band only or all bands,
1322 * then set the band to current band
1324 case BRCM_BAND_AUTO
:
1326 band
= wlc_hw
->band
;
1329 band
= wlc_hw
->bandstate
[BAND_5G_INDEX
];
1332 band
= wlc_hw
->bandstate
[BAND_2G_INDEX
];
1335 band
= NULL
; /* error condition */
1339 save
= band
->mhfs
[idx
];
1340 band
->mhfs
[idx
] = (band
->mhfs
[idx
] & ~mask
) | val
;
1342 /* optimization: only write through if changed, and
1343 * changed band is the current band
1345 if (wlc_hw
->clk
&& (band
->mhfs
[idx
] != save
)
1346 && (band
== wlc_hw
->band
))
1347 brcms_b_write_shm(wlc_hw
, addr
[idx
],
1348 (u16
) band
->mhfs
[idx
]);
1351 if (bands
== BRCM_BAND_ALL
) {
1352 wlc_hw
->bandstate
[0]->mhfs
[idx
] =
1353 (wlc_hw
->bandstate
[0]->mhfs
[idx
] & ~mask
) | val
;
1354 wlc_hw
->bandstate
[1]->mhfs
[idx
] =
1355 (wlc_hw
->bandstate
[1]->mhfs
[idx
] & ~mask
) | val
;
1359 /* set the maccontrol register to desired reset state and
1360 * initialize the sw cache of the register
1362 static void brcms_c_mctrl_reset(struct brcms_hardware
*wlc_hw
)
1364 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1365 wlc_hw
->maccontrol
= 0;
1366 wlc_hw
->suspended_fifos
= 0;
1367 wlc_hw
->wake_override
= 0;
1368 wlc_hw
->mute_override
= 0;
1369 brcms_b_mctrl(wlc_hw
, ~0, MCTL_IHR_EN
| MCTL_WAKE
);
1373 * write the software state of maccontrol and
1374 * overrides to the maccontrol register
1376 static void brcms_c_mctrl_write(struct brcms_hardware
*wlc_hw
)
1378 u32 maccontrol
= wlc_hw
->maccontrol
;
1380 /* OR in the wake bit if overridden */
1381 if (wlc_hw
->wake_override
)
1382 maccontrol
|= MCTL_WAKE
;
1384 /* set AP and INFRA bits for mute if needed */
1385 if (wlc_hw
->mute_override
) {
1386 maccontrol
&= ~(MCTL_AP
);
1387 maccontrol
|= MCTL_INFRA
;
1390 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(maccontrol
),
1394 /* set or clear maccontrol bits */
1395 void brcms_b_mctrl(struct brcms_hardware
*wlc_hw
, u32 mask
, u32 val
)
1401 return; /* error condition */
1402 maccontrol
= wlc_hw
->maccontrol
;
1403 new_maccontrol
= (maccontrol
& ~mask
) | val
;
1405 /* if the new maccontrol value is the same as the old, nothing to do */
1406 if (new_maccontrol
== maccontrol
)
1409 /* something changed, cache the new value */
1410 wlc_hw
->maccontrol
= new_maccontrol
;
1412 /* write the new values with overrides applied */
1413 brcms_c_mctrl_write(wlc_hw
);
1416 void brcms_c_ucode_wake_override_set(struct brcms_hardware
*wlc_hw
,
1419 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
)) {
1420 mboolset(wlc_hw
->wake_override
, override_bit
);
1424 mboolset(wlc_hw
->wake_override
, override_bit
);
1426 brcms_c_mctrl_write(wlc_hw
);
1427 brcms_b_wait_for_wake(wlc_hw
);
1430 void brcms_c_ucode_wake_override_clear(struct brcms_hardware
*wlc_hw
,
1433 mboolclr(wlc_hw
->wake_override
, override_bit
);
1435 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
))
1438 brcms_c_mctrl_write(wlc_hw
);
1441 /* When driver needs ucode to stop beaconing, it has to make sure that
1442 * MCTL_AP is clear and MCTL_INFRA is set
1443 * Mode MCTL_AP MCTL_INFRA
1445 * STA 0 1 <--- This will ensure no beacons
1448 static void brcms_c_ucode_mute_override_set(struct brcms_hardware
*wlc_hw
)
1450 wlc_hw
->mute_override
= 1;
1452 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1453 * override, then there is no change to write
1455 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1458 brcms_c_mctrl_write(wlc_hw
);
1461 /* Clear the override on AP and INFRA bits */
1462 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware
*wlc_hw
)
1464 if (wlc_hw
->mute_override
== 0)
1467 wlc_hw
->mute_override
= 0;
1469 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1470 * override, then there is no change to write
1472 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1475 brcms_c_mctrl_write(wlc_hw
);
1479 * Write a MAC address to the given match reg offset in the RXE match engine.
1482 brcms_b_set_addrmatch(struct brcms_hardware
*wlc_hw
, int match_reg_offset
,
1485 struct bcma_device
*core
= wlc_hw
->d11core
;
1490 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: brcms_b_set_addrmatch\n",
1493 mac_l
= addr
[0] | (addr
[1] << 8);
1494 mac_m
= addr
[2] | (addr
[3] << 8);
1495 mac_h
= addr
[4] | (addr
[5] << 8);
1497 /* enter the MAC addr into the RXE match registers */
1498 bcma_write16(core
, D11REGOFFS(rcm_ctl
),
1499 RCM_INC_DATA
| match_reg_offset
);
1500 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_l
);
1501 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_m
);
1502 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_h
);
1506 brcms_b_write_template_ram(struct brcms_hardware
*wlc_hw
, int offset
, int len
,
1509 struct bcma_device
*core
= wlc_hw
->d11core
;
1514 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1516 bcma_write32(core
, D11REGOFFS(tplatewrptr
), offset
);
1518 /* if MCTL_BIGEND bit set in mac control register,
1519 * the chip swaps data in fifo, as well as data in
1522 be_bit
= (bcma_read32(core
, D11REGOFFS(maccontrol
)) & MCTL_BIGEND
) != 0;
1525 memcpy(&word
, buf
, sizeof(u32
));
1528 word_be
= cpu_to_be32(word
);
1529 word
= *(u32
*)&word_be
;
1531 word_le
= cpu_to_le32(word
);
1532 word
= *(u32
*)&word_le
;
1535 bcma_write32(core
, D11REGOFFS(tplatewrdata
), word
);
1537 buf
= (u8
*) buf
+ sizeof(u32
);
1542 static void brcms_b_set_cwmin(struct brcms_hardware
*wlc_hw
, u16 newmin
)
1544 wlc_hw
->band
->CWmin
= newmin
;
1546 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
1547 OBJADDR_SCR_SEL
| S_DOT11_CWMIN
);
1548 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
1549 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), newmin
);
1552 static void brcms_b_set_cwmax(struct brcms_hardware
*wlc_hw
, u16 newmax
)
1554 wlc_hw
->band
->CWmax
= newmax
;
1556 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
1557 OBJADDR_SCR_SEL
| S_DOT11_CWMAX
);
1558 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
1559 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), newmax
);
1562 void brcms_b_bw_set(struct brcms_hardware
*wlc_hw
, u16 bw
)
1566 /* request FAST clock if not on */
1567 fastclk
= wlc_hw
->forcefastclk
;
1569 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
1571 wlc_phy_bw_state_set(wlc_hw
->band
->pi
, bw
);
1573 brcms_b_phy_reset(wlc_hw
);
1574 wlc_phy_init(wlc_hw
->band
->pi
, wlc_phy_chanspec_get(wlc_hw
->band
->pi
));
1576 /* restore the clk */
1578 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
1581 static void brcms_b_upd_synthpu(struct brcms_hardware
*wlc_hw
)
1584 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1585 /* update SYNTHPU_DLY */
1587 if (BRCMS_ISLCNPHY(wlc
->band
))
1588 v
= SYNTHPU_DLY_LPPHY_US
;
1589 else if (BRCMS_ISNPHY(wlc
->band
) && (NREV_GE(wlc
->band
->phyrev
, 3)))
1590 v
= SYNTHPU_DLY_NPHY_US
;
1592 v
= SYNTHPU_DLY_BPHY_US
;
1594 brcms_b_write_shm(wlc_hw
, M_SYNTHPU_DLY
, v
);
1597 static void brcms_c_ucode_txant_set(struct brcms_hardware
*wlc_hw
)
1600 u16 phytxant
= wlc_hw
->bmac_phytxant
;
1601 u16 mask
= PHY_TXC_ANT_MASK
;
1603 /* set the Probe Response frame phy control word */
1604 phyctl
= brcms_b_read_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
);
1605 phyctl
= (phyctl
& ~mask
) | phytxant
;
1606 brcms_b_write_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
, phyctl
);
1608 /* set the Response (ACK/CTS) frame phy control word */
1609 phyctl
= brcms_b_read_shm(wlc_hw
, M_RSP_PCTLWD
);
1610 phyctl
= (phyctl
& ~mask
) | phytxant
;
1611 brcms_b_write_shm(wlc_hw
, M_RSP_PCTLWD
, phyctl
);
1614 static u16
brcms_b_ofdm_ratetable_offset(struct brcms_hardware
*wlc_hw
,
1619 struct plcp_signal_rate_lookup
{
1623 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1624 const struct plcp_signal_rate_lookup rate_lookup
[] = {
1625 {BRCM_RATE_6M
, 0xB},
1626 {BRCM_RATE_9M
, 0xF},
1627 {BRCM_RATE_12M
, 0xA},
1628 {BRCM_RATE_18M
, 0xE},
1629 {BRCM_RATE_24M
, 0x9},
1630 {BRCM_RATE_36M
, 0xD},
1631 {BRCM_RATE_48M
, 0x8},
1632 {BRCM_RATE_54M
, 0xC}
1635 for (i
= 0; i
< ARRAY_SIZE(rate_lookup
); i
++) {
1636 if (rate
== rate_lookup
[i
].rate
) {
1637 plcp_rate
= rate_lookup
[i
].signal_rate
;
1642 /* Find the SHM pointer to the rate table entry by looking in the
1645 return 2 * brcms_b_read_shm(wlc_hw
, M_RT_DIRMAP_A
+ (plcp_rate
* 2));
1648 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware
*wlc_hw
)
1652 BRCM_RATE_6M
, BRCM_RATE_9M
, BRCM_RATE_12M
, BRCM_RATE_18M
,
1653 BRCM_RATE_24M
, BRCM_RATE_36M
, BRCM_RATE_48M
, BRCM_RATE_54M
1659 if (!BRCMS_PHY_11N_CAP(wlc_hw
->band
))
1662 /* walk the phy rate table and update the entries */
1663 for (i
= 0; i
< ARRAY_SIZE(rates
); i
++) {
1666 entry_ptr
= brcms_b_ofdm_ratetable_offset(wlc_hw
, rate
);
1668 /* read the SHM Rate Table entry OFDM PCTL1 values */
1670 brcms_b_read_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
);
1672 /* modify the value */
1673 pctl1
&= ~PHY_TXC1_MODE_MASK
;
1674 pctl1
|= (wlc_hw
->hw_stf_ss_opmode
<< PHY_TXC1_MODE_SHIFT
);
1676 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1677 brcms_b_write_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
,
1682 /* band-specific init */
1683 static void brcms_b_bsinit(struct brcms_c_info
*wlc
, u16 chanspec
)
1685 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1687 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
1688 wlc_hw
->band
->bandunit
);
1690 brcms_c_ucode_bsinit(wlc_hw
);
1692 wlc_phy_init(wlc_hw
->band
->pi
, chanspec
);
1694 brcms_c_ucode_txant_set(wlc_hw
);
1697 * cwmin is band-specific, update hardware
1698 * with value for current band
1700 brcms_b_set_cwmin(wlc_hw
, wlc_hw
->band
->CWmin
);
1701 brcms_b_set_cwmax(wlc_hw
, wlc_hw
->band
->CWmax
);
1703 brcms_b_update_slot_timing(wlc_hw
,
1704 wlc_hw
->band
->bandtype
== BRCM_BAND_5G
?
1705 true : wlc_hw
->shortslot
);
1707 /* write phytype and phyvers */
1708 brcms_b_write_shm(wlc_hw
, M_PHYTYPE
, (u16
) wlc_hw
->band
->phytype
);
1709 brcms_b_write_shm(wlc_hw
, M_PHYVER
, (u16
) wlc_hw
->band
->phyrev
);
1712 * initialize the txphyctl1 rate table since
1713 * shmem is shared between bands
1715 brcms_upd_ofdm_pctl1_table(wlc_hw
);
1717 brcms_b_upd_synthpu(wlc_hw
);
1720 /* Perform a soft reset of the PHY PLL */
1721 void brcms_b_core_phypll_reset(struct brcms_hardware
*wlc_hw
)
1723 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1725 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_addr
),
1728 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1731 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1734 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1739 /* light way to turn on phy clock without reset for NPHY only
1740 * refer to brcms_b_core_phy_clk for full version
1742 void brcms_b_phyclk_fgc(struct brcms_hardware
*wlc_hw
, bool clk
)
1744 /* support(necessary for NPHY and HYPHY) only */
1745 if (!BRCMS_ISNPHY(wlc_hw
->band
))
1749 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, SICF_FGC
);
1751 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, 0);
1755 void brcms_b_macphyclk_set(struct brcms_hardware
*wlc_hw
, bool clk
)
1758 brcms_b_core_ioctl(wlc_hw
, SICF_MPCLKE
, SICF_MPCLKE
);
1760 brcms_b_core_ioctl(wlc_hw
, SICF_MPCLKE
, 0);
1763 void brcms_b_phy_reset(struct brcms_hardware
*wlc_hw
)
1765 struct brcms_phy_pub
*pih
= wlc_hw
->band
->pi
;
1767 bool phy_in_reset
= false;
1769 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1774 phy_bw_clkbits
= wlc_phy_clk_bwbits(wlc_hw
->band
->pi
);
1776 /* Specific reset sequence required for NPHY rev 3 and 4 */
1777 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_GE(wlc_hw
->band
->phyrev
, 3) &&
1778 NREV_LE(wlc_hw
->band
->phyrev
, 4)) {
1779 /* Set the PHY bandwidth */
1780 brcms_b_core_ioctl(wlc_hw
, SICF_BWMASK
, phy_bw_clkbits
);
1784 /* Perform a soft reset of the PHY PLL */
1785 brcms_b_core_phypll_reset(wlc_hw
);
1788 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_PCLKE
),
1789 (SICF_PRST
| SICF_PCLKE
));
1790 phy_in_reset
= true;
1792 brcms_b_core_ioctl(wlc_hw
,
1793 (SICF_PRST
| SICF_PCLKE
| SICF_BWMASK
),
1794 (SICF_PRST
| SICF_PCLKE
| phy_bw_clkbits
));
1798 brcms_b_core_phy_clk(wlc_hw
, ON
);
1801 wlc_phy_anacore(pih
, ON
);
1804 /* switch to and initialize new band */
1805 static void brcms_b_setband(struct brcms_hardware
*wlc_hw
, uint bandunit
,
1807 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1810 /* Enable the d11 core before accessing it */
1811 if (!bcma_core_is_enabled(wlc_hw
->d11core
)) {
1812 bcma_core_enable(wlc_hw
->d11core
, 0);
1813 brcms_c_mctrl_reset(wlc_hw
);
1816 macintmask
= brcms_c_setband_inact(wlc
, bandunit
);
1821 brcms_b_core_phy_clk(wlc_hw
, ON
);
1823 /* band-specific initializations */
1824 brcms_b_bsinit(wlc
, chanspec
);
1827 * If there are any pending software interrupt bits,
1828 * then replace these with a harmless nonzero value
1829 * so brcms_c_dpc() will re-enable interrupts when done.
1831 if (wlc
->macintstatus
)
1832 wlc
->macintstatus
= MI_DMAINT
;
1834 /* restore macintmask */
1835 brcms_intrsrestore(wlc
->wl
, macintmask
);
1837 /* ucode should still be suspended.. */
1838 WARN_ON((bcma_read32(wlc_hw
->d11core
, D11REGOFFS(maccontrol
)) &
1842 static bool brcms_c_isgoodchip(struct brcms_hardware
*wlc_hw
)
1845 /* reject unsupported corerev */
1846 if (!CONF_HAS(D11CONF
, wlc_hw
->corerev
)) {
1847 wiphy_err(wlc_hw
->wlc
->wiphy
, "unsupported core rev %d\n",
1855 /* Validate some board info parameters */
1856 static bool brcms_c_validboardtype(struct brcms_hardware
*wlc_hw
)
1858 uint boardrev
= wlc_hw
->boardrev
;
1860 /* 4 bits each for board type, major, minor, and tiny version */
1861 uint brt
= (boardrev
& 0xf000) >> 12;
1862 uint b0
= (boardrev
& 0xf00) >> 8;
1863 uint b1
= (boardrev
& 0xf0) >> 4;
1864 uint b2
= boardrev
& 0xf;
1866 /* voards from other vendors are always considered valid */
1867 if (ai_get_boardvendor(wlc_hw
->sih
) != PCI_VENDOR_ID_BROADCOM
)
1870 /* do some boardrev sanity checks when boardvendor is Broadcom */
1874 if (boardrev
<= 0xff)
1877 if ((brt
> 2) || (brt
== 0) || (b0
> 9) || (b0
== 0) || (b1
> 9)
1884 static char *brcms_c_get_macaddr(struct brcms_hardware
*wlc_hw
)
1886 enum brcms_srom_id var_id
= BRCMS_SROM_MACADDR
;
1889 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1890 macaddr
= getvar(wlc_hw
->sih
, var_id
);
1891 if (macaddr
!= NULL
)
1894 if (wlc_hw
->_nbands
> 1)
1895 var_id
= BRCMS_SROM_ET1MACADDR
;
1897 var_id
= BRCMS_SROM_IL0MACADDR
;
1899 macaddr
= getvar(wlc_hw
->sih
, var_id
);
1900 if (macaddr
== NULL
)
1901 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: wlc_get_macaddr: macaddr "
1902 "getvar(%d) not found\n", wlc_hw
->unit
, var_id
);
1907 /* power both the pll and external oscillator on/off */
1908 static void brcms_b_xtal(struct brcms_hardware
*wlc_hw
, bool want
)
1910 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: want %d\n", wlc_hw
->unit
, want
);
1913 * dont power down if plldown is false or
1914 * we must poll hw radio disable
1916 if (!want
&& wlc_hw
->pllreq
)
1920 ai_clkctl_xtal(wlc_hw
->sih
, XTAL
| PLL
, want
);
1922 wlc_hw
->sbclk
= want
;
1923 if (!wlc_hw
->sbclk
) {
1924 wlc_hw
->clk
= false;
1925 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
1926 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
1931 * Return true if radio is disabled, otherwise false.
1932 * hw radio disable signal is an external pin, users activate it asynchronously
1933 * this function could be called when driver is down and w/o clock
1934 * it operates on different registers depending on corerev and boardflag.
1936 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware
*wlc_hw
)
1941 xtal
= wlc_hw
->sbclk
;
1943 brcms_b_xtal(wlc_hw
, ON
);
1945 /* may need to take core out of reset first */
1949 * mac no longer enables phyclk automatically when driver
1950 * accesses phyreg throughput mac. This can be skipped since
1951 * only mac reg is accessed below
1953 flags
|= SICF_PCLKE
;
1956 * TODO: test suspend/resume
1958 * AI chip doesn't restore bar0win2 on
1959 * hibernation/resume, need sw fixup
1962 bcma_core_enable(wlc_hw
->d11core
, flags
);
1963 brcms_c_mctrl_reset(wlc_hw
);
1966 v
= ((bcma_read32(wlc_hw
->d11core
,
1967 D11REGOFFS(phydebug
)) & PDBG_RFD
) != 0);
1969 /* put core back into reset */
1971 bcma_core_disable(wlc_hw
->d11core
, 0);
1974 brcms_b_xtal(wlc_hw
, OFF
);
1979 static bool wlc_dma_rxreset(struct brcms_hardware
*wlc_hw
, uint fifo
)
1981 struct dma_pub
*di
= wlc_hw
->di
[fifo
];
1982 return dma_rxreset(di
);
1986 * ensure fask clock during reset
1988 * reset d11(out of reset)
1989 * reset phy(out of reset)
1990 * clear software macintstatus for fresh new start
1991 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1993 void brcms_b_corereset(struct brcms_hardware
*wlc_hw
, u32 flags
)
1998 if (flags
== BRCMS_USE_COREFLAGS
)
1999 flags
= (wlc_hw
->band
->pi
? wlc_hw
->band
->core_flags
: 0);
2001 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2003 /* request FAST clock if not on */
2004 fastclk
= wlc_hw
->forcefastclk
;
2006 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
2008 /* reset the dma engines except first time thru */
2009 if (bcma_core_is_enabled(wlc_hw
->d11core
)) {
2010 for (i
= 0; i
< NFIFO
; i
++)
2011 if ((wlc_hw
->di
[i
]) && (!dma_txreset(wlc_hw
->di
[i
])))
2012 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: "
2013 "dma_txreset[%d]: cannot stop dma\n",
2014 wlc_hw
->unit
, __func__
, i
);
2016 if ((wlc_hw
->di
[RX_FIFO
])
2017 && (!wlc_dma_rxreset(wlc_hw
, RX_FIFO
)))
2018 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: dma_rxreset"
2019 "[%d]: cannot stop dma\n",
2020 wlc_hw
->unit
, __func__
, RX_FIFO
);
2022 /* if noreset, just stop the psm and return */
2023 if (wlc_hw
->noreset
) {
2024 wlc_hw
->wlc
->macintstatus
= 0; /* skip wl_dpc after down */
2025 brcms_b_mctrl(wlc_hw
, MCTL_PSM_RUN
| MCTL_EN_MAC
, 0);
2030 * mac no longer enables phyclk automatically when driver accesses
2031 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2032 * band->pi is invalid. need to enable PHY CLK
2034 flags
|= SICF_PCLKE
;
2038 * In chips with PMU, the fastclk request goes through d11 core
2039 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2041 * This adds some delay and we can optimize it by also requesting
2042 * fastclk through chipcommon during this period if necessary. But
2043 * that has to work coordinate with other driver like mips/arm since
2044 * they may touch chipcommon as well.
2046 wlc_hw
->clk
= false;
2047 bcma_core_enable(wlc_hw
->d11core
, flags
);
2049 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
2050 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, true);
2052 brcms_c_mctrl_reset(wlc_hw
);
2054 if (ai_get_cccaps(wlc_hw
->sih
) & CC_CAP_PMU
)
2055 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
2057 brcms_b_phy_reset(wlc_hw
);
2059 /* turn on PHY_PLL */
2060 brcms_b_core_phypll_ctl(wlc_hw
, true);
2062 /* clear sw intstatus */
2063 wlc_hw
->wlc
->macintstatus
= 0;
2065 /* restore the clk setting */
2067 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
2070 /* txfifo sizes needs to be modified(increased) since the newer cores
2073 static void brcms_b_corerev_fifofixup(struct brcms_hardware
*wlc_hw
)
2075 struct bcma_device
*core
= wlc_hw
->d11core
;
2077 u16 txfifo_startblk
= TXFIFO_START_BLK
, txfifo_endblk
;
2078 u16 txfifo_def
, txfifo_def1
;
2081 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2082 txfifo_startblk
= TXFIFO_START_BLK
;
2084 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2085 for (fifo_nu
= 0; fifo_nu
< NFIFO
; fifo_nu
++) {
2087 txfifo_endblk
= txfifo_startblk
+ wlc_hw
->xmtfifo_sz
[fifo_nu
];
2088 txfifo_def
= (txfifo_startblk
& 0xff) |
2089 (((txfifo_endblk
- 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT
);
2090 txfifo_def1
= ((txfifo_startblk
>> 8) & 0x1) |
2092 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT
);
2094 TXFIFOCMD_RESET_MASK
| (fifo_nu
<< TXFIFOCMD_FIFOSEL_SHIFT
);
2096 bcma_write16(core
, D11REGOFFS(xmtfifocmd
), txfifo_cmd
);
2097 bcma_write16(core
, D11REGOFFS(xmtfifodef
), txfifo_def
);
2098 bcma_write16(core
, D11REGOFFS(xmtfifodef1
), txfifo_def1
);
2100 bcma_write16(core
, D11REGOFFS(xmtfifocmd
), txfifo_cmd
);
2102 txfifo_startblk
+= wlc_hw
->xmtfifo_sz
[fifo_nu
];
2105 * need to propagate to shm location to be in sync since ucode/hw won't
2108 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE0
,
2109 wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]);
2110 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE1
,
2111 wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]);
2112 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE2
,
2113 ((wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
] << 8) | wlc_hw
->
2114 xmtfifo_sz
[TX_AC_BK_FIFO
]));
2115 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE3
,
2116 ((wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
] << 8) | wlc_hw
->
2117 xmtfifo_sz
[TX_BCMC_FIFO
]));
2120 /* This function is used for changing the tsf frac register
2121 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2122 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2123 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2124 * HTPHY Formula is 2^26/freq(MHz) e.g.
2125 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2126 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2127 * For spuron: 123MHz -> 2^26/123 = 545600.5
2128 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2129 * For spur off: 120MHz -> 2^26/120 = 559240.5
2130 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2133 void brcms_b_switch_macfreq(struct brcms_hardware
*wlc_hw
, u8 spurmode
)
2135 struct bcma_device
*core
= wlc_hw
->d11core
;
2137 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM43224_CHIP_ID
) ||
2138 (ai_get_chip_id(wlc_hw
->sih
) == BCM43225_CHIP_ID
)) {
2139 if (spurmode
== WL_SPURAVOID_ON2
) { /* 126Mhz */
2140 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x2082);
2141 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2142 } else if (spurmode
== WL_SPURAVOID_ON1
) { /* 123Mhz */
2143 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x5341);
2144 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2145 } else { /* 120Mhz */
2146 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x8889);
2147 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2149 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2150 if (spurmode
== WL_SPURAVOID_ON1
) { /* 82Mhz */
2151 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x7CE0);
2152 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0xC);
2153 } else { /* 80Mhz */
2154 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0xCCCD);
2155 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0xC);
2160 /* Initialize GPIOs that are controlled by D11 core */
2161 static void brcms_c_gpio_init(struct brcms_c_info
*wlc
)
2163 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2166 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2167 brcms_b_mctrl(wlc_hw
, MCTL_GPOUT_SEL_MASK
, 0);
2170 * Common GPIO setup:
2171 * G0 = LED 0 = WLAN Activity
2172 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2173 * G2 = LED 2 = WLAN 5 GHz Radio State
2174 * G4 = radio disable input (HI enabled, LO disabled)
2179 /* Allocate GPIOs for mimo antenna diversity feature */
2180 if (wlc_hw
->antsel_type
== ANTSEL_2x3
) {
2181 /* Enable antenna diversity, use 2x3 mode */
2182 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2183 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2184 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
,
2185 MHF3_ANTSEL_MODE
, BRCM_BAND_ALL
);
2187 /* init superswitch control */
2188 wlc_phy_antsel_init(wlc_hw
->band
->pi
, false);
2190 } else if (wlc_hw
->antsel_type
== ANTSEL_2x4
) {
2191 gm
|= gc
|= (BOARD_GPIO_12
| BOARD_GPIO_13
);
2193 * The board itself is powered by these GPIOs
2194 * (when not sending pattern) so set them high
2196 bcma_set16(wlc_hw
->d11core
, D11REGOFFS(psm_gpio_oe
),
2197 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2198 bcma_set16(wlc_hw
->d11core
, D11REGOFFS(psm_gpio_out
),
2199 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2201 /* Enable antenna diversity, use 2x4 mode */
2202 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2203 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2204 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
, 0,
2207 /* Configure the desired clock to be 4Mhz */
2208 brcms_b_write_shm(wlc_hw
, M_ANTSEL_CLKDIV
,
2209 ANTSEL_CLKDIV_4MHZ
);
2213 * gpio 9 controls the PA. ucode is responsible
2214 * for wiggling out and oe
2216 if (wlc_hw
->boardflags
& BFL_PACTRL
)
2217 gm
|= gc
|= BOARD_GPIO_PACTRL
;
2219 /* apply to gpiocontrol register */
2220 ai_gpiocontrol(wlc_hw
->sih
, gm
, gc
, GPIO_DRV_PRIORITY
);
2223 static void brcms_ucode_write(struct brcms_hardware
*wlc_hw
,
2224 const __le32 ucode
[], const size_t nbytes
)
2226 struct bcma_device
*core
= wlc_hw
->d11core
;
2230 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2232 count
= (nbytes
/ sizeof(u32
));
2234 bcma_write32(core
, D11REGOFFS(objaddr
),
2235 OBJADDR_AUTO_INC
| OBJADDR_UCM_SEL
);
2236 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2237 for (i
= 0; i
< count
; i
++)
2238 bcma_write32(core
, D11REGOFFS(objdata
), le32_to_cpu(ucode
[i
]));
2242 static void brcms_ucode_download(struct brcms_hardware
*wlc_hw
)
2244 struct brcms_c_info
*wlc
;
2245 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
2249 if (wlc_hw
->ucode_loaded
)
2252 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
2253 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
2254 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_16_mimo
,
2255 ucode
->bcm43xx_16_mimosz
);
2256 wlc_hw
->ucode_loaded
= true;
2258 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2260 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2261 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
2262 if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2263 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_24_lcn
,
2264 ucode
->bcm43xx_24_lcnsz
);
2265 wlc_hw
->ucode_loaded
= true;
2267 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2269 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2274 void brcms_b_txant_set(struct brcms_hardware
*wlc_hw
, u16 phytxant
)
2276 /* update sw state */
2277 wlc_hw
->bmac_phytxant
= phytxant
;
2279 /* push to ucode if up */
2282 brcms_c_ucode_txant_set(wlc_hw
);
2286 u16
brcms_b_get_txant(struct brcms_hardware
*wlc_hw
)
2288 return (u16
) wlc_hw
->wlc
->stf
->txant
;
2291 void brcms_b_antsel_type_set(struct brcms_hardware
*wlc_hw
, u8 antsel_type
)
2293 wlc_hw
->antsel_type
= antsel_type
;
2295 /* Update the antsel type for phy module to use */
2296 wlc_phy_antsel_type_set(wlc_hw
->band
->pi
, antsel_type
);
2299 static void brcms_b_fifoerrors(struct brcms_hardware
*wlc_hw
)
2303 uint intstatus
, idx
;
2304 struct bcma_device
*core
= wlc_hw
->d11core
;
2305 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2307 unit
= wlc_hw
->unit
;
2309 for (idx
= 0; idx
< NFIFO
; idx
++) {
2310 /* read intstatus register and ignore any non-error bits */
2313 D11REGOFFS(intctrlregs
[idx
].intstatus
)) &
2318 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: intstatus%d 0x%x\n",
2319 unit
, idx
, intstatus
);
2321 if (intstatus
& I_RO
) {
2322 wiphy_err(wiphy
, "wl%d: fifo %d: receive fifo "
2323 "overflow\n", unit
, idx
);
2327 if (intstatus
& I_PC
) {
2328 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor error\n",
2333 if (intstatus
& I_PD
) {
2334 wiphy_err(wiphy
, "wl%d: fifo %d: data error\n", unit
,
2339 if (intstatus
& I_DE
) {
2340 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor protocol "
2341 "error\n", unit
, idx
);
2345 if (intstatus
& I_RU
)
2346 wiphy_err(wiphy
, "wl%d: fifo %d: receive descriptor "
2347 "underflow\n", idx
, unit
);
2349 if (intstatus
& I_XU
) {
2350 wiphy_err(wiphy
, "wl%d: fifo %d: transmit fifo "
2351 "underflow\n", idx
, unit
);
2356 brcms_fatal_error(wlc_hw
->wlc
->wl
); /* big hammer */
2360 D11REGOFFS(intctrlregs
[idx
].intstatus
),
2365 void brcms_c_intrson(struct brcms_c_info
*wlc
)
2367 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2368 wlc
->macintmask
= wlc
->defmacintmask
;
2369 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), wlc
->macintmask
);
2372 u32
brcms_c_intrsoff(struct brcms_c_info
*wlc
)
2374 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2380 macintmask
= wlc
->macintmask
; /* isr can still happen */
2382 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), 0);
2383 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(macintmask
));
2384 udelay(1); /* ensure int line is no longer driven */
2385 wlc
->macintmask
= 0;
2387 /* return previous macintmask; resolve race between us and our isr */
2388 return wlc
->macintstatus
? 0 : macintmask
;
2391 void brcms_c_intrsrestore(struct brcms_c_info
*wlc
, u32 macintmask
)
2393 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2397 wlc
->macintmask
= macintmask
;
2398 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), wlc
->macintmask
);
2401 /* assumes that the d11 MAC is enabled */
2402 static void brcms_b_tx_fifo_suspend(struct brcms_hardware
*wlc_hw
,
2405 u8 fifo
= 1 << tx_fifo
;
2407 /* Two clients of this code, 11h Quiet period and scanning. */
2409 /* only suspend if not already suspended */
2410 if ((wlc_hw
->suspended_fifos
& fifo
) == fifo
)
2413 /* force the core awake only if not already */
2414 if (wlc_hw
->suspended_fifos
== 0)
2415 brcms_c_ucode_wake_override_set(wlc_hw
,
2416 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2418 wlc_hw
->suspended_fifos
|= fifo
;
2420 if (wlc_hw
->di
[tx_fifo
]) {
2422 * Suspending AMPDU transmissions in the middle can cause
2423 * underflow which may result in mismatch between ucode and
2424 * driver so suspend the mac before suspending the FIFO
2426 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2427 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
2429 dma_txsuspend(wlc_hw
->di
[tx_fifo
]);
2431 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2432 brcms_c_enable_mac(wlc_hw
->wlc
);
2436 static void brcms_b_tx_fifo_resume(struct brcms_hardware
*wlc_hw
,
2439 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2440 * but need to be done here for PIO otherwise the watchdog will catch
2441 * the inconsistency and fire
2443 /* Two clients of this code, 11h Quiet period and scanning. */
2444 if (wlc_hw
->di
[tx_fifo
])
2445 dma_txresume(wlc_hw
->di
[tx_fifo
]);
2447 /* allow core to sleep again */
2448 if (wlc_hw
->suspended_fifos
== 0)
2451 wlc_hw
->suspended_fifos
&= ~(1 << tx_fifo
);
2452 if (wlc_hw
->suspended_fifos
== 0)
2453 brcms_c_ucode_wake_override_clear(wlc_hw
,
2454 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2458 /* precondition: requires the mac core to be enabled */
2459 static void brcms_b_mute(struct brcms_hardware
*wlc_hw
, bool mute_tx
)
2461 static const u8 null_ether_addr
[ETH_ALEN
] = {0, 0, 0, 0, 0, 0};
2464 /* suspend tx fifos */
2465 brcms_b_tx_fifo_suspend(wlc_hw
, TX_DATA_FIFO
);
2466 brcms_b_tx_fifo_suspend(wlc_hw
, TX_CTL_FIFO
);
2467 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_BK_FIFO
);
2468 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_VI_FIFO
);
2470 /* zero the address match register so we do not send ACKs */
2471 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2474 /* resume tx fifos */
2475 brcms_b_tx_fifo_resume(wlc_hw
, TX_DATA_FIFO
);
2476 brcms_b_tx_fifo_resume(wlc_hw
, TX_CTL_FIFO
);
2477 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_BK_FIFO
);
2478 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_VI_FIFO
);
2480 /* Restore address */
2481 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2485 wlc_phy_mute_upd(wlc_hw
->band
->pi
, mute_tx
, 0);
2488 brcms_c_ucode_mute_override_set(wlc_hw
);
2490 brcms_c_ucode_mute_override_clear(wlc_hw
);
2494 brcms_c_mute(struct brcms_c_info
*wlc
, bool mute_tx
)
2496 brcms_b_mute(wlc
->hw
, mute_tx
);
2500 * Read and clear macintmask and macintstatus and intstatus registers.
2501 * This routine should be called with interrupts off
2503 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2504 * 0 if the interrupt is not for us, or we are in some special cases;
2505 * device interrupt status bits otherwise.
2507 static inline u32
wlc_intstatus(struct brcms_c_info
*wlc
, bool in_isr
)
2509 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2510 struct bcma_device
*core
= wlc_hw
->d11core
;
2513 /* macintstatus includes a DMA interrupt summary bit */
2514 macintstatus
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2516 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus: 0x%x\n", wlc_hw
->unit
,
2519 /* detect cardbus removed, in power down(suspend) and in reset */
2520 if (brcms_deviceremoved(wlc
))
2523 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2524 * handle that case here.
2526 if (macintstatus
== 0xffffffff)
2529 /* defer unsolicited interrupts */
2530 macintstatus
&= (in_isr
? wlc
->macintmask
: wlc
->defmacintmask
);
2533 if (macintstatus
== 0)
2536 /* interrupts are already turned off for CFE build
2537 * Caution: For CFE Turning off the interrupts again has some undesired
2540 /* turn off the interrupts */
2541 bcma_write32(core
, D11REGOFFS(macintmask
), 0);
2542 (void)bcma_read32(core
, D11REGOFFS(macintmask
));
2543 wlc
->macintmask
= 0;
2545 /* clear device interrupts */
2546 bcma_write32(core
, D11REGOFFS(macintstatus
), macintstatus
);
2548 /* MI_DMAINT is indication of non-zero intstatus */
2549 if (macintstatus
& MI_DMAINT
)
2551 * only fifo interrupt enabled is I_RI in
2552 * RX_FIFO. If MI_DMAINT is set, assume it
2553 * is set and clear the interrupt.
2555 bcma_write32(core
, D11REGOFFS(intctrlregs
[RX_FIFO
].intstatus
),
2558 return macintstatus
;
2561 /* Update wlc->macintstatus and wlc->intstatus[]. */
2562 /* Return true if they are updated successfully. false otherwise */
2563 bool brcms_c_intrsupd(struct brcms_c_info
*wlc
)
2567 /* read and clear macintstatus and intstatus registers */
2568 macintstatus
= wlc_intstatus(wlc
, false);
2570 /* device is removed */
2571 if (macintstatus
== 0xffffffff)
2574 /* update interrupt status in software */
2575 wlc
->macintstatus
|= macintstatus
;
2581 * First-level interrupt processing.
2582 * Return true if this was our interrupt, false otherwise.
2583 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2586 bool brcms_c_isr(struct brcms_c_info
*wlc
, bool *wantdpc
)
2588 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2593 if (!wlc_hw
->up
|| !wlc
->macintmask
)
2596 /* read and clear macintstatus and intstatus registers */
2597 macintstatus
= wlc_intstatus(wlc
, true);
2599 if (macintstatus
== 0xffffffff)
2600 wiphy_err(wlc
->wiphy
, "DEVICEREMOVED detected in the ISR code"
2603 /* it is not for us */
2604 if (macintstatus
== 0)
2609 /* save interrupt status bits */
2610 wlc
->macintstatus
= macintstatus
;
2616 void brcms_c_suspend_mac_and_wait(struct brcms_c_info
*wlc
)
2618 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2619 struct bcma_device
*core
= wlc_hw
->d11core
;
2621 struct wiphy
*wiphy
= wlc
->wiphy
;
2623 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2624 wlc_hw
->band
->bandunit
);
2627 * Track overlapping suspend requests
2629 wlc_hw
->mac_suspend_depth
++;
2630 if (wlc_hw
->mac_suspend_depth
> 1)
2633 /* force the core awake */
2634 brcms_c_ucode_wake_override_set(wlc_hw
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2636 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2638 if (mc
== 0xffffffff) {
2639 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2641 brcms_down(wlc
->wl
);
2644 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2645 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2646 WARN_ON(!(mc
& MCTL_EN_MAC
));
2648 mi
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2649 if (mi
== 0xffffffff) {
2650 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2652 brcms_down(wlc
->wl
);
2655 WARN_ON(mi
& MI_MACSSPNDD
);
2657 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, 0);
2659 SPINWAIT(!(bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
),
2660 BRCMS_MAX_MAC_SUSPEND
);
2662 if (!(bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
)) {
2663 wiphy_err(wiphy
, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2664 " and MI_MACSSPNDD is still not on.\n",
2665 wlc_hw
->unit
, BRCMS_MAX_MAC_SUSPEND
);
2666 wiphy_err(wiphy
, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2667 "psm_brc 0x%04x\n", wlc_hw
->unit
,
2668 bcma_read32(core
, D11REGOFFS(psmdebug
)),
2669 bcma_read32(core
, D11REGOFFS(phydebug
)),
2670 bcma_read16(core
, D11REGOFFS(psm_brc
)));
2673 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2674 if (mc
== 0xffffffff) {
2675 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2677 brcms_down(wlc
->wl
);
2680 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2681 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2682 WARN_ON(mc
& MCTL_EN_MAC
);
2685 void brcms_c_enable_mac(struct brcms_c_info
*wlc
)
2687 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2688 struct bcma_device
*core
= wlc_hw
->d11core
;
2691 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2692 wlc
->band
->bandunit
);
2695 * Track overlapping suspend requests
2697 wlc_hw
->mac_suspend_depth
--;
2698 if (wlc_hw
->mac_suspend_depth
> 0)
2701 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2702 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2703 WARN_ON(mc
& MCTL_EN_MAC
);
2704 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2706 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, MCTL_EN_MAC
);
2707 bcma_write32(core
, D11REGOFFS(macintstatus
), MI_MACSSPNDD
);
2709 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2710 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2711 WARN_ON(!(mc
& MCTL_EN_MAC
));
2712 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2714 mi
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2715 WARN_ON(mi
& MI_MACSSPNDD
);
2717 brcms_c_ucode_wake_override_clear(wlc_hw
,
2718 BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2721 void brcms_b_band_stf_ss_set(struct brcms_hardware
*wlc_hw
, u8 stf_mode
)
2723 wlc_hw
->hw_stf_ss_opmode
= stf_mode
;
2726 brcms_upd_ofdm_pctl1_table(wlc_hw
);
2729 static bool brcms_b_validate_chip_access(struct brcms_hardware
*wlc_hw
)
2731 struct bcma_device
*core
= wlc_hw
->d11core
;
2733 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2735 BCMMSG(wiphy
, "wl%d\n", wlc_hw
->unit
);
2737 /* Validate dchip register access */
2739 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2740 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2741 w
= bcma_read32(core
, D11REGOFFS(objdata
));
2743 /* Can we write and read back a 32bit register? */
2744 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2745 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2746 bcma_write32(core
, D11REGOFFS(objdata
), (u32
) 0xaa5555aa);
2748 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2749 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2750 val
= bcma_read32(core
, D11REGOFFS(objdata
));
2751 if (val
!= (u32
) 0xaa5555aa) {
2752 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2753 "expected 0xaa5555aa\n", wlc_hw
->unit
, val
);
2757 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2758 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2759 bcma_write32(core
, D11REGOFFS(objdata
), (u32
) 0x55aaaa55);
2761 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2762 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2763 val
= bcma_read32(core
, D11REGOFFS(objdata
));
2764 if (val
!= (u32
) 0x55aaaa55) {
2765 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2766 "expected 0x55aaaa55\n", wlc_hw
->unit
, val
);
2770 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2771 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2772 bcma_write32(core
, D11REGOFFS(objdata
), w
);
2774 /* clear CFPStart */
2775 bcma_write32(core
, D11REGOFFS(tsf_cfpstart
), 0);
2777 w
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2778 if ((w
!= (MCTL_IHR_EN
| MCTL_WAKE
)) &&
2779 (w
!= (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
))) {
2780 wiphy_err(wiphy
, "wl%d: validate_chip_access: maccontrol = "
2781 "0x%x, expected 0x%x or 0x%x\n", wlc_hw
->unit
, w
,
2782 (MCTL_IHR_EN
| MCTL_WAKE
),
2783 (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
));
2790 #define PHYPLL_WAIT_US 100000
2792 void brcms_b_core_phypll_ctl(struct brcms_hardware
*wlc_hw
, bool on
)
2794 struct bcma_device
*core
= wlc_hw
->d11core
;
2797 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2802 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM4313_CHIP_ID
)) {
2803 bcma_set32(core
, D11REGOFFS(clk_ctl_st
),
2805 CCS_ERSRC_REQ_D11PLL
|
2806 CCS_ERSRC_REQ_PHYPLL
);
2807 SPINWAIT((bcma_read32(core
, D11REGOFFS(clk_ctl_st
)) &
2808 CCS_ERSRC_AVAIL_HT
) != CCS_ERSRC_AVAIL_HT
,
2811 tmp
= bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2812 if ((tmp
& CCS_ERSRC_AVAIL_HT
) != CCS_ERSRC_AVAIL_HT
)
2813 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on PHY"
2814 " PLL failed\n", __func__
);
2816 bcma_set32(core
, D11REGOFFS(clk_ctl_st
),
2817 tmp
| CCS_ERSRC_REQ_D11PLL
|
2818 CCS_ERSRC_REQ_PHYPLL
);
2819 SPINWAIT((bcma_read32(core
, D11REGOFFS(clk_ctl_st
)) &
2820 (CCS_ERSRC_AVAIL_D11PLL
|
2821 CCS_ERSRC_AVAIL_PHYPLL
)) !=
2822 (CCS_ERSRC_AVAIL_D11PLL
|
2823 CCS_ERSRC_AVAIL_PHYPLL
), PHYPLL_WAIT_US
);
2825 tmp
= bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2827 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
2829 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
2830 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on "
2831 "PHY PLL failed\n", __func__
);
2835 * Since the PLL may be shared, other cores can still
2836 * be requesting it; so we'll deassert the request but
2837 * not wait for status to comply.
2839 bcma_mask32(core
, D11REGOFFS(clk_ctl_st
),
2840 ~CCS_ERSRC_REQ_PHYPLL
);
2841 (void)bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2845 static void brcms_c_coredisable(struct brcms_hardware
*wlc_hw
)
2849 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2851 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
2856 if (wlc_hw
->noreset
)
2860 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
2862 /* turn off analog core */
2863 wlc_phy_anacore(wlc_hw
->band
->pi
, OFF
);
2865 /* turn off PHYPLL to save power */
2866 brcms_b_core_phypll_ctl(wlc_hw
, false);
2868 wlc_hw
->clk
= false;
2869 bcma_core_disable(wlc_hw
->d11core
, 0);
2870 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
2873 static void brcms_c_flushqueues(struct brcms_c_info
*wlc
)
2875 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2878 /* free any posted tx packets */
2879 for (i
= 0; i
< NFIFO
; i
++)
2880 if (wlc_hw
->di
[i
]) {
2881 dma_txreclaim(wlc_hw
->di
[i
], DMA_RANGE_ALL
);
2882 wlc
->core
->txpktpend
[i
] = 0;
2883 BCMMSG(wlc
->wiphy
, "pktpend fifo %d clrd\n", i
);
2886 /* free any posted rx packets */
2887 dma_rxreclaim(wlc_hw
->di
[RX_FIFO
]);
2891 brcms_b_read_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u32 sel
)
2893 struct bcma_device
*core
= wlc_hw
->d11core
;
2894 u16 objoff
= D11REGOFFS(objdata
);
2896 bcma_write32(core
, D11REGOFFS(objaddr
), sel
| (offset
>> 2));
2897 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2901 return bcma_read16(core
, objoff
);
2906 brcms_b_write_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
,
2909 struct bcma_device
*core
= wlc_hw
->d11core
;
2910 u16 objoff
= D11REGOFFS(objdata
);
2912 bcma_write32(core
, D11REGOFFS(objaddr
), sel
| (offset
>> 2));
2913 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2917 bcma_write16(core
, objoff
, v
);
2921 * Read a single u16 from shared memory.
2922 * SHM 'offset' needs to be an even address
2924 u16
brcms_b_read_shm(struct brcms_hardware
*wlc_hw
, uint offset
)
2926 return brcms_b_read_objmem(wlc_hw
, offset
, OBJADDR_SHM_SEL
);
2930 * Write a single u16 to shared memory.
2931 * SHM 'offset' needs to be an even address
2933 void brcms_b_write_shm(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
)
2935 brcms_b_write_objmem(wlc_hw
, offset
, v
, OBJADDR_SHM_SEL
);
2939 * Copy a buffer to shared memory of specified type .
2940 * SHM 'offset' needs to be an even address and
2941 * Buffer length 'len' must be an even number of bytes
2942 * 'sel' selects the type of memory
2945 brcms_b_copyto_objmem(struct brcms_hardware
*wlc_hw
, uint offset
,
2946 const void *buf
, int len
, u32 sel
)
2949 const u8
*p
= (const u8
*)buf
;
2952 if (len
<= 0 || (offset
& 1) || (len
& 1))
2955 for (i
= 0; i
< len
; i
+= 2) {
2956 v
= p
[i
] | (p
[i
+ 1] << 8);
2957 brcms_b_write_objmem(wlc_hw
, offset
+ i
, v
, sel
);
2962 * Copy a piece of shared memory of specified type to a buffer .
2963 * SHM 'offset' needs to be an even address and
2964 * Buffer length 'len' must be an even number of bytes
2965 * 'sel' selects the type of memory
2968 brcms_b_copyfrom_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, void *buf
,
2975 if (len
<= 0 || (offset
& 1) || (len
& 1))
2978 for (i
= 0; i
< len
; i
+= 2) {
2979 v
= brcms_b_read_objmem(wlc_hw
, offset
+ i
, sel
);
2981 p
[i
+ 1] = (v
>> 8) & 0xFF;
2985 /* Copy a buffer to shared memory.
2986 * SHM 'offset' needs to be an even address and
2987 * Buffer length 'len' must be an even number of bytes
2989 static void brcms_c_copyto_shm(struct brcms_c_info
*wlc
, uint offset
,
2990 const void *buf
, int len
)
2992 brcms_b_copyto_objmem(wlc
->hw
, offset
, buf
, len
, OBJADDR_SHM_SEL
);
2995 static void brcms_b_retrylimit_upd(struct brcms_hardware
*wlc_hw
,
3001 /* write retry limit to SCR, shouldn't need to suspend */
3003 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
3004 OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
3005 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
3006 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), wlc_hw
->SRL
);
3007 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
3008 OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3009 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
3010 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), wlc_hw
->LRL
);
3014 static void brcms_b_pllreq(struct brcms_hardware
*wlc_hw
, bool set
, u32 req_bit
)
3017 if (mboolisset(wlc_hw
->pllreq
, req_bit
))
3020 mboolset(wlc_hw
->pllreq
, req_bit
);
3022 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3024 brcms_b_xtal(wlc_hw
, ON
);
3027 if (!mboolisset(wlc_hw
->pllreq
, req_bit
))
3030 mboolclr(wlc_hw
->pllreq
, req_bit
);
3032 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3034 brcms_b_xtal(wlc_hw
, OFF
);
3039 static void brcms_b_antsel_set(struct brcms_hardware
*wlc_hw
, u32 antsel_avail
)
3041 wlc_hw
->antsel_avail
= antsel_avail
;
3045 * conditions under which the PM bit should be set in outgoing frames
3046 * and STAY_AWAKE is meaningful
3048 static bool brcms_c_ps_allowed(struct brcms_c_info
*wlc
)
3050 struct brcms_bss_cfg
*cfg
= wlc
->bsscfg
;
3052 /* disallow PS when one of the following global conditions meets */
3053 if (!wlc
->pub
->associated
)
3056 /* disallow PS when one of these meets when not scanning */
3057 if (wlc
->filter_flags
& FIF_PROMISC_IN_BSS
)
3060 if (cfg
->associated
) {
3062 * disallow PS when one of the following
3063 * bsscfg specific conditions meets
3074 static void brcms_c_statsupd(struct brcms_c_info
*wlc
)
3077 struct macstat macstats
;
3084 /* if driver down, make no sense to update stats */
3089 /* save last rx fifo 0 overflow count */
3090 rxf0ovfl
= wlc
->core
->macstat_snapshot
->rxf0ovfl
;
3092 /* save last tx fifo underflow count */
3093 for (i
= 0; i
< NFIFO
; i
++)
3094 txfunfl
[i
] = wlc
->core
->macstat_snapshot
->txfunfl
[i
];
3097 /* Read mac stats from contiguous shared memory */
3098 brcms_b_copyfrom_objmem(wlc
->hw
, M_UCODE_MACSTAT
, &macstats
,
3099 sizeof(struct macstat
), OBJADDR_SHM_SEL
);
3102 /* check for rx fifo 0 overflow */
3103 delta
= (u16
) (wlc
->core
->macstat_snapshot
->rxf0ovfl
- rxf0ovfl
);
3105 wiphy_err(wlc
->wiphy
, "wl%d: %u rx fifo 0 overflows!\n",
3106 wlc
->pub
->unit
, delta
);
3108 /* check for tx fifo underflows */
3109 for (i
= 0; i
< NFIFO
; i
++) {
3111 (u16
) (wlc
->core
->macstat_snapshot
->txfunfl
[i
] -
3114 wiphy_err(wlc
->wiphy
, "wl%d: %u tx fifo %d underflows!"
3115 "\n", wlc
->pub
->unit
, delta
, i
);
3119 /* merge counters from dma module */
3120 for (i
= 0; i
< NFIFO
; i
++) {
3122 dma_counterreset(wlc
->hw
->di
[i
]);
3126 static void brcms_b_reset(struct brcms_hardware
*wlc_hw
)
3128 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3130 /* reset the core */
3131 if (!brcms_deviceremoved(wlc_hw
->wlc
))
3132 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
3134 /* purge the dma rings */
3135 brcms_c_flushqueues(wlc_hw
->wlc
);
3138 void brcms_c_reset(struct brcms_c_info
*wlc
)
3140 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3142 /* slurp up hw mac counters before core reset */
3143 brcms_c_statsupd(wlc
);
3145 /* reset our snapshot of macstat counters */
3146 memset((char *)wlc
->core
->macstat_snapshot
, 0,
3147 sizeof(struct macstat
));
3149 brcms_b_reset(wlc
->hw
);
3152 /* Return the channel the driver should initialize during brcms_c_init.
3153 * the channel may have to be changed from the currently configured channel
3154 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3155 * invalid channel for current country, etc.)
3157 static u16
brcms_c_init_chanspec(struct brcms_c_info
*wlc
)
3160 1 | WL_CHANSPEC_BW_20
| WL_CHANSPEC_CTL_SB_NONE
|
3161 WL_CHANSPEC_BAND_2G
;
3166 void brcms_c_init_scb(struct scb
*scb
)
3170 memset(scb
, 0, sizeof(struct scb
));
3171 scb
->flags
= SCB_WMECAP
| SCB_HTCAP
;
3172 for (i
= 0; i
< NUMPRIO
; i
++) {
3174 scb
->seqctl
[i
] = 0xFFFF;
3177 scb
->seqctl_nonqos
= 0xFFFF;
3178 scb
->magic
= SCB_MAGIC
;
3183 * download ucode/PCM
3184 * let ucode run to suspended
3185 * download ucode inits
3186 * config other core registers
3189 static void brcms_b_coreinit(struct brcms_c_info
*wlc
)
3191 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
3192 struct bcma_device
*core
= wlc_hw
->d11core
;
3196 bool fifosz_fixup
= false;
3199 struct wiphy
*wiphy
= wlc
->wiphy
;
3200 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
3202 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3205 brcms_b_mctrl(wlc_hw
, ~0, (MCTL_IHR_EN
| MCTL_PSM_JMP_0
| MCTL_WAKE
));
3207 brcms_ucode_download(wlc_hw
);
3209 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3211 fifosz_fixup
= true;
3213 /* let the PSM run to the suspended state, set mode to BSS STA */
3214 bcma_write32(core
, D11REGOFFS(macintstatus
), -1);
3215 brcms_b_mctrl(wlc_hw
, ~0,
3216 (MCTL_IHR_EN
| MCTL_INFRA
| MCTL_PSM_RUN
| MCTL_WAKE
));
3218 /* wait for ucode to self-suspend after auto-init */
3219 SPINWAIT(((bcma_read32(core
, D11REGOFFS(macintstatus
)) &
3220 MI_MACSSPNDD
) == 0), 1000 * 1000);
3221 if ((bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
) == 0)
3222 wiphy_err(wiphy
, "wl%d: wlc_coreinit: ucode did not self-"
3223 "suspend!\n", wlc_hw
->unit
);
3225 brcms_c_gpio_init(wlc
);
3227 sflags
= bcma_aread32(core
, BCMA_IOST
);
3229 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
3230 if (BRCMS_ISNPHY(wlc_hw
->band
))
3231 brcms_c_write_inits(wlc_hw
, ucode
->d11n0initvals16
);
3233 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3234 " %d\n", __func__
, wlc_hw
->unit
,
3236 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
3237 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
3238 brcms_c_write_inits(wlc_hw
, ucode
->d11lcn0initvals24
);
3240 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3241 " %d\n", __func__
, wlc_hw
->unit
,
3244 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
3245 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
3248 /* For old ucode, txfifo sizes needs to be modified(increased) */
3249 if (fifosz_fixup
== true)
3250 brcms_b_corerev_fifofixup(wlc_hw
);
3252 /* check txfifo allocations match between ucode and driver */
3253 buf
[TX_AC_BE_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE0
);
3254 if (buf
[TX_AC_BE_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]) {
3258 buf
[TX_AC_VI_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE1
);
3259 if (buf
[TX_AC_VI_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]) {
3263 buf
[TX_AC_BK_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE2
);
3264 buf
[TX_AC_VO_FIFO
] = (buf
[TX_AC_BK_FIFO
] >> 8) & 0xff;
3265 buf
[TX_AC_BK_FIFO
] &= 0xff;
3266 if (buf
[TX_AC_BK_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BK_FIFO
]) {
3270 if (buf
[TX_AC_VO_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
]) {
3274 buf
[TX_BCMC_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE3
);
3275 buf
[TX_ATIM_FIFO
] = (buf
[TX_BCMC_FIFO
] >> 8) & 0xff;
3276 buf
[TX_BCMC_FIFO
] &= 0xff;
3277 if (buf
[TX_BCMC_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_BCMC_FIFO
]) {
3281 if (buf
[TX_ATIM_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
]) {
3286 wiphy_err(wiphy
, "wlc_coreinit: txfifo mismatch: ucode size %d"
3287 " driver size %d index %d\n", buf
[i
],
3288 wlc_hw
->xmtfifo_sz
[i
], i
);
3290 /* make sure we can still talk to the mac */
3291 WARN_ON(bcma_read32(core
, D11REGOFFS(maccontrol
)) == 0xffffffff);
3293 /* band-specific inits done by wlc_bsinit() */
3295 /* Set up frame burst size and antenna swap threshold init values */
3296 brcms_b_write_shm(wlc_hw
, M_MBURST_SIZE
, MAXTXFRAMEBURST
);
3297 brcms_b_write_shm(wlc_hw
, M_MAX_ANTCNT
, ANTCNT
);
3299 /* enable one rx interrupt per received frame */
3300 bcma_write32(core
, D11REGOFFS(intrcvlazy
[0]), (1 << IRL_FC_SHIFT
));
3302 /* set the station mode (BSS STA) */
3303 brcms_b_mctrl(wlc_hw
,
3304 (MCTL_INFRA
| MCTL_DISCARD_PMQ
| MCTL_AP
),
3305 (MCTL_INFRA
| MCTL_DISCARD_PMQ
));
3307 /* set up Beacon interval */
3308 bcnint_us
= 0x8000 << 10;
3309 bcma_write32(core
, D11REGOFFS(tsf_cfprep
),
3310 (bcnint_us
<< CFPREP_CBI_SHIFT
));
3311 bcma_write32(core
, D11REGOFFS(tsf_cfpstart
), bcnint_us
);
3312 bcma_write32(core
, D11REGOFFS(macintstatus
), MI_GP1
);
3314 /* write interrupt mask */
3315 bcma_write32(core
, D11REGOFFS(intctrlregs
[RX_FIFO
].intmask
),
3318 /* allow the MAC to control the PHY clock (dynamic on/off) */
3319 brcms_b_macphyclk_set(wlc_hw
, ON
);
3321 /* program dynamic clock control fast powerup delay register */
3322 wlc
->fastpwrup_dly
= ai_clkctl_fast_pwrup_delay(wlc_hw
->sih
);
3323 bcma_write16(core
, D11REGOFFS(scc_fastpwrup_dly
), wlc
->fastpwrup_dly
);
3325 /* tell the ucode the corerev */
3326 brcms_b_write_shm(wlc_hw
, M_MACHW_VER
, (u16
) wlc_hw
->corerev
);
3328 /* tell the ucode MAC capabilities */
3329 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_L
,
3330 (u16
) (wlc_hw
->machwcap
& 0xffff));
3331 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_H
,
3333 machwcap
>> 16) & 0xffff));
3335 /* write retry limits to SCR, this done after PSM init */
3336 bcma_write32(core
, D11REGOFFS(objaddr
),
3337 OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
3338 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
3339 bcma_write32(core
, D11REGOFFS(objdata
), wlc_hw
->SRL
);
3340 bcma_write32(core
, D11REGOFFS(objaddr
),
3341 OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3342 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
3343 bcma_write32(core
, D11REGOFFS(objdata
), wlc_hw
->LRL
);
3345 /* write rate fallback retry limits */
3346 brcms_b_write_shm(wlc_hw
, M_SFRMTXCNTFBRTHSD
, wlc_hw
->SFBL
);
3347 brcms_b_write_shm(wlc_hw
, M_LFRMTXCNTFBRTHSD
, wlc_hw
->LFBL
);
3349 bcma_mask16(core
, D11REGOFFS(ifs_ctl
), 0x0FFF);
3350 bcma_write16(core
, D11REGOFFS(ifs_aifsn
), EDCF_AIFSN_MIN
);
3352 /* init the tx dma engines */
3353 for (i
= 0; i
< NFIFO
; i
++) {
3355 dma_txinit(wlc_hw
->di
[i
]);
3358 /* init the rx dma engine(s) and post receive buffers */
3359 dma_rxinit(wlc_hw
->di
[RX_FIFO
]);
3360 dma_rxfill(wlc_hw
->di
[RX_FIFO
]);
3364 static brcms_b_init(struct brcms_hardware
*wlc_hw
, u16 chanspec
) {
3367 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
3369 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3371 /* request FAST clock if not on */
3372 fastclk
= wlc_hw
->forcefastclk
;
3374 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
3376 /* disable interrupts */
3377 macintmask
= brcms_intrsoff(wlc
->wl
);
3379 /* set up the specified band and chanspec */
3380 brcms_c_setxband(wlc_hw
, chspec_bandunit(chanspec
));
3381 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
3383 /* do one-time phy inits and calibration */
3384 wlc_phy_cal_init(wlc_hw
->band
->pi
);
3386 /* core-specific initialization */
3387 brcms_b_coreinit(wlc
);
3389 /* band-specific inits */
3390 brcms_b_bsinit(wlc
, chanspec
);
3392 /* restore macintmask */
3393 brcms_intrsrestore(wlc
->wl
, macintmask
);
3395 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3396 * is suspended and brcms_c_enable_mac() will clear this override bit.
3398 mboolset(wlc_hw
->wake_override
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
3401 * initialize mac_suspend_depth to 1 to match ucode
3402 * initial suspended state
3404 wlc_hw
->mac_suspend_depth
= 1;
3406 /* restore the clk */
3408 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
3411 static void brcms_c_set_phy_chanspec(struct brcms_c_info
*wlc
,
3414 /* Save our copy of the chanspec */
3415 wlc
->chanspec
= chanspec
;
3417 /* Set the chanspec and power limits for this locale */
3418 brcms_c_channel_set_chanspec(wlc
->cmi
, chanspec
, BRCMS_TXPWR_MAX
);
3420 if (wlc
->stf
->ss_algosel_auto
)
3421 brcms_c_stf_ss_algo_channel_get(wlc
, &wlc
->stf
->ss_algo_channel
,
3424 brcms_c_stf_ss_update(wlc
, wlc
->band
);
3428 brcms_default_rateset(struct brcms_c_info
*wlc
, struct brcms_c_rateset
*rs
)
3430 brcms_c_rateset_default(rs
, NULL
, wlc
->band
->phytype
,
3431 wlc
->band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
3432 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
3433 brcms_chspec_bw(wlc
->default_bss
->chanspec
),
3434 wlc
->stf
->txstreams
);
3437 /* derive wlc->band->basic_rate[] table from 'rateset' */
3438 static void brcms_c_rate_lookup_init(struct brcms_c_info
*wlc
,
3439 struct brcms_c_rateset
*rateset
)
3445 u8
*br
= wlc
->band
->basic_rate
;
3448 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3449 memset(br
, 0, BRCM_MAXRATE
+ 1);
3451 /* For each basic rate in the rates list, make an entry in the
3452 * best basic lookup.
3454 for (i
= 0; i
< rateset
->count
; i
++) {
3455 /* only make an entry for a basic rate */
3456 if (!(rateset
->rates
[i
] & BRCMS_RATE_FLAG
))
3459 /* mask off basic bit */
3460 rate
= (rateset
->rates
[i
] & BRCMS_RATE_MASK
);
3462 if (rate
> BRCM_MAXRATE
) {
3463 wiphy_err(wlc
->wiphy
, "brcms_c_rate_lookup_init: "
3464 "invalid rate 0x%X in rate set\n",
3472 /* The rate lookup table now has non-zero entries for each
3473 * basic rate, equal to the basic rate: br[basicN] = basicN
3475 * To look up the best basic rate corresponding to any
3476 * particular rate, code can use the basic_rate table
3479 * basic_rate = wlc->band->basic_rate[tx_rate]
3481 * Make sure there is a best basic rate entry for
3482 * every rate by walking up the table from low rates
3483 * to high, filling in holes in the lookup table
3486 for (i
= 0; i
< wlc
->band
->hw_rateset
.count
; i
++) {
3487 rate
= wlc
->band
->hw_rateset
.rates
[i
];
3489 if (br
[rate
] != 0) {
3490 /* This rate is a basic rate.
3491 * Keep track of the best basic rate so far by
3494 if (is_ofdm_rate(rate
))
3502 /* This rate is not a basic rate so figure out the
3503 * best basic rate less than this rate and fill in
3504 * the hole in the table
3507 br
[rate
] = is_ofdm_rate(rate
) ? ofdm_basic
: cck_basic
;
3512 if (is_ofdm_rate(rate
)) {
3514 * In 11g and 11a, the OFDM mandatory rates
3515 * are 6, 12, and 24 Mbps
3517 if (rate
>= BRCM_RATE_24M
)
3518 mandatory
= BRCM_RATE_24M
;
3519 else if (rate
>= BRCM_RATE_12M
)
3520 mandatory
= BRCM_RATE_12M
;
3522 mandatory
= BRCM_RATE_6M
;
3524 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3528 br
[rate
] = mandatory
;
3532 static void brcms_c_bandinit_ordered(struct brcms_c_info
*wlc
,
3535 struct brcms_c_rateset default_rateset
;
3537 uint i
, band_order
[2];
3539 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3541 * We might have been bandlocked during down and the chip
3542 * power-cycled (hibernate). Figure out the right band to park on
3544 if (wlc
->bandlocked
|| wlc
->pub
->_nbands
== 1) {
3545 /* updated in brcms_c_bandlock() */
3546 parkband
= wlc
->band
->bandunit
;
3547 band_order
[0] = band_order
[1] = parkband
;
3549 /* park on the band of the specified chanspec */
3550 parkband
= chspec_bandunit(chanspec
);
3552 /* order so that parkband initialize last */
3553 band_order
[0] = parkband
^ 1;
3554 band_order
[1] = parkband
;
3557 /* make each band operational, software state init */
3558 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
3559 uint j
= band_order
[i
];
3561 wlc
->band
= wlc
->bandstate
[j
];
3563 brcms_default_rateset(wlc
, &default_rateset
);
3565 /* fill in hw_rate */
3566 brcms_c_rateset_filter(&default_rateset
, &wlc
->band
->hw_rateset
,
3567 false, BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
3568 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
3570 /* init basic rate lookup */
3571 brcms_c_rate_lookup_init(wlc
, &default_rateset
);
3574 /* sync up phy/radio chanspec */
3575 brcms_c_set_phy_chanspec(wlc
, chanspec
);
3579 * Set or clear filtering related maccontrol bits based on
3580 * specified filter flags
3582 void brcms_c_mac_promisc(struct brcms_c_info
*wlc
, uint filter_flags
)
3584 u32 promisc_bits
= 0;
3586 wlc
->filter_flags
= filter_flags
;
3588 if (filter_flags
& (FIF_PROMISC_IN_BSS
| FIF_OTHER_BSS
))
3589 promisc_bits
|= MCTL_PROMISC
;
3591 if (filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
3592 promisc_bits
|= MCTL_BCNS_PROMISC
;
3594 if (filter_flags
& FIF_FCSFAIL
)
3595 promisc_bits
|= MCTL_KEEPBADFCS
;
3597 if (filter_flags
& (FIF_CONTROL
| FIF_PSPOLL
))
3598 promisc_bits
|= MCTL_KEEPCONTROL
;
3600 brcms_b_mctrl(wlc
->hw
,
3601 MCTL_PROMISC
| MCTL_BCNS_PROMISC
|
3602 MCTL_KEEPCONTROL
| MCTL_KEEPBADFCS
,
3607 * ucode, hwmac update
3608 * Channel dependent updates for ucode and hw
3610 static void brcms_c_ucode_mac_upd(struct brcms_c_info
*wlc
)
3612 /* enable or disable any active IBSSs depending on whether or not
3613 * we are on the home channel
3615 if (wlc
->home_chanspec
== wlc_phy_chanspec_get(wlc
->band
->pi
)) {
3616 if (wlc
->pub
->associated
) {
3618 * BMAC_NOTE: This is something that should be fixed
3619 * in ucode inits. I think that the ucode inits set
3620 * up the bcn templates and shm values with a bogus
3621 * beacon. This should not be done in the inits. If
3622 * ucode needs to set up a beacon for testing, the
3623 * test routines should write it down, not expect the
3624 * inits to populate a bogus beacon.
3626 if (BRCMS_PHY_11N_CAP(wlc
->band
))
3627 brcms_b_write_shm(wlc
->hw
,
3628 M_BCN_TXTSF_OFFSET
, 0);
3631 /* disable an active IBSS if we are not on the home channel */
3635 static void brcms_c_write_rate_shm(struct brcms_c_info
*wlc
, u8 rate
,
3639 u8 basic_phy_rate
, basic_index
;
3640 u16 dir_table
, basic_table
;
3643 /* Shared memory address for the table we are reading */
3644 dir_table
= is_ofdm_rate(basic_rate
) ? M_RT_DIRMAP_A
: M_RT_DIRMAP_B
;
3646 /* Shared memory address for the table we are writing */
3647 basic_table
= is_ofdm_rate(rate
) ? M_RT_BBRSMAP_A
: M_RT_BBRSMAP_B
;
3650 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3651 * the index into the rate table.
3653 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
3654 basic_phy_rate
= rate_info
[basic_rate
] & BRCMS_RATE_MASK
;
3655 index
= phy_rate
& 0xf;
3656 basic_index
= basic_phy_rate
& 0xf;
3658 /* Find the SHM pointer to the ACK rate entry by looking in the
3661 basic_ptr
= brcms_b_read_shm(wlc
->hw
, (dir_table
+ basic_index
* 2));
3663 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3664 * to the correct basic rate for the given incoming rate
3666 brcms_b_write_shm(wlc
->hw
, (basic_table
+ index
* 2), basic_ptr
);
3669 static const struct brcms_c_rateset
*
3670 brcms_c_rateset_get_hwrs(struct brcms_c_info
*wlc
)
3672 const struct brcms_c_rateset
*rs_dflt
;
3674 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
3675 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
3676 rs_dflt
= &ofdm_mimo_rates
;
3678 rs_dflt
= &cck_ofdm_mimo_rates
;
3679 } else if (wlc
->band
->gmode
)
3680 rs_dflt
= &cck_ofdm_rates
;
3682 rs_dflt
= &cck_rates
;
3687 static void brcms_c_set_ratetable(struct brcms_c_info
*wlc
)
3689 const struct brcms_c_rateset
*rs_dflt
;
3690 struct brcms_c_rateset rs
;
3691 u8 rate
, basic_rate
;
3694 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
3696 brcms_c_rateset_copy(rs_dflt
, &rs
);
3697 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
3699 /* walk the phy rate table and update SHM basic rate lookup table */
3700 for (i
= 0; i
< rs
.count
; i
++) {
3701 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
3703 /* for a given rate brcms_basic_rate returns the rate at
3704 * which a response ACK/CTS should be sent.
3706 basic_rate
= brcms_basic_rate(wlc
, rate
);
3707 if (basic_rate
== 0)
3708 /* This should only happen if we are using a
3709 * restricted rateset.
3711 basic_rate
= rs
.rates
[0] & BRCMS_RATE_MASK
;
3713 brcms_c_write_rate_shm(wlc
, rate
, basic_rate
);
3717 /* band-specific init */
3718 static void brcms_c_bsinit(struct brcms_c_info
*wlc
)
3720 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n",
3721 wlc
->pub
->unit
, wlc
->band
->bandunit
);
3723 /* write ucode ACK/CTS rate table */
3724 brcms_c_set_ratetable(wlc
);
3726 /* update some band specific mac configuration */
3727 brcms_c_ucode_mac_upd(wlc
);
3729 /* init antenna selection */
3730 brcms_c_antsel_init(wlc
->asi
);
3734 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3736 brcms_c_duty_cycle_set(struct brcms_c_info
*wlc
, int duty_cycle
, bool isOFDM
,
3739 int idle_busy_ratio_x_16
= 0;
3741 isOFDM
? M_TX_IDLE_BUSY_RATIO_X_16_OFDM
:
3742 M_TX_IDLE_BUSY_RATIO_X_16_CCK
;
3743 if (duty_cycle
> 100 || duty_cycle
< 0) {
3744 wiphy_err(wlc
->wiphy
, "wl%d: duty cycle value off limit\n",
3749 idle_busy_ratio_x_16
= (100 - duty_cycle
) * 16 / duty_cycle
;
3750 /* Only write to shared memory when wl is up */
3752 brcms_b_write_shm(wlc
->hw
, offset
, (u16
) idle_busy_ratio_x_16
);
3755 wlc
->tx_duty_cycle_ofdm
= (u16
) duty_cycle
;
3757 wlc
->tx_duty_cycle_cck
= (u16
) duty_cycle
;
3763 * Initialize the base precedence map for dequeueing
3764 * from txq based on WME settings
3766 static void brcms_c_tx_prec_map_init(struct brcms_c_info
*wlc
)
3768 wlc
->tx_prec_map
= BRCMS_PREC_BMP_ALL
;
3769 memset(wlc
->fifo2prec_map
, 0, NFIFO
* sizeof(u16
));
3771 wlc
->fifo2prec_map
[TX_AC_BK_FIFO
] = BRCMS_PREC_BMP_AC_BK
;
3772 wlc
->fifo2prec_map
[TX_AC_BE_FIFO
] = BRCMS_PREC_BMP_AC_BE
;
3773 wlc
->fifo2prec_map
[TX_AC_VI_FIFO
] = BRCMS_PREC_BMP_AC_VI
;
3774 wlc
->fifo2prec_map
[TX_AC_VO_FIFO
] = BRCMS_PREC_BMP_AC_VO
;
3778 brcms_c_txflowcontrol_signal(struct brcms_c_info
*wlc
,
3779 struct brcms_txq_info
*qi
, bool on
, int prio
)
3781 /* transmit flowcontrol is not yet implemented */
3784 static void brcms_c_txflowcontrol_reset(struct brcms_c_info
*wlc
)
3786 struct brcms_txq_info
*qi
;
3788 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
) {
3790 brcms_c_txflowcontrol_signal(wlc
, qi
, OFF
, ALLPRIO
);
3796 /* push sw hps and wake state through hardware */
3797 static void brcms_c_set_ps_ctrl(struct brcms_c_info
*wlc
)
3803 hps
= brcms_c_ps_allowed(wlc
);
3805 BCMMSG(wlc
->wiphy
, "wl%d: hps %d\n", wlc
->pub
->unit
, hps
);
3807 v1
= bcma_read32(wlc
->hw
->d11core
, D11REGOFFS(maccontrol
));
3812 brcms_b_mctrl(wlc
->hw
, MCTL_WAKE
| MCTL_HPS
, v2
);
3814 awake_before
= ((v1
& MCTL_WAKE
) || ((v1
& MCTL_HPS
) == 0));
3817 brcms_b_wait_for_wake(wlc
->hw
);
3821 * Write this BSS config's MAC address to core.
3822 * Updates RXE match engine.
3824 static int brcms_c_set_mac(struct brcms_bss_cfg
*bsscfg
)
3827 struct brcms_c_info
*wlc
= bsscfg
->wlc
;
3829 /* enter the MAC addr into the RXE match registers */
3830 brcms_c_set_addrmatch(wlc
, RCM_MAC_OFFSET
, bsscfg
->cur_etheraddr
);
3832 brcms_c_ampdu_macaddr_upd(wlc
);
3837 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3838 * Updates RXE match engine.
3840 static void brcms_c_set_bssid(struct brcms_bss_cfg
*bsscfg
)
3842 /* we need to update BSSID in RXE match registers */
3843 brcms_c_set_addrmatch(bsscfg
->wlc
, RCM_BSSID_OFFSET
, bsscfg
->BSSID
);
3846 static void brcms_b_set_shortslot(struct brcms_hardware
*wlc_hw
, bool shortslot
)
3848 wlc_hw
->shortslot
= shortslot
;
3850 if (wlc_hw
->band
->bandtype
== BRCM_BAND_2G
&& wlc_hw
->up
) {
3851 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
3852 brcms_b_update_slot_timing(wlc_hw
, shortslot
);
3853 brcms_c_enable_mac(wlc_hw
->wlc
);
3858 * Suspend the the MAC and update the slot timing
3859 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3861 static void brcms_c_switch_shortslot(struct brcms_c_info
*wlc
, bool shortslot
)
3863 /* use the override if it is set */
3864 if (wlc
->shortslot_override
!= BRCMS_SHORTSLOT_AUTO
)
3865 shortslot
= (wlc
->shortslot_override
== BRCMS_SHORTSLOT_ON
);
3867 if (wlc
->shortslot
== shortslot
)
3870 wlc
->shortslot
= shortslot
;
3872 brcms_b_set_shortslot(wlc
->hw
, shortslot
);
3875 static void brcms_c_set_home_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
3877 if (wlc
->home_chanspec
!= chanspec
) {
3878 wlc
->home_chanspec
= chanspec
;
3880 if (wlc
->bsscfg
->associated
)
3881 wlc
->bsscfg
->current_bss
->chanspec
= chanspec
;
3886 brcms_b_set_chanspec(struct brcms_hardware
*wlc_hw
, u16 chanspec
,
3887 bool mute_tx
, struct txpwr_limits
*txpwr
)
3891 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: 0x%x\n", wlc_hw
->unit
, chanspec
);
3893 wlc_hw
->chanspec
= chanspec
;
3895 /* Switch bands if necessary */
3896 if (wlc_hw
->_nbands
> 1) {
3897 bandunit
= chspec_bandunit(chanspec
);
3898 if (wlc_hw
->band
->bandunit
!= bandunit
) {
3899 /* brcms_b_setband disables other bandunit,
3900 * use light band switch if not up yet
3903 wlc_phy_chanspec_radio_set(wlc_hw
->
3904 bandstate
[bandunit
]->
3906 brcms_b_setband(wlc_hw
, bandunit
, chanspec
);
3908 brcms_c_setxband(wlc_hw
, bandunit
);
3913 wlc_phy_initcal_enable(wlc_hw
->band
->pi
, !mute_tx
);
3917 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
,
3919 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
3921 wlc_phy_chanspec_set(wlc_hw
->band
->pi
, chanspec
);
3922 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
, chanspec
);
3924 /* Update muting of the channel */
3925 brcms_b_mute(wlc_hw
, mute_tx
);
3929 /* switch to and initialize new band */
3930 static void brcms_c_setband(struct brcms_c_info
*wlc
,
3933 wlc
->band
= wlc
->bandstate
[bandunit
];
3938 /* wait for at least one beacon before entering sleeping state */
3939 brcms_c_set_ps_ctrl(wlc
);
3941 /* band-specific initializations */
3942 brcms_c_bsinit(wlc
);
3945 static void brcms_c_set_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
3948 bool switchband
= false;
3949 u16 old_chanspec
= wlc
->chanspec
;
3951 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chanspec
)) {
3952 wiphy_err(wlc
->wiphy
, "wl%d: %s: Bad channel %d\n",
3953 wlc
->pub
->unit
, __func__
, CHSPEC_CHANNEL(chanspec
));
3957 /* Switch bands if necessary */
3958 if (wlc
->pub
->_nbands
> 1) {
3959 bandunit
= chspec_bandunit(chanspec
);
3960 if (wlc
->band
->bandunit
!= bandunit
|| wlc
->bandinit_pending
) {
3962 if (wlc
->bandlocked
) {
3963 wiphy_err(wlc
->wiphy
, "wl%d: %s: chspec %d "
3964 "band is locked!\n",
3965 wlc
->pub
->unit
, __func__
,
3966 CHSPEC_CHANNEL(chanspec
));
3970 * should the setband call come after the
3971 * brcms_b_chanspec() ? if the setband updates
3972 * (brcms_c_bsinit) use low level calls to inspect and
3973 * set state, the state inspected may be from the wrong
3974 * band, or the following brcms_b_set_chanspec() may
3977 brcms_c_setband(wlc
, bandunit
);
3981 /* sync up phy/radio chanspec */
3982 brcms_c_set_phy_chanspec(wlc
, chanspec
);
3984 /* init antenna selection */
3985 if (brcms_chspec_bw(old_chanspec
) != brcms_chspec_bw(chanspec
)) {
3986 brcms_c_antsel_init(wlc
->asi
);
3988 /* Fix the hardware rateset based on bw.
3989 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3991 brcms_c_rateset_bw_mcs_filter(&wlc
->band
->hw_rateset
,
3992 wlc
->band
->mimo_cap_40
? brcms_chspec_bw(chanspec
) : 0);
3995 /* update some mac configuration since chanspec changed */
3996 brcms_c_ucode_mac_upd(wlc
);
4000 * This function changes the phytxctl for beacon based on current
4001 * beacon ratespec AND txant setting as per this table:
4002 * ratespec CCK ant = wlc->stf->txant
4005 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info
*wlc
,
4009 u16 phytxant
= wlc
->stf
->phytxant
;
4010 u16 mask
= PHY_TXC_ANT_MASK
;
4012 /* for non-siso rates or default setting, use the available chains */
4013 if (BRCMS_PHY_11N_CAP(wlc
->band
))
4014 phytxant
= brcms_c_stf_phytxchain_sel(wlc
, bcn_rspec
);
4016 phyctl
= brcms_b_read_shm(wlc
->hw
, M_BCN_PCTLWD
);
4017 phyctl
= (phyctl
& ~mask
) | phytxant
;
4018 brcms_b_write_shm(wlc
->hw
, M_BCN_PCTLWD
, phyctl
);
4022 * centralized protection config change function to simplify debugging, no
4023 * consistency checking this should be called only on changes to avoid overhead
4024 * in periodic function
4026 void brcms_c_protection_upd(struct brcms_c_info
*wlc
, uint idx
, int val
)
4028 BCMMSG(wlc
->wiphy
, "idx %d, val %d\n", idx
, val
);
4031 case BRCMS_PROT_G_SPEC
:
4032 wlc
->protection
->_g
= (bool) val
;
4034 case BRCMS_PROT_G_OVR
:
4035 wlc
->protection
->g_override
= (s8
) val
;
4037 case BRCMS_PROT_G_USER
:
4038 wlc
->protection
->gmode_user
= (u8
) val
;
4040 case BRCMS_PROT_OVERLAP
:
4041 wlc
->protection
->overlap
= (s8
) val
;
4043 case BRCMS_PROT_N_USER
:
4044 wlc
->protection
->nmode_user
= (s8
) val
;
4046 case BRCMS_PROT_N_CFG
:
4047 wlc
->protection
->n_cfg
= (s8
) val
;
4049 case BRCMS_PROT_N_CFG_OVR
:
4050 wlc
->protection
->n_cfg_override
= (s8
) val
;
4052 case BRCMS_PROT_N_NONGF
:
4053 wlc
->protection
->nongf
= (bool) val
;
4055 case BRCMS_PROT_N_NONGF_OVR
:
4056 wlc
->protection
->nongf_override
= (s8
) val
;
4058 case BRCMS_PROT_N_PAM_OVR
:
4059 wlc
->protection
->n_pam_override
= (s8
) val
;
4061 case BRCMS_PROT_N_OBSS
:
4062 wlc
->protection
->n_obss
= (bool) val
;
4071 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info
*wlc
, int val
)
4074 brcms_c_update_beacon(wlc
);
4075 brcms_c_update_probe_resp(wlc
, true);
4079 static void brcms_c_ht_update_ldpc(struct brcms_c_info
*wlc
, s8 val
)
4081 wlc
->stf
->ldpc
= val
;
4084 brcms_c_update_beacon(wlc
);
4085 brcms_c_update_probe_resp(wlc
, true);
4086 wlc_phy_ldpc_override_set(wlc
->band
->pi
, (val
? true : false));
4090 void brcms_c_wme_setparams(struct brcms_c_info
*wlc
, u16 aci
,
4091 const struct ieee80211_tx_queue_params
*params
,
4095 struct shm_acparams acp_shm
;
4098 /* Only apply params if the core is out of reset and has clocks */
4100 wiphy_err(wlc
->wiphy
, "wl%d: %s : no-clock\n", wlc
->pub
->unit
,
4105 memset((char *)&acp_shm
, 0, sizeof(struct shm_acparams
));
4106 /* fill in shm ac params struct */
4107 acp_shm
.txop
= params
->txop
;
4108 /* convert from units of 32us to us for ucode */
4109 wlc
->edcf_txop
[aci
& 0x3] = acp_shm
.txop
=
4110 EDCF_TXOP2USEC(acp_shm
.txop
);
4111 acp_shm
.aifs
= (params
->aifs
& EDCF_AIFSN_MASK
);
4113 if (aci
== IEEE80211_AC_VI
&& acp_shm
.txop
== 0
4114 && acp_shm
.aifs
< EDCF_AIFSN_MAX
)
4117 if (acp_shm
.aifs
< EDCF_AIFSN_MIN
4118 || acp_shm
.aifs
> EDCF_AIFSN_MAX
) {
4119 wiphy_err(wlc
->wiphy
, "wl%d: edcf_setparams: bad "
4120 "aifs %d\n", wlc
->pub
->unit
, acp_shm
.aifs
);
4122 acp_shm
.cwmin
= params
->cw_min
;
4123 acp_shm
.cwmax
= params
->cw_max
;
4124 acp_shm
.cwcur
= acp_shm
.cwmin
;
4126 bcma_read16(wlc
->hw
->d11core
, D11REGOFFS(tsf_random
)) &
4128 acp_shm
.reggap
= acp_shm
.bslots
+ acp_shm
.aifs
;
4129 /* Indicate the new params to the ucode */
4130 acp_shm
.status
= brcms_b_read_shm(wlc
->hw
, (M_EDCF_QINFO
+
4133 M_EDCF_STATUS_OFF
));
4134 acp_shm
.status
|= WME_STATUS_NEWAC
;
4136 /* Fill in shm acparam table */
4137 shm_entry
= (u16
*) &acp_shm
;
4138 for (i
= 0; i
< (int)sizeof(struct shm_acparams
); i
+= 2)
4139 brcms_b_write_shm(wlc
->hw
,
4141 wme_ac2fifo
[aci
] * M_EDCF_QLEN
+ i
,
4146 brcms_c_suspend_mac_and_wait(wlc
);
4147 brcms_c_enable_mac(wlc
);
4151 static void brcms_c_edcf_setparams(struct brcms_c_info
*wlc
, bool suspend
)
4155 struct ieee80211_tx_queue_params txq_pars
;
4156 static const struct edcf_acparam default_edcf_acparams
[] = {
4157 {EDCF_AC_BE_ACI_STA
, EDCF_AC_BE_ECW_STA
, EDCF_AC_BE_TXOP_STA
},
4158 {EDCF_AC_BK_ACI_STA
, EDCF_AC_BK_ECW_STA
, EDCF_AC_BK_TXOP_STA
},
4159 {EDCF_AC_VI_ACI_STA
, EDCF_AC_VI_ECW_STA
, EDCF_AC_VI_TXOP_STA
},
4160 {EDCF_AC_VO_ACI_STA
, EDCF_AC_VO_ECW_STA
, EDCF_AC_VO_TXOP_STA
}
4161 }; /* ucode needs these parameters during its initialization */
4162 const struct edcf_acparam
*edcf_acp
= &default_edcf_acparams
[0];
4164 for (i_ac
= 0; i_ac
< IEEE80211_NUM_ACS
; i_ac
++, edcf_acp
++) {
4165 /* find out which ac this set of params applies to */
4166 aci
= (edcf_acp
->ACI
& EDCF_ACI_MASK
) >> EDCF_ACI_SHIFT
;
4168 /* fill in shm ac params struct */
4169 txq_pars
.txop
= edcf_acp
->TXOP
;
4170 txq_pars
.aifs
= edcf_acp
->ACI
;
4172 /* CWmin = 2^(ECWmin) - 1 */
4173 txq_pars
.cw_min
= EDCF_ECW2CW(edcf_acp
->ECW
& EDCF_ECWMIN_MASK
);
4174 /* CWmax = 2^(ECWmax) - 1 */
4175 txq_pars
.cw_max
= EDCF_ECW2CW((edcf_acp
->ECW
& EDCF_ECWMAX_MASK
)
4176 >> EDCF_ECWMAX_SHIFT
);
4177 brcms_c_wme_setparams(wlc
, aci
, &txq_pars
, suspend
);
4181 brcms_c_suspend_mac_and_wait(wlc
);
4182 brcms_c_enable_mac(wlc
);
4186 static void brcms_c_radio_monitor_start(struct brcms_c_info
*wlc
)
4188 /* Don't start the timer if HWRADIO feature is disabled */
4189 if (wlc
->radio_monitor
)
4192 wlc
->radio_monitor
= true;
4193 brcms_b_pllreq(wlc
->hw
, true, BRCMS_PLLREQ_RADIO_MON
);
4194 brcms_add_timer(wlc
->radio_timer
, TIMER_INTERVAL_RADIOCHK
, true);
4197 static bool brcms_c_radio_monitor_stop(struct brcms_c_info
*wlc
)
4199 if (!wlc
->radio_monitor
)
4202 wlc
->radio_monitor
= false;
4203 brcms_b_pllreq(wlc
->hw
, false, BRCMS_PLLREQ_RADIO_MON
);
4204 return brcms_del_timer(wlc
->radio_timer
);
4207 /* read hwdisable state and propagate to wlc flag */
4208 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info
*wlc
)
4210 if (wlc
->pub
->hw_off
)
4213 if (brcms_b_radio_read_hwdisabled(wlc
->hw
))
4214 mboolset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4216 mboolclr(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4219 /* update hwradio status and return it */
4220 bool brcms_c_check_radio_disabled(struct brcms_c_info
*wlc
)
4222 brcms_c_radio_hwdisable_upd(wlc
);
4224 return mboolisset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
) ?
4228 /* periodical query hw radio button while driver is "down" */
4229 static void brcms_c_radio_timer(void *arg
)
4231 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4233 if (brcms_deviceremoved(wlc
)) {
4234 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4236 brcms_down(wlc
->wl
);
4240 brcms_c_radio_hwdisable_upd(wlc
);
4243 /* common low-level watchdog code */
4244 static void brcms_b_watchdog(void *arg
)
4246 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4247 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
4249 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
4254 /* increment second count */
4257 /* Check for FIFO error interrupts */
4258 brcms_b_fifoerrors(wlc_hw
);
4260 /* make sure RX dma has buffers */
4261 dma_rxfill(wlc
->hw
->di
[RX_FIFO
]);
4263 wlc_phy_watchdog(wlc_hw
->band
->pi
);
4266 /* common watchdog code */
4267 static void brcms_c_watchdog(void *arg
)
4269 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4271 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
4276 if (brcms_deviceremoved(wlc
)) {
4277 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4279 brcms_down(wlc
->wl
);
4283 /* increment second count */
4286 brcms_c_radio_hwdisable_upd(wlc
);
4287 /* if radio is disable, driver may be down, quit here */
4288 if (wlc
->pub
->radio_disabled
)
4291 brcms_b_watchdog(wlc
);
4294 * occasionally sample mac stat counters to
4295 * detect 16-bit counter wrap
4297 if ((wlc
->pub
->now
% SW_TIMER_MAC_STAT_UPD
) == 0)
4298 brcms_c_statsupd(wlc
);
4300 if (BRCMS_ISNPHY(wlc
->band
) &&
4301 ((wlc
->pub
->now
- wlc
->tempsense_lasttime
) >=
4302 BRCMS_TEMPSENSE_PERIOD
)) {
4303 wlc
->tempsense_lasttime
= wlc
->pub
->now
;
4304 brcms_c_tempsense_upd(wlc
);
4308 static void brcms_c_watchdog_by_timer(void *arg
)
4310 brcms_c_watchdog(arg
);
4313 static bool brcms_c_timers_init(struct brcms_c_info
*wlc
, int unit
)
4315 wlc
->wdtimer
= brcms_init_timer(wlc
->wl
, brcms_c_watchdog_by_timer
,
4317 if (!wlc
->wdtimer
) {
4318 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for wdtimer "
4323 wlc
->radio_timer
= brcms_init_timer(wlc
->wl
, brcms_c_radio_timer
,
4325 if (!wlc
->radio_timer
) {
4326 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for radio_timer "
4338 * Initialize brcms_c_info default values ...
4339 * may get overrides later in this function
4341 static void brcms_c_info_init(struct brcms_c_info
*wlc
, int unit
)
4345 /* Save our copy of the chanspec */
4346 wlc
->chanspec
= ch20mhz_chspec(1);
4348 /* various 802.11g modes */
4349 wlc
->shortslot
= false;
4350 wlc
->shortslot_override
= BRCMS_SHORTSLOT_AUTO
;
4352 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_OVR
, BRCMS_PROTECTION_AUTO
);
4353 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_SPEC
, false);
4355 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG_OVR
,
4356 BRCMS_PROTECTION_AUTO
);
4357 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG
, BRCMS_N_PROTECTION_OFF
);
4358 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF_OVR
,
4359 BRCMS_PROTECTION_AUTO
);
4360 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF
, false);
4361 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
, AUTO
);
4363 brcms_c_protection_upd(wlc
, BRCMS_PROT_OVERLAP
,
4364 BRCMS_PROTECTION_CTL_OVERLAP
);
4366 /* 802.11g draft 4.0 NonERP elt advertisement */
4367 wlc
->include_legacy_erp
= true;
4369 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_DEF
;
4370 wlc
->stf
->txant
= ANT_TX_DEF
;
4372 wlc
->prb_resp_timeout
= BRCMS_PRB_RESP_TIMEOUT
;
4374 wlc
->usr_fragthresh
= DOT11_DEFAULT_FRAG_LEN
;
4375 for (i
= 0; i
< NFIFO
; i
++)
4376 wlc
->fragthresh
[i
] = DOT11_DEFAULT_FRAG_LEN
;
4377 wlc
->RTSThresh
= DOT11_DEFAULT_RTS_LEN
;
4379 /* default rate fallback retry limits */
4380 wlc
->SFBL
= RETRY_SHORT_FB
;
4381 wlc
->LFBL
= RETRY_LONG_FB
;
4383 /* default mac retry limits */
4384 wlc
->SRL
= RETRY_SHORT_DEF
;
4385 wlc
->LRL
= RETRY_LONG_DEF
;
4387 /* WME QoS mode is Auto by default */
4388 wlc
->pub
->_ampdu
= AMPDU_AGG_HOST
;
4389 wlc
->pub
->bcmerror
= 0;
4392 static uint
brcms_c_attach_module(struct brcms_c_info
*wlc
)
4396 unit
= wlc
->pub
->unit
;
4398 wlc
->asi
= brcms_c_antsel_attach(wlc
);
4399 if (wlc
->asi
== NULL
) {
4400 wiphy_err(wlc
->wiphy
, "wl%d: attach: antsel_attach "
4406 wlc
->ampdu
= brcms_c_ampdu_attach(wlc
);
4407 if (wlc
->ampdu
== NULL
) {
4408 wiphy_err(wlc
->wiphy
, "wl%d: attach: ampdu_attach "
4414 if ((brcms_c_stf_attach(wlc
) != 0)) {
4415 wiphy_err(wlc
->wiphy
, "wl%d: attach: stf_attach "
4424 struct brcms_pub
*brcms_c_pub(struct brcms_c_info
*wlc
)
4430 * run backplane attach, init nvram
4432 * initialize software state for each core and band
4433 * put the whole chip in reset(driver down state), no clock
4435 static int brcms_b_attach(struct brcms_c_info
*wlc
, struct bcma_device
*core
,
4436 uint unit
, bool piomode
)
4438 struct brcms_hardware
*wlc_hw
;
4439 char *macaddr
= NULL
;
4443 struct shared_phy_params sha_params
;
4444 struct wiphy
*wiphy
= wlc
->wiphy
;
4445 struct pci_dev
*pcidev
= core
->bus
->host_pci
;
4447 BCMMSG(wlc
->wiphy
, "wl%d: vendor 0x%x device 0x%x\n", unit
,
4455 wlc_hw
->unit
= unit
;
4456 wlc_hw
->band
= wlc_hw
->bandstate
[0];
4457 wlc_hw
->_piomode
= piomode
;
4459 /* populate struct brcms_hardware with default values */
4460 brcms_b_info_init(wlc_hw
);
4463 * Do the hardware portion of the attach. Also initialize software
4464 * state that depends on the particular hardware we are running.
4466 wlc_hw
->sih
= ai_attach(core
->bus
);
4467 if (wlc_hw
->sih
== NULL
) {
4468 wiphy_err(wiphy
, "wl%d: brcms_b_attach: si_attach failed\n",
4474 /* verify again the device is supported */
4475 if (!brcms_c_chipmatch(pcidev
->vendor
, pcidev
->device
)) {
4476 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported "
4477 "vendor/device (0x%x/0x%x)\n",
4478 unit
, pcidev
->vendor
, pcidev
->device
);
4483 wlc_hw
->vendorid
= pcidev
->vendor
;
4484 wlc_hw
->deviceid
= pcidev
->device
;
4486 wlc_hw
->d11core
= core
;
4487 wlc_hw
->corerev
= core
->id
.rev
;
4489 /* validate chip, chiprev and corerev */
4490 if (!brcms_c_isgoodchip(wlc_hw
)) {
4495 /* initialize power control registers */
4496 ai_clkctl_init(wlc_hw
->sih
);
4498 /* request fastclock and force fastclock for the rest of attach
4499 * bring the d11 core out of reset.
4500 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4501 * is still false; But it will be called again inside wlc_corereset,
4502 * after d11 is out of reset.
4504 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
4505 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
4507 if (!brcms_b_validate_chip_access(wlc_hw
)) {
4508 wiphy_err(wiphy
, "wl%d: brcms_b_attach: validate_chip_access "
4514 /* get the board rev, used just below */
4515 j
= getintvar(wlc_hw
->sih
, BRCMS_SROM_BOARDREV
);
4516 /* promote srom boardrev of 0xFF to 1 */
4517 if (j
== BOARDREV_PROMOTABLE
)
4518 j
= BOARDREV_PROMOTED
;
4519 wlc_hw
->boardrev
= (u16
) j
;
4520 if (!brcms_c_validboardtype(wlc_hw
)) {
4521 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported Broadcom "
4522 "board type (0x%x)" " or revision level (0x%x)\n",
4523 unit
, ai_get_boardtype(wlc_hw
->sih
),
4528 wlc_hw
->sromrev
= (u8
) getintvar(wlc_hw
->sih
, BRCMS_SROM_REV
);
4529 wlc_hw
->boardflags
= (u32
) getintvar(wlc_hw
->sih
,
4530 BRCMS_SROM_BOARDFLAGS
);
4531 wlc_hw
->boardflags2
= (u32
) getintvar(wlc_hw
->sih
,
4532 BRCMS_SROM_BOARDFLAGS2
);
4534 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
4535 brcms_b_pllreq(wlc_hw
, true, BRCMS_PLLREQ_SHARED
);
4537 /* check device id(srom, nvram etc.) to set bands */
4538 if (wlc_hw
->deviceid
== BCM43224_D11N_ID
||
4539 wlc_hw
->deviceid
== BCM43224_D11N_ID_VEN1
)
4540 /* Dualband boards */
4541 wlc_hw
->_nbands
= 2;
4543 wlc_hw
->_nbands
= 1;
4545 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM43225_CHIP_ID
))
4546 wlc_hw
->_nbands
= 1;
4548 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4549 * unconditionally does the init of these values
4551 wlc
->vendorid
= wlc_hw
->vendorid
;
4552 wlc
->deviceid
= wlc_hw
->deviceid
;
4553 wlc
->pub
->sih
= wlc_hw
->sih
;
4554 wlc
->pub
->corerev
= wlc_hw
->corerev
;
4555 wlc
->pub
->sromrev
= wlc_hw
->sromrev
;
4556 wlc
->pub
->boardrev
= wlc_hw
->boardrev
;
4557 wlc
->pub
->boardflags
= wlc_hw
->boardflags
;
4558 wlc
->pub
->boardflags2
= wlc_hw
->boardflags2
;
4559 wlc
->pub
->_nbands
= wlc_hw
->_nbands
;
4561 wlc_hw
->physhim
= wlc_phy_shim_attach(wlc_hw
, wlc
->wl
, wlc
);
4563 if (wlc_hw
->physhim
== NULL
) {
4564 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4570 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4571 sha_params
.sih
= wlc_hw
->sih
;
4572 sha_params
.physhim
= wlc_hw
->physhim
;
4573 sha_params
.unit
= unit
;
4574 sha_params
.corerev
= wlc_hw
->corerev
;
4575 sha_params
.vid
= wlc_hw
->vendorid
;
4576 sha_params
.did
= wlc_hw
->deviceid
;
4577 sha_params
.chip
= ai_get_chip_id(wlc_hw
->sih
);
4578 sha_params
.chiprev
= ai_get_chiprev(wlc_hw
->sih
);
4579 sha_params
.chippkg
= ai_get_chippkg(wlc_hw
->sih
);
4580 sha_params
.sromrev
= wlc_hw
->sromrev
;
4581 sha_params
.boardtype
= ai_get_boardtype(wlc_hw
->sih
);
4582 sha_params
.boardrev
= wlc_hw
->boardrev
;
4583 sha_params
.boardflags
= wlc_hw
->boardflags
;
4584 sha_params
.boardflags2
= wlc_hw
->boardflags2
;
4586 /* alloc and save pointer to shared phy state area */
4587 wlc_hw
->phy_sh
= wlc_phy_shared_attach(&sha_params
);
4588 if (!wlc_hw
->phy_sh
) {
4593 /* initialize software state for each core and band */
4594 for (j
= 0; j
< wlc_hw
->_nbands
; j
++) {
4596 * band0 is always 2.4Ghz
4597 * band1, if present, is 5Ghz
4600 brcms_c_setxband(wlc_hw
, j
);
4602 wlc_hw
->band
->bandunit
= j
;
4603 wlc_hw
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4604 wlc
->band
->bandunit
= j
;
4605 wlc
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4606 wlc
->core
->coreidx
= core
->core_index
;
4608 wlc_hw
->machwcap
= bcma_read32(core
, D11REGOFFS(machwcap
));
4609 wlc_hw
->machwcap_backup
= wlc_hw
->machwcap
;
4611 /* init tx fifo size */
4612 wlc_hw
->xmtfifo_sz
=
4613 xmtfifo_sz
[(wlc_hw
->corerev
- XMTFIFOTBL_STARTREV
)];
4615 /* Get a phy for this band */
4617 wlc_phy_attach(wlc_hw
->phy_sh
, core
,
4618 wlc_hw
->band
->bandtype
,
4620 if (wlc_hw
->band
->pi
== NULL
) {
4621 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_"
4622 "attach failed\n", unit
);
4627 wlc_phy_machwcap_set(wlc_hw
->band
->pi
, wlc_hw
->machwcap
);
4629 wlc_phy_get_phyversion(wlc_hw
->band
->pi
, &wlc_hw
->band
->phytype
,
4630 &wlc_hw
->band
->phyrev
,
4631 &wlc_hw
->band
->radioid
,
4632 &wlc_hw
->band
->radiorev
);
4633 wlc_hw
->band
->abgphy_encore
=
4634 wlc_phy_get_encore(wlc_hw
->band
->pi
);
4635 wlc
->band
->abgphy_encore
= wlc_phy_get_encore(wlc_hw
->band
->pi
);
4636 wlc_hw
->band
->core_flags
=
4637 wlc_phy_get_coreflags(wlc_hw
->band
->pi
);
4639 /* verify good phy_type & supported phy revision */
4640 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
4641 if (NCONF_HAS(wlc_hw
->band
->phyrev
))
4645 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
4646 if (LCNCONF_HAS(wlc_hw
->band
->phyrev
))
4652 wiphy_err(wiphy
, "wl%d: brcms_b_attach: unsupported "
4653 "phy type/rev (%d/%d)\n", unit
,
4654 wlc_hw
->band
->phytype
, wlc_hw
->band
->phyrev
);
4661 * BMAC_NOTE: wlc->band->pi should not be set below and should
4662 * be done in the high level attach. However we can not make
4663 * that change until all low level access is changed to
4664 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4665 * keeping wlc_hw->band->pi as well for incremental update of
4666 * low level fns, and cut over low only init when all fns
4669 wlc
->band
->pi
= wlc_hw
->band
->pi
;
4670 wlc
->band
->phytype
= wlc_hw
->band
->phytype
;
4671 wlc
->band
->phyrev
= wlc_hw
->band
->phyrev
;
4672 wlc
->band
->radioid
= wlc_hw
->band
->radioid
;
4673 wlc
->band
->radiorev
= wlc_hw
->band
->radiorev
;
4675 /* default contention windows size limits */
4676 wlc_hw
->band
->CWmin
= APHY_CWMIN
;
4677 wlc_hw
->band
->CWmax
= PHY_CWMAX
;
4679 if (!brcms_b_attach_dmapio(wlc
, j
, wme
)) {
4685 /* disable core to match driver "down" state */
4686 brcms_c_coredisable(wlc_hw
);
4688 /* Match driver "down" state */
4689 ai_pci_down(wlc_hw
->sih
);
4691 /* turn off pll and xtal to match driver "down" state */
4692 brcms_b_xtal(wlc_hw
, OFF
);
4694 /* *******************************************************************
4695 * The hardware is in the DOWN state at this point. D11 core
4696 * or cores are in reset with clocks off, and the board PLLs
4697 * are off if possible.
4699 * Beyond this point, wlc->sbclk == false and chip registers
4700 * should not be touched.
4701 *********************************************************************
4704 /* init etheraddr state variables */
4705 macaddr
= brcms_c_get_macaddr(wlc_hw
);
4706 if (macaddr
== NULL
) {
4707 wiphy_err(wiphy
, "wl%d: brcms_b_attach: macaddr not found\n",
4712 if (!mac_pton(macaddr
, wlc_hw
->etheraddr
) ||
4713 is_broadcast_ether_addr(wlc_hw
->etheraddr
) ||
4714 is_zero_ether_addr(wlc_hw
->etheraddr
)) {
4715 wiphy_err(wiphy
, "wl%d: brcms_b_attach: bad macaddr %s\n",
4721 BCMMSG(wlc
->wiphy
, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4722 wlc_hw
->deviceid
, wlc_hw
->_nbands
, ai_get_boardtype(wlc_hw
->sih
),
4728 wiphy_err(wiphy
, "wl%d: brcms_b_attach: failed with err %d\n", unit
,
4733 static void brcms_c_attach_antgain_init(struct brcms_c_info
*wlc
)
4736 unit
= wlc
->pub
->unit
;
4738 if ((wlc
->band
->antgain
== -1) && (wlc
->pub
->sromrev
== 1)) {
4739 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4740 wlc
->band
->antgain
= 8;
4741 } else if (wlc
->band
->antgain
== -1) {
4742 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
4743 " srom, using 2dB\n", unit
, __func__
);
4744 wlc
->band
->antgain
= 8;
4747 /* Older sroms specified gain in whole dbm only. In order
4748 * be able to specify qdbm granularity and remain backward
4749 * compatible the whole dbms are now encoded in only
4750 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4751 * 6 bit signed number ranges from -32 - 31.
4755 * 0xc1 = 1.75 db (1 + 3 quarters),
4756 * 0x3f = -1 (-1 + 0 quarters),
4757 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4758 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4760 gain
= wlc
->band
->antgain
& 0x3f;
4761 gain
<<= 2; /* Sign extend */
4763 fract
= (wlc
->band
->antgain
& 0xc0) >> 6;
4764 wlc
->band
->antgain
= 4 * gain
+ fract
;
4768 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info
*wlc
)
4773 struct si_pub
*sih
= wlc
->hw
->sih
;
4775 unit
= wlc
->pub
->unit
;
4776 bandtype
= wlc
->band
->bandtype
;
4778 /* get antennas available */
4779 if (bandtype
== BRCM_BAND_5G
)
4780 aa
= (s8
) getintvar(sih
, BRCMS_SROM_AA5G
);
4782 aa
= (s8
) getintvar(sih
, BRCMS_SROM_AA2G
);
4784 if ((aa
< 1) || (aa
> 15)) {
4785 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
4786 " srom (0x%x), using 3\n", unit
, __func__
, aa
);
4790 /* reset the defaults if we have a single antenna */
4792 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_0
;
4793 wlc
->stf
->txant
= ANT_TX_FORCE_0
;
4794 } else if (aa
== 2) {
4795 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_1
;
4796 wlc
->stf
->txant
= ANT_TX_FORCE_1
;
4800 /* Compute Antenna Gain */
4801 if (bandtype
== BRCM_BAND_5G
)
4802 wlc
->band
->antgain
= (s8
) getintvar(sih
, BRCMS_SROM_AG1
);
4804 wlc
->band
->antgain
= (s8
) getintvar(sih
, BRCMS_SROM_AG0
);
4806 brcms_c_attach_antgain_init(wlc
);
4811 static void brcms_c_bss_default_init(struct brcms_c_info
*wlc
)
4814 struct brcms_band
*band
;
4815 struct brcms_bss_info
*bi
= wlc
->default_bss
;
4817 /* init default and target BSS with some sane initial values */
4818 memset((char *)(bi
), 0, sizeof(struct brcms_bss_info
));
4819 bi
->beacon_period
= BEACON_INTERVAL_DEFAULT
;
4821 /* fill the default channel as the first valid channel
4822 * starting from the 2G channels
4824 chanspec
= ch20mhz_chspec(1);
4825 wlc
->home_chanspec
= bi
->chanspec
= chanspec
;
4827 /* find the band of our default channel */
4829 if (wlc
->pub
->_nbands
> 1 &&
4830 band
->bandunit
!= chspec_bandunit(chanspec
))
4831 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
4833 /* init bss rates to the band specific default rate set */
4834 brcms_c_rateset_default(&bi
->rateset
, NULL
, band
->phytype
,
4835 band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
4836 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
4837 brcms_chspec_bw(chanspec
), wlc
->stf
->txstreams
);
4839 if (wlc
->pub
->_n_enab
& SUPPORT_11N
)
4840 bi
->flags
|= BRCMS_BSS_HT
;
4843 static struct brcms_txq_info
*brcms_c_txq_alloc(struct brcms_c_info
*wlc
)
4845 struct brcms_txq_info
*qi
, *p
;
4847 qi
= kzalloc(sizeof(struct brcms_txq_info
), GFP_ATOMIC
);
4850 * Have enough room for control packets along with HI watermark
4851 * Also, add room to txq for total psq packets if all the SCBs
4852 * leave PS mode. The watermark for flowcontrol to OS packets
4853 * will remain the same
4855 brcmu_pktq_init(&qi
->q
, BRCMS_PREC_COUNT
,
4856 2 * BRCMS_DATAHIWAT
+ PKTQ_LEN_DEFAULT
);
4858 /* add this queue to the the global list */
4861 wlc
->tx_queues
= qi
;
4863 while (p
->next
!= NULL
)
4871 static void brcms_c_txq_free(struct brcms_c_info
*wlc
,
4872 struct brcms_txq_info
*qi
)
4874 struct brcms_txq_info
*p
;
4879 /* remove the queue from the linked list */
4882 wlc
->tx_queues
= p
->next
;
4884 while (p
!= NULL
&& p
->next
!= qi
)
4887 p
->next
= p
->next
->next
;
4893 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info
*wlc
, u8 bwcap
)
4896 struct brcms_band
*band
;
4898 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
4899 band
= wlc
->bandstate
[i
];
4900 if (band
->bandtype
== BRCM_BAND_5G
) {
4901 if ((bwcap
== BRCMS_N_BW_40ALL
)
4902 || (bwcap
== BRCMS_N_BW_20IN2G_40IN5G
))
4903 band
->mimo_cap_40
= true;
4905 band
->mimo_cap_40
= false;
4907 if (bwcap
== BRCMS_N_BW_40ALL
)
4908 band
->mimo_cap_40
= true;
4910 band
->mimo_cap_40
= false;
4915 static void brcms_c_timers_deinit(struct brcms_c_info
*wlc
)
4917 /* free timer state */
4919 brcms_free_timer(wlc
->wdtimer
);
4920 wlc
->wdtimer
= NULL
;
4922 if (wlc
->radio_timer
) {
4923 brcms_free_timer(wlc
->radio_timer
);
4924 wlc
->radio_timer
= NULL
;
4928 static void brcms_c_detach_module(struct brcms_c_info
*wlc
)
4931 brcms_c_antsel_detach(wlc
->asi
);
4936 brcms_c_ampdu_detach(wlc
->ampdu
);
4940 brcms_c_stf_detach(wlc
);
4946 static int brcms_b_detach(struct brcms_c_info
*wlc
)
4949 struct brcms_hw_band
*band
;
4950 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
4957 * detach interrupt sync mechanism since interrupt is disabled
4958 * and per-port interrupt object may has been freed. this must
4959 * be done before sb core switch
4961 ai_pci_sleep(wlc_hw
->sih
);
4964 brcms_b_detach_dmapio(wlc_hw
);
4966 band
= wlc_hw
->band
;
4967 for (i
= 0; i
< wlc_hw
->_nbands
; i
++) {
4969 /* Detach this band's phy */
4970 wlc_phy_detach(band
->pi
);
4973 band
= wlc_hw
->bandstate
[OTHERBANDUNIT(wlc
)];
4976 /* Free shared phy state */
4977 kfree(wlc_hw
->phy_sh
);
4979 wlc_phy_shim_detach(wlc_hw
->physhim
);
4982 ai_detach(wlc_hw
->sih
);
4991 * Return a count of the number of driver callbacks still pending.
4993 * General policy is that brcms_c_detach can only dealloc/free software states.
4994 * It can NOT touch hardware registers since the d11core may be in reset and
4995 * clock may not be available.
4996 * One exception is sb register access, which is possible if crystal is turned
4997 * on after "down" state, driver should avoid software timer with the exception
5000 uint
brcms_c_detach(struct brcms_c_info
*wlc
)
5007 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5009 callbacks
+= brcms_b_detach(wlc
);
5011 /* delete software timers */
5012 if (!brcms_c_radio_monitor_stop(wlc
))
5015 brcms_c_channel_mgr_detach(wlc
->cmi
);
5017 brcms_c_timers_deinit(wlc
);
5019 brcms_c_detach_module(wlc
);
5022 while (wlc
->tx_queues
!= NULL
)
5023 brcms_c_txq_free(wlc
, wlc
->tx_queues
);
5025 brcms_c_detach_mfree(wlc
);
5029 /* update state that depends on the current value of "ap" */
5030 static void brcms_c_ap_upd(struct brcms_c_info
*wlc
)
5032 /* STA-BSS; short capable */
5033 wlc
->PLCPHdr_override
= BRCMS_PLCP_SHORT
;
5036 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5037 static void brcms_b_hw_up(struct brcms_hardware
*wlc_hw
)
5039 if (wlc_hw
->wlc
->pub
->hw_up
)
5042 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5045 * Enable pll and xtal, initialize the power control registers,
5046 * and force fastclock for the remainder of brcms_c_up().
5048 brcms_b_xtal(wlc_hw
, ON
);
5049 ai_clkctl_init(wlc_hw
->sih
);
5050 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5052 ai_pci_fixcfg(wlc_hw
->sih
);
5055 * TODO: test suspend/resume
5057 * AI chip doesn't restore bar0win2 on
5058 * hibernation/resume, need sw fixup
5062 * Inform phy that a POR reset has occurred so
5063 * it does a complete phy init
5065 wlc_phy_por_inform(wlc_hw
->band
->pi
);
5067 wlc_hw
->ucode_loaded
= false;
5068 wlc_hw
->wlc
->pub
->hw_up
= true;
5070 if ((wlc_hw
->boardflags
& BFL_FEM
)
5071 && (ai_get_chip_id(wlc_hw
->sih
) == BCM4313_CHIP_ID
)) {
5073 (wlc_hw
->boardrev
>= 0x1250
5074 && (wlc_hw
->boardflags
& BFL_FEM_BT
)))
5075 ai_epa_4313war(wlc_hw
->sih
);
5079 static int brcms_b_up_prep(struct brcms_hardware
*wlc_hw
)
5083 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5086 * Enable pll and xtal, initialize the power control registers,
5087 * and force fastclock for the remainder of brcms_c_up().
5089 brcms_b_xtal(wlc_hw
, ON
);
5090 ai_clkctl_init(wlc_hw
->sih
);
5091 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5094 * Configure pci/pcmcia here instead of in brcms_c_attach()
5095 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5097 coremask
= (1 << wlc_hw
->wlc
->core
->coreidx
);
5099 ai_pci_setup(wlc_hw
->sih
, coremask
);
5102 * Need to read the hwradio status here to cover the case where the
5103 * system is loaded with the hw radio disabled. We do not want to
5104 * bring the driver up in this case.
5106 if (brcms_b_radio_read_hwdisabled(wlc_hw
)) {
5107 /* put SB PCI in down state again */
5108 ai_pci_down(wlc_hw
->sih
);
5109 brcms_b_xtal(wlc_hw
, OFF
);
5113 ai_pci_up(wlc_hw
->sih
);
5115 /* reset the d11 core */
5116 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
5121 static int brcms_b_up_finish(struct brcms_hardware
*wlc_hw
)
5123 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5126 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, true);
5128 /* FULLY enable dynamic power control and d11 core interrupt */
5129 brcms_b_clkctl_clk(wlc_hw
, CLK_DYNAMIC
);
5130 brcms_intrson(wlc_hw
->wlc
->wl
);
5135 * Write WME tunable parameters for retransmit/max rate
5136 * from wlc struct to ucode
5138 static void brcms_c_wme_retries_write(struct brcms_c_info
*wlc
)
5142 /* Need clock to do this */
5146 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
5147 brcms_b_write_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
),
5148 wlc
->wme_retries
[ac
]);
5151 /* make interface operational */
5152 int brcms_c_up(struct brcms_c_info
*wlc
)
5154 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5156 /* HW is turned off so don't try to access it */
5157 if (wlc
->pub
->hw_off
|| brcms_deviceremoved(wlc
))
5160 if (!wlc
->pub
->hw_up
) {
5161 brcms_b_hw_up(wlc
->hw
);
5162 wlc
->pub
->hw_up
= true;
5165 if ((wlc
->pub
->boardflags
& BFL_FEM
)
5166 && (ai_get_chip_id(wlc
->hw
->sih
) == BCM4313_CHIP_ID
)) {
5167 if (wlc
->pub
->boardrev
>= 0x1250
5168 && (wlc
->pub
->boardflags
& BFL_FEM_BT
))
5169 brcms_b_mhf(wlc
->hw
, MHF5
, MHF5_4313_GPIOCTRL
,
5170 MHF5_4313_GPIOCTRL
, BRCM_BAND_ALL
);
5172 brcms_b_mhf(wlc
->hw
, MHF4
, MHF4_EXTPA_ENABLE
,
5173 MHF4_EXTPA_ENABLE
, BRCM_BAND_ALL
);
5177 * Need to read the hwradio status here to cover the case where the
5178 * system is loaded with the hw radio disabled. We do not want to bring
5179 * the driver up in this case. If radio is disabled, abort up, lower
5180 * power, start radio timer and return 0(for NDIS) don't call
5181 * radio_update to avoid looping brcms_c_up.
5183 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5185 if (!wlc
->pub
->radio_disabled
) {
5186 int status
= brcms_b_up_prep(wlc
->hw
);
5187 if (status
== -ENOMEDIUM
) {
5189 (wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
)) {
5190 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
5191 mboolset(wlc
->pub
->radio_disabled
,
5192 WL_RADIO_HW_DISABLE
);
5194 if (bsscfg
->enable
&& bsscfg
->BSS
)
5195 wiphy_err(wlc
->wiphy
, "wl%d: up"
5197 "bsscfg_disable()\n",
5203 if (wlc
->pub
->radio_disabled
) {
5204 brcms_c_radio_monitor_start(wlc
);
5208 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5211 brcms_c_radio_monitor_stop(wlc
);
5213 /* Set EDCF hostflags */
5214 brcms_b_mhf(wlc
->hw
, MHF1
, MHF1_EDCF
, MHF1_EDCF
, BRCM_BAND_ALL
);
5216 brcms_init(wlc
->wl
);
5217 wlc
->pub
->up
= true;
5219 if (wlc
->bandinit_pending
) {
5220 brcms_c_suspend_mac_and_wait(wlc
);
5221 brcms_c_set_chanspec(wlc
, wlc
->default_bss
->chanspec
);
5222 wlc
->bandinit_pending
= false;
5223 brcms_c_enable_mac(wlc
);
5226 brcms_b_up_finish(wlc
->hw
);
5228 /* Program the TX wme params with the current settings */
5229 brcms_c_wme_retries_write(wlc
);
5231 /* start one second watchdog timer */
5232 brcms_add_timer(wlc
->wdtimer
, TIMER_INTERVAL_WATCHDOG
, true);
5233 wlc
->WDarmed
= true;
5235 /* ensure antenna config is up to date */
5236 brcms_c_stf_phy_txant_upd(wlc
);
5237 /* ensure LDPC config is in sync */
5238 brcms_c_ht_update_ldpc(wlc
, wlc
->stf
->ldpc
);
5243 static uint
brcms_c_down_del_timer(struct brcms_c_info
*wlc
)
5250 static int brcms_b_bmac_down_prep(struct brcms_hardware
*wlc_hw
)
5255 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5260 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5262 /* disable interrupts */
5264 wlc_hw
->wlc
->macintmask
= 0;
5266 /* now disable interrupts */
5267 brcms_intrsoff(wlc_hw
->wlc
->wl
);
5269 /* ensure we're running on the pll clock again */
5270 brcms_b_clkctl_clk(wlc_hw
, CLK_FAST
);
5272 /* down phy at the last of this stage */
5273 callbacks
+= wlc_phy_down(wlc_hw
->band
->pi
);
5278 static int brcms_b_down_finish(struct brcms_hardware
*wlc_hw
)
5283 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5289 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, false);
5291 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5294 wlc_hw
->sbclk
= false;
5295 wlc_hw
->clk
= false;
5296 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
5298 /* reclaim any posted packets */
5299 brcms_c_flushqueues(wlc_hw
->wlc
);
5302 /* Reset and disable the core */
5303 if (bcma_core_is_enabled(wlc_hw
->d11core
)) {
5304 if (bcma_read32(wlc_hw
->d11core
,
5305 D11REGOFFS(maccontrol
)) & MCTL_EN_MAC
)
5306 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
5307 callbacks
+= brcms_reset(wlc_hw
->wlc
->wl
);
5308 brcms_c_coredisable(wlc_hw
);
5311 /* turn off primary xtal and pll */
5312 if (!wlc_hw
->noreset
) {
5313 ai_pci_down(wlc_hw
->sih
);
5314 brcms_b_xtal(wlc_hw
, OFF
);
5322 * Mark the interface nonoperational, stop the software mechanisms,
5323 * disable the hardware, free any transient buffer state.
5324 * Return a count of the number of driver callbacks still pending.
5326 uint
brcms_c_down(struct brcms_c_info
*wlc
)
5331 bool dev_gone
= false;
5332 struct brcms_txq_info
*qi
;
5334 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5336 /* check if we are already in the going down path */
5337 if (wlc
->going_down
) {
5338 wiphy_err(wlc
->wiphy
, "wl%d: %s: Driver going down so return"
5339 "\n", wlc
->pub
->unit
, __func__
);
5345 wlc
->going_down
= true;
5347 callbacks
+= brcms_b_bmac_down_prep(wlc
->hw
);
5349 dev_gone
= brcms_deviceremoved(wlc
);
5351 /* Call any registered down handlers */
5352 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5353 if (wlc
->modulecb
[i
].down_fn
)
5355 wlc
->modulecb
[i
].down_fn(wlc
->modulecb
[i
].hdl
);
5358 /* cancel the watchdog timer */
5360 if (!brcms_del_timer(wlc
->wdtimer
))
5362 wlc
->WDarmed
= false;
5364 /* cancel all other timers */
5365 callbacks
+= brcms_c_down_del_timer(wlc
);
5367 wlc
->pub
->up
= false;
5369 wlc_phy_mute_upd(wlc
->band
->pi
, false, PHY_MUTE_ALL
);
5371 /* clear txq flow control */
5372 brcms_c_txflowcontrol_reset(wlc
);
5374 /* flush tx queues */
5375 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
)
5376 brcmu_pktq_flush(&qi
->q
, true, NULL
, NULL
);
5378 callbacks
+= brcms_b_down_finish(wlc
->hw
);
5380 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5383 wlc
->going_down
= false;
5387 /* Set the current gmode configuration */
5388 int brcms_c_set_gmode(struct brcms_c_info
*wlc
, u8 gmode
, bool config
)
5392 struct brcms_c_rateset rs
;
5393 /* Default to 54g Auto */
5394 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5395 s8 shortslot
= BRCMS_SHORTSLOT_AUTO
;
5396 bool shortslot_restrict
= false; /* Restrict association to stations
5397 * that support shortslot
5399 bool ofdm_basic
= false; /* Make 6, 12, and 24 basic rates */
5400 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5401 int preamble
= BRCMS_PLCP_LONG
;
5402 bool preamble_restrict
= false; /* Restrict association to stations
5403 * that support short preambles
5405 struct brcms_band
*band
;
5407 /* if N-support is enabled, allow Gmode set as long as requested
5408 * Gmode is not GMODE_LEGACY_B
5410 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && gmode
== GMODE_LEGACY_B
)
5413 /* verify that we are dealing with 2G band and grab the band pointer */
5414 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
5416 else if ((wlc
->pub
->_nbands
> 1) &&
5417 (wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->bandtype
== BRCM_BAND_2G
))
5418 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
5422 /* Legacy or bust when no OFDM is supported by regulatory */
5423 if ((brcms_c_channel_locale_flags_in_band(wlc
->cmi
, band
->bandunit
) &
5424 BRCMS_NO_OFDM
) && (gmode
!= GMODE_LEGACY_B
))
5427 /* update configuration value */
5429 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
, gmode
);
5431 /* Clear rateset override */
5432 memset(&rs
, 0, sizeof(struct brcms_c_rateset
));
5435 case GMODE_LEGACY_B
:
5436 shortslot
= BRCMS_SHORTSLOT_OFF
;
5437 brcms_c_rateset_copy(&gphy_legacy_rates
, &rs
);
5445 /* Accept defaults */
5450 preamble
= BRCMS_PLCP_SHORT
;
5451 preamble_restrict
= true;
5454 case GMODE_PERFORMANCE
:
5455 shortslot
= BRCMS_SHORTSLOT_ON
;
5456 shortslot_restrict
= true;
5458 preamble
= BRCMS_PLCP_SHORT
;
5459 preamble_restrict
= true;
5464 wiphy_err(wlc
->wiphy
, "wl%d: %s: invalid gmode %d\n",
5465 wlc
->pub
->unit
, __func__
, gmode
);
5469 band
->gmode
= gmode
;
5471 wlc
->shortslot_override
= shortslot
;
5473 /* Use the default 11g rateset */
5475 brcms_c_rateset_copy(&cck_ofdm_rates
, &rs
);
5478 for (i
= 0; i
< rs
.count
; i
++) {
5479 if (rs
.rates
[i
] == BRCM_RATE_6M
5480 || rs
.rates
[i
] == BRCM_RATE_12M
5481 || rs
.rates
[i
] == BRCM_RATE_24M
)
5482 rs
.rates
[i
] |= BRCMS_RATE_FLAG
;
5486 /* Set default bss rateset */
5487 wlc
->default_bss
->rateset
.count
= rs
.count
;
5488 memcpy(wlc
->default_bss
->rateset
.rates
, rs
.rates
,
5489 sizeof(wlc
->default_bss
->rateset
.rates
));
5494 int brcms_c_set_nmode(struct brcms_c_info
*wlc
)
5499 if (wlc
->stf
->txstreams
== WL_11N_3x3
)
5504 /* force GMODE_AUTO if NMODE is ON */
5505 brcms_c_set_gmode(wlc
, GMODE_AUTO
, true);
5506 if (nmode
== WL_11N_3x3
)
5507 wlc
->pub
->_n_enab
= SUPPORT_HT
;
5509 wlc
->pub
->_n_enab
= SUPPORT_11N
;
5510 wlc
->default_bss
->flags
|= BRCMS_BSS_HT
;
5511 /* add the mcs rates to the default and hw ratesets */
5512 brcms_c_rateset_mcs_build(&wlc
->default_bss
->rateset
,
5513 wlc
->stf
->txstreams
);
5514 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++)
5515 memcpy(wlc
->bandstate
[i
]->hw_rateset
.mcs
,
5516 wlc
->default_bss
->rateset
.mcs
, MCSSET_LEN
);
5522 brcms_c_set_internal_rateset(struct brcms_c_info
*wlc
,
5523 struct brcms_c_rateset
*rs_arg
)
5525 struct brcms_c_rateset rs
, new;
5528 memcpy(&rs
, rs_arg
, sizeof(struct brcms_c_rateset
));
5530 /* check for bad count value */
5531 if ((rs
.count
== 0) || (rs
.count
> BRCMS_NUMRATES
))
5534 /* try the current band */
5535 bandunit
= wlc
->band
->bandunit
;
5536 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
5537 if (brcms_c_rate_hwrs_filter_sort_validate
5538 (&new, &wlc
->bandstate
[bandunit
]->hw_rateset
, true,
5539 wlc
->stf
->txstreams
))
5542 /* try the other band */
5543 if (brcms_is_mband_unlocked(wlc
)) {
5544 bandunit
= OTHERBANDUNIT(wlc
);
5545 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
5546 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5548 bandstate
[bandunit
]->
5550 wlc
->stf
->txstreams
))
5557 /* apply new rateset */
5558 memcpy(&wlc
->default_bss
->rateset
, &new,
5559 sizeof(struct brcms_c_rateset
));
5560 memcpy(&wlc
->bandstate
[bandunit
]->defrateset
, &new,
5561 sizeof(struct brcms_c_rateset
));
5565 static void brcms_c_ofdm_rateset_war(struct brcms_c_info
*wlc
)
5570 if (wlc
->bsscfg
->associated
)
5571 r
= wlc
->bsscfg
->current_bss
->rateset
.rates
[0];
5573 r
= wlc
->default_bss
->rateset
.rates
[0];
5575 wlc_phy_ofdm_rateset_war(wlc
->band
->pi
, war
);
5578 int brcms_c_set_channel(struct brcms_c_info
*wlc
, u16 channel
)
5580 u16 chspec
= ch20mhz_chspec(channel
);
5582 if (channel
< 0 || channel
> MAXCHANNEL
)
5585 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chspec
))
5589 if (!wlc
->pub
->up
&& brcms_is_mband_unlocked(wlc
)) {
5590 if (wlc
->band
->bandunit
!= chspec_bandunit(chspec
))
5591 wlc
->bandinit_pending
= true;
5593 wlc
->bandinit_pending
= false;
5596 wlc
->default_bss
->chanspec
= chspec
;
5597 /* brcms_c_BSSinit() will sanitize the rateset before
5599 if (wlc
->pub
->up
&& (wlc_phy_chanspec_get(wlc
->band
->pi
) != chspec
)) {
5600 brcms_c_set_home_chanspec(wlc
, chspec
);
5601 brcms_c_suspend_mac_and_wait(wlc
);
5602 brcms_c_set_chanspec(wlc
, chspec
);
5603 brcms_c_enable_mac(wlc
);
5608 int brcms_c_set_rate_limit(struct brcms_c_info
*wlc
, u16 srl
, u16 lrl
)
5612 if (srl
< 1 || srl
> RETRY_SHORT_MAX
||
5613 lrl
< 1 || lrl
> RETRY_SHORT_MAX
)
5619 brcms_b_retrylimit_upd(wlc
->hw
, wlc
->SRL
, wlc
->LRL
);
5621 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++) {
5622 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
5623 EDCF_SHORT
, wlc
->SRL
);
5624 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
5625 EDCF_LONG
, wlc
->LRL
);
5627 brcms_c_wme_retries_write(wlc
);
5632 void brcms_c_get_current_rateset(struct brcms_c_info
*wlc
,
5633 struct brcm_rateset
*currs
)
5635 struct brcms_c_rateset
*rs
;
5637 if (wlc
->pub
->associated
)
5638 rs
= &wlc
->bsscfg
->current_bss
->rateset
;
5640 rs
= &wlc
->default_bss
->rateset
;
5642 /* Copy only legacy rateset section */
5643 currs
->count
= rs
->count
;
5644 memcpy(&currs
->rates
, &rs
->rates
, rs
->count
);
5647 int brcms_c_set_rateset(struct brcms_c_info
*wlc
, struct brcm_rateset
*rs
)
5649 struct brcms_c_rateset internal_rs
;
5652 if (rs
->count
> BRCMS_NUMRATES
)
5655 memset(&internal_rs
, 0, sizeof(struct brcms_c_rateset
));
5657 /* Copy only legacy rateset section */
5658 internal_rs
.count
= rs
->count
;
5659 memcpy(&internal_rs
.rates
, &rs
->rates
, internal_rs
.count
);
5661 /* merge rateset coming in with the current mcsset */
5662 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
5663 struct brcms_bss_info
*mcsset_bss
;
5664 if (wlc
->bsscfg
->associated
)
5665 mcsset_bss
= wlc
->bsscfg
->current_bss
;
5667 mcsset_bss
= wlc
->default_bss
;
5668 memcpy(internal_rs
.mcs
, &mcsset_bss
->rateset
.mcs
[0],
5672 bcmerror
= brcms_c_set_internal_rateset(wlc
, &internal_rs
);
5674 brcms_c_ofdm_rateset_war(wlc
);
5679 int brcms_c_set_beacon_period(struct brcms_c_info
*wlc
, u16 period
)
5681 if (period
< DOT11_MIN_BEACON_PERIOD
||
5682 period
> DOT11_MAX_BEACON_PERIOD
)
5685 wlc
->default_bss
->beacon_period
= period
;
5689 u16
brcms_c_get_phy_type(struct brcms_c_info
*wlc
, int phyidx
)
5691 return wlc
->band
->phytype
;
5694 void brcms_c_set_shortslot_override(struct brcms_c_info
*wlc
, s8 sslot_override
)
5696 wlc
->shortslot_override
= sslot_override
;
5699 * shortslot is an 11g feature, so no more work if we are
5700 * currently on the 5G band
5702 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
5705 if (wlc
->pub
->up
&& wlc
->pub
->associated
) {
5706 /* let watchdog or beacon processing update shortslot */
5707 } else if (wlc
->pub
->up
) {
5708 /* unassociated shortslot is off */
5709 brcms_c_switch_shortslot(wlc
, false);
5711 /* driver is down, so just update the brcms_c_info
5713 if (wlc
->shortslot_override
== BRCMS_SHORTSLOT_AUTO
)
5714 wlc
->shortslot
= false;
5717 (wlc
->shortslot_override
==
5718 BRCMS_SHORTSLOT_ON
);
5723 * register watchdog and down handlers.
5725 int brcms_c_module_register(struct brcms_pub
*pub
,
5726 const char *name
, struct brcms_info
*hdl
,
5727 int (*d_fn
)(void *handle
))
5729 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
5732 /* find an empty entry and just add, no duplication check! */
5733 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5734 if (wlc
->modulecb
[i
].name
[0] == '\0') {
5735 strncpy(wlc
->modulecb
[i
].name
, name
,
5736 sizeof(wlc
->modulecb
[i
].name
) - 1);
5737 wlc
->modulecb
[i
].hdl
= hdl
;
5738 wlc
->modulecb
[i
].down_fn
= d_fn
;
5746 /* unregister module callbacks */
5747 int brcms_c_module_unregister(struct brcms_pub
*pub
, const char *name
,
5748 struct brcms_info
*hdl
)
5750 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
5756 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5757 if (!strcmp(wlc
->modulecb
[i
].name
, name
) &&
5758 (wlc
->modulecb
[i
].hdl
== hdl
)) {
5759 memset(&wlc
->modulecb
[i
], 0, sizeof(struct modulecb
));
5764 /* table not found! */
5769 static const char * const supr_reason
[] = {
5770 "None", "PMQ Entry", "Flush request",
5771 "Previous frag failure", "Channel mismatch",
5772 "Lifetime Expiry", "Underflow"
5775 static void brcms_c_print_txs_status(u16 s
)
5777 printk(KERN_DEBUG
"[15:12] %d frame attempts\n",
5778 (s
& TX_STATUS_FRM_RTX_MASK
) >> TX_STATUS_FRM_RTX_SHIFT
);
5779 printk(KERN_DEBUG
" [11:8] %d rts attempts\n",
5780 (s
& TX_STATUS_RTS_RTX_MASK
) >> TX_STATUS_RTS_RTX_SHIFT
);
5781 printk(KERN_DEBUG
" [7] %d PM mode indicated\n",
5782 ((s
& TX_STATUS_PMINDCTD
) ? 1 : 0));
5783 printk(KERN_DEBUG
" [6] %d intermediate status\n",
5784 ((s
& TX_STATUS_INTERMEDIATE
) ? 1 : 0));
5785 printk(KERN_DEBUG
" [5] %d AMPDU\n",
5786 (s
& TX_STATUS_AMPDU
) ? 1 : 0);
5787 printk(KERN_DEBUG
" [4:2] %d Frame Suppressed Reason (%s)\n",
5788 ((s
& TX_STATUS_SUPR_MASK
) >> TX_STATUS_SUPR_SHIFT
),
5789 supr_reason
[(s
& TX_STATUS_SUPR_MASK
) >> TX_STATUS_SUPR_SHIFT
]);
5790 printk(KERN_DEBUG
" [1] %d acked\n",
5791 ((s
& TX_STATUS_ACK_RCV
) ? 1 : 0));
5795 void brcms_c_print_txstatus(struct tx_status
*txs
)
5798 u16 s
= txs
->status
;
5799 u16 ackphyrxsh
= txs
->ackphyrxsh
;
5801 printk(KERN_DEBUG
"\ntxpkt (MPDU) Complete\n");
5803 printk(KERN_DEBUG
"FrameID: %04x ", txs
->frameid
);
5804 printk(KERN_DEBUG
"TxStatus: %04x", s
);
5805 printk(KERN_DEBUG
"\n");
5807 brcms_c_print_txs_status(s
);
5809 printk(KERN_DEBUG
"LastTxTime: %04x ", txs
->lasttxtime
);
5810 printk(KERN_DEBUG
"Seq: %04x ", txs
->sequence
);
5811 printk(KERN_DEBUG
"PHYTxStatus: %04x ", txs
->phyerr
);
5812 printk(KERN_DEBUG
"RxAckRSSI: %04x ",
5813 (ackphyrxsh
& PRXS1_JSSI_MASK
) >> PRXS1_JSSI_SHIFT
);
5814 printk(KERN_DEBUG
"RxAckSQ: %04x",
5815 (ackphyrxsh
& PRXS1_SQ_MASK
) >> PRXS1_SQ_SHIFT
);
5816 printk(KERN_DEBUG
"\n");
5817 #endif /* defined(BCMDBG) */
5820 bool brcms_c_chipmatch(u16 vendor
, u16 device
)
5822 if (vendor
!= PCI_VENDOR_ID_BROADCOM
) {
5823 pr_err("chipmatch: unknown vendor id %04x\n", vendor
);
5827 if (device
== BCM43224_D11N_ID_VEN1
)
5829 if ((device
== BCM43224_D11N_ID
) || (device
== BCM43225_D11N2G_ID
))
5831 if (device
== BCM4313_D11N2G_ID
)
5833 if ((device
== BCM43236_D11N_ID
) || (device
== BCM43236_D11N2G_ID
))
5836 pr_err("chipmatch: unknown device id %04x\n", device
);
5841 void brcms_c_print_txdesc(struct d11txh
*txh
)
5843 u16 mtcl
= le16_to_cpu(txh
->MacTxControlLow
);
5844 u16 mtch
= le16_to_cpu(txh
->MacTxControlHigh
);
5845 u16 mfc
= le16_to_cpu(txh
->MacFrameControl
);
5846 u16 tfest
= le16_to_cpu(txh
->TxFesTimeNormal
);
5847 u16 ptcw
= le16_to_cpu(txh
->PhyTxControlWord
);
5848 u16 ptcw_1
= le16_to_cpu(txh
->PhyTxControlWord_1
);
5849 u16 ptcw_1_Fbr
= le16_to_cpu(txh
->PhyTxControlWord_1_Fbr
);
5850 u16 ptcw_1_Rts
= le16_to_cpu(txh
->PhyTxControlWord_1_Rts
);
5851 u16 ptcw_1_FbrRts
= le16_to_cpu(txh
->PhyTxControlWord_1_FbrRts
);
5852 u16 mainrates
= le16_to_cpu(txh
->MainRates
);
5853 u16 xtraft
= le16_to_cpu(txh
->XtraFrameTypes
);
5855 u8
*ra
= txh
->TxFrameRA
;
5856 u16 tfestfb
= le16_to_cpu(txh
->TxFesTimeFallback
);
5857 u8
*rtspfb
= txh
->RTSPLCPFallback
;
5858 u16 rtsdfb
= le16_to_cpu(txh
->RTSDurFallback
);
5859 u8
*fragpfb
= txh
->FragPLCPFallback
;
5860 u16 fragdfb
= le16_to_cpu(txh
->FragDurFallback
);
5861 u16 mmodelen
= le16_to_cpu(txh
->MModeLen
);
5862 u16 mmodefbrlen
= le16_to_cpu(txh
->MModeFbrLen
);
5863 u16 tfid
= le16_to_cpu(txh
->TxFrameID
);
5864 u16 txs
= le16_to_cpu(txh
->TxStatus
);
5865 u16 mnmpdu
= le16_to_cpu(txh
->MaxNMpdus
);
5866 u16 mabyte
= le16_to_cpu(txh
->MaxABytes_MRT
);
5867 u16 mabyte_f
= le16_to_cpu(txh
->MaxABytes_FBR
);
5868 u16 mmbyte
= le16_to_cpu(txh
->MinMBytes
);
5870 u8
*rtsph
= txh
->RTSPhyHeader
;
5871 struct ieee80211_rts rts
= txh
->rts_frame
;
5873 /* add plcp header along with txh descriptor */
5874 printk(KERN_DEBUG
"Raw TxDesc + plcp header:\n");
5875 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
,
5876 txh
, sizeof(struct d11txh
) + 48);
5878 printk(KERN_DEBUG
"TxCtlLow: %04x ", mtcl
);
5879 printk(KERN_DEBUG
"TxCtlHigh: %04x ", mtch
);
5880 printk(KERN_DEBUG
"FC: %04x ", mfc
);
5881 printk(KERN_DEBUG
"FES Time: %04x\n", tfest
);
5882 printk(KERN_DEBUG
"PhyCtl: %04x%s ", ptcw
,
5883 (ptcw
& PHY_TXC_SHORT_HDR
) ? " short" : "");
5884 printk(KERN_DEBUG
"PhyCtl_1: %04x ", ptcw_1
);
5885 printk(KERN_DEBUG
"PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr
);
5886 printk(KERN_DEBUG
"PhyCtl_1_Rts: %04x ", ptcw_1_Rts
);
5887 printk(KERN_DEBUG
"PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts
);
5888 printk(KERN_DEBUG
"MainRates: %04x ", mainrates
);
5889 printk(KERN_DEBUG
"XtraFrameTypes: %04x ", xtraft
);
5890 printk(KERN_DEBUG
"\n");
5892 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET
, iv
, sizeof(txh
->IV
));
5893 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET
,
5894 ra
, sizeof(txh
->TxFrameRA
));
5896 printk(KERN_DEBUG
"Fb FES Time: %04x ", tfestfb
);
5897 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET
,
5898 rtspfb
, sizeof(txh
->RTSPLCPFallback
));
5899 printk(KERN_DEBUG
"RTS DUR: %04x ", rtsdfb
);
5900 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET
,
5901 fragpfb
, sizeof(txh
->FragPLCPFallback
));
5902 printk(KERN_DEBUG
"DUR: %04x", fragdfb
);
5903 printk(KERN_DEBUG
"\n");
5905 printk(KERN_DEBUG
"MModeLen: %04x ", mmodelen
);
5906 printk(KERN_DEBUG
"MModeFbrLen: %04x\n", mmodefbrlen
);
5908 printk(KERN_DEBUG
"FrameID: %04x\n", tfid
);
5909 printk(KERN_DEBUG
"TxStatus: %04x\n", txs
);
5911 printk(KERN_DEBUG
"MaxNumMpdu: %04x\n", mnmpdu
);
5912 printk(KERN_DEBUG
"MaxAggbyte: %04x\n", mabyte
);
5913 printk(KERN_DEBUG
"MaxAggbyte_fb: %04x\n", mabyte_f
);
5914 printk(KERN_DEBUG
"MinByte: %04x\n", mmbyte
);
5916 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET
,
5917 rtsph
, sizeof(txh
->RTSPhyHeader
));
5918 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET
,
5919 (u8
*)&rts
, sizeof(txh
->rts_frame
));
5920 printk(KERN_DEBUG
"\n");
5922 #endif /* defined(BCMDBG) */
5926 brcms_c_format_flags(const struct brcms_c_bit_desc
*bd
, u32 flags
, char *buf
,
5932 int slen
= 0, nlen
= 0;
5936 if (len
< 2 || !buf
)
5941 for (i
= 0; flags
!= 0; i
++) {
5944 if (bit
== 0 && flags
!= 0) {
5945 /* print any unnamed bits */
5946 snprintf(hexstr
, 16, "0x%X", flags
);
5948 flags
= 0; /* exit loop */
5949 } else if ((flags
& bit
) == 0)
5952 nlen
= strlen(name
);
5954 /* count btwn flag space */
5957 /* need NULL char as well */
5960 /* copy NULL char but don't count it */
5961 strncpy(p
, name
, nlen
+ 1);
5963 /* copy btwn flag space and NULL char */
5965 p
+= snprintf(p
, 2, " ");
5969 /* indicate the str was too short */
5972 p
-= 2 - len
; /* overwrite last char */
5973 p
+= snprintf(p
, 2, ">");
5976 return (int)(p
- buf
);
5978 #endif /* defined(BCMDBG) */
5981 void brcms_c_print_rxh(struct d11rxhdr
*rxh
)
5983 u16 len
= rxh
->RxFrameSize
;
5984 u16 phystatus_0
= rxh
->PhyRxStatus_0
;
5985 u16 phystatus_1
= rxh
->PhyRxStatus_1
;
5986 u16 phystatus_2
= rxh
->PhyRxStatus_2
;
5987 u16 phystatus_3
= rxh
->PhyRxStatus_3
;
5988 u16 macstatus1
= rxh
->RxStatus1
;
5989 u16 macstatus2
= rxh
->RxStatus2
;
5992 static const struct brcms_c_bit_desc macstat_flags
[] = {
5993 {RXS_FCSERR
, "FCSErr"},
5994 {RXS_RESPFRAMETX
, "Reply"},
5995 {RXS_PBPRES
, "PADDING"},
5996 {RXS_DECATMPT
, "DeCr"},
5997 {RXS_DECERR
, "DeCrErr"},
5998 {RXS_BCNSENT
, "Bcn"},
6002 printk(KERN_DEBUG
"Raw RxDesc:\n");
6003 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET
, rxh
,
6004 sizeof(struct d11rxhdr
));
6006 brcms_c_format_flags(macstat_flags
, macstatus1
, flagstr
, 64);
6008 snprintf(lenbuf
, sizeof(lenbuf
), "0x%x", len
);
6010 printk(KERN_DEBUG
"RxFrameSize: %6s (%d)%s\n", lenbuf
, len
,
6011 (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
) ? " short preamble" : "");
6012 printk(KERN_DEBUG
"RxPHYStatus: %04x %04x %04x %04x\n",
6013 phystatus_0
, phystatus_1
, phystatus_2
, phystatus_3
);
6014 printk(KERN_DEBUG
"RxMACStatus: %x %s\n", macstatus1
, flagstr
);
6015 printk(KERN_DEBUG
"RXMACaggtype: %x\n",
6016 (macstatus2
& RXS_AGGTYPE_MASK
));
6017 printk(KERN_DEBUG
"RxTSFTime: %04x\n", rxh
->RxTSFTime
);
6019 #endif /* defined(BCMDBG) */
6021 u16
brcms_b_rate_shm_offset(struct brcms_hardware
*wlc_hw
, u8 rate
)
6026 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6027 if (is_ofdm_rate(rate
))
6028 table_ptr
= M_RT_DIRMAP_A
;
6030 table_ptr
= M_RT_DIRMAP_B
;
6032 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6033 * the index into the rate table.
6035 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
6036 index
= phy_rate
& 0xf;
6038 /* Find the SHM pointer to the rate table entry by looking in the
6041 return 2 * brcms_b_read_shm(wlc_hw
, table_ptr
+ (index
* 2));
6045 brcms_c_prec_enq_head(struct brcms_c_info
*wlc
, struct pktq
*q
,
6046 struct sk_buff
*pkt
, int prec
, bool head
)
6049 int eprec
= -1; /* precedence to evict from */
6051 /* Determine precedence from which to evict packet, if any */
6052 if (pktq_pfull(q
, prec
))
6054 else if (pktq_full(q
)) {
6055 p
= brcmu_pktq_peek_tail(q
, &eprec
);
6057 wiphy_err(wlc
->wiphy
, "%s: Failing: eprec %d > prec %d"
6058 "\n", __func__
, eprec
, prec
);
6063 /* Evict if needed */
6065 bool discard_oldest
;
6067 discard_oldest
= ac_bitmap_tst(0, eprec
);
6069 /* Refuse newer packet unless configured to discard oldest */
6070 if (eprec
== prec
&& !discard_oldest
) {
6071 wiphy_err(wlc
->wiphy
, "%s: No where to go, prec == %d"
6072 "\n", __func__
, prec
);
6076 /* Evict packet according to discard policy */
6077 p
= discard_oldest
? brcmu_pktq_pdeq(q
, eprec
) :
6078 brcmu_pktq_pdeq_tail(q
, eprec
);
6079 brcmu_pkt_buf_free_skb(p
);
6084 p
= brcmu_pktq_penq_head(q
, prec
, pkt
);
6086 p
= brcmu_pktq_penq(q
, prec
, pkt
);
6092 * Attempts to queue a packet onto a multiple-precedence queue,
6093 * if necessary evicting a lower precedence packet from the queue.
6095 * 'prec' is the precedence number that has already been mapped
6096 * from the packet priority.
6098 * Returns true if packet consumed (queued), false if not.
6100 static bool brcms_c_prec_enq(struct brcms_c_info
*wlc
, struct pktq
*q
,
6101 struct sk_buff
*pkt
, int prec
)
6103 return brcms_c_prec_enq_head(wlc
, q
, pkt
, prec
, false);
6106 void brcms_c_txq_enq(struct brcms_c_info
*wlc
, struct scb
*scb
,
6107 struct sk_buff
*sdu
, uint prec
)
6109 struct brcms_txq_info
*qi
= wlc
->pkt_queue
; /* Check me */
6110 struct pktq
*q
= &qi
->q
;
6113 prio
= sdu
->priority
;
6115 if (!brcms_c_prec_enq(wlc
, q
, sdu
, prec
)) {
6117 * we might hit this condtion in case
6118 * packet flooding from mac80211 stack
6120 brcmu_pkt_buf_free_skb(sdu
);
6125 * bcmc_fid_generate:
6126 * Generate frame ID for a BCMC packet. The frag field is not used
6127 * for MC frames so is used as part of the sequence number.
6130 bcmc_fid_generate(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*bsscfg
,
6135 frameid
= le16_to_cpu(txh
->TxFrameID
) & ~(TXFID_SEQ_MASK
|
6139 mc_fid_counter
++) << TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
6146 brcms_c_calc_ack_time(struct brcms_c_info
*wlc
, u32 rspec
,
6151 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d\n",
6152 wlc
->pub
->unit
, rspec
, preamble_type
);
6154 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6155 * is less than or equal to the rate of the immediately previous
6158 rspec
= brcms_basic_rate(wlc
, rspec
);
6159 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6161 brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6162 (DOT11_ACK_LEN
+ FCS_LEN
));
6167 brcms_c_calc_cts_time(struct brcms_c_info
*wlc
, u32 rspec
,
6170 BCMMSG(wlc
->wiphy
, "wl%d: ratespec 0x%x, preamble_type %d\n",
6171 wlc
->pub
->unit
, rspec
, preamble_type
);
6172 return brcms_c_calc_ack_time(wlc
, rspec
, preamble_type
);
6176 brcms_c_calc_ba_time(struct brcms_c_info
*wlc
, u32 rspec
,
6179 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, "
6180 "preamble_type %d\n", wlc
->pub
->unit
, rspec
, preamble_type
);
6182 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6183 * is less than or equal to the rate of the immediately previous
6186 rspec
= brcms_basic_rate(wlc
, rspec
);
6187 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6188 return brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6189 (DOT11_BA_LEN
+ DOT11_BA_BITMAP_LEN
+
6193 /* brcms_c_compute_frame_dur()
6195 * Calculate the 802.11 MAC header DUR field for MPDU
6196 * DUR for a single frame = 1 SIFS + 1 ACK
6197 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6199 * rate MPDU rate in unit of 500kbps
6200 * next_frag_len next MPDU length in bytes
6201 * preamble_type use short/GF or long/MM PLCP header
6204 brcms_c_compute_frame_dur(struct brcms_c_info
*wlc
, u32 rate
,
6205 u8 preamble_type
, uint next_frag_len
)
6209 sifs
= get_sifs(wlc
->band
);
6212 dur
+= (u16
) brcms_c_calc_ack_time(wlc
, rate
, preamble_type
);
6214 if (next_frag_len
) {
6215 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6217 /* add another SIFS and the frag time */
6220 (u16
) brcms_c_calc_frame_time(wlc
, rate
, preamble_type
,
6226 /* The opposite of brcms_c_calc_frame_time */
6228 brcms_c_calc_frame_len(struct brcms_c_info
*wlc
, u32 ratespec
,
6229 u8 preamble_type
, uint dur
)
6231 uint nsyms
, mac_len
, Ndps
, kNdps
;
6232 uint rate
= rspec2rate(ratespec
);
6234 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6235 wlc
->pub
->unit
, ratespec
, preamble_type
, dur
);
6237 if (is_mcs_rate(ratespec
)) {
6238 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
6239 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
6240 dur
-= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
6241 /* payload calculation matches that of regular ofdm */
6242 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
6243 dur
-= DOT11_OFDM_SIGNAL_EXTENSION
;
6244 /* kNdbps = kbps * 4 */
6245 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
6246 rspec_issgi(ratespec
)) * 4;
6247 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6250 ((APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
) * 1000)) / 8000;
6251 } else if (is_ofdm_rate(ratespec
)) {
6252 dur
-= APHY_PREAMBLE_TIME
;
6253 dur
-= APHY_SIGNAL_TIME
;
6254 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6256 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6259 (APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
)) / 8;
6261 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
6262 dur
-= BPHY_PLCP_SHORT_TIME
;
6264 dur
-= BPHY_PLCP_TIME
;
6265 mac_len
= dur
* rate
;
6266 /* divide out factor of 2 in rate (1/2 mbps) */
6267 mac_len
= mac_len
/ 8 / 2;
6273 * Return true if the specified rate is supported by the specified band.
6274 * BRCM_BAND_AUTO indicates the current band.
6276 static bool brcms_c_valid_rate(struct brcms_c_info
*wlc
, u32 rspec
, int band
,
6279 struct brcms_c_rateset
*hw_rateset
;
6282 if ((band
== BRCM_BAND_AUTO
) || (band
== wlc
->band
->bandtype
))
6283 hw_rateset
= &wlc
->band
->hw_rateset
;
6284 else if (wlc
->pub
->_nbands
> 1)
6285 hw_rateset
= &wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->hw_rateset
;
6287 /* other band specified and we are a single band device */
6290 /* check if this is a mimo rate */
6291 if (is_mcs_rate(rspec
)) {
6292 if ((rspec
& RSPEC_RATE_MASK
) >= MCS_TABLE_SIZE
)
6295 return isset(hw_rateset
->mcs
, (rspec
& RSPEC_RATE_MASK
));
6298 for (i
= 0; i
< hw_rateset
->count
; i
++)
6299 if (hw_rateset
->rates
[i
] == rspec2rate(rspec
))
6303 wiphy_err(wlc
->wiphy
, "wl%d: valid_rate: rate spec 0x%x "
6304 "not in hw_rateset\n", wlc
->pub
->unit
, rspec
);
6310 mac80211_wlc_set_nrate(struct brcms_c_info
*wlc
, struct brcms_band
*cur_band
,
6313 u8 stf
= (int_val
& NRATE_STF_MASK
) >> NRATE_STF_SHIFT
;
6314 u8 rate
= int_val
& NRATE_RATE_MASK
;
6316 bool ismcs
= ((int_val
& NRATE_MCS_INUSE
) == NRATE_MCS_INUSE
);
6317 bool issgi
= ((int_val
& NRATE_SGI_MASK
) >> NRATE_SGI_SHIFT
);
6318 bool override_mcs_only
= ((int_val
& NRATE_OVERRIDE_MCS_ONLY
)
6319 == NRATE_OVERRIDE_MCS_ONLY
);
6325 /* validate the combination of rate/mcs/stf is allowed */
6326 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && ismcs
) {
6327 /* mcs only allowed when nmode */
6328 if (stf
> PHY_TXC1_MODE_SDM
) {
6329 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid stf\n",
6330 wlc
->pub
->unit
, __func__
);
6335 /* mcs 32 is a special case, DUP mode 40 only */
6337 if (!CHSPEC_IS40(wlc
->home_chanspec
) ||
6338 ((stf
!= PHY_TXC1_MODE_SISO
)
6339 && (stf
!= PHY_TXC1_MODE_CDD
))) {
6340 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid mcs "
6341 "32\n", wlc
->pub
->unit
, __func__
);
6345 /* mcs > 7 must use stf SDM */
6346 } else if (rate
> HIGHEST_SINGLE_STREAM_MCS
) {
6347 /* mcs > 7 must use stf SDM */
6348 if (stf
!= PHY_TXC1_MODE_SDM
) {
6349 BCMMSG(wlc
->wiphy
, "wl%d: enabling "
6350 "SDM mode for mcs %d\n",
6351 wlc
->pub
->unit
, rate
);
6352 stf
= PHY_TXC1_MODE_SDM
;
6356 * MCS 0-7 may use SISO, CDD, and for
6359 if ((stf
> PHY_TXC1_MODE_STBC
) ||
6360 (!BRCMS_STBC_CAP_PHY(wlc
)
6361 && (stf
== PHY_TXC1_MODE_STBC
))) {
6362 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid STBC"
6363 "\n", wlc
->pub
->unit
, __func__
);
6368 } else if (is_ofdm_rate(rate
)) {
6369 if ((stf
!= PHY_TXC1_MODE_CDD
) && (stf
!= PHY_TXC1_MODE_SISO
)) {
6370 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid OFDM\n",
6371 wlc
->pub
->unit
, __func__
);
6375 } else if (is_cck_rate(rate
)) {
6376 if ((cur_band
->bandtype
!= BRCM_BAND_2G
)
6377 || (stf
!= PHY_TXC1_MODE_SISO
)) {
6378 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid CCK\n",
6379 wlc
->pub
->unit
, __func__
);
6384 wiphy_err(wlc
->wiphy
, "wl%d: %s: Unknown rate type\n",
6385 wlc
->pub
->unit
, __func__
);
6389 /* make sure multiple antennae are available for non-siso rates */
6390 if ((stf
!= PHY_TXC1_MODE_SISO
) && (wlc
->stf
->txstreams
== 1)) {
6391 wiphy_err(wlc
->wiphy
, "wl%d: %s: SISO antenna but !SISO "
6392 "request\n", wlc
->pub
->unit
, __func__
);
6399 rspec
|= RSPEC_MIMORATE
;
6400 /* For STBC populate the STC field of the ratespec */
6401 if (stf
== PHY_TXC1_MODE_STBC
) {
6403 stc
= 1; /* Nss for single stream is always 1 */
6404 rspec
|= (stc
<< RSPEC_STC_SHIFT
);
6408 rspec
|= (stf
<< RSPEC_STF_SHIFT
);
6410 if (override_mcs_only
)
6411 rspec
|= RSPEC_OVERRIDE_MCS_ONLY
;
6414 rspec
|= RSPEC_SHORT_GI
;
6417 && !brcms_c_valid_rate(wlc
, rspec
, cur_band
->bandtype
, true))
6426 * Compute PLCP, but only requires actual rate and length of pkt.
6427 * Rate is given in the driver standard multiple of 500 kbps.
6428 * le is set for 11 Mbps rate if necessary.
6429 * Broken out for PRQ.
6432 static void brcms_c_cck_plcp_set(struct brcms_c_info
*wlc
, int rate_500
,
6433 uint length
, u8
*plcp
)
6446 usec
= (length
<< 4) / 11;
6447 if ((length
<< 4) - (usec
* 11) > 0)
6451 usec
= (length
<< 3) / 11;
6452 if ((length
<< 3) - (usec
* 11) > 0) {
6454 if ((usec
* 11) - (length
<< 3) >= 8)
6455 le
= D11B_PLCP_SIGNAL_LE
;
6460 wiphy_err(wlc
->wiphy
,
6461 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6463 rate_500
= BRCM_RATE_1M
;
6467 /* PLCP signal byte */
6468 plcp
[0] = rate_500
* 5; /* r (500kbps) * 5 == r (100kbps) */
6469 /* PLCP service byte */
6470 plcp
[1] = (u8
) (le
| D11B_PLCP_SIGNAL_LOCKED
);
6471 /* PLCP length u16, little endian */
6472 plcp
[2] = usec
& 0xff;
6473 plcp
[3] = (usec
>> 8) & 0xff;
6479 /* Rate: 802.11 rate code, length: PSDU length in octets */
6480 static void brcms_c_compute_mimo_plcp(u32 rspec
, uint length
, u8
*plcp
)
6482 u8 mcs
= (u8
) (rspec
& RSPEC_RATE_MASK
);
6484 if (rspec_is40mhz(rspec
) || (mcs
== 32))
6485 plcp
[0] |= MIMO_PLCP_40MHZ
;
6486 BRCMS_SET_MIMO_PLCP_LEN(plcp
, length
);
6487 plcp
[3] = rspec_mimoplcp3(rspec
); /* rspec already holds this byte */
6488 plcp
[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6489 plcp
[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6493 /* Rate: 802.11 rate code, length: PSDU length in octets */
6495 brcms_c_compute_ofdm_plcp(u32 rspec
, u32 length
, u8
*plcp
)
6499 int rate
= rspec2rate(rspec
);
6502 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6505 rate_signal
= rate_info
[rate
] & BRCMS_RATE_MASK
;
6506 memset(plcp
, 0, D11_PHY_HDR_LEN
);
6507 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr
*) plcp
, rate_signal
);
6509 tmp
= (length
& 0xfff) << 5;
6510 plcp
[2] |= (tmp
>> 16) & 0xff;
6511 plcp
[1] |= (tmp
>> 8) & 0xff;
6512 plcp
[0] |= tmp
& 0xff;
6515 /* Rate: 802.11 rate code, length: PSDU length in octets */
6516 static void brcms_c_compute_cck_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
6517 uint length
, u8
*plcp
)
6519 int rate
= rspec2rate(rspec
);
6521 brcms_c_cck_plcp_set(wlc
, rate
, length
, plcp
);
6525 brcms_c_compute_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
6526 uint length
, u8
*plcp
)
6528 if (is_mcs_rate(rspec
))
6529 brcms_c_compute_mimo_plcp(rspec
, length
, plcp
);
6530 else if (is_ofdm_rate(rspec
))
6531 brcms_c_compute_ofdm_plcp(rspec
, length
, plcp
);
6533 brcms_c_compute_cck_plcp(wlc
, rspec
, length
, plcp
);
6536 /* brcms_c_compute_rtscts_dur()
6538 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6539 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6540 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6542 * cts cts-to-self or rts/cts
6543 * rts_rate rts or cts rate in unit of 500kbps
6544 * rate next MPDU rate in unit of 500kbps
6545 * frame_len next MPDU frame length in bytes
6548 brcms_c_compute_rtscts_dur(struct brcms_c_info
*wlc
, bool cts_only
,
6550 u32 frame_rate
, u8 rts_preamble_type
,
6551 u8 frame_preamble_type
, uint frame_len
, bool ba
)
6555 sifs
= get_sifs(wlc
->band
);
6561 (u16
) brcms_c_calc_cts_time(wlc
, rts_rate
,
6569 (u16
) brcms_c_calc_frame_time(wlc
, frame_rate
, frame_preamble_type
,
6573 (u16
) brcms_c_calc_ba_time(wlc
, frame_rate
,
6574 BRCMS_SHORT_PREAMBLE
);
6577 (u16
) brcms_c_calc_ack_time(wlc
, frame_rate
,
6578 frame_preamble_type
);
6582 static u16
brcms_c_phytxctl1_calc(struct brcms_c_info
*wlc
, u32 rspec
)
6587 if (BRCMS_ISLCNPHY(wlc
->band
)) {
6588 bw
= PHY_TXC1_BW_20MHZ
;
6590 bw
= rspec_get_bw(rspec
);
6591 /* 10Mhz is not supported yet */
6592 if (bw
< PHY_TXC1_BW_20MHZ
) {
6593 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: bw %d is "
6594 "not supported yet, set to 20L\n", bw
);
6595 bw
= PHY_TXC1_BW_20MHZ
;
6599 if (is_mcs_rate(rspec
)) {
6600 uint mcs
= rspec
& RSPEC_RATE_MASK
;
6602 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6603 phyctl1
= rspec_phytxbyte2(rspec
);
6604 /* set the upper byte of phyctl1 */
6605 phyctl1
|= (mcs_table
[mcs
].tx_phy_ctl3
<< 8);
6606 } else if (is_cck_rate(rspec
) && !BRCMS_ISLCNPHY(wlc
->band
)
6607 && !BRCMS_ISSSLPNPHY(wlc
->band
)) {
6609 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6610 * Data Rate. Eventually MIMOPHY would also be converted to
6613 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6614 phyctl1
= (bw
| (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
6615 } else { /* legacy OFDM/CCK */
6617 /* get the phyctl byte from rate phycfg table */
6618 phycfg
= brcms_c_rate_legacy_phyctl(rspec2rate(rspec
));
6620 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: wrong "
6621 "legacy OFDM/CCK rate\n");
6624 /* set the upper byte of phyctl1 */
6626 (bw
| (phycfg
<< 8) |
6627 (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
6633 * Add struct d11txh, struct cck_phy_hdr.
6635 * 'p' data must start with 802.11 MAC header
6636 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6638 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6642 brcms_c_d11hdrs_mac80211(struct brcms_c_info
*wlc
, struct ieee80211_hw
*hw
,
6643 struct sk_buff
*p
, struct scb
*scb
, uint frag
,
6644 uint nfrags
, uint queue
, uint next_frag_len
)
6646 struct ieee80211_hdr
*h
;
6648 u8
*plcp
, plcp_fallback
[D11_PHY_HDR_LEN
];
6649 int len
, phylen
, rts_phylen
;
6650 u16 mch
, phyctl
, xfts
, mainrates
;
6651 u16 seq
= 0, mcl
= 0, status
= 0, frameid
= 0;
6652 u32 rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6653 u32 rts_rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6654 bool use_rts
= false;
6655 bool use_cts
= false;
6656 bool use_rifs
= false;
6657 bool short_preamble
[2] = { false, false };
6658 u8 preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6659 u8 rts_preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6660 u8
*rts_plcp
, rts_plcp_fallback
[D11_PHY_HDR_LEN
];
6661 struct ieee80211_rts
*rts
= NULL
;
6664 bool hwtkmic
= false;
6665 u16 mimo_ctlchbw
= PHY_TXC1_BW_20MHZ
;
6666 #define ANTCFG_NONE 0xFF
6667 u8 antcfg
= ANTCFG_NONE
;
6668 u8 fbantcfg
= ANTCFG_NONE
;
6669 uint phyctl1_stf
= 0;
6671 struct ieee80211_tx_rate
*txrate
[2];
6673 struct ieee80211_tx_info
*tx_info
;
6676 u8 mimo_preamble_type
;
6678 /* locate 802.11 MAC header */
6679 h
= (struct ieee80211_hdr
*)(p
->data
);
6680 qos
= ieee80211_is_data_qos(h
->frame_control
);
6682 /* compute length of frame in bytes for use in PLCP computations */
6684 phylen
= len
+ FCS_LEN
;
6687 tx_info
= IEEE80211_SKB_CB(p
);
6690 plcp
= skb_push(p
, D11_PHY_HDR_LEN
);
6692 /* add Broadcom tx descriptor header */
6693 txh
= (struct d11txh
*) skb_push(p
, D11_TXH_LEN
);
6694 memset(txh
, 0, D11_TXH_LEN
);
6697 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
6698 /* non-AP STA should never use BCMC queue */
6699 if (queue
== TX_BCMC_FIFO
) {
6700 wiphy_err(wlc
->wiphy
, "wl%d: %s: ASSERT queue == "
6701 "TX_BCMC!\n", wlc
->pub
->unit
, __func__
);
6702 frameid
= bcmc_fid_generate(wlc
, NULL
, txh
);
6704 /* Increment the counter for first fragment */
6705 if (tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
6706 scb
->seqnum
[p
->priority
]++;
6708 /* extract fragment number from frame first */
6709 seq
= le16_to_cpu(h
->seq_ctrl
) & FRAGNUM_MASK
;
6710 seq
|= (scb
->seqnum
[p
->priority
] << SEQNUM_SHIFT
);
6711 h
->seq_ctrl
= cpu_to_le16(seq
);
6713 frameid
= ((seq
<< TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
6714 (queue
& TXFID_QUEUE_MASK
);
6717 frameid
|= queue
& TXFID_QUEUE_MASK
;
6719 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6720 if (ieee80211_is_beacon(h
->frame_control
))
6721 mcl
|= TXC_IGNOREPMQ
;
6723 txrate
[0] = tx_info
->control
.rates
;
6724 txrate
[1] = txrate
[0] + 1;
6727 * if rate control algorithm didn't give us a fallback
6728 * rate, use the primary rate
6730 if (txrate
[1]->idx
< 0)
6731 txrate
[1] = txrate
[0];
6733 for (k
= 0; k
< hw
->max_rates
; k
++) {
6734 is_mcs
= txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
? true : false;
6736 if ((txrate
[k
]->idx
>= 0)
6737 && (txrate
[k
]->idx
<
6738 hw
->wiphy
->bands
[tx_info
->band
]->n_bitrates
)) {
6740 hw
->wiphy
->bands
[tx_info
->band
]->
6741 bitrates
[txrate
[k
]->idx
].hw_value
;
6744 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
?
6747 rspec
[k
] = BRCM_RATE_1M
;
6750 rspec
[k
] = mac80211_wlc_set_nrate(wlc
, wlc
->band
,
6751 NRATE_MCS_INUSE
| txrate
[k
]->idx
);
6755 * Currently only support same setting for primay and
6756 * fallback rates. Unify flags for each rate into a
6757 * single value for the frame
6761 flags
& IEEE80211_TX_RC_USE_RTS_CTS
? true : false;
6764 flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
? true : false;
6769 * determine and validate primary rate
6770 * and fallback rates
6772 if (!rspec_active(rspec
[k
])) {
6773 rspec
[k
] = BRCM_RATE_1M
;
6775 if (!is_multicast_ether_addr(h
->addr1
)) {
6776 /* set tx antenna config */
6777 brcms_c_antsel_antcfg_get(wlc
->asi
, false,
6778 false, 0, 0, &antcfg
, &fbantcfg
);
6783 phyctl1_stf
= wlc
->stf
->ss_opmode
;
6785 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
6786 for (k
= 0; k
< hw
->max_rates
; k
++) {
6788 * apply siso/cdd to single stream mcs's or ofdm
6789 * if rspec is auto selected
6791 if (((is_mcs_rate(rspec
[k
]) &&
6792 is_single_stream(rspec
[k
] & RSPEC_RATE_MASK
)) ||
6793 is_ofdm_rate(rspec
[k
]))
6794 && ((rspec
[k
] & RSPEC_OVERRIDE_MCS_ONLY
)
6795 || !(rspec
[k
] & RSPEC_OVERRIDE
))) {
6796 rspec
[k
] &= ~(RSPEC_STF_MASK
| RSPEC_STC_MASK
);
6798 /* For SISO MCS use STBC if possible */
6799 if (is_mcs_rate(rspec
[k
])
6800 && BRCMS_STF_SS_STBC_TX(wlc
, scb
)) {
6803 /* Nss for single stream is always 1 */
6805 rspec
[k
] |= (PHY_TXC1_MODE_STBC
<<
6807 (stc
<< RSPEC_STC_SHIFT
);
6810 (phyctl1_stf
<< RSPEC_STF_SHIFT
);
6814 * Is the phy configured to use 40MHZ frames? If
6815 * so then pick the desired txbw
6817 if (brcms_chspec_bw(wlc
->chanspec
) == BRCMS_40_MHZ
) {
6818 /* default txbw is 20in40 SB */
6819 mimo_ctlchbw
= mimo_txbw
=
6820 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6822 ? PHY_TXC1_BW_20MHZ_UP
: PHY_TXC1_BW_20MHZ
;
6824 if (is_mcs_rate(rspec
[k
])) {
6825 /* mcs 32 must be 40b/w DUP */
6826 if ((rspec
[k
] & RSPEC_RATE_MASK
)
6829 PHY_TXC1_BW_40MHZ_DUP
;
6831 } else if (wlc
->mimo_40txbw
!= AUTO
)
6832 mimo_txbw
= wlc
->mimo_40txbw
;
6833 /* else check if dst is using 40 Mhz */
6834 else if (scb
->flags
& SCB_IS40
)
6835 mimo_txbw
= PHY_TXC1_BW_40MHZ
;
6836 } else if (is_ofdm_rate(rspec
[k
])) {
6837 if (wlc
->ofdm_40txbw
!= AUTO
)
6838 mimo_txbw
= wlc
->ofdm_40txbw
;
6839 } else if (wlc
->cck_40txbw
!= AUTO
) {
6840 mimo_txbw
= wlc
->cck_40txbw
;
6844 * mcs32 is 40 b/w only.
6845 * This is possible for probe packets on
6848 if ((rspec
[k
] & RSPEC_RATE_MASK
) == 32)
6850 rspec
[k
] = RSPEC_MIMORATE
;
6852 mimo_txbw
= PHY_TXC1_BW_20MHZ
;
6855 /* Set channel width */
6856 rspec
[k
] &= ~RSPEC_BW_MASK
;
6857 if ((k
== 0) || ((k
> 0) && is_mcs_rate(rspec
[k
])))
6858 rspec
[k
] |= (mimo_txbw
<< RSPEC_BW_SHIFT
);
6860 rspec
[k
] |= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
6862 /* Disable short GI, not supported yet */
6863 rspec
[k
] &= ~RSPEC_SHORT_GI
;
6865 mimo_preamble_type
= BRCMS_MM_PREAMBLE
;
6866 if (txrate
[k
]->flags
& IEEE80211_TX_RC_GREEN_FIELD
)
6867 mimo_preamble_type
= BRCMS_GF_PREAMBLE
;
6869 if ((txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
)
6870 && (!is_mcs_rate(rspec
[k
]))) {
6871 wiphy_err(wlc
->wiphy
, "wl%d: %s: IEEE80211_TX_"
6872 "RC_MCS != is_mcs_rate(rspec)\n",
6873 wlc
->pub
->unit
, __func__
);
6876 if (is_mcs_rate(rspec
[k
])) {
6877 preamble_type
[k
] = mimo_preamble_type
;
6880 * if SGI is selected, then forced mm
6883 if ((rspec
[k
] & RSPEC_SHORT_GI
)
6884 && is_single_stream(rspec
[k
] &
6886 preamble_type
[k
] = BRCMS_MM_PREAMBLE
;
6889 /* should be better conditionalized */
6890 if (!is_mcs_rate(rspec
[0])
6891 && (tx_info
->control
.rates
[0].
6892 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
))
6893 preamble_type
[k
] = BRCMS_SHORT_PREAMBLE
;
6896 for (k
= 0; k
< hw
->max_rates
; k
++) {
6897 /* Set ctrlchbw as 20Mhz */
6898 rspec
[k
] &= ~RSPEC_BW_MASK
;
6899 rspec
[k
] |= (PHY_TXC1_BW_20MHZ
<< RSPEC_BW_SHIFT
);
6901 /* for nphy, stf of ofdm frames must follow policies */
6902 if (BRCMS_ISNPHY(wlc
->band
) && is_ofdm_rate(rspec
[k
])) {
6903 rspec
[k
] &= ~RSPEC_STF_MASK
;
6904 rspec
[k
] |= phyctl1_stf
<< RSPEC_STF_SHIFT
;
6909 /* Reset these for use with AMPDU's */
6910 txrate
[0]->count
= 0;
6911 txrate
[1]->count
= 0;
6913 /* (2) PROTECTION, may change rspec */
6914 if ((ieee80211_is_data(h
->frame_control
) ||
6915 ieee80211_is_mgmt(h
->frame_control
)) &&
6916 (phylen
> wlc
->RTSThresh
) && !is_multicast_ether_addr(h
->addr1
))
6919 /* (3) PLCP: determine PLCP header and MAC duration,
6920 * fill struct d11txh */
6921 brcms_c_compute_plcp(wlc
, rspec
[0], phylen
, plcp
);
6922 brcms_c_compute_plcp(wlc
, rspec
[1], phylen
, plcp_fallback
);
6923 memcpy(&txh
->FragPLCPFallback
,
6924 plcp_fallback
, sizeof(txh
->FragPLCPFallback
));
6926 /* Length field now put in CCK FBR CRC field */
6927 if (is_cck_rate(rspec
[1])) {
6928 txh
->FragPLCPFallback
[4] = phylen
& 0xff;
6929 txh
->FragPLCPFallback
[5] = (phylen
& 0xff00) >> 8;
6932 /* MIMO-RATE: need validation ?? */
6933 mainrates
= is_ofdm_rate(rspec
[0]) ?
6934 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr
*) plcp
) :
6937 /* DUR field for main rate */
6938 if (!ieee80211_is_pspoll(h
->frame_control
) &&
6939 !is_multicast_ether_addr(h
->addr1
) && !use_rifs
) {
6941 brcms_c_compute_frame_dur(wlc
, rspec
[0], preamble_type
[0],
6943 h
->duration_id
= cpu_to_le16(durid
);
6944 } else if (use_rifs
) {
6945 /* NAV protect to end of next max packet size */
6947 (u16
) brcms_c_calc_frame_time(wlc
, rspec
[0],
6949 DOT11_MAX_FRAG_LEN
);
6950 durid
+= RIFS_11N_TIME
;
6951 h
->duration_id
= cpu_to_le16(durid
);
6954 /* DUR field for fallback rate */
6955 if (ieee80211_is_pspoll(h
->frame_control
))
6956 txh
->FragDurFallback
= h
->duration_id
;
6957 else if (is_multicast_ether_addr(h
->addr1
) || use_rifs
)
6958 txh
->FragDurFallback
= 0;
6960 durid
= brcms_c_compute_frame_dur(wlc
, rspec
[1],
6961 preamble_type
[1], next_frag_len
);
6962 txh
->FragDurFallback
= cpu_to_le16(durid
);
6965 /* (4) MAC-HDR: MacTxControlLow */
6967 mcl
|= TXC_STARTMSDU
;
6969 if (!is_multicast_ether_addr(h
->addr1
))
6970 mcl
|= TXC_IMMEDACK
;
6972 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
6973 mcl
|= TXC_FREQBAND_5G
;
6975 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc
->band
->pi
)))
6978 /* set AMIC bit if using hardware TKIP MIC */
6982 txh
->MacTxControlLow
= cpu_to_le16(mcl
);
6984 /* MacTxControlHigh */
6987 /* Set fallback rate preamble type */
6988 if ((preamble_type
[1] == BRCMS_SHORT_PREAMBLE
) ||
6989 (preamble_type
[1] == BRCMS_GF_PREAMBLE
)) {
6990 if (rspec2rate(rspec
[1]) != BRCM_RATE_1M
)
6991 mch
|= TXC_PREAMBLE_DATA_FB_SHORT
;
6994 /* MacFrameControl */
6995 memcpy(&txh
->MacFrameControl
, &h
->frame_control
, sizeof(u16
));
6996 txh
->TxFesTimeNormal
= cpu_to_le16(0);
6998 txh
->TxFesTimeFallback
= cpu_to_le16(0);
7001 memcpy(&txh
->TxFrameRA
, &h
->addr1
, ETH_ALEN
);
7004 txh
->TxFrameID
= cpu_to_le16(frameid
);
7007 * TxStatus, Note the case of recreating the first frag of a suppressed
7008 * frame then we may need to reset the retry cnt's via the status reg
7010 txh
->TxStatus
= cpu_to_le16(status
);
7013 * extra fields for ucode AMPDU aggregation, the new fields are added to
7014 * the END of previous structure so that it's compatible in driver.
7016 txh
->MaxNMpdus
= cpu_to_le16(0);
7017 txh
->MaxABytes_MRT
= cpu_to_le16(0);
7018 txh
->MaxABytes_FBR
= cpu_to_le16(0);
7019 txh
->MinMBytes
= cpu_to_le16(0);
7021 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7022 * furnish struct d11txh */
7023 /* RTS PLCP header and RTS frame */
7024 if (use_rts
|| use_cts
) {
7025 if (use_rts
&& use_cts
)
7028 for (k
= 0; k
< 2; k
++) {
7029 rts_rspec
[k
] = brcms_c_rspec_to_rts_rspec(wlc
, rspec
[k
],
7034 if (!is_ofdm_rate(rts_rspec
[0]) &&
7035 !((rspec2rate(rts_rspec
[0]) == BRCM_RATE_1M
) ||
7036 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
7037 rts_preamble_type
[0] = BRCMS_SHORT_PREAMBLE
;
7038 mch
|= TXC_PREAMBLE_RTS_MAIN_SHORT
;
7041 if (!is_ofdm_rate(rts_rspec
[1]) &&
7042 !((rspec2rate(rts_rspec
[1]) == BRCM_RATE_1M
) ||
7043 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
7044 rts_preamble_type
[1] = BRCMS_SHORT_PREAMBLE
;
7045 mch
|= TXC_PREAMBLE_RTS_FB_SHORT
;
7048 /* RTS/CTS additions to MacTxControlLow */
7050 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDCTS
);
7052 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDRTS
);
7053 txh
->MacTxControlLow
|= cpu_to_le16(TXC_LONGFRAME
);
7056 /* RTS PLCP header */
7057 rts_plcp
= txh
->RTSPhyHeader
;
7059 rts_phylen
= DOT11_CTS_LEN
+ FCS_LEN
;
7061 rts_phylen
= DOT11_RTS_LEN
+ FCS_LEN
;
7063 brcms_c_compute_plcp(wlc
, rts_rspec
[0], rts_phylen
, rts_plcp
);
7065 /* fallback rate version of RTS PLCP header */
7066 brcms_c_compute_plcp(wlc
, rts_rspec
[1], rts_phylen
,
7068 memcpy(&txh
->RTSPLCPFallback
, rts_plcp_fallback
,
7069 sizeof(txh
->RTSPLCPFallback
));
7071 /* RTS frame fields... */
7072 rts
= (struct ieee80211_rts
*)&txh
->rts_frame
;
7074 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
, rts_rspec
[0],
7075 rspec
[0], rts_preamble_type
[0],
7076 preamble_type
[0], phylen
, false);
7077 rts
->duration
= cpu_to_le16(durid
);
7078 /* fallback rate version of RTS DUR field */
7079 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
,
7080 rts_rspec
[1], rspec
[1],
7081 rts_preamble_type
[1],
7082 preamble_type
[1], phylen
, false);
7083 txh
->RTSDurFallback
= cpu_to_le16(durid
);
7086 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7087 IEEE80211_STYPE_CTS
);
7089 memcpy(&rts
->ra
, &h
->addr2
, ETH_ALEN
);
7091 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7092 IEEE80211_STYPE_RTS
);
7094 memcpy(&rts
->ra
, &h
->addr1
, 2 * ETH_ALEN
);
7098 * low 8 bits: main frag rate/mcs,
7099 * high 8 bits: rts/cts rate/mcs
7101 mainrates
|= (is_ofdm_rate(rts_rspec
[0]) ?
7103 (struct ofdm_phy_hdr
*) rts_plcp
) :
7106 memset((char *)txh
->RTSPhyHeader
, 0, D11_PHY_HDR_LEN
);
7107 memset((char *)&txh
->rts_frame
, 0,
7108 sizeof(struct ieee80211_rts
));
7109 memset((char *)txh
->RTSPLCPFallback
, 0,
7110 sizeof(txh
->RTSPLCPFallback
));
7111 txh
->RTSDurFallback
= 0;
7114 #ifdef SUPPORT_40MHZ
7115 /* add null delimiter count */
7116 if ((tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && is_mcs_rate(rspec
))
7117 txh
->RTSPLCPFallback
[AMPDU_FBR_NULL_DELIM
] =
7118 brcm_c_ampdu_null_delim_cnt(wlc
->ampdu
, scb
, rspec
, phylen
);
7123 * Now that RTS/RTS FB preamble types are updated, write
7126 txh
->MacTxControlHigh
= cpu_to_le16(mch
);
7129 * MainRates (both the rts and frag plcp rates have
7130 * been calculated now)
7132 txh
->MainRates
= cpu_to_le16(mainrates
);
7134 /* XtraFrameTypes */
7135 xfts
= frametype(rspec
[1], wlc
->mimoft
);
7136 xfts
|= (frametype(rts_rspec
[0], wlc
->mimoft
) << XFTS_RTS_FT_SHIFT
);
7137 xfts
|= (frametype(rts_rspec
[1], wlc
->mimoft
) << XFTS_FBRRTS_FT_SHIFT
);
7138 xfts
|= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc
->band
->pi
)) <<
7140 txh
->XtraFrameTypes
= cpu_to_le16(xfts
);
7142 /* PhyTxControlWord */
7143 phyctl
= frametype(rspec
[0], wlc
->mimoft
);
7144 if ((preamble_type
[0] == BRCMS_SHORT_PREAMBLE
) ||
7145 (preamble_type
[0] == BRCMS_GF_PREAMBLE
)) {
7146 if (rspec2rate(rspec
[0]) != BRCM_RATE_1M
)
7147 phyctl
|= PHY_TXC_SHORT_HDR
;
7150 /* phytxant is properly bit shifted */
7151 phyctl
|= brcms_c_stf_d11hdrs_phyctl_txant(wlc
, rspec
[0]);
7152 txh
->PhyTxControlWord
= cpu_to_le16(phyctl
);
7154 /* PhyTxControlWord_1 */
7155 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7158 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[0]);
7159 txh
->PhyTxControlWord_1
= cpu_to_le16(phyctl1
);
7160 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[1]);
7161 txh
->PhyTxControlWord_1_Fbr
= cpu_to_le16(phyctl1
);
7163 if (use_rts
|| use_cts
) {
7164 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[0]);
7165 txh
->PhyTxControlWord_1_Rts
= cpu_to_le16(phyctl1
);
7166 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[1]);
7167 txh
->PhyTxControlWord_1_FbrRts
= cpu_to_le16(phyctl1
);
7171 * For mcs frames, if mixedmode(overloaded with long preamble)
7172 * is going to be set, fill in non-zero MModeLen and/or
7173 * MModeFbrLen it will be unnecessary if they are separated
7175 if (is_mcs_rate(rspec
[0]) &&
7176 (preamble_type
[0] == BRCMS_MM_PREAMBLE
)) {
7178 brcms_c_calc_lsig_len(wlc
, rspec
[0], phylen
);
7179 txh
->MModeLen
= cpu_to_le16(mmodelen
);
7182 if (is_mcs_rate(rspec
[1]) &&
7183 (preamble_type
[1] == BRCMS_MM_PREAMBLE
)) {
7185 brcms_c_calc_lsig_len(wlc
, rspec
[1], phylen
);
7186 txh
->MModeFbrLen
= cpu_to_le16(mmodefbrlen
);
7190 ac
= skb_get_queue_mapping(p
);
7191 if ((scb
->flags
& SCB_WMECAP
) && qos
&& wlc
->edcf_txop
[ac
]) {
7192 uint frag_dur
, dur
, dur_fallback
;
7194 /* WME: Update TXOP threshold */
7195 if (!(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && frag
== 0) {
7197 brcms_c_calc_frame_time(wlc
, rspec
[0],
7198 preamble_type
[0], phylen
);
7201 /* 1 RTS or CTS-to-self frame */
7203 brcms_c_calc_cts_time(wlc
, rts_rspec
[0],
7204 rts_preamble_type
[0]);
7206 brcms_c_calc_cts_time(wlc
, rts_rspec
[1],
7207 rts_preamble_type
[1]);
7208 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7209 dur
+= le16_to_cpu(rts
->duration
);
7211 le16_to_cpu(txh
->RTSDurFallback
);
7212 } else if (use_rifs
) {
7216 /* frame + SIFS + ACK */
7219 brcms_c_compute_frame_dur(wlc
, rspec
[0],
7220 preamble_type
[0], 0);
7223 brcms_c_calc_frame_time(wlc
, rspec
[1],
7227 brcms_c_compute_frame_dur(wlc
, rspec
[1],
7228 preamble_type
[1], 0);
7230 /* NEED to set TxFesTimeNormal (hard) */
7231 txh
->TxFesTimeNormal
= cpu_to_le16((u16
) dur
);
7233 * NEED to set fallback rate version of
7234 * TxFesTimeNormal (hard)
7236 txh
->TxFesTimeFallback
=
7237 cpu_to_le16((u16
) dur_fallback
);
7240 * update txop byte threshold (txop minus intraframe
7243 if (wlc
->edcf_txop
[ac
] >= (dur
- frag_dur
)) {
7247 brcms_c_calc_frame_len(wlc
,
7248 rspec
[0], preamble_type
[0],
7249 (wlc
->edcf_txop
[ac
] -
7251 /* range bound the fragthreshold */
7252 if (newfragthresh
< DOT11_MIN_FRAG_LEN
)
7255 else if (newfragthresh
>
7256 wlc
->usr_fragthresh
)
7258 wlc
->usr_fragthresh
;
7259 /* update the fragthresh and do txc update */
7260 if (wlc
->fragthresh
[queue
] !=
7261 (u16
) newfragthresh
)
7262 wlc
->fragthresh
[queue
] =
7263 (u16
) newfragthresh
;
7265 wiphy_err(wlc
->wiphy
, "wl%d: %s txop invalid "
7267 wlc
->pub
->unit
, fifo_names
[queue
],
7268 rspec2rate(rspec
[0]));
7271 if (dur
> wlc
->edcf_txop
[ac
])
7272 wiphy_err(wlc
->wiphy
, "wl%d: %s: %s txop "
7273 "exceeded phylen %d/%d dur %d/%d\n",
7274 wlc
->pub
->unit
, __func__
,
7276 phylen
, wlc
->fragthresh
[queue
],
7277 dur
, wlc
->edcf_txop
[ac
]);
7284 void brcms_c_sendpkt_mac80211(struct brcms_c_info
*wlc
, struct sk_buff
*sdu
,
7285 struct ieee80211_hw
*hw
)
7289 struct scb
*scb
= &wlc
->pri_scb
;
7290 struct ieee80211_hdr
*d11_header
= (struct ieee80211_hdr
*)(sdu
->data
);
7293 * 802.11 standard requires management traffic
7294 * to go at highest priority
7296 prio
= ieee80211_is_data(d11_header
->frame_control
) ? sdu
->priority
:
7298 fifo
= prio2fifo
[prio
];
7299 if (brcms_c_d11hdrs_mac80211(wlc
, hw
, sdu
, scb
, 0, 1, fifo
, 0))
7301 brcms_c_txq_enq(wlc
, scb
, sdu
, BRCMS_PRIO_TO_PREC(prio
));
7302 brcms_c_send_q(wlc
);
7305 void brcms_c_send_q(struct brcms_c_info
*wlc
)
7307 struct sk_buff
*pkt
[DOT11_MAXNUMFRAGS
];
7310 int err
= 0, i
, count
;
7312 struct brcms_txq_info
*qi
= wlc
->pkt_queue
;
7313 struct pktq
*q
= &qi
->q
;
7314 struct ieee80211_tx_info
*tx_info
;
7316 prec_map
= wlc
->tx_prec_map
;
7318 /* Send all the enq'd pkts that we can.
7319 * Dequeue packets with precedence with empty HW fifo only
7321 while (prec_map
&& (pkt
[0] = brcmu_pktq_mdeq(q
, prec_map
, &prec
))) {
7322 tx_info
= IEEE80211_SKB_CB(pkt
[0]);
7323 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
7324 err
= brcms_c_sendampdu(wlc
->ampdu
, qi
, pkt
, prec
);
7327 err
= brcms_c_prep_pdu(wlc
, pkt
[0], &fifo
);
7329 for (i
= 0; i
< count
; i
++)
7330 brcms_c_txfifo(wlc
, fifo
, pkt
[i
], true,
7335 if (err
== -EBUSY
) {
7336 brcmu_pktq_penq_head(q
, prec
, pkt
[0]);
7338 * If send failed due to any other reason than a
7339 * change in HW FIFO condition, quit. Otherwise,
7340 * read the new prec_map!
7342 if (prec_map
== wlc
->tx_prec_map
)
7344 prec_map
= wlc
->tx_prec_map
;
7350 brcms_c_txfifo(struct brcms_c_info
*wlc
, uint fifo
, struct sk_buff
*p
,
7351 bool commit
, s8 txpktpend
)
7353 u16 frameid
= INVALIDFID
;
7356 txh
= (struct d11txh
*) (p
->data
);
7358 /* When a BC/MC frame is being committed to the BCMC fifo
7359 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7361 if (fifo
== TX_BCMC_FIFO
)
7362 frameid
= le16_to_cpu(txh
->TxFrameID
);
7365 * Bump up pending count for if not using rpc. If rpc is
7366 * used, this will be handled in brcms_b_txfifo()
7369 wlc
->core
->txpktpend
[fifo
] += txpktpend
;
7370 BCMMSG(wlc
->wiphy
, "pktpend inc %d to %d\n",
7371 txpktpend
, wlc
->core
->txpktpend
[fifo
]);
7374 /* Commit BCMC sequence number in the SHM frame ID location */
7375 if (frameid
!= INVALIDFID
) {
7377 * To inform the ucode of the last mcast frame posted
7378 * so that it can clear moredata bit
7380 brcms_b_write_shm(wlc
->hw
, M_BCMC_FID
, frameid
);
7383 if (dma_txfast(wlc
->hw
->di
[fifo
], p
, commit
) < 0)
7384 wiphy_err(wlc
->wiphy
, "txfifo: fatal, toss frames !!!\n");
7388 brcms_c_rspec_to_rts_rspec(struct brcms_c_info
*wlc
, u32 rspec
,
7389 bool use_rspec
, u16 mimo_ctlchbw
)
7394 /* use frame rate as rts rate */
7396 else if (wlc
->band
->gmode
&& wlc
->protection
->_g
&& !is_cck_rate(rspec
))
7397 /* Use 11Mbps as the g protection RTS target rate and fallback.
7398 * Use the brcms_basic_rate() lookup to find the best basic rate
7399 * under the target in case 11 Mbps is not Basic.
7400 * 6 and 9 Mbps are not usually selected by rate selection, but
7401 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7404 rts_rspec
= brcms_basic_rate(wlc
, BRCM_RATE_11M
);
7406 /* calculate RTS rate and fallback rate based on the frame rate
7407 * RTS must be sent at a basic rate since it is a
7408 * control frame, sec 9.6 of 802.11 spec
7410 rts_rspec
= brcms_basic_rate(wlc
, rspec
);
7412 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7413 /* set rts txbw to correct side band */
7414 rts_rspec
&= ~RSPEC_BW_MASK
;
7417 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7418 * 20MHz channel (DUP), otherwise send RTS on control channel
7420 if (rspec_is40mhz(rspec
) && !is_cck_rate(rts_rspec
))
7421 rts_rspec
|= (PHY_TXC1_BW_40MHZ_DUP
<< RSPEC_BW_SHIFT
);
7423 rts_rspec
|= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
7425 /* pick siso/cdd as default for ofdm */
7426 if (is_ofdm_rate(rts_rspec
)) {
7427 rts_rspec
&= ~RSPEC_STF_MASK
;
7428 rts_rspec
|= (wlc
->stf
->ss_opmode
<< RSPEC_STF_SHIFT
);
7435 brcms_c_txfifo_complete(struct brcms_c_info
*wlc
, uint fifo
, s8 txpktpend
)
7437 wlc
->core
->txpktpend
[fifo
] -= txpktpend
;
7438 BCMMSG(wlc
->wiphy
, "pktpend dec %d to %d\n", txpktpend
,
7439 wlc
->core
->txpktpend
[fifo
]);
7441 /* There is more room; mark precedences related to this FIFO sendable */
7442 wlc
->tx_prec_map
|= wlc
->fifo2prec_map
[fifo
];
7444 /* figure out which bsscfg is being worked on... */
7447 /* Update beacon listen interval in shared memory */
7448 static void brcms_c_bcn_li_upd(struct brcms_c_info
*wlc
)
7450 /* wake up every DTIM is the default */
7451 if (wlc
->bcn_li_dtim
== 1)
7452 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
, 0);
7454 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
,
7455 (wlc
->bcn_li_dtim
<< 8) | wlc
->bcn_li_bcn
);
7459 brcms_b_read_tsf(struct brcms_hardware
*wlc_hw
, u32
*tsf_l_ptr
,
7462 struct bcma_device
*core
= wlc_hw
->d11core
;
7464 /* read the tsf timer low, then high to get an atomic read */
7465 *tsf_l_ptr
= bcma_read32(core
, D11REGOFFS(tsf_timerlow
));
7466 *tsf_h_ptr
= bcma_read32(core
, D11REGOFFS(tsf_timerhigh
));
7470 * recover 64bit TSF value from the 16bit TSF value in the rx header
7471 * given the assumption that the TSF passed in header is within 65ms
7472 * of the current tsf.
7475 * 3.......6.......8.......0.......2.......4.......6.......8......0
7476 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7478 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7479 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7480 * receive call sequence after rx interrupt. Only the higher 16 bits
7481 * are used. Finally, the tsf_h is read from the tsf register.
7483 static u64
brcms_c_recover_tsf64(struct brcms_c_info
*wlc
,
7484 struct d11rxhdr
*rxh
)
7487 u16 rx_tsf_0_15
, rx_tsf_16_31
;
7489 brcms_b_read_tsf(wlc
->hw
, &tsf_l
, &tsf_h
);
7491 rx_tsf_16_31
= (u16
)(tsf_l
>> 16);
7492 rx_tsf_0_15
= rxh
->RxTSFTime
;
7495 * a greater tsf time indicates the low 16 bits of
7496 * tsf_l wrapped, so decrement the high 16 bits.
7498 if ((u16
)tsf_l
< rx_tsf_0_15
) {
7500 if (rx_tsf_16_31
== 0xffff)
7504 return ((u64
)tsf_h
<< 32) | (((u32
)rx_tsf_16_31
<< 16) + rx_tsf_0_15
);
7508 prep_mac80211_status(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
7510 struct ieee80211_rx_status
*rx_status
)
7515 unsigned char *plcp
;
7517 /* fill in TSF and flag its presence */
7518 rx_status
->mactime
= brcms_c_recover_tsf64(wlc
, rxh
);
7519 rx_status
->flag
|= RX_FLAG_MACTIME_MPDU
;
7521 channel
= BRCMS_CHAN_CHANNEL(rxh
->RxChan
);
7524 rx_status
->band
= IEEE80211_BAND_5GHZ
;
7525 rx_status
->freq
= ieee80211_ofdm_chan_to_freq(
7526 WF_CHAN_FACTOR_5_G
/2, channel
);
7529 rx_status
->band
= IEEE80211_BAND_2GHZ
;
7530 rx_status
->freq
= ieee80211_dsss_chan_to_freq(channel
);
7533 rx_status
->signal
= wlc_phy_rssi_compute(wlc
->hw
->band
->pi
, rxh
);
7537 rx_status
->antenna
=
7538 (rxh
->PhyRxStatus_0
& PRXS0_RXANT_UPSUBBAND
) ? 1 : 0;
7542 rspec
= brcms_c_compute_rspec(rxh
, plcp
);
7543 if (is_mcs_rate(rspec
)) {
7544 rx_status
->rate_idx
= rspec
& RSPEC_RATE_MASK
;
7545 rx_status
->flag
|= RX_FLAG_HT
;
7546 if (rspec_is40mhz(rspec
))
7547 rx_status
->flag
|= RX_FLAG_40MHZ
;
7549 switch (rspec2rate(rspec
)) {
7551 rx_status
->rate_idx
= 0;
7554 rx_status
->rate_idx
= 1;
7557 rx_status
->rate_idx
= 2;
7560 rx_status
->rate_idx
= 3;
7563 rx_status
->rate_idx
= 4;
7566 rx_status
->rate_idx
= 5;
7569 rx_status
->rate_idx
= 6;
7572 rx_status
->rate_idx
= 7;
7575 rx_status
->rate_idx
= 8;
7578 rx_status
->rate_idx
= 9;
7581 rx_status
->rate_idx
= 10;
7584 rx_status
->rate_idx
= 11;
7587 wiphy_err(wlc
->wiphy
, "%s: Unknown rate\n", __func__
);
7591 * For 5GHz, we should decrease the index as it is
7592 * a subset of the 2.4G rates. See bitrates field
7593 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7595 if (rx_status
->band
== IEEE80211_BAND_5GHZ
)
7596 rx_status
->rate_idx
-= BRCMS_LEGACY_5G_RATE_OFFSET
;
7598 /* Determine short preamble and rate_idx */
7600 if (is_cck_rate(rspec
)) {
7601 if (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
)
7602 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
7603 } else if (is_ofdm_rate(rspec
)) {
7604 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
7606 wiphy_err(wlc
->wiphy
, "%s: Unknown modulation\n",
7611 if (plcp3_issgi(plcp
[3]))
7612 rx_status
->flag
|= RX_FLAG_SHORT_GI
;
7614 if (rxh
->RxStatus1
& RXS_DECERR
) {
7615 rx_status
->flag
|= RX_FLAG_FAILED_PLCP_CRC
;
7616 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7619 if (rxh
->RxStatus1
& RXS_FCSERR
) {
7620 rx_status
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
7621 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7627 brcms_c_recvctl(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
7631 struct ieee80211_rx_status rx_status
;
7632 struct ieee80211_hdr
*hdr
;
7634 memset(&rx_status
, 0, sizeof(rx_status
));
7635 prep_mac80211_status(wlc
, rxh
, p
, &rx_status
);
7637 /* mac header+body length, exclude CRC and plcp header */
7638 len_mpdu
= p
->len
- D11_PHY_HDR_LEN
- FCS_LEN
;
7639 skb_pull(p
, D11_PHY_HDR_LEN
);
7640 __skb_trim(p
, len_mpdu
);
7642 /* unmute transmit */
7643 if (wlc
->hw
->suspended_fifos
) {
7644 hdr
= (struct ieee80211_hdr
*)p
->data
;
7645 if (ieee80211_is_beacon(hdr
->frame_control
))
7646 brcms_b_mute(wlc
->hw
, false);
7649 memcpy(IEEE80211_SKB_RXCB(p
), &rx_status
, sizeof(rx_status
));
7650 ieee80211_rx_irqsafe(wlc
->pub
->ieee_hw
, p
);
7653 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7654 * number of bytes goes in the length field
7656 * Formula given by HT PHY Spec v 1.13
7657 * len = 3(nsyms + nstream + 3) - 3
7660 brcms_c_calc_lsig_len(struct brcms_c_info
*wlc
, u32 ratespec
,
7663 uint nsyms
, len
= 0, kNdps
;
7665 BCMMSG(wlc
->wiphy
, "wl%d: rate %d, len%d\n",
7666 wlc
->pub
->unit
, rspec2rate(ratespec
), mac_len
);
7668 if (is_mcs_rate(ratespec
)) {
7669 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
7670 int tot_streams
= (mcs_2_txstreams(mcs
) + 1) +
7671 rspec_stc(ratespec
);
7674 * the payload duration calculation matches that
7677 /* 1000Ndbps = kbps * 4 */
7678 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
7679 rspec_issgi(ratespec
)) * 4;
7681 if (rspec_stc(ratespec
) == 0)
7683 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
7684 APHY_TAIL_NBITS
) * 1000, kNdps
);
7686 /* STBC needs to have even number of symbols */
7689 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
7690 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
7692 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7693 nsyms
+= (tot_streams
+ 3);
7695 * 3 bytes/symbol @ legacy 6Mbps rate
7696 * (-3) excluding service bits and tail bits
7698 len
= (3 * nsyms
) - 3;
7705 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info
*wlc
, uint frame_len
)
7707 const struct brcms_c_rateset
*rs_dflt
;
7708 struct brcms_c_rateset rs
;
7711 u8 plcp
[D11_PHY_HDR_LEN
];
7715 sifs
= get_sifs(wlc
->band
);
7717 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
7719 brcms_c_rateset_copy(rs_dflt
, &rs
);
7720 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
7723 * walk the phy rate table and update MAC core SHM
7724 * basic rate table entries
7726 for (i
= 0; i
< rs
.count
; i
++) {
7727 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
7729 entry_ptr
= brcms_b_rate_shm_offset(wlc
->hw
, rate
);
7731 /* Calculate the Probe Response PLCP for the given rate */
7732 brcms_c_compute_plcp(wlc
, rate
, frame_len
, plcp
);
7735 * Calculate the duration of the Probe Response
7736 * frame plus SIFS for the MAC
7738 dur
= (u16
) brcms_c_calc_frame_time(wlc
, rate
,
7739 BRCMS_LONG_PREAMBLE
, frame_len
);
7742 /* Update the SHM Rate Table entry Probe Response values */
7743 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
,
7744 (u16
) (plcp
[0] + (plcp
[1] << 8)));
7745 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
+ 2,
7746 (u16
) (plcp
[2] + (plcp
[3] << 8)));
7747 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_DUR_POS
, dur
);
7751 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
7753 * PLCP header is 6 bytes.
7754 * 802.11 A3 header is 24 bytes.
7755 * Max beacon frame body template length is 112 bytes.
7756 * Max probe resp frame body template length is 110 bytes.
7758 * *len on input contains the max length of the packet available.
7760 * The *len value is set to the number of bytes in buf used, and starts
7761 * with the PLCP and included up to, but not including, the 4 byte FCS.
7764 brcms_c_bcn_prb_template(struct brcms_c_info
*wlc
, u16 type
,
7766 struct brcms_bss_cfg
*cfg
, u16
*buf
, int *len
)
7768 static const u8 ether_bcast
[ETH_ALEN
] = {255, 255, 255, 255, 255, 255};
7769 struct cck_phy_hdr
*plcp
;
7770 struct ieee80211_mgmt
*h
;
7771 int hdr_len
, body_len
;
7773 hdr_len
= D11_PHY_HDR_LEN
+ DOT11_MAC_HDR_LEN
;
7775 /* calc buffer size provided for frame body */
7776 body_len
= *len
- hdr_len
;
7777 /* return actual size */
7778 *len
= hdr_len
+ body_len
;
7780 /* format PHY and MAC headers */
7781 memset((char *)buf
, 0, hdr_len
);
7783 plcp
= (struct cck_phy_hdr
*) buf
;
7786 * PLCP for Probe Response frames are filled in from
7789 if (type
== IEEE80211_STYPE_BEACON
)
7791 brcms_c_compute_plcp(wlc
, bcn_rspec
,
7792 (DOT11_MAC_HDR_LEN
+ body_len
+ FCS_LEN
),
7795 /* "Regular" and 16 MBSS but not for 4 MBSS */
7796 /* Update the phytxctl for the beacon based on the rspec */
7797 brcms_c_beacon_phytxctl_txant_upd(wlc
, bcn_rspec
);
7799 h
= (struct ieee80211_mgmt
*)&plcp
[1];
7801 /* fill in 802.11 header */
7802 h
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
| type
);
7804 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7805 /* A1 filled in by MAC for prb resp, broadcast for bcn */
7806 if (type
== IEEE80211_STYPE_BEACON
)
7807 memcpy(&h
->da
, ðer_bcast
, ETH_ALEN
);
7808 memcpy(&h
->sa
, &cfg
->cur_etheraddr
, ETH_ALEN
);
7809 memcpy(&h
->bssid
, &cfg
->BSSID
, ETH_ALEN
);
7811 /* SEQ filled in by MAC */
7814 int brcms_c_get_header_len(void)
7820 * Update all beacons for the system.
7822 void brcms_c_update_beacon(struct brcms_c_info
*wlc
)
7824 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
7826 if (bsscfg
->up
&& !bsscfg
->BSS
)
7827 /* Clear the soft intmask */
7828 wlc
->defmacintmask
&= ~MI_BCNTPL
;
7831 /* Write ssid into shared memory */
7833 brcms_c_shm_ssid_upd(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*cfg
)
7835 u8
*ssidptr
= cfg
->SSID
;
7837 u8 ssidbuf
[IEEE80211_MAX_SSID_LEN
];
7839 /* padding the ssid with zero and copy it into shm */
7840 memset(ssidbuf
, 0, IEEE80211_MAX_SSID_LEN
);
7841 memcpy(ssidbuf
, ssidptr
, cfg
->SSID_len
);
7843 brcms_c_copyto_shm(wlc
, base
, ssidbuf
, IEEE80211_MAX_SSID_LEN
);
7844 brcms_b_write_shm(wlc
->hw
, M_SSIDLEN
, (u16
) cfg
->SSID_len
);
7848 brcms_c_bss_update_probe_resp(struct brcms_c_info
*wlc
,
7849 struct brcms_bss_cfg
*cfg
,
7852 u16 prb_resp
[BCN_TMPL_LEN
/ 2];
7853 int len
= BCN_TMPL_LEN
;
7856 * write the probe response to hardware, or save in
7857 * the config structure
7860 /* create the probe response template */
7861 brcms_c_bcn_prb_template(wlc
, IEEE80211_STYPE_PROBE_RESP
, 0,
7862 cfg
, prb_resp
, &len
);
7865 brcms_c_suspend_mac_and_wait(wlc
);
7867 /* write the probe response into the template region */
7868 brcms_b_write_template_ram(wlc
->hw
, T_PRS_TPL_BASE
,
7869 (len
+ 3) & ~3, prb_resp
);
7871 /* write the length of the probe response frame (+PLCP/-FCS) */
7872 brcms_b_write_shm(wlc
->hw
, M_PRB_RESP_FRM_LEN
, (u16
) len
);
7874 /* write the SSID and SSID length */
7875 brcms_c_shm_ssid_upd(wlc
, cfg
);
7878 * Write PLCP headers and durations for probe response frames
7879 * at all rates. Use the actual frame length covered by the
7880 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7881 * by subtracting the PLCP len and adding the FCS.
7883 len
+= (-D11_PHY_HDR_LEN
+ FCS_LEN
);
7884 brcms_c_mod_prb_rsp_rate_table(wlc
, (u16
) len
);
7887 brcms_c_enable_mac(wlc
);
7890 void brcms_c_update_probe_resp(struct brcms_c_info
*wlc
, bool suspend
)
7892 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
7894 /* update AP or IBSS probe responses */
7895 if (bsscfg
->up
&& !bsscfg
->BSS
)
7896 brcms_c_bss_update_probe_resp(wlc
, bsscfg
, suspend
);
7899 /* prepares pdu for transmission. returns BCM error codes */
7900 int brcms_c_prep_pdu(struct brcms_c_info
*wlc
, struct sk_buff
*pdu
, uint
*fifop
)
7904 struct ieee80211_hdr
*h
;
7907 txh
= (struct d11txh
*) (pdu
->data
);
7908 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
7910 /* get the pkt queue info. This was put at brcms_c_sendctl or
7911 * brcms_c_send for PDU */
7912 fifo
= le16_to_cpu(txh
->TxFrameID
) & TXFID_QUEUE_MASK
;
7918 /* return if insufficient dma resources */
7919 if (*wlc
->core
->txavail
[fifo
] < MAX_DMA_SEGS
) {
7920 /* Mark precedences related to this FIFO, unsendable */
7921 /* A fifo is full. Clear precedences related to that FIFO */
7922 wlc
->tx_prec_map
&= ~(wlc
->fifo2prec_map
[fifo
]);
7928 int brcms_b_xmtfifo_sz_get(struct brcms_hardware
*wlc_hw
, uint fifo
,
7934 *blocks
= wlc_hw
->xmtfifo_sz
[fifo
];
7940 brcms_c_set_addrmatch(struct brcms_c_info
*wlc
, int match_reg_offset
,
7943 brcms_b_set_addrmatch(wlc
->hw
, match_reg_offset
, addr
);
7944 if (match_reg_offset
== RCM_BSSID_OFFSET
)
7945 memcpy(wlc
->bsscfg
->BSSID
, addr
, ETH_ALEN
);
7949 * Flag 'scan in progress' to withhold dynamic phy calibration
7951 void brcms_c_scan_start(struct brcms_c_info
*wlc
)
7953 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, true);
7956 void brcms_c_scan_stop(struct brcms_c_info
*wlc
)
7958 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, false);
7961 void brcms_c_associate_upd(struct brcms_c_info
*wlc
, bool state
)
7963 wlc
->pub
->associated
= state
;
7964 wlc
->bsscfg
->associated
= state
;
7968 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7969 * AMPDU traffic, packets pending in hardware have to be invalidated so that
7970 * when later on hardware releases them, they can be handled appropriately.
7972 void brcms_c_inval_dma_pkts(struct brcms_hardware
*hw
,
7973 struct ieee80211_sta
*sta
,
7974 void (*dma_callback_fn
))
7976 struct dma_pub
*dmah
;
7978 for (i
= 0; i
< NFIFO
; i
++) {
7981 dma_walk_packets(dmah
, dma_callback_fn
, sta
);
7985 int brcms_c_get_curband(struct brcms_c_info
*wlc
)
7987 return wlc
->band
->bandunit
;
7990 void brcms_c_wait_for_tx_completion(struct brcms_c_info
*wlc
, bool drop
)
7994 /* flush packet queue when requested */
7996 brcmu_pktq_flush(&wlc
->pkt_queue
->q
, false, NULL
, NULL
);
7998 /* wait for queue and DMA fifos to run dry */
7999 while (!pktq_empty(&wlc
->pkt_queue
->q
) || brcms_txpktpendtot(wlc
) > 0) {
8000 brcms_msleep(wlc
->wl
, 1);
8006 WARN_ON_ONCE(timeout
== 0);
8009 void brcms_c_set_beacon_listen_interval(struct brcms_c_info
*wlc
, u8 interval
)
8011 wlc
->bcn_li_bcn
= interval
;
8013 brcms_c_bcn_li_upd(wlc
);
8016 int brcms_c_set_tx_power(struct brcms_c_info
*wlc
, int txpwr
)
8020 /* Remove override bit and clip to max qdbm value */
8021 qdbm
= min_t(uint
, txpwr
* BRCMS_TXPWR_DB_FACTOR
, 0xff);
8022 return wlc_phy_txpower_set(wlc
->band
->pi
, qdbm
, false);
8025 int brcms_c_get_tx_power(struct brcms_c_info
*wlc
)
8030 wlc_phy_txpower_get(wlc
->band
->pi
, &qdbm
, &override
);
8032 /* Return qdbm units */
8033 return (int)(qdbm
/ BRCMS_TXPWR_DB_FACTOR
);
8036 /* Process received frames */
8038 * Return true if more frames need to be processed. false otherwise.
8039 * Param 'bound' indicates max. # frames to process before break out.
8041 static void brcms_c_recv(struct brcms_c_info
*wlc
, struct sk_buff
*p
)
8043 struct d11rxhdr
*rxh
;
8044 struct ieee80211_hdr
*h
;
8048 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
8050 /* frame starts with rxhdr */
8051 rxh
= (struct d11rxhdr
*) (p
->data
);
8053 /* strip off rxhdr */
8054 skb_pull(p
, BRCMS_HWRXOFF
);
8056 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8057 if (rxh
->RxStatus1
& RXS_PBPRES
) {
8059 wiphy_err(wlc
->wiphy
, "wl%d: recv: rcvd runt of "
8060 "len %d\n", wlc
->pub
->unit
, p
->len
);
8066 h
= (struct ieee80211_hdr
*)(p
->data
+ D11_PHY_HDR_LEN
);
8069 if (rxh
->RxStatus1
& RXS_FCSERR
) {
8070 if (!(wlc
->filter_flags
& FIF_FCSFAIL
))
8074 /* check received pkt has at least frame control field */
8075 if (len
< D11_PHY_HDR_LEN
+ sizeof(h
->frame_control
))
8078 /* not supporting A-MSDU */
8079 is_amsdu
= rxh
->RxStatus2
& RXS_AMSDU_MASK
;
8083 brcms_c_recvctl(wlc
, rxh
, p
);
8087 brcmu_pkt_buf_free_skb(p
);
8090 /* Process received frames */
8092 * Return true if more frames need to be processed. false otherwise.
8093 * Param 'bound' indicates max. # frames to process before break out.
8096 brcms_b_recv(struct brcms_hardware
*wlc_hw
, uint fifo
, bool bound
)
8099 struct sk_buff
*next
= NULL
;
8100 struct sk_buff_head recv_frames
;
8103 uint bound_limit
= bound
? RXBND
: -1;
8105 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
8106 skb_queue_head_init(&recv_frames
);
8108 /* gather received frames */
8109 while (dma_rx(wlc_hw
->di
[fifo
], &recv_frames
)) {
8111 /* !give others some time to run! */
8112 if (++n
>= bound_limit
)
8116 /* post more rbufs */
8117 dma_rxfill(wlc_hw
->di
[fifo
]);
8119 /* process each frame */
8120 skb_queue_walk_safe(&recv_frames
, p
, next
) {
8121 struct d11rxhdr_le
*rxh_le
;
8122 struct d11rxhdr
*rxh
;
8124 skb_unlink(p
, &recv_frames
);
8125 rxh_le
= (struct d11rxhdr_le
*)p
->data
;
8126 rxh
= (struct d11rxhdr
*)p
->data
;
8128 /* fixup rx header endianness */
8129 rxh
->RxFrameSize
= le16_to_cpu(rxh_le
->RxFrameSize
);
8130 rxh
->PhyRxStatus_0
= le16_to_cpu(rxh_le
->PhyRxStatus_0
);
8131 rxh
->PhyRxStatus_1
= le16_to_cpu(rxh_le
->PhyRxStatus_1
);
8132 rxh
->PhyRxStatus_2
= le16_to_cpu(rxh_le
->PhyRxStatus_2
);
8133 rxh
->PhyRxStatus_3
= le16_to_cpu(rxh_le
->PhyRxStatus_3
);
8134 rxh
->PhyRxStatus_4
= le16_to_cpu(rxh_le
->PhyRxStatus_4
);
8135 rxh
->PhyRxStatus_5
= le16_to_cpu(rxh_le
->PhyRxStatus_5
);
8136 rxh
->RxStatus1
= le16_to_cpu(rxh_le
->RxStatus1
);
8137 rxh
->RxStatus2
= le16_to_cpu(rxh_le
->RxStatus2
);
8138 rxh
->RxTSFTime
= le16_to_cpu(rxh_le
->RxTSFTime
);
8139 rxh
->RxChan
= le16_to_cpu(rxh_le
->RxChan
);
8141 brcms_c_recv(wlc_hw
->wlc
, p
);
8144 return n
>= bound_limit
;
8147 /* second-level interrupt processing
8148 * Return true if another dpc needs to be re-scheduled. false otherwise.
8149 * Param 'bounded' indicates if applicable loops should be bounded.
8151 bool brcms_c_dpc(struct brcms_c_info
*wlc
, bool bounded
)
8154 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
8155 struct bcma_device
*core
= wlc_hw
->d11core
;
8156 struct wiphy
*wiphy
= wlc
->wiphy
;
8158 if (brcms_deviceremoved(wlc
)) {
8159 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
8161 brcms_down(wlc
->wl
);
8165 /* grab and clear the saved software intstatus bits */
8166 macintstatus
= wlc
->macintstatus
;
8167 wlc
->macintstatus
= 0;
8169 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus 0x%x\n",
8170 wlc_hw
->unit
, macintstatus
);
8172 WARN_ON(macintstatus
& MI_PRQ
); /* PRQ Interrupt in non-MBSS */
8175 if (macintstatus
& MI_TFS
) {
8177 if (brcms_b_txstatus(wlc
->hw
, bounded
, &fatal
))
8178 wlc
->macintstatus
|= MI_TFS
;
8180 wiphy_err(wiphy
, "MI_TFS: fatal\n");
8185 if (macintstatus
& (MI_TBTT
| MI_DTIM_TBTT
))
8188 /* ATIM window end */
8189 if (macintstatus
& MI_ATIMWINEND
) {
8190 BCMMSG(wlc
->wiphy
, "end of ATIM window\n");
8191 bcma_set32(core
, D11REGOFFS(maccommand
), wlc
->qvalid
);
8196 * received data or control frame, MI_DMAINT is
8197 * indication of RX_FIFO interrupt
8199 if (macintstatus
& MI_DMAINT
)
8200 if (brcms_b_recv(wlc_hw
, RX_FIFO
, bounded
))
8201 wlc
->macintstatus
|= MI_DMAINT
;
8203 /* noise sample collected */
8204 if (macintstatus
& MI_BG_NOISE
)
8205 wlc_phy_noise_sample_intr(wlc_hw
->band
->pi
);
8207 if (macintstatus
& MI_GP0
) {
8208 wiphy_err(wiphy
, "wl%d: PSM microcode watchdog fired at %d "
8209 "(seconds). Resetting.\n", wlc_hw
->unit
, wlc_hw
->now
);
8211 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8212 __func__
, ai_get_chip_id(wlc_hw
->sih
),
8213 ai_get_chiprev(wlc_hw
->sih
));
8214 brcms_fatal_error(wlc_hw
->wlc
->wl
);
8217 /* gptimer timeout */
8218 if (macintstatus
& MI_TO
)
8219 bcma_write32(core
, D11REGOFFS(gptimer
), 0);
8221 if (macintstatus
& MI_RFDISABLE
) {
8222 BCMMSG(wlc
->wiphy
, "wl%d: BMAC Detected a change on the"
8223 " RF Disable Input\n", wlc_hw
->unit
);
8224 brcms_rfkill_set_hw_state(wlc
->wl
);
8227 /* send any enq'd tx packets. Just makes sure to jump start tx */
8228 if (!pktq_empty(&wlc
->pkt_queue
->q
))
8229 brcms_c_send_q(wlc
);
8231 /* it isn't done and needs to be resched if macintstatus is non-zero */
8232 return wlc
->macintstatus
!= 0;
8235 brcms_fatal_error(wlc_hw
->wlc
->wl
);
8236 return wlc
->macintstatus
!= 0;
8239 void brcms_c_init(struct brcms_c_info
*wlc
, bool mute_tx
)
8241 struct bcma_device
*core
= wlc
->hw
->d11core
;
8244 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
8247 * This will happen if a big-hammer was executed. In
8248 * that case, we want to go back to the channel that
8249 * we were on and not new channel
8251 if (wlc
->pub
->associated
)
8252 chanspec
= wlc
->home_chanspec
;
8254 chanspec
= brcms_c_init_chanspec(wlc
);
8256 brcms_b_init(wlc
->hw
, chanspec
);
8258 /* update beacon listen interval */
8259 brcms_c_bcn_li_upd(wlc
);
8261 /* write ethernet address to core */
8262 brcms_c_set_mac(wlc
->bsscfg
);
8263 brcms_c_set_bssid(wlc
->bsscfg
);
8265 /* Update tsf_cfprep if associated and up */
8266 if (wlc
->pub
->associated
&& wlc
->bsscfg
->up
) {
8269 /* get beacon period and convert to uS */
8270 bi
= wlc
->bsscfg
->current_bss
->beacon_period
<< 10;
8272 * update since init path would reset
8275 bcma_write32(core
, D11REGOFFS(tsf_cfprep
),
8276 bi
<< CFPREP_CBI_SHIFT
);
8278 /* Update maccontrol PM related bits */
8279 brcms_c_set_ps_ctrl(wlc
);
8282 brcms_c_bandinit_ordered(wlc
, chanspec
);
8284 /* init probe response timeout */
8285 brcms_b_write_shm(wlc
->hw
, M_PRS_MAXTIME
, wlc
->prb_resp_timeout
);
8287 /* init max burst txop (framebursting) */
8288 brcms_b_write_shm(wlc
->hw
, M_MBURST_TXOP
,
8290 _rifs
? (EDCF_AC_VO_TXOP_AP
<< 5) : MAXFRAMEBURST_TXOP
));
8292 /* initialize maximum allowed duty cycle */
8293 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_ofdm
, true, true);
8294 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_cck
, false, true);
8297 * Update some shared memory locations related to
8298 * max AMPDU size allowed to received
8300 brcms_c_ampdu_shm_upd(wlc
->ampdu
);
8302 /* band-specific inits */
8303 brcms_c_bsinit(wlc
);
8305 /* Enable EDCF mode (while the MAC is suspended) */
8306 bcma_set16(core
, D11REGOFFS(ifs_ctl
), IFS_USEEDCF
);
8307 brcms_c_edcf_setparams(wlc
, false);
8309 /* Init precedence maps for empty FIFOs */
8310 brcms_c_tx_prec_map_init(wlc
);
8312 /* read the ucode version if we have not yet done so */
8313 if (wlc
->ucode_rev
== 0) {
8315 brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MAJOR
) << NBITS(u16
);
8316 wlc
->ucode_rev
|= brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MINOR
);
8319 /* ..now really unleash hell (allow the MAC out of suspend) */
8320 brcms_c_enable_mac(wlc
);
8322 /* suspend the tx fifos and mute the phy for preism cac time */
8324 brcms_b_mute(wlc
->hw
, true);
8326 /* clear tx flow control */
8327 brcms_c_txflowcontrol_reset(wlc
);
8329 /* enable the RF Disable Delay timer */
8330 bcma_write32(core
, D11REGOFFS(rfdisabledly
), RFDISABLE_DEFAULT
);
8333 * Initialize WME parameters; if they haven't been set by some other
8334 * mechanism (IOVar, etc) then read them from the hardware.
8336 if (GFIELD(wlc
->wme_retries
[0], EDCF_SHORT
) == 0) {
8337 /* Uninitialized; read from HW */
8340 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
8341 wlc
->wme_retries
[ac
] =
8342 brcms_b_read_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
));
8347 * The common driver entry routine. Error codes should be unique
8349 struct brcms_c_info
*
8350 brcms_c_attach(struct brcms_info
*wl
, struct bcma_device
*core
, uint unit
,
8351 bool piomode
, uint
*perr
)
8353 struct brcms_c_info
*wlc
;
8356 struct brcms_pub
*pub
;
8358 /* allocate struct brcms_c_info state and its substructures */
8359 wlc
= (struct brcms_c_info
*) brcms_c_attach_malloc(unit
, &err
, 0);
8362 wlc
->wiphy
= wl
->wiphy
;
8369 wlc
->band
= wlc
->bandstate
[0];
8370 wlc
->core
= wlc
->corestate
;
8373 pub
->_piomode
= piomode
;
8374 wlc
->bandinit_pending
= false;
8376 /* populate struct brcms_c_info with default values */
8377 brcms_c_info_init(wlc
, unit
);
8379 /* update sta/ap related parameters */
8380 brcms_c_ap_upd(wlc
);
8383 * low level attach steps(all hw accesses go
8384 * inside, no more in rest of the attach)
8386 err
= brcms_b_attach(wlc
, core
, unit
, piomode
);
8390 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
, OFF
);
8392 pub
->phy_11ncapable
= BRCMS_PHY_11N_CAP(wlc
->band
);
8394 /* disable allowed duty cycle */
8395 wlc
->tx_duty_cycle_ofdm
= 0;
8396 wlc
->tx_duty_cycle_cck
= 0;
8398 brcms_c_stf_phy_chain_calc(wlc
);
8400 /* txchain 1: txant 0, txchain 2: txant 1 */
8401 if (BRCMS_ISNPHY(wlc
->band
) && (wlc
->stf
->txstreams
== 1))
8402 wlc
->stf
->txant
= wlc
->stf
->hw_txchain
- 1;
8404 /* push to BMAC driver */
8405 wlc_phy_stf_chain_init(wlc
->band
->pi
, wlc
->stf
->hw_txchain
,
8406 wlc
->stf
->hw_rxchain
);
8408 /* pull up some info resulting from the low attach */
8409 for (i
= 0; i
< NFIFO
; i
++)
8410 wlc
->core
->txavail
[i
] = wlc
->hw
->txavail
[i
];
8412 memcpy(&wlc
->perm_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
8413 memcpy(&pub
->cur_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
8415 for (j
= 0; j
< wlc
->pub
->_nbands
; j
++) {
8416 wlc
->band
= wlc
->bandstate
[j
];
8418 if (!brcms_c_attach_stf_ant_init(wlc
)) {
8423 /* default contention windows size limits */
8424 wlc
->band
->CWmin
= APHY_CWMIN
;
8425 wlc
->band
->CWmax
= PHY_CWMAX
;
8427 /* init gmode value */
8428 if (wlc
->band
->bandtype
== BRCM_BAND_2G
) {
8429 wlc
->band
->gmode
= GMODE_AUTO
;
8430 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
,
8434 /* init _n_enab supported mode */
8435 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
8436 pub
->_n_enab
= SUPPORT_11N
;
8437 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_USER
,
8439 SUPPORT_11N
) ? WL_11N_2x2
:
8443 /* init per-band default rateset, depend on band->gmode */
8444 brcms_default_rateset(wlc
, &wlc
->band
->defrateset
);
8446 /* fill in hw_rateset */
8447 brcms_c_rateset_filter(&wlc
->band
->defrateset
,
8448 &wlc
->band
->hw_rateset
, false,
8449 BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
8450 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
8454 * update antenna config due to
8455 * wlc->stf->txant/txchain/ant_rx_ovr change
8457 brcms_c_stf_phy_txant_upd(wlc
);
8459 /* attach each modules */
8460 err
= brcms_c_attach_module(wlc
);
8464 if (!brcms_c_timers_init(wlc
, unit
)) {
8465 wiphy_err(wl
->wiphy
, "wl%d: %s: init_timer failed\n", unit
,
8471 /* depend on rateset, gmode */
8472 wlc
->cmi
= brcms_c_channel_mgr_attach(wlc
);
8474 wiphy_err(wl
->wiphy
, "wl%d: %s: channel_mgr_attach failed"
8475 "\n", unit
, __func__
);
8480 /* init default when all parameters are ready, i.e. ->rateset */
8481 brcms_c_bss_default_init(wlc
);
8484 * Complete the wlc default state initializations..
8487 /* allocate our initial queue */
8488 wlc
->pkt_queue
= brcms_c_txq_alloc(wlc
);
8489 if (wlc
->pkt_queue
== NULL
) {
8490 wiphy_err(wl
->wiphy
, "wl%d: %s: failed to malloc tx queue\n",
8496 wlc
->bsscfg
->wlc
= wlc
;
8498 wlc
->mimoft
= FT_HT
;
8499 wlc
->mimo_40txbw
= AUTO
;
8500 wlc
->ofdm_40txbw
= AUTO
;
8501 wlc
->cck_40txbw
= AUTO
;
8502 brcms_c_update_mimo_band_bwcap(wlc
, BRCMS_N_BW_20IN2G_40IN5G
);
8504 /* Set default values of SGI */
8505 if (BRCMS_SGI_CAP_PHY(wlc
)) {
8506 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
8508 } else if (BRCMS_ISSSLPNPHY(wlc
->band
)) {
8509 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
8512 brcms_c_ht_update_sgi_rx(wlc
, 0);
8515 brcms_b_antsel_set(wlc
->hw
, wlc
->asi
->antsel_avail
);
8523 wiphy_err(wl
->wiphy
, "wl%d: %s: failed with err %d\n",
8524 unit
, __func__
, err
);
8526 brcms_c_detach(wlc
);