spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / net / wireless / rtlwifi / efuse.h
blob164dabaa76159cc14690c535258d3982357e3ac4
1 /******************************************************************************
3 * Copyright(c) 2009-2010 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
30 #ifndef __RTL_EFUSE_H_
31 #define __RTL_EFUSE_H_
33 #define EFUSE_IC_ID_OFFSET 506
35 #define EFUSE_REAL_CONTENT_LEN 512
36 #define EFUSE_MAP_LEN 128
37 #define EFUSE_MAX_WORD_UNIT 4
39 #define EFUSE_INIT_MAP 0
40 #define EFUSE_MODIFY_MAP 1
42 #define PG_STATE_HEADER 0x01
43 #define PG_STATE_WORD_0 0x02
44 #define PG_STATE_WORD_1 0x04
45 #define PG_STATE_WORD_2 0x08
46 #define PG_STATE_WORD_3 0x10
47 #define PG_STATE_DATA 0x20
49 #define PG_SWBYTE_H 0x01
50 #define PG_SWBYTE_L 0x02
52 #define _POWERON_DELAY_
53 #define _PRE_EXECUTE_READ_CMD_
55 #define EFUSE_REPEAT_THRESHOLD_ 3
56 #define EFUSE_ERROE_HANDLE 1
58 struct efuse_map {
59 u8 offset;
60 u8 word_start;
61 u8 byte_start;
62 u8 byte_cnts;
65 struct pgpkt_struct {
66 u8 offset;
67 u8 word_en;
68 u8 data[8];
71 enum efuse_data_item {
72 EFUSE_CHIP_ID = 0,
73 EFUSE_LDO_SETTING,
74 EFUSE_CLK_SETTING,
75 EFUSE_SDIO_SETTING,
76 EFUSE_CCCR,
77 EFUSE_SDIO_MODE,
78 EFUSE_OCR,
79 EFUSE_F0CIS,
80 EFUSE_F1CIS,
81 EFUSE_MAC_ADDR,
82 EFUSE_EEPROM_VER,
83 EFUSE_CHAN_PLAN,
84 EFUSE_TXPW_TAB
87 enum {
88 VOLTAGE_V25 = 0x03,
89 LDOE25_SHIFT = 28,
92 struct efuse_priv {
93 u8 id[2];
94 u8 ldo_setting[2];
95 u8 clk_setting[2];
96 u8 cccr;
97 u8 sdio_mode;
98 u8 ocr[3];
99 u8 cis0[17];
100 u8 cis1[48];
101 u8 mac_addr[6];
102 u8 eeprom_verno;
103 u8 channel_plan;
104 u8 tx_power_b[14];
105 u8 tx_power_g[14];
108 extern void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
109 extern void efuse_initialize(struct ieee80211_hw *hw);
110 extern u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
111 extern void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
112 extern void read_efuse(struct ieee80211_hw *hw, u16 _offset,
113 u16 _size_byte, u8 *pbuf);
114 extern void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
115 u16 offset, u32 *value);
116 extern void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
117 u16 offset, u32 value);
118 extern bool efuse_shadow_update(struct ieee80211_hw *hw);
119 extern bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
120 extern void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
121 extern void efuse_force_write_vendor_Id(struct ieee80211_hw *hw);
122 extern void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
124 #endif