spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / net / wireless / rtlwifi / rtl8192se / table.h
blobb4ed6d951ebb3de99387be537d5f41770d311f31
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
19 * Larry Finger <Larry.Finger@lwfinger.net>
21 ******************************************************************************/
22 #ifndef __INC_HAL8192SE_FW_IMG_H
23 #define __INC_HAL8192SE_FW_IMG_H
25 #include <linux/types.h>
27 /*Created on 2010/ 4/12, 5:56*/
29 #define PHY_REG_2T2RARRAYLENGTH 372
30 extern u32 rtl8192sephy_reg_2t2rarray[PHY_REG_2T2RARRAYLENGTH];
31 #define PHY_CHANGETO_1T1RARRAYLENGTH 48
32 extern u32 rtl8192sephy_changeto_1t1rarray[PHY_CHANGETO_1T1RARRAYLENGTH];
33 #define PHY_CHANGETO_1T2RARRAYLENGTH 45
34 extern u32 rtl8192sephy_changeto_1t2rarray[PHY_CHANGETO_1T2RARRAYLENGTH];
35 #define PHY_REG_ARRAY_PGLENGTH 84
36 extern u32 rtl8192sephy_reg_array_pg[PHY_REG_ARRAY_PGLENGTH];
37 #define RADIOA_1T_ARRAYLENGTH 202
38 extern u32 rtl8192seradioa_1t_array[RADIOA_1T_ARRAYLENGTH];
39 #define RADIOB_ARRAYLENGTH 22
40 extern u32 rtl8192seradiob_array[RADIOB_ARRAYLENGTH];
41 #define RADIOB_GM_ARRAYLENGTH 10
42 extern u32 rtl8192seradiob_gm_array[RADIOB_GM_ARRAYLENGTH];
43 #define MAC_2T_ARRAYLENGTH 106
44 extern u32 rtl8192semac_2t_array[MAC_2T_ARRAYLENGTH];
45 #define AGCTAB_ARRAYLENGTH 320
46 extern u32 rtl8192seagctab_array[AGCTAB_ARRAYLENGTH];
48 #endif