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spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / scsi / hpsa.c
blobb96962c394492604cd2fc2a73ce80731db28882d
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/kthread.h>
52 #include <linux/jiffies.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "2.0.2-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59
60 /* How long to wait (in milliseconds) for board to go into simple mode */
61 #define MAX_CONFIG_WAIT 30000
62 #define MAX_IOCTL_CONFIG_WAIT 1000
63
64 /*define how many times we will try a command because of bus resets */
65 #define MAX_CMD_RETRIES 3
66
67 /* Embedded module documentation macros - see modules.h */
68 MODULE_AUTHOR("Hewlett-Packard Company");
69 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
70 HPSA_DRIVER_VERSION);
71 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
72 MODULE_VERSION(HPSA_DRIVER_VERSION);
73 MODULE_LICENSE("GPL");
74
75 static int hpsa_allow_any;
76 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
77 MODULE_PARM_DESC(hpsa_allow_any,
78 "Allow hpsa driver to access unknown HP Smart Array hardware");
79 static int hpsa_simple_mode;
80 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
81 MODULE_PARM_DESC(hpsa_simple_mode,
82 "Use 'simple mode' rather than 'performant mode'");
83
84 /* define the PCI info for the cards we can control */
85 static const struct pci_device_id hpsa_pci_device_id[] = {
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
101 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
102 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
103 {0,}
104 };
105
106 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
107
108 /* board_id = Subsystem Device ID & Vendor ID
109 * product = Marketing Name for the board
110 * access = Address of the struct of function pointers
111 */
112 static struct board_type products[] = {
113 {0x3241103C, "Smart Array P212", &SA5_access},
114 {0x3243103C, "Smart Array P410", &SA5_access},
115 {0x3245103C, "Smart Array P410i", &SA5_access},
116 {0x3247103C, "Smart Array P411", &SA5_access},
117 {0x3249103C, "Smart Array P812", &SA5_access},
118 {0x324a103C, "Smart Array P712m", &SA5_access},
119 {0x324b103C, "Smart Array P711m", &SA5_access},
120 {0x3350103C, "Smart Array", &SA5_access},
121 {0x3351103C, "Smart Array", &SA5_access},
122 {0x3352103C, "Smart Array", &SA5_access},
123 {0x3353103C, "Smart Array", &SA5_access},
124 {0x3354103C, "Smart Array", &SA5_access},
125 {0x3355103C, "Smart Array", &SA5_access},
126 {0x3356103C, "Smart Array", &SA5_access},
127 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
128 };
129
130 static int number_of_controllers;
131
132 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
133 static spinlock_t lockup_detector_lock;
134 static struct task_struct *hpsa_lockup_detector;
135
136 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
137 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
138 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
139 static void start_io(struct ctlr_info *h);
140
141 #ifdef CONFIG_COMPAT
142 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
143 #endif
144
145 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
146 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
147 static struct CommandList *cmd_alloc(struct ctlr_info *h);
148 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
149 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
150 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
151 int cmd_type);
152
153 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
154 static void hpsa_scan_start(struct Scsi_Host *);
155 static int hpsa_scan_finished(struct Scsi_Host *sh,
156 unsigned long elapsed_time);
157 static int hpsa_change_queue_depth(struct scsi_device *sdev,
158 int qdepth, int reason);
159
160 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
161 static int hpsa_slave_alloc(struct scsi_device *sdev);
162 static void hpsa_slave_destroy(struct scsi_device *sdev);
163
164 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
165 static int check_for_unit_attention(struct ctlr_info *h,
166 struct CommandList *c);
167 static void check_ioctl_unit_attention(struct ctlr_info *h,
168 struct CommandList *c);
169 /* performant mode helper functions */
170 static void calc_bucket_map(int *bucket, int num_buckets,
171 int nsgs, int *bucket_map);
172 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
173 static inline u32 next_command(struct ctlr_info *h);
174 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
175 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
176 u64 *cfg_offset);
177 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
178 unsigned long *memory_bar);
179 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
180 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
181 void __iomem *vaddr, int wait_for_ready);
182 #define BOARD_NOT_READY 0
183 #define BOARD_READY 1
184
185 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
186 {
187 unsigned long *priv = shost_priv(sdev->host);
188 return (struct ctlr_info *) *priv;
189 }
190
191 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
192 {
193 unsigned long *priv = shost_priv(sh);
194 return (struct ctlr_info *) *priv;
195 }
196
197 static int check_for_unit_attention(struct ctlr_info *h,
198 struct CommandList *c)
199 {
200 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
201 return 0;
202
203 switch (c->err_info->SenseInfo[12]) {
204 case STATE_CHANGED:
205 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
206 "detected, command retried\n", h->ctlr);
207 break;
208 case LUN_FAILED:
209 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
210 "detected, action required\n", h->ctlr);
211 break;
212 case REPORT_LUNS_CHANGED:
213 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
214 "changed, action required\n", h->ctlr);
215 /*
216 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
217 */
218 break;
219 case POWER_OR_RESET:
220 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
221 "or device reset detected\n", h->ctlr);
222 break;
223 case UNIT_ATTENTION_CLEARED:
224 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
225 "cleared by another initiator\n", h->ctlr);
226 break;
227 default:
228 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
229 "unit attention detected\n", h->ctlr);
230 break;
231 }
232 return 1;
233 }
234
235 static ssize_t host_store_rescan(struct device *dev,
236 struct device_attribute *attr,
237 const char *buf, size_t count)
238 {
239 struct ctlr_info *h;
240 struct Scsi_Host *shost = class_to_shost(dev);
241 h = shost_to_hba(shost);
242 hpsa_scan_start(h->scsi_host);
243 return count;
244 }
245
246 static ssize_t host_show_firmware_revision(struct device *dev,
247 struct device_attribute *attr, char *buf)
248 {
249 struct ctlr_info *h;
250 struct Scsi_Host *shost = class_to_shost(dev);
251 unsigned char *fwrev;
252
253 h = shost_to_hba(shost);
254 if (!h->hba_inquiry_data)
255 return 0;
256 fwrev = &h->hba_inquiry_data[32];
257 return snprintf(buf, 20, "%c%c%c%c\n",
258 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
259 }
260
261 static ssize_t host_show_commands_outstanding(struct device *dev,
262 struct device_attribute *attr, char *buf)
263 {
264 struct Scsi_Host *shost = class_to_shost(dev);
265 struct ctlr_info *h = shost_to_hba(shost);
266
267 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
268 }
269
270 static ssize_t host_show_transport_mode(struct device *dev,
271 struct device_attribute *attr, char *buf)
272 {
273 struct ctlr_info *h;
274 struct Scsi_Host *shost = class_to_shost(dev);
275
276 h = shost_to_hba(shost);
277 return snprintf(buf, 20, "%s\n",
278 h->transMethod & CFGTBL_Trans_Performant ?
279 "performant" : "simple");
280 }
281
282 /* List of controllers which cannot be hard reset on kexec with reset_devices */
283 static u32 unresettable_controller[] = {
284 0x324a103C, /* Smart Array P712m */
285 0x324b103C, /* SmartArray P711m */
286 0x3223103C, /* Smart Array P800 */
287 0x3234103C, /* Smart Array P400 */
288 0x3235103C, /* Smart Array P400i */
289 0x3211103C, /* Smart Array E200i */
290 0x3212103C, /* Smart Array E200 */
291 0x3213103C, /* Smart Array E200i */
292 0x3214103C, /* Smart Array E200i */
293 0x3215103C, /* Smart Array E200i */
294 0x3237103C, /* Smart Array E500 */
295 0x323D103C, /* Smart Array P700m */
296 0x40800E11, /* Smart Array 5i */
297 0x409C0E11, /* Smart Array 6400 */
298 0x409D0E11, /* Smart Array 6400 EM */
299 };
300
301 /* List of controllers which cannot even be soft reset */
302 static u32 soft_unresettable_controller[] = {
303 0x40800E11, /* Smart Array 5i */
304 /* Exclude 640x boards. These are two pci devices in one slot
305 * which share a battery backed cache module. One controls the
306 * cache, the other accesses the cache through the one that controls
307 * it. If we reset the one controlling the cache, the other will
308 * likely not be happy. Just forbid resetting this conjoined mess.
309 * The 640x isn't really supported by hpsa anyway.
310 */
311 0x409C0E11, /* Smart Array 6400 */
312 0x409D0E11, /* Smart Array 6400 EM */
313 };
314
315 static int ctlr_is_hard_resettable(u32 board_id)
316 {
317 int i;
318
319 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
320 if (unresettable_controller[i] == board_id)
321 return 0;
322 return 1;
323 }
324
325 static int ctlr_is_soft_resettable(u32 board_id)
326 {
327 int i;
328
329 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
330 if (soft_unresettable_controller[i] == board_id)
331 return 0;
332 return 1;
333 }
334
335 static int ctlr_is_resettable(u32 board_id)
336 {
337 return ctlr_is_hard_resettable(board_id) ||
338 ctlr_is_soft_resettable(board_id);
339 }
340
341 static ssize_t host_show_resettable(struct device *dev,
342 struct device_attribute *attr, char *buf)
343 {
344 struct ctlr_info *h;
345 struct Scsi_Host *shost = class_to_shost(dev);
346
347 h = shost_to_hba(shost);
348 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
349 }
350
351 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
352 {
353 return (scsi3addr[3] & 0xC0) == 0x40;
354 }
355
356 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
357 "UNKNOWN"
358 };
359 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
360
361 static ssize_t raid_level_show(struct device *dev,
362 struct device_attribute *attr, char *buf)
363 {
364 ssize_t l = 0;
365 unsigned char rlevel;
366 struct ctlr_info *h;
367 struct scsi_device *sdev;
368 struct hpsa_scsi_dev_t *hdev;
369 unsigned long flags;
370
371 sdev = to_scsi_device(dev);
372 h = sdev_to_hba(sdev);
373 spin_lock_irqsave(&h->lock, flags);
374 hdev = sdev->hostdata;
375 if (!hdev) {
376 spin_unlock_irqrestore(&h->lock, flags);
377 return -ENODEV;
378 }
379
380 /* Is this even a logical drive? */
381 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
382 spin_unlock_irqrestore(&h->lock, flags);
383 l = snprintf(buf, PAGE_SIZE, "N/A\n");
384 return l;
385 }
386
387 rlevel = hdev->raid_level;
388 spin_unlock_irqrestore(&h->lock, flags);
389 if (rlevel > RAID_UNKNOWN)
390 rlevel = RAID_UNKNOWN;
391 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
392 return l;
393 }
394
395 static ssize_t lunid_show(struct device *dev,
396 struct device_attribute *attr, char *buf)
397 {
398 struct ctlr_info *h;
399 struct scsi_device *sdev;
400 struct hpsa_scsi_dev_t *hdev;
401 unsigned long flags;
402 unsigned char lunid[8];
403
404 sdev = to_scsi_device(dev);
405 h = sdev_to_hba(sdev);
406 spin_lock_irqsave(&h->lock, flags);
407 hdev = sdev->hostdata;
408 if (!hdev) {
409 spin_unlock_irqrestore(&h->lock, flags);
410 return -ENODEV;
411 }
412 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
413 spin_unlock_irqrestore(&h->lock, flags);
414 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
415 lunid[0], lunid[1], lunid[2], lunid[3],
416 lunid[4], lunid[5], lunid[6], lunid[7]);
417 }
418
419 static ssize_t unique_id_show(struct device *dev,
420 struct device_attribute *attr, char *buf)
421 {
422 struct ctlr_info *h;
423 struct scsi_device *sdev;
424 struct hpsa_scsi_dev_t *hdev;
425 unsigned long flags;
426 unsigned char sn[16];
427
428 sdev = to_scsi_device(dev);
429 h = sdev_to_hba(sdev);
430 spin_lock_irqsave(&h->lock, flags);
431 hdev = sdev->hostdata;
432 if (!hdev) {
433 spin_unlock_irqrestore(&h->lock, flags);
434 return -ENODEV;
435 }
436 memcpy(sn, hdev->device_id, sizeof(sn));
437 spin_unlock_irqrestore(&h->lock, flags);
438 return snprintf(buf, 16 * 2 + 2,
439 "%02X%02X%02X%02X%02X%02X%02X%02X"
440 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
441 sn[0], sn[1], sn[2], sn[3],
442 sn[4], sn[5], sn[6], sn[7],
443 sn[8], sn[9], sn[10], sn[11],
444 sn[12], sn[13], sn[14], sn[15]);
445 }
446
447 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
448 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
449 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
450 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
451 static DEVICE_ATTR(firmware_revision, S_IRUGO,
452 host_show_firmware_revision, NULL);
453 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
454 host_show_commands_outstanding, NULL);
455 static DEVICE_ATTR(transport_mode, S_IRUGO,
456 host_show_transport_mode, NULL);
457 static DEVICE_ATTR(resettable, S_IRUGO,
458 host_show_resettable, NULL);
459
460 static struct device_attribute *hpsa_sdev_attrs[] = {
461 &dev_attr_raid_level,
462 &dev_attr_lunid,
463 &dev_attr_unique_id,
464 NULL,
465 };
466
467 static struct device_attribute *hpsa_shost_attrs[] = {
468 &dev_attr_rescan,
469 &dev_attr_firmware_revision,
470 &dev_attr_commands_outstanding,
471 &dev_attr_transport_mode,
472 &dev_attr_resettable,
473 NULL,
474 };
475
476 static struct scsi_host_template hpsa_driver_template = {
477 .module = THIS_MODULE,
478 .name = "hpsa",
479 .proc_name = "hpsa",
480 .queuecommand = hpsa_scsi_queue_command,
481 .scan_start = hpsa_scan_start,
482 .scan_finished = hpsa_scan_finished,
483 .change_queue_depth = hpsa_change_queue_depth,
484 .this_id = -1,
485 .use_clustering = ENABLE_CLUSTERING,
486 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
487 .ioctl = hpsa_ioctl,
488 .slave_alloc = hpsa_slave_alloc,
489 .slave_destroy = hpsa_slave_destroy,
490 #ifdef CONFIG_COMPAT
491 .compat_ioctl = hpsa_compat_ioctl,
492 #endif
493 .sdev_attrs = hpsa_sdev_attrs,
494 .shost_attrs = hpsa_shost_attrs,
495 .max_sectors = 8192,
496 };
497
498
499 /* Enqueuing and dequeuing functions for cmdlists. */
500 static inline void addQ(struct list_head *list, struct CommandList *c)
501 {
502 list_add_tail(&c->list, list);
503 }
504
505 static inline u32 next_command(struct ctlr_info *h)
506 {
507 u32 a;
508
509 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
510 return h->access.command_completed(h);
511
512 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
513 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
514 (h->reply_pool_head)++;
515 h->commands_outstanding--;
516 } else {
517 a = FIFO_EMPTY;
518 }
519 /* Check for wraparound */
520 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
521 h->reply_pool_head = h->reply_pool;
522 h->reply_pool_wraparound ^= 1;
523 }
524 return a;
525 }
526
527 /* set_performant_mode: Modify the tag for cciss performant
528 * set bit 0 for pull model, bits 3-1 for block fetch
529 * register number
530 */
531 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
532 {
533 if (likely(h->transMethod & CFGTBL_Trans_Performant))
534 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
535 }
536
537 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
538 struct CommandList *c)
539 {
540 unsigned long flags;
541
542 set_performant_mode(h, c);
543 spin_lock_irqsave(&h->lock, flags);
544 addQ(&h->reqQ, c);
545 h->Qdepth++;
546 start_io(h);
547 spin_unlock_irqrestore(&h->lock, flags);
548 }
549
550 static inline void removeQ(struct CommandList *c)
551 {
552 if (WARN_ON(list_empty(&c->list)))
553 return;
554 list_del_init(&c->list);
555 }
556
557 static inline int is_hba_lunid(unsigned char scsi3addr[])
558 {
559 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
560 }
561
562 static inline int is_scsi_rev_5(struct ctlr_info *h)
563 {
564 if (!h->hba_inquiry_data)
565 return 0;
566 if ((h->hba_inquiry_data[2] & 0x07) == 5)
567 return 1;
568 return 0;
569 }
570
571 static int hpsa_find_target_lun(struct ctlr_info *h,
572 unsigned char scsi3addr[], int bus, int *target, int *lun)
573 {
574 /* finds an unused bus, target, lun for a new physical device
575 * assumes h->devlock is held
576 */
577 int i, found = 0;
578 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
579
580 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
581
582 for (i = 0; i < h->ndevices; i++) {
583 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
584 set_bit(h->dev[i]->target, lun_taken);
585 }
586
587 for (i = 0; i < HPSA_MAX_DEVICES; i++) {
588 if (!test_bit(i, lun_taken)) {
589 /* *bus = 1; */
590 *target = i;
591 *lun = 0;
592 found = 1;
593 break;
594 }
595 }
596 return !found;
597 }
598
599 /* Add an entry into h->dev[] array. */
600 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
601 struct hpsa_scsi_dev_t *device,
602 struct hpsa_scsi_dev_t *added[], int *nadded)
603 {
604 /* assumes h->devlock is held */
605 int n = h->ndevices;
606 int i;
607 unsigned char addr1[8], addr2[8];
608 struct hpsa_scsi_dev_t *sd;
609
610 if (n >= HPSA_MAX_DEVICES) {
611 dev_err(&h->pdev->dev, "too many devices, some will be "
612 "inaccessible.\n");
613 return -1;
614 }
615
616 /* physical devices do not have lun or target assigned until now. */
617 if (device->lun != -1)
618 /* Logical device, lun is already assigned. */
619 goto lun_assigned;
620
621 /* If this device a non-zero lun of a multi-lun device
622 * byte 4 of the 8-byte LUN addr will contain the logical
623 * unit no, zero otherise.
624 */
625 if (device->scsi3addr[4] == 0) {
626 /* This is not a non-zero lun of a multi-lun device */
627 if (hpsa_find_target_lun(h, device->scsi3addr,
628 device->bus, &device->target, &device->lun) != 0)
629 return -1;
630 goto lun_assigned;
631 }
632
633 /* This is a non-zero lun of a multi-lun device.
634 * Search through our list and find the device which
635 * has the same 8 byte LUN address, excepting byte 4.
636 * Assign the same bus and target for this new LUN.
637 * Use the logical unit number from the firmware.
638 */
639 memcpy(addr1, device->scsi3addr, 8);
640 addr1[4] = 0;
641 for (i = 0; i < n; i++) {
642 sd = h->dev[i];
643 memcpy(addr2, sd->scsi3addr, 8);
644 addr2[4] = 0;
645 /* differ only in byte 4? */
646 if (memcmp(addr1, addr2, 8) == 0) {
647 device->bus = sd->bus;
648 device->target = sd->target;
649 device->lun = device->scsi3addr[4];
650 break;
651 }
652 }
653 if (device->lun == -1) {
654 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
655 " suspect firmware bug or unsupported hardware "
656 "configuration.\n");
657 return -1;
658 }
659
660 lun_assigned:
661
662 h->dev[n] = device;
663 h->ndevices++;
664 added[*nadded] = device;
665 (*nadded)++;
666
667 /* initially, (before registering with scsi layer) we don't
668 * know our hostno and we don't want to print anything first
669 * time anyway (the scsi layer's inquiries will show that info)
670 */
671 /* if (hostno != -1) */
672 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
673 scsi_device_type(device->devtype), hostno,
674 device->bus, device->target, device->lun);
675 return 0;
676 }
677
678 /* Replace an entry from h->dev[] array. */
679 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
680 int entry, struct hpsa_scsi_dev_t *new_entry,
681 struct hpsa_scsi_dev_t *added[], int *nadded,
682 struct hpsa_scsi_dev_t *removed[], int *nremoved)
683 {
684 /* assumes h->devlock is held */
685 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
686 removed[*nremoved] = h->dev[entry];
687 (*nremoved)++;
688
689 /*
690 * New physical devices won't have target/lun assigned yet
691 * so we need to preserve the values in the slot we are replacing.
692 */
693 if (new_entry->target == -1) {
694 new_entry->target = h->dev[entry]->target;
695 new_entry->lun = h->dev[entry]->lun;
696 }
697
698 h->dev[entry] = new_entry;
699 added[*nadded] = new_entry;
700 (*nadded)++;
701 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
702 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
703 new_entry->target, new_entry->lun);
704 }
705
706 /* Remove an entry from h->dev[] array. */
707 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
708 struct hpsa_scsi_dev_t *removed[], int *nremoved)
709 {
710 /* assumes h->devlock is held */
711 int i;
712 struct hpsa_scsi_dev_t *sd;
713
714 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
715
716 sd = h->dev[entry];
717 removed[*nremoved] = h->dev[entry];
718 (*nremoved)++;
719
720 for (i = entry; i < h->ndevices-1; i++)
721 h->dev[i] = h->dev[i+1];
722 h->ndevices--;
723 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
724 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
725 sd->lun);
726 }
727
728 #define SCSI3ADDR_EQ(a, b) ( \
729 (a)[7] == (b)[7] && \
730 (a)[6] == (b)[6] && \
731 (a)[5] == (b)[5] && \
732 (a)[4] == (b)[4] && \
733 (a)[3] == (b)[3] && \
734 (a)[2] == (b)[2] && \
735 (a)[1] == (b)[1] && \
736 (a)[0] == (b)[0])
737
738 static void fixup_botched_add(struct ctlr_info *h,
739 struct hpsa_scsi_dev_t *added)
740 {
741 /* called when scsi_add_device fails in order to re-adjust
742 * h->dev[] to match the mid layer's view.
743 */
744 unsigned long flags;
745 int i, j;
746
747 spin_lock_irqsave(&h->lock, flags);
748 for (i = 0; i < h->ndevices; i++) {
749 if (h->dev[i] == added) {
750 for (j = i; j < h->ndevices-1; j++)
751 h->dev[j] = h->dev[j+1];
752 h->ndevices--;
753 break;
754 }
755 }
756 spin_unlock_irqrestore(&h->lock, flags);
757 kfree(added);
758 }
759
760 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
761 struct hpsa_scsi_dev_t *dev2)
762 {
763 /* we compare everything except lun and target as these
764 * are not yet assigned. Compare parts likely
765 * to differ first
766 */
767 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
768 sizeof(dev1->scsi3addr)) != 0)
769 return 0;
770 if (memcmp(dev1->device_id, dev2->device_id,
771 sizeof(dev1->device_id)) != 0)
772 return 0;
773 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
774 return 0;
775 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
776 return 0;
777 if (dev1->devtype != dev2->devtype)
778 return 0;
779 if (dev1->bus != dev2->bus)
780 return 0;
781 return 1;
782 }
783
784 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
785 * and return needle location in *index. If scsi3addr matches, but not
786 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
787 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
788 */
789 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
790 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
791 int *index)
792 {
793 int i;
794 #define DEVICE_NOT_FOUND 0
795 #define DEVICE_CHANGED 1
796 #define DEVICE_SAME 2
797 for (i = 0; i < haystack_size; i++) {
798 if (haystack[i] == NULL) /* previously removed. */
799 continue;
800 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
801 *index = i;
802 if (device_is_the_same(needle, haystack[i]))
803 return DEVICE_SAME;
804 else
805 return DEVICE_CHANGED;
806 }
807 }
808 *index = -1;
809 return DEVICE_NOT_FOUND;
810 }
811
812 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
813 struct hpsa_scsi_dev_t *sd[], int nsds)
814 {
815 /* sd contains scsi3 addresses and devtypes, and inquiry
816 * data. This function takes what's in sd to be the current
817 * reality and updates h->dev[] to reflect that reality.
818 */
819 int i, entry, device_change, changes = 0;
820 struct hpsa_scsi_dev_t *csd;
821 unsigned long flags;
822 struct hpsa_scsi_dev_t **added, **removed;
823 int nadded, nremoved;
824 struct Scsi_Host *sh = NULL;
825
826 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
827 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
828
829 if (!added || !removed) {
830 dev_warn(&h->pdev->dev, "out of memory in "
831 "adjust_hpsa_scsi_table\n");
832 goto free_and_out;
833 }
834
835 spin_lock_irqsave(&h->devlock, flags);
836
837 /* find any devices in h->dev[] that are not in
838 * sd[] and remove them from h->dev[], and for any
839 * devices which have changed, remove the old device
840 * info and add the new device info.
841 */
842 i = 0;
843 nremoved = 0;
844 nadded = 0;
845 while (i < h->ndevices) {
846 csd = h->dev[i];
847 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
848 if (device_change == DEVICE_NOT_FOUND) {
849 changes++;
850 hpsa_scsi_remove_entry(h, hostno, i,
851 removed, &nremoved);
852 continue; /* remove ^^^, hence i not incremented */
853 } else if (device_change == DEVICE_CHANGED) {
854 changes++;
855 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
856 added, &nadded, removed, &nremoved);
857 /* Set it to NULL to prevent it from being freed
858 * at the bottom of hpsa_update_scsi_devices()
859 */
860 sd[entry] = NULL;
861 }
862 i++;
863 }
864
865 /* Now, make sure every device listed in sd[] is also
866 * listed in h->dev[], adding them if they aren't found
867 */
868
869 for (i = 0; i < nsds; i++) {
870 if (!sd[i]) /* if already added above. */
871 continue;
872 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
873 h->ndevices, &entry);
874 if (device_change == DEVICE_NOT_FOUND) {
875 changes++;
876 if (hpsa_scsi_add_entry(h, hostno, sd[i],
877 added, &nadded) != 0)
878 break;
879 sd[i] = NULL; /* prevent from being freed later. */
880 } else if (device_change == DEVICE_CHANGED) {
881 /* should never happen... */
882 changes++;
883 dev_warn(&h->pdev->dev,
884 "device unexpectedly changed.\n");
885 /* but if it does happen, we just ignore that device */
886 }
887 }
888 spin_unlock_irqrestore(&h->devlock, flags);
889
890 /* Don't notify scsi mid layer of any changes the first time through
891 * (or if there are no changes) scsi_scan_host will do it later the
892 * first time through.
893 */
894 if (hostno == -1 || !changes)
895 goto free_and_out;
896
897 sh = h->scsi_host;
898 /* Notify scsi mid layer of any removed devices */
899 for (i = 0; i < nremoved; i++) {
900 struct scsi_device *sdev =
901 scsi_device_lookup(sh, removed[i]->bus,
902 removed[i]->target, removed[i]->lun);
903 if (sdev != NULL) {
904 scsi_remove_device(sdev);
905 scsi_device_put(sdev);
906 } else {
907 /* We don't expect to get here.
908 * future cmds to this device will get selection
909 * timeout as if the device was gone.
910 */
911 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
912 " for removal.", hostno, removed[i]->bus,
913 removed[i]->target, removed[i]->lun);
914 }
915 kfree(removed[i]);
916 removed[i] = NULL;
917 }
918
919 /* Notify scsi mid layer of any added devices */
920 for (i = 0; i < nadded; i++) {
921 if (scsi_add_device(sh, added[i]->bus,
922 added[i]->target, added[i]->lun) == 0)
923 continue;
924 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
925 "device not added.\n", hostno, added[i]->bus,
926 added[i]->target, added[i]->lun);
927 /* now we have to remove it from h->dev,
928 * since it didn't get added to scsi mid layer
929 */
930 fixup_botched_add(h, added[i]);
931 }
932
933 free_and_out:
934 kfree(added);
935 kfree(removed);
936 }
937
938 /*
939 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
940 * Assume's h->devlock is held.
941 */
942 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
943 int bus, int target, int lun)
944 {
945 int i;
946 struct hpsa_scsi_dev_t *sd;
947
948 for (i = 0; i < h->ndevices; i++) {
949 sd = h->dev[i];
950 if (sd->bus == bus && sd->target == target && sd->lun == lun)
951 return sd;
952 }
953 return NULL;
954 }
955
956 /* link sdev->hostdata to our per-device structure. */
957 static int hpsa_slave_alloc(struct scsi_device *sdev)
958 {
959 struct hpsa_scsi_dev_t *sd;
960 unsigned long flags;
961 struct ctlr_info *h;
962
963 h = sdev_to_hba(sdev);
964 spin_lock_irqsave(&h->devlock, flags);
965 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
966 sdev_id(sdev), sdev->lun);
967 if (sd != NULL)
968 sdev->hostdata = sd;
969 spin_unlock_irqrestore(&h->devlock, flags);
970 return 0;
971 }
972
973 static void hpsa_slave_destroy(struct scsi_device *sdev)
974 {
975 /* nothing to do. */
976 }
977
978 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
979 {
980 int i;
981
982 if (!h->cmd_sg_list)
983 return;
984 for (i = 0; i < h->nr_cmds; i++) {
985 kfree(h->cmd_sg_list[i]);
986 h->cmd_sg_list[i] = NULL;
987 }
988 kfree(h->cmd_sg_list);
989 h->cmd_sg_list = NULL;
990 }
991
992 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
993 {
994 int i;
995
996 if (h->chainsize <= 0)
997 return 0;
998
999 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1000 GFP_KERNEL);
1001 if (!h->cmd_sg_list)
1002 return -ENOMEM;
1003 for (i = 0; i < h->nr_cmds; i++) {
1004 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1005 h->chainsize, GFP_KERNEL);
1006 if (!h->cmd_sg_list[i])
1007 goto clean;
1008 }
1009 return 0;
1010
1011 clean:
1012 hpsa_free_sg_chain_blocks(h);
1013 return -ENOMEM;
1014 }
1015
1016 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1017 struct CommandList *c)
1018 {
1019 struct SGDescriptor *chain_sg, *chain_block;
1020 u64 temp64;
1021
1022 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1023 chain_block = h->cmd_sg_list[c->cmdindex];
1024 chain_sg->Ext = HPSA_SG_CHAIN;
1025 chain_sg->Len = sizeof(*chain_sg) *
1026 (c->Header.SGTotal - h->max_cmd_sg_entries);
1027 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1028 PCI_DMA_TODEVICE);
1029 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1030 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1031 }
1032
1033 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1034 struct CommandList *c)
1035 {
1036 struct SGDescriptor *chain_sg;
1037 union u64bit temp64;
1038
1039 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1040 return;
1041
1042 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1043 temp64.val32.lower = chain_sg->Addr.lower;
1044 temp64.val32.upper = chain_sg->Addr.upper;
1045 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1046 }
1047
1048 static void complete_scsi_command(struct CommandList *cp)
1049 {
1050 struct scsi_cmnd *cmd;
1051 struct ctlr_info *h;
1052 struct ErrorInfo *ei;
1053
1054 unsigned char sense_key;
1055 unsigned char asc; /* additional sense code */
1056 unsigned char ascq; /* additional sense code qualifier */
1057 unsigned long sense_data_size;
1058
1059 ei = cp->err_info;
1060 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1061 h = cp->h;
1062
1063 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1064 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1065 hpsa_unmap_sg_chain_block(h, cp);
1066
1067 cmd->result = (DID_OK << 16); /* host byte */
1068 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1069 cmd->result |= ei->ScsiStatus;
1070
1071 /* copy the sense data whether we need to or not. */
1072 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1073 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1074 else
1075 sense_data_size = sizeof(ei->SenseInfo);
1076 if (ei->SenseLen < sense_data_size)
1077 sense_data_size = ei->SenseLen;
1078
1079 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1080 scsi_set_resid(cmd, ei->ResidualCnt);
1081
1082 if (ei->CommandStatus == 0) {
1083 cmd->scsi_done(cmd);
1084 cmd_free(h, cp);
1085 return;
1086 }
1087
1088 /* an error has occurred */
1089 switch (ei->CommandStatus) {
1090
1091 case CMD_TARGET_STATUS:
1092 if (ei->ScsiStatus) {
1093 /* Get sense key */
1094 sense_key = 0xf & ei->SenseInfo[2];
1095 /* Get additional sense code */
1096 asc = ei->SenseInfo[12];
1097 /* Get addition sense code qualifier */
1098 ascq = ei->SenseInfo[13];
1099 }
1100
1101 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1102 if (check_for_unit_attention(h, cp)) {
1103 cmd->result = DID_SOFT_ERROR << 16;
1104 break;
1105 }
1106 if (sense_key == ILLEGAL_REQUEST) {
1107 /*
1108 * SCSI REPORT_LUNS is commonly unsupported on
1109 * Smart Array. Suppress noisy complaint.
1110 */
1111 if (cp->Request.CDB[0] == REPORT_LUNS)
1112 break;
1113
1114 /* If ASC/ASCQ indicate Logical Unit
1115 * Not Supported condition,
1116 */
1117 if ((asc == 0x25) && (ascq == 0x0)) {
1118 dev_warn(&h->pdev->dev, "cp %p "
1119 "has check condition\n", cp);
1120 break;
1121 }
1122 }
1123
1124 if (sense_key == NOT_READY) {
1125 /* If Sense is Not Ready, Logical Unit
1126 * Not ready, Manual Intervention
1127 * required
1128 */
1129 if ((asc == 0x04) && (ascq == 0x03)) {
1130 dev_warn(&h->pdev->dev, "cp %p "
1131 "has check condition: unit "
1132 "not ready, manual "
1133 "intervention required\n", cp);
1134 break;
1135 }
1136 }
1137 if (sense_key == ABORTED_COMMAND) {
1138 /* Aborted command is retryable */
1139 dev_warn(&h->pdev->dev, "cp %p "
1140 "has check condition: aborted command: "
1141 "ASC: 0x%x, ASCQ: 0x%x\n",
1142 cp, asc, ascq);
1143 cmd->result = DID_SOFT_ERROR << 16;
1144 break;
1145 }
1146 /* Must be some other type of check condition */
1147 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1148 "unknown type: "
1149 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1150 "Returning result: 0x%x, "
1151 "cmd=[%02x %02x %02x %02x %02x "
1152 "%02x %02x %02x %02x %02x %02x "
1153 "%02x %02x %02x %02x %02x]\n",
1154 cp, sense_key, asc, ascq,
1155 cmd->result,
1156 cmd->cmnd[0], cmd->cmnd[1],
1157 cmd->cmnd[2], cmd->cmnd[3],
1158 cmd->cmnd[4], cmd->cmnd[5],
1159 cmd->cmnd[6], cmd->cmnd[7],
1160 cmd->cmnd[8], cmd->cmnd[9],
1161 cmd->cmnd[10], cmd->cmnd[11],
1162 cmd->cmnd[12], cmd->cmnd[13],
1163 cmd->cmnd[14], cmd->cmnd[15]);
1164 break;
1165 }
1166
1167
1168 /* Problem was not a check condition
1169 * Pass it up to the upper layers...
1170 */
1171 if (ei->ScsiStatus) {
1172 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1173 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1174 "Returning result: 0x%x\n",
1175 cp, ei->ScsiStatus,
1176 sense_key, asc, ascq,
1177 cmd->result);
1178 } else { /* scsi status is zero??? How??? */
1179 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1180 "Returning no connection.\n", cp),
1181
1182 /* Ordinarily, this case should never happen,
1183 * but there is a bug in some released firmware
1184 * revisions that allows it to happen if, for
1185 * example, a 4100 backplane loses power and
1186 * the tape drive is in it. We assume that
1187 * it's a fatal error of some kind because we
1188 * can't show that it wasn't. We will make it
1189 * look like selection timeout since that is
1190 * the most common reason for this to occur,
1191 * and it's severe enough.
1192 */
1193
1194 cmd->result = DID_NO_CONNECT << 16;
1195 }
1196 break;
1197
1198 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1199 break;
1200 case CMD_DATA_OVERRUN:
1201 dev_warn(&h->pdev->dev, "cp %p has"
1202 " completed with data overrun "
1203 "reported\n", cp);
1204 break;
1205 case CMD_INVALID: {
1206 /* print_bytes(cp, sizeof(*cp), 1, 0);
1207 print_cmd(cp); */
1208 /* We get CMD_INVALID if you address a non-existent device
1209 * instead of a selection timeout (no response). You will
1210 * see this if you yank out a drive, then try to access it.
1211 * This is kind of a shame because it means that any other
1212 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1213 * missing target. */
1214 cmd->result = DID_NO_CONNECT << 16;
1215 }
1216 break;
1217 case CMD_PROTOCOL_ERR:
1218 dev_warn(&h->pdev->dev, "cp %p has "
1219 "protocol error \n", cp);
1220 break;
1221 case CMD_HARDWARE_ERR:
1222 cmd->result = DID_ERROR << 16;
1223 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1224 break;
1225 case CMD_CONNECTION_LOST:
1226 cmd->result = DID_ERROR << 16;
1227 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1228 break;
1229 case CMD_ABORTED:
1230 cmd->result = DID_ABORT << 16;
1231 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1232 cp, ei->ScsiStatus);
1233 break;
1234 case CMD_ABORT_FAILED:
1235 cmd->result = DID_ERROR << 16;
1236 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1237 break;
1238 case CMD_UNSOLICITED_ABORT:
1239 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1240 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1241 "abort\n", cp);
1242 break;
1243 case CMD_TIMEOUT:
1244 cmd->result = DID_TIME_OUT << 16;
1245 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1246 break;
1247 case CMD_UNABORTABLE:
1248 cmd->result = DID_ERROR << 16;
1249 dev_warn(&h->pdev->dev, "Command unabortable\n");
1250 break;
1251 default:
1252 cmd->result = DID_ERROR << 16;
1253 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1254 cp, ei->CommandStatus);
1255 }
1256 cmd->scsi_done(cmd);
1257 cmd_free(h, cp);
1258 }
1259
1260 static int hpsa_scsi_detect(struct ctlr_info *h)
1261 {
1262 struct Scsi_Host *sh;
1263 int error;
1264
1265 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1266 if (sh == NULL)
1267 goto fail;
1268
1269 sh->io_port = 0;
1270 sh->n_io_port = 0;
1271 sh->this_id = -1;
1272 sh->max_channel = 3;
1273 sh->max_cmd_len = MAX_COMMAND_SIZE;
1274 sh->max_lun = HPSA_MAX_LUN;
1275 sh->max_id = HPSA_MAX_LUN;
1276 sh->can_queue = h->nr_cmds;
1277 sh->cmd_per_lun = h->nr_cmds;
1278 sh->sg_tablesize = h->maxsgentries;
1279 h->scsi_host = sh;
1280 sh->hostdata[0] = (unsigned long) h;
1281 sh->irq = h->intr[h->intr_mode];
1282 sh->unique_id = sh->irq;
1283 error = scsi_add_host(sh, &h->pdev->dev);
1284 if (error)
1285 goto fail_host_put;
1286 scsi_scan_host(sh);
1287 return 0;
1288
1289 fail_host_put:
1290 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1291 " failed for controller %d\n", h->ctlr);
1292 scsi_host_put(sh);
1293 return error;
1294 fail:
1295 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1296 " failed for controller %d\n", h->ctlr);
1297 return -ENOMEM;
1298 }
1299
1300 static void hpsa_pci_unmap(struct pci_dev *pdev,
1301 struct CommandList *c, int sg_used, int data_direction)
1302 {
1303 int i;
1304 union u64bit addr64;
1305
1306 for (i = 0; i < sg_used; i++) {
1307 addr64.val32.lower = c->SG[i].Addr.lower;
1308 addr64.val32.upper = c->SG[i].Addr.upper;
1309 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1310 data_direction);
1311 }
1312 }
1313
1314 static void hpsa_map_one(struct pci_dev *pdev,
1315 struct CommandList *cp,
1316 unsigned char *buf,
1317 size_t buflen,
1318 int data_direction)
1319 {
1320 u64 addr64;
1321
1322 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1323 cp->Header.SGList = 0;
1324 cp->Header.SGTotal = 0;
1325 return;
1326 }
1327
1328 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1329 cp->SG[0].Addr.lower =
1330 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1331 cp->SG[0].Addr.upper =
1332 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1333 cp->SG[0].Len = buflen;
1334 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1335 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1336 }
1337
1338 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1339 struct CommandList *c)
1340 {
1341 DECLARE_COMPLETION_ONSTACK(wait);
1342
1343 c->waiting = &wait;
1344 enqueue_cmd_and_start_io(h, c);
1345 wait_for_completion(&wait);
1346 }
1347
1348 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1349 struct CommandList *c)
1350 {
1351 unsigned long flags;
1352
1353 /* If controller lockup detected, fake a hardware error. */
1354 spin_lock_irqsave(&h->lock, flags);
1355 if (unlikely(h->lockup_detected)) {
1356 spin_unlock_irqrestore(&h->lock, flags);
1357 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1358 } else {
1359 spin_unlock_irqrestore(&h->lock, flags);
1360 hpsa_scsi_do_simple_cmd_core(h, c);
1361 }
1362 }
1363
1364 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1365 struct CommandList *c, int data_direction)
1366 {
1367 int retry_count = 0;
1368
1369 do {
1370 memset(c->err_info, 0, sizeof(*c->err_info));
1371 hpsa_scsi_do_simple_cmd_core(h, c);
1372 retry_count++;
1373 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1374 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1375 }
1376
1377 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1378 {
1379 struct ErrorInfo *ei;
1380 struct device *d = &cp->h->pdev->dev;
1381
1382 ei = cp->err_info;
1383 switch (ei->CommandStatus) {
1384 case CMD_TARGET_STATUS:
1385 dev_warn(d, "cmd %p has completed with errors\n", cp);
1386 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1387 ei->ScsiStatus);
1388 if (ei->ScsiStatus == 0)
1389 dev_warn(d, "SCSI status is abnormally zero. "
1390 "(probably indicates selection timeout "
1391 "reported incorrectly due to a known "
1392 "firmware bug, circa July, 2001.)\n");
1393 break;
1394 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1395 dev_info(d, "UNDERRUN\n");
1396 break;
1397 case CMD_DATA_OVERRUN:
1398 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1399 break;
1400 case CMD_INVALID: {
1401 /* controller unfortunately reports SCSI passthru's
1402 * to non-existent targets as invalid commands.
1403 */
1404 dev_warn(d, "cp %p is reported invalid (probably means "
1405 "target device no longer present)\n", cp);
1406 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1407 print_cmd(cp); */
1408 }
1409 break;
1410 case CMD_PROTOCOL_ERR:
1411 dev_warn(d, "cp %p has protocol error \n", cp);
1412 break;
1413 case CMD_HARDWARE_ERR:
1414 /* cmd->result = DID_ERROR << 16; */
1415 dev_warn(d, "cp %p had hardware error\n", cp);
1416 break;
1417 case CMD_CONNECTION_LOST:
1418 dev_warn(d, "cp %p had connection lost\n", cp);
1419 break;
1420 case CMD_ABORTED:
1421 dev_warn(d, "cp %p was aborted\n", cp);
1422 break;
1423 case CMD_ABORT_FAILED:
1424 dev_warn(d, "cp %p reports abort failed\n", cp);
1425 break;
1426 case CMD_UNSOLICITED_ABORT:
1427 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1428 break;
1429 case CMD_TIMEOUT:
1430 dev_warn(d, "cp %p timed out\n", cp);
1431 break;
1432 case CMD_UNABORTABLE:
1433 dev_warn(d, "Command unabortable\n");
1434 break;
1435 default:
1436 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1437 ei->CommandStatus);
1438 }
1439 }
1440
1441 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1442 unsigned char page, unsigned char *buf,
1443 unsigned char bufsize)
1444 {
1445 int rc = IO_OK;
1446 struct CommandList *c;
1447 struct ErrorInfo *ei;
1448
1449 c = cmd_special_alloc(h);
1450
1451 if (c == NULL) { /* trouble... */
1452 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1453 return -ENOMEM;
1454 }
1455
1456 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1457 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1458 ei = c->err_info;
1459 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1460 hpsa_scsi_interpret_error(c);
1461 rc = -1;
1462 }
1463 cmd_special_free(h, c);
1464 return rc;
1465 }
1466
1467 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1468 {
1469 int rc = IO_OK;
1470 struct CommandList *c;
1471 struct ErrorInfo *ei;
1472
1473 c = cmd_special_alloc(h);
1474
1475 if (c == NULL) { /* trouble... */
1476 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1477 return -ENOMEM;
1478 }
1479
1480 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1481 hpsa_scsi_do_simple_cmd_core(h, c);
1482 /* no unmap needed here because no data xfer. */
1483
1484 ei = c->err_info;
1485 if (ei->CommandStatus != 0) {
1486 hpsa_scsi_interpret_error(c);
1487 rc = -1;
1488 }
1489 cmd_special_free(h, c);
1490 return rc;
1491 }
1492
1493 static void hpsa_get_raid_level(struct ctlr_info *h,
1494 unsigned char *scsi3addr, unsigned char *raid_level)
1495 {
1496 int rc;
1497 unsigned char *buf;
1498
1499 *raid_level = RAID_UNKNOWN;
1500 buf = kzalloc(64, GFP_KERNEL);
1501 if (!buf)
1502 return;
1503 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1504 if (rc == 0)
1505 *raid_level = buf[8];
1506 if (*raid_level > RAID_UNKNOWN)
1507 *raid_level = RAID_UNKNOWN;
1508 kfree(buf);
1509 return;
1510 }
1511
1512 /* Get the device id from inquiry page 0x83 */
1513 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1514 unsigned char *device_id, int buflen)
1515 {
1516 int rc;
1517 unsigned char *buf;
1518
1519 if (buflen > 16)
1520 buflen = 16;
1521 buf = kzalloc(64, GFP_KERNEL);
1522 if (!buf)
1523 return -1;
1524 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1525 if (rc == 0)
1526 memcpy(device_id, &buf[8], buflen);
1527 kfree(buf);
1528 return rc != 0;
1529 }
1530
1531 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1532 struct ReportLUNdata *buf, int bufsize,
1533 int extended_response)
1534 {
1535 int rc = IO_OK;
1536 struct CommandList *c;
1537 unsigned char scsi3addr[8];
1538 struct ErrorInfo *ei;
1539
1540 c = cmd_special_alloc(h);
1541 if (c == NULL) { /* trouble... */
1542 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1543 return -1;
1544 }
1545 /* address the controller */
1546 memset(scsi3addr, 0, sizeof(scsi3addr));
1547 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1548 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1549 if (extended_response)
1550 c->Request.CDB[1] = extended_response;
1551 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1552 ei = c->err_info;
1553 if (ei->CommandStatus != 0 &&
1554 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1555 hpsa_scsi_interpret_error(c);
1556 rc = -1;
1557 }
1558 cmd_special_free(h, c);
1559 return rc;
1560 }
1561
1562 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1563 struct ReportLUNdata *buf,
1564 int bufsize, int extended_response)
1565 {
1566 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1567 }
1568
1569 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1570 struct ReportLUNdata *buf, int bufsize)
1571 {
1572 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1573 }
1574
1575 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1576 int bus, int target, int lun)
1577 {
1578 device->bus = bus;
1579 device->target = target;
1580 device->lun = lun;
1581 }
1582
1583 static int hpsa_update_device_info(struct ctlr_info *h,
1584 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1585 unsigned char *is_OBDR_device)
1586 {
1587
1588 #define OBDR_SIG_OFFSET 43
1589 #define OBDR_TAPE_SIG "$DR-10"
1590 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1591 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1592
1593 unsigned char *inq_buff;
1594 unsigned char *obdr_sig;
1595
1596 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1597 if (!inq_buff)
1598 goto bail_out;
1599
1600 /* Do an inquiry to the device to see what it is. */
1601 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1602 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1603 /* Inquiry failed (msg printed already) */
1604 dev_err(&h->pdev->dev,
1605 "hpsa_update_device_info: inquiry failed\n");
1606 goto bail_out;
1607 }
1608
1609 this_device->devtype = (inq_buff[0] & 0x1f);
1610 memcpy(this_device->scsi3addr, scsi3addr, 8);
1611 memcpy(this_device->vendor, &inq_buff[8],
1612 sizeof(this_device->vendor));
1613 memcpy(this_device->model, &inq_buff[16],
1614 sizeof(this_device->model));
1615 memset(this_device->device_id, 0,
1616 sizeof(this_device->device_id));
1617 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1618 sizeof(this_device->device_id));
1619
1620 if (this_device->devtype == TYPE_DISK &&
1621 is_logical_dev_addr_mode(scsi3addr))
1622 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1623 else
1624 this_device->raid_level = RAID_UNKNOWN;
1625
1626 if (is_OBDR_device) {
1627 /* See if this is a One-Button-Disaster-Recovery device
1628 * by looking for "$DR-10" at offset 43 in inquiry data.
1629 */
1630 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1631 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1632 strncmp(obdr_sig, OBDR_TAPE_SIG,
1633 OBDR_SIG_LEN) == 0);
1634 }
1635
1636 kfree(inq_buff);
1637 return 0;
1638
1639 bail_out:
1640 kfree(inq_buff);
1641 return 1;
1642 }
1643
1644 static unsigned char *msa2xxx_model[] = {
1645 "MSA2012",
1646 "MSA2024",
1647 "MSA2312",
1648 "MSA2324",
1649 "P2000 G3 SAS",
1650 NULL,
1651 };
1652
1653 static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1654 {
1655 int i;
1656
1657 for (i = 0; msa2xxx_model[i]; i++)
1658 if (strncmp(device->model, msa2xxx_model[i],
1659 strlen(msa2xxx_model[i])) == 0)
1660 return 1;
1661 return 0;
1662 }
1663
1664 /* Helper function to assign bus, target, lun mapping of devices.
1665 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1666 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1667 * Logical drive target and lun are assigned at this time, but
1668 * physical device lun and target assignment are deferred (assigned
1669 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1670 */
1671 static void figure_bus_target_lun(struct ctlr_info *h,
1672 u8 *lunaddrbytes, int *bus, int *target, int *lun,
1673 struct hpsa_scsi_dev_t *device)
1674 {
1675 u32 lunid;
1676
1677 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1678 /* logical device */
1679 if (unlikely(is_scsi_rev_5(h))) {
1680 /* p1210m, logical drives lun assignments
1681 * match SCSI REPORT LUNS data.
1682 */
1683 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1684 *bus = 0;
1685 *target = 0;
1686 *lun = (lunid & 0x3fff) + 1;
1687 } else {
1688 /* not p1210m... */
1689 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1690 if (is_msa2xxx(h, device)) {
1691 /* msa2xxx way, put logicals on bus 1
1692 * and match target/lun numbers box
1693 * reports.
1694 */
1695 *bus = 1;
1696 *target = (lunid >> 16) & 0x3fff;
1697 *lun = lunid & 0x00ff;
1698 } else {
1699 /* Traditional smart array way. */
1700 *bus = 0;
1701 *lun = 0;
1702 *target = lunid & 0x3fff;
1703 }
1704 }
1705 } else {
1706 /* physical device */
1707 if (is_hba_lunid(lunaddrbytes))
1708 if (unlikely(is_scsi_rev_5(h))) {
1709 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1710 *target = 0;
1711 *lun = 0;
1712 return;
1713 } else
1714 *bus = 3; /* traditional smartarray */
1715 else
1716 *bus = 2; /* physical disk */
1717 *target = -1;
1718 *lun = -1; /* we will fill these in later. */
1719 }
1720 }
1721
1722 /*
1723 * If there is no lun 0 on a target, linux won't find any devices.
1724 * For the MSA2xxx boxes, we have to manually detect the enclosure
1725 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1726 * it for some reason. *tmpdevice is the target we're adding,
1727 * this_device is a pointer into the current element of currentsd[]
1728 * that we're building up in update_scsi_devices(), below.
1729 * lunzerobits is a bitmap that tracks which targets already have a
1730 * lun 0 assigned.
1731 * Returns 1 if an enclosure was added, 0 if not.
1732 */
1733 static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1734 struct hpsa_scsi_dev_t *tmpdevice,
1735 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1736 int bus, int target, int lun, unsigned long lunzerobits[],
1737 int *nmsa2xxx_enclosures)
1738 {
1739 unsigned char scsi3addr[8];
1740
1741 if (test_bit(target, lunzerobits))
1742 return 0; /* There is already a lun 0 on this target. */
1743
1744 if (!is_logical_dev_addr_mode(lunaddrbytes))
1745 return 0; /* It's the logical targets that may lack lun 0. */
1746
1747 if (!is_msa2xxx(h, tmpdevice))
1748 return 0; /* It's only the MSA2xxx that have this problem. */
1749
1750 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1751 return 0;
1752
1753 memset(scsi3addr, 0, 8);
1754 scsi3addr[3] = target;
1755 if (is_hba_lunid(scsi3addr))
1756 return 0; /* Don't add the RAID controller here. */
1757
1758 if (is_scsi_rev_5(h))
1759 return 0; /* p1210m doesn't need to do this. */
1760
1761 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1762 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1763 "enclosures exceeded. Check your hardware "
1764 "configuration.");
1765 return 0;
1766 }
1767
1768 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1769 return 0;
1770 (*nmsa2xxx_enclosures)++;
1771 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1772 set_bit(target, lunzerobits);
1773 return 1;
1774 }
1775
1776 /*
1777 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1778 * logdev. The number of luns in physdev and logdev are returned in
1779 * *nphysicals and *nlogicals, respectively.
1780 * Returns 0 on success, -1 otherwise.
1781 */
1782 static int hpsa_gather_lun_info(struct ctlr_info *h,
1783 int reportlunsize,
1784 struct ReportLUNdata *physdev, u32 *nphysicals,
1785 struct ReportLUNdata *logdev, u32 *nlogicals)
1786 {
1787 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1788 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1789 return -1;
1790 }
1791 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1792 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1793 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1794 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1795 *nphysicals - HPSA_MAX_PHYS_LUN);
1796 *nphysicals = HPSA_MAX_PHYS_LUN;
1797 }
1798 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1799 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1800 return -1;
1801 }
1802 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1803 /* Reject Logicals in excess of our max capability. */
1804 if (*nlogicals > HPSA_MAX_LUN) {
1805 dev_warn(&h->pdev->dev,
1806 "maximum logical LUNs (%d) exceeded. "
1807 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1808 *nlogicals - HPSA_MAX_LUN);
1809 *nlogicals = HPSA_MAX_LUN;
1810 }
1811 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1812 dev_warn(&h->pdev->dev,
1813 "maximum logical + physical LUNs (%d) exceeded. "
1814 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1815 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1816 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1817 }
1818 return 0;
1819 }
1820
1821 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1822 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1823 struct ReportLUNdata *logdev_list)
1824 {
1825 /* Helper function, figure out where the LUN ID info is coming from
1826 * given index i, lists of physical and logical devices, where in
1827 * the list the raid controller is supposed to appear (first or last)
1828 */
1829
1830 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1831 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1832
1833 if (i == raid_ctlr_position)
1834 return RAID_CTLR_LUNID;
1835
1836 if (i < logicals_start)
1837 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1838
1839 if (i < last_device)
1840 return &logdev_list->LUN[i - nphysicals -
1841 (raid_ctlr_position == 0)][0];
1842 BUG();
1843 return NULL;
1844 }
1845
1846 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1847 {
1848 /* the idea here is we could get notified
1849 * that some devices have changed, so we do a report
1850 * physical luns and report logical luns cmd, and adjust
1851 * our list of devices accordingly.
1852 *
1853 * The scsi3addr's of devices won't change so long as the
1854 * adapter is not reset. That means we can rescan and
1855 * tell which devices we already know about, vs. new
1856 * devices, vs. disappearing devices.
1857 */
1858 struct ReportLUNdata *physdev_list = NULL;
1859 struct ReportLUNdata *logdev_list = NULL;
1860 u32 nphysicals = 0;
1861 u32 nlogicals = 0;
1862 u32 ndev_allocated = 0;
1863 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1864 int ncurrent = 0;
1865 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1866 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1867 int bus, target, lun;
1868 int raid_ctlr_position;
1869 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1870
1871 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1872 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1873 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1874 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1875
1876 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1877 dev_err(&h->pdev->dev, "out of memory\n");
1878 goto out;
1879 }
1880 memset(lunzerobits, 0, sizeof(lunzerobits));
1881
1882 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1883 logdev_list, &nlogicals))
1884 goto out;
1885
1886 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1887 * but each of them 4 times through different paths. The plus 1
1888 * is for the RAID controller.
1889 */
1890 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1891
1892 /* Allocate the per device structures */
1893 for (i = 0; i < ndevs_to_allocate; i++) {
1894 if (i >= HPSA_MAX_DEVICES) {
1895 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1896 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1897 ndevs_to_allocate - HPSA_MAX_DEVICES);
1898 break;
1899 }
1900
1901 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1902 if (!currentsd[i]) {
1903 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1904 __FILE__, __LINE__);
1905 goto out;
1906 }
1907 ndev_allocated++;
1908 }
1909
1910 if (unlikely(is_scsi_rev_5(h)))
1911 raid_ctlr_position = 0;
1912 else
1913 raid_ctlr_position = nphysicals + nlogicals;
1914
1915 /* adjust our table of devices */
1916 nmsa2xxx_enclosures = 0;
1917 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1918 u8 *lunaddrbytes, is_OBDR = 0;
1919
1920 /* Figure out where the LUN ID info is coming from */
1921 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1922 i, nphysicals, nlogicals, physdev_list, logdev_list);
1923 /* skip masked physical devices. */
1924 if (lunaddrbytes[3] & 0xC0 &&
1925 i < nphysicals + (raid_ctlr_position == 0))
1926 continue;
1927
1928 /* Get device type, vendor, model, device id */
1929 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1930 &is_OBDR))
1931 continue; /* skip it if we can't talk to it. */
1932 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1933 tmpdevice);
1934 this_device = currentsd[ncurrent];
1935
1936 /*
1937 * For the msa2xxx boxes, we have to insert a LUN 0 which
1938 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1939 * is nonetheless an enclosure device there. We have to
1940 * present that otherwise linux won't find anything if
1941 * there is no lun 0.
1942 */
1943 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1944 lunaddrbytes, bus, target, lun, lunzerobits,
1945 &nmsa2xxx_enclosures)) {
1946 ncurrent++;
1947 this_device = currentsd[ncurrent];
1948 }
1949
1950 *this_device = *tmpdevice;
1951 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1952
1953 switch (this_device->devtype) {
1954 case TYPE_ROM:
1955 /* We don't *really* support actual CD-ROM devices,
1956 * just "One Button Disaster Recovery" tape drive
1957 * which temporarily pretends to be a CD-ROM drive.
1958 * So we check that the device is really an OBDR tape
1959 * device by checking for "$DR-10" in bytes 43-48 of
1960 * the inquiry data.
1961 */
1962 if (is_OBDR)
1963 ncurrent++;
1964 break;
1965 case TYPE_DISK:
1966 if (i < nphysicals)
1967 break;
1968 ncurrent++;
1969 break;
1970 case TYPE_TAPE:
1971 case TYPE_MEDIUM_CHANGER:
1972 ncurrent++;
1973 break;
1974 case TYPE_RAID:
1975 /* Only present the Smartarray HBA as a RAID controller.
1976 * If it's a RAID controller other than the HBA itself
1977 * (an external RAID controller, MSA500 or similar)
1978 * don't present it.
1979 */
1980 if (!is_hba_lunid(lunaddrbytes))
1981 break;
1982 ncurrent++;
1983 break;
1984 default:
1985 break;
1986 }
1987 if (ncurrent >= HPSA_MAX_DEVICES)
1988 break;
1989 }
1990 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1991 out:
1992 kfree(tmpdevice);
1993 for (i = 0; i < ndev_allocated; i++)
1994 kfree(currentsd[i]);
1995 kfree(currentsd);
1996 kfree(physdev_list);
1997 kfree(logdev_list);
1998 }
1999
2000 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2001 * dma mapping and fills in the scatter gather entries of the
2002 * hpsa command, cp.
2003 */
2004 static int hpsa_scatter_gather(struct ctlr_info *h,
2005 struct CommandList *cp,
2006 struct scsi_cmnd *cmd)
2007 {
2008 unsigned int len;
2009 struct scatterlist *sg;
2010 u64 addr64;
2011 int use_sg, i, sg_index, chained;
2012 struct SGDescriptor *curr_sg;
2013
2014 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2015
2016 use_sg = scsi_dma_map(cmd);
2017 if (use_sg < 0)
2018 return use_sg;
2019
2020 if (!use_sg)
2021 goto sglist_finished;
2022
2023 curr_sg = cp->SG;
2024 chained = 0;
2025 sg_index = 0;
2026 scsi_for_each_sg(cmd, sg, use_sg, i) {
2027 if (i == h->max_cmd_sg_entries - 1 &&
2028 use_sg > h->max_cmd_sg_entries) {
2029 chained = 1;
2030 curr_sg = h->cmd_sg_list[cp->cmdindex];
2031 sg_index = 0;
2032 }
2033 addr64 = (u64) sg_dma_address(sg);
2034 len = sg_dma_len(sg);
2035 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2036 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2037 curr_sg->Len = len;
2038 curr_sg->Ext = 0; /* we are not chaining */
2039 curr_sg++;
2040 }
2041
2042 if (use_sg + chained > h->maxSG)
2043 h->maxSG = use_sg + chained;
2044
2045 if (chained) {
2046 cp->Header.SGList = h->max_cmd_sg_entries;
2047 cp->Header.SGTotal = (u16) (use_sg + 1);
2048 hpsa_map_sg_chain_block(h, cp);
2049 return 0;
2050 }
2051
2052 sglist_finished:
2053
2054 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2055 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2056 return 0;
2057 }
2058
2059
2060 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2061 void (*done)(struct scsi_cmnd *))
2062 {
2063 struct ctlr_info *h;
2064 struct hpsa_scsi_dev_t *dev;
2065 unsigned char scsi3addr[8];
2066 struct CommandList *c;
2067 unsigned long flags;
2068
2069 /* Get the ptr to our adapter structure out of cmd->host. */
2070 h = sdev_to_hba(cmd->device);
2071 dev = cmd->device->hostdata;
2072 if (!dev) {
2073 cmd->result = DID_NO_CONNECT << 16;
2074 done(cmd);
2075 return 0;
2076 }
2077 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2078
2079 spin_lock_irqsave(&h->lock, flags);
2080 if (unlikely(h->lockup_detected)) {
2081 spin_unlock_irqrestore(&h->lock, flags);
2082 cmd->result = DID_ERROR << 16;
2083 done(cmd);
2084 return 0;
2085 }
2086 /* Need a lock as this is being allocated from the pool */
2087 c = cmd_alloc(h);
2088 spin_unlock_irqrestore(&h->lock, flags);
2089 if (c == NULL) { /* trouble... */
2090 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2091 return SCSI_MLQUEUE_HOST_BUSY;
2092 }
2093
2094 /* Fill in the command list header */
2095
2096 cmd->scsi_done = done; /* save this for use by completion code */
2097
2098 /* save c in case we have to abort it */
2099 cmd->host_scribble = (unsigned char *) c;
2100
2101 c->cmd_type = CMD_SCSI;
2102 c->scsi_cmd = cmd;
2103 c->Header.ReplyQueue = 0; /* unused in simple mode */
2104 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2105 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2106 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2107
2108 /* Fill in the request block... */
2109
2110 c->Request.Timeout = 0;
2111 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2112 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2113 c->Request.CDBLen = cmd->cmd_len;
2114 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2115 c->Request.Type.Type = TYPE_CMD;
2116 c->Request.Type.Attribute = ATTR_SIMPLE;
2117 switch (cmd->sc_data_direction) {
2118 case DMA_TO_DEVICE:
2119 c->Request.Type.Direction = XFER_WRITE;
2120 break;
2121 case DMA_FROM_DEVICE:
2122 c->Request.Type.Direction = XFER_READ;
2123 break;
2124 case DMA_NONE:
2125 c->Request.Type.Direction = XFER_NONE;
2126 break;
2127 case DMA_BIDIRECTIONAL:
2128 /* This can happen if a buggy application does a scsi passthru
2129 * and sets both inlen and outlen to non-zero. ( see
2130 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2131 */
2132
2133 c->Request.Type.Direction = XFER_RSVD;
2134 /* This is technically wrong, and hpsa controllers should
2135 * reject it with CMD_INVALID, which is the most correct
2136 * response, but non-fibre backends appear to let it
2137 * slide by, and give the same results as if this field
2138 * were set correctly. Either way is acceptable for
2139 * our purposes here.
2140 */
2141
2142 break;
2143
2144 default:
2145 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2146 cmd->sc_data_direction);
2147 BUG();
2148 break;
2149 }
2150
2151 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2152 cmd_free(h, c);
2153 return SCSI_MLQUEUE_HOST_BUSY;
2154 }
2155 enqueue_cmd_and_start_io(h, c);
2156 /* the cmd'll come back via intr handler in complete_scsi_command() */
2157 return 0;
2158 }
2159
2160 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2161
2162 static void hpsa_scan_start(struct Scsi_Host *sh)
2163 {
2164 struct ctlr_info *h = shost_to_hba(sh);
2165 unsigned long flags;
2166
2167 /* wait until any scan already in progress is finished. */
2168 while (1) {
2169 spin_lock_irqsave(&h->scan_lock, flags);
2170 if (h->scan_finished)
2171 break;
2172 spin_unlock_irqrestore(&h->scan_lock, flags);
2173 wait_event(h->scan_wait_queue, h->scan_finished);
2174 /* Note: We don't need to worry about a race between this
2175 * thread and driver unload because the midlayer will
2176 * have incremented the reference count, so unload won't
2177 * happen if we're in here.
2178 */
2179 }
2180 h->scan_finished = 0; /* mark scan as in progress */
2181 spin_unlock_irqrestore(&h->scan_lock, flags);
2182
2183 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2184
2185 spin_lock_irqsave(&h->scan_lock, flags);
2186 h->scan_finished = 1; /* mark scan as finished. */
2187 wake_up_all(&h->scan_wait_queue);
2188 spin_unlock_irqrestore(&h->scan_lock, flags);
2189 }
2190
2191 static int hpsa_scan_finished(struct Scsi_Host *sh,
2192 unsigned long elapsed_time)
2193 {
2194 struct ctlr_info *h = shost_to_hba(sh);
2195 unsigned long flags;
2196 int finished;
2197
2198 spin_lock_irqsave(&h->scan_lock, flags);
2199 finished = h->scan_finished;
2200 spin_unlock_irqrestore(&h->scan_lock, flags);
2201 return finished;
2202 }
2203
2204 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2205 int qdepth, int reason)
2206 {
2207 struct ctlr_info *h = sdev_to_hba(sdev);
2208
2209 if (reason != SCSI_QDEPTH_DEFAULT)
2210 return -ENOTSUPP;
2211
2212 if (qdepth < 1)
2213 qdepth = 1;
2214 else
2215 if (qdepth > h->nr_cmds)
2216 qdepth = h->nr_cmds;
2217 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2218 return sdev->queue_depth;
2219 }
2220
2221 static void hpsa_unregister_scsi(struct ctlr_info *h)
2222 {
2223 /* we are being forcibly unloaded, and may not refuse. */
2224 scsi_remove_host(h->scsi_host);
2225 scsi_host_put(h->scsi_host);
2226 h->scsi_host = NULL;
2227 }
2228
2229 static int hpsa_register_scsi(struct ctlr_info *h)
2230 {
2231 int rc;
2232
2233 rc = hpsa_scsi_detect(h);
2234 if (rc != 0)
2235 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2236 " hpsa_scsi_detect(), rc is %d\n", rc);
2237 return rc;
2238 }
2239
2240 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2241 unsigned char lunaddr[])
2242 {
2243 int rc = 0;
2244 int count = 0;
2245 int waittime = 1; /* seconds */
2246 struct CommandList *c;
2247
2248 c = cmd_special_alloc(h);
2249 if (!c) {
2250 dev_warn(&h->pdev->dev, "out of memory in "
2251 "wait_for_device_to_become_ready.\n");
2252 return IO_ERROR;
2253 }
2254
2255 /* Send test unit ready until device ready, or give up. */
2256 while (count < HPSA_TUR_RETRY_LIMIT) {
2257
2258 /* Wait for a bit. do this first, because if we send
2259 * the TUR right away, the reset will just abort it.
2260 */
2261 msleep(1000 * waittime);
2262 count++;
2263
2264 /* Increase wait time with each try, up to a point. */
2265 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2266 waittime = waittime * 2;
2267
2268 /* Send the Test Unit Ready */
2269 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2270 hpsa_scsi_do_simple_cmd_core(h, c);
2271 /* no unmap needed here because no data xfer. */
2272
2273 if (c->err_info->CommandStatus == CMD_SUCCESS)
2274 break;
2275
2276 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2277 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2278 (c->err_info->SenseInfo[2] == NO_SENSE ||
2279 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2280 break;
2281
2282 dev_warn(&h->pdev->dev, "waiting %d secs "
2283 "for device to become ready.\n", waittime);
2284 rc = 1; /* device not ready. */
2285 }
2286
2287 if (rc)
2288 dev_warn(&h->pdev->dev, "giving up on device.\n");
2289 else
2290 dev_warn(&h->pdev->dev, "device is ready.\n");
2291
2292 cmd_special_free(h, c);
2293 return rc;
2294 }
2295
2296 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2297 * complaining. Doing a host- or bus-reset can't do anything good here.
2298 */
2299 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2300 {
2301 int rc;
2302 struct ctlr_info *h;
2303 struct hpsa_scsi_dev_t *dev;
2304
2305 /* find the controller to which the command to be aborted was sent */
2306 h = sdev_to_hba(scsicmd->device);
2307 if (h == NULL) /* paranoia */
2308 return FAILED;
2309 dev = scsicmd->device->hostdata;
2310 if (!dev) {
2311 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2312 "device lookup failed.\n");
2313 return FAILED;
2314 }
2315 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2316 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2317 /* send a reset to the SCSI LUN which the command was sent to */
2318 rc = hpsa_send_reset(h, dev->scsi3addr);
2319 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2320 return SUCCESS;
2321
2322 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2323 return FAILED;
2324 }
2325
2326 /*
2327 * For operations that cannot sleep, a command block is allocated at init,
2328 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2329 * which ones are free or in use. Lock must be held when calling this.
2330 * cmd_free() is the complement.
2331 */
2332 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2333 {
2334 struct CommandList *c;
2335 int i;
2336 union u64bit temp64;
2337 dma_addr_t cmd_dma_handle, err_dma_handle;
2338
2339 do {
2340 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2341 if (i == h->nr_cmds)
2342 return NULL;
2343 } while (test_and_set_bit
2344 (i & (BITS_PER_LONG - 1),
2345 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2346 c = h->cmd_pool + i;
2347 memset(c, 0, sizeof(*c));
2348 cmd_dma_handle = h->cmd_pool_dhandle
2349 + i * sizeof(*c);
2350 c->err_info = h->errinfo_pool + i;
2351 memset(c->err_info, 0, sizeof(*c->err_info));
2352 err_dma_handle = h->errinfo_pool_dhandle
2353 + i * sizeof(*c->err_info);
2354 h->nr_allocs++;
2355
2356 c->cmdindex = i;
2357
2358 INIT_LIST_HEAD(&c->list);
2359 c->busaddr = (u32) cmd_dma_handle;
2360 temp64.val = (u64) err_dma_handle;
2361 c->ErrDesc.Addr.lower = temp64.val32.lower;
2362 c->ErrDesc.Addr.upper = temp64.val32.upper;
2363 c->ErrDesc.Len = sizeof(*c->err_info);
2364
2365 c->h = h;
2366 return c;
2367 }
2368
2369 /* For operations that can wait for kmalloc to possibly sleep,
2370 * this routine can be called. Lock need not be held to call
2371 * cmd_special_alloc. cmd_special_free() is the complement.
2372 */
2373 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2374 {
2375 struct CommandList *c;
2376 union u64bit temp64;
2377 dma_addr_t cmd_dma_handle, err_dma_handle;
2378
2379 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2380 if (c == NULL)
2381 return NULL;
2382 memset(c, 0, sizeof(*c));
2383
2384 c->cmdindex = -1;
2385
2386 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2387 &err_dma_handle);
2388
2389 if (c->err_info == NULL) {
2390 pci_free_consistent(h->pdev,
2391 sizeof(*c), c, cmd_dma_handle);
2392 return NULL;
2393 }
2394 memset(c->err_info, 0, sizeof(*c->err_info));
2395
2396 INIT_LIST_HEAD(&c->list);
2397 c->busaddr = (u32) cmd_dma_handle;
2398 temp64.val = (u64) err_dma_handle;
2399 c->ErrDesc.Addr.lower = temp64.val32.lower;
2400 c->ErrDesc.Addr.upper = temp64.val32.upper;
2401 c->ErrDesc.Len = sizeof(*c->err_info);
2402
2403 c->h = h;
2404 return c;
2405 }
2406
2407 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2408 {
2409 int i;
2410
2411 i = c - h->cmd_pool;
2412 clear_bit(i & (BITS_PER_LONG - 1),
2413 h->cmd_pool_bits + (i / BITS_PER_LONG));
2414 h->nr_frees++;
2415 }
2416
2417 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2418 {
2419 union u64bit temp64;
2420
2421 temp64.val32.lower = c->ErrDesc.Addr.lower;
2422 temp64.val32.upper = c->ErrDesc.Addr.upper;
2423 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2424 c->err_info, (dma_addr_t) temp64.val);
2425 pci_free_consistent(h->pdev, sizeof(*c),
2426 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2427 }
2428
2429 #ifdef CONFIG_COMPAT
2430
2431 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2432 {
2433 IOCTL32_Command_struct __user *arg32 =
2434 (IOCTL32_Command_struct __user *) arg;
2435 IOCTL_Command_struct arg64;
2436 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2437 int err;
2438 u32 cp;
2439
2440 memset(&arg64, 0, sizeof(arg64));
2441 err = 0;
2442 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2443 sizeof(arg64.LUN_info));
2444 err |= copy_from_user(&arg64.Request, &arg32->Request,
2445 sizeof(arg64.Request));
2446 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2447 sizeof(arg64.error_info));
2448 err |= get_user(arg64.buf_size, &arg32->buf_size);
2449 err |= get_user(cp, &arg32->buf);
2450 arg64.buf = compat_ptr(cp);
2451 err |= copy_to_user(p, &arg64, sizeof(arg64));
2452
2453 if (err)
2454 return -EFAULT;
2455
2456 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2457 if (err)
2458 return err;
2459 err |= copy_in_user(&arg32->error_info, &p->error_info,
2460 sizeof(arg32->error_info));
2461 if (err)
2462 return -EFAULT;
2463 return err;
2464 }
2465
2466 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2467 int cmd, void *arg)
2468 {
2469 BIG_IOCTL32_Command_struct __user *arg32 =
2470 (BIG_IOCTL32_Command_struct __user *) arg;
2471 BIG_IOCTL_Command_struct arg64;
2472 BIG_IOCTL_Command_struct __user *p =
2473 compat_alloc_user_space(sizeof(arg64));
2474 int err;
2475 u32 cp;
2476
2477 memset(&arg64, 0, sizeof(arg64));
2478 err = 0;
2479 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2480 sizeof(arg64.LUN_info));
2481 err |= copy_from_user(&arg64.Request, &arg32->Request,
2482 sizeof(arg64.Request));
2483 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2484 sizeof(arg64.error_info));
2485 err |= get_user(arg64.buf_size, &arg32->buf_size);
2486 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2487 err |= get_user(cp, &arg32->buf);
2488 arg64.buf = compat_ptr(cp);
2489 err |= copy_to_user(p, &arg64, sizeof(arg64));
2490
2491 if (err)
2492 return -EFAULT;
2493
2494 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2495 if (err)
2496 return err;
2497 err |= copy_in_user(&arg32->error_info, &p->error_info,
2498 sizeof(arg32->error_info));
2499 if (err)
2500 return -EFAULT;
2501 return err;
2502 }
2503
2504 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2505 {
2506 switch (cmd) {
2507 case CCISS_GETPCIINFO:
2508 case CCISS_GETINTINFO:
2509 case CCISS_SETINTINFO:
2510 case CCISS_GETNODENAME:
2511 case CCISS_SETNODENAME:
2512 case CCISS_GETHEARTBEAT:
2513 case CCISS_GETBUSTYPES:
2514 case CCISS_GETFIRMVER:
2515 case CCISS_GETDRIVVER:
2516 case CCISS_REVALIDVOLS:
2517 case CCISS_DEREGDISK:
2518 case CCISS_REGNEWDISK:
2519 case CCISS_REGNEWD:
2520 case CCISS_RESCANDISK:
2521 case CCISS_GETLUNINFO:
2522 return hpsa_ioctl(dev, cmd, arg);
2523
2524 case CCISS_PASSTHRU32:
2525 return hpsa_ioctl32_passthru(dev, cmd, arg);
2526 case CCISS_BIG_PASSTHRU32:
2527 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2528
2529 default:
2530 return -ENOIOCTLCMD;
2531 }
2532 }
2533 #endif
2534
2535 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2536 {
2537 struct hpsa_pci_info pciinfo;
2538
2539 if (!argp)
2540 return -EINVAL;
2541 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2542 pciinfo.bus = h->pdev->bus->number;
2543 pciinfo.dev_fn = h->pdev->devfn;
2544 pciinfo.board_id = h->board_id;
2545 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2546 return -EFAULT;
2547 return 0;
2548 }
2549
2550 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2551 {
2552 DriverVer_type DriverVer;
2553 unsigned char vmaj, vmin, vsubmin;
2554 int rc;
2555
2556 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2557 &vmaj, &vmin, &vsubmin);
2558 if (rc != 3) {
2559 dev_info(&h->pdev->dev, "driver version string '%s' "
2560 "unrecognized.", HPSA_DRIVER_VERSION);
2561 vmaj = 0;
2562 vmin = 0;
2563 vsubmin = 0;
2564 }
2565 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2566 if (!argp)
2567 return -EINVAL;
2568 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2569 return -EFAULT;
2570 return 0;
2571 }
2572
2573 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2574 {
2575 IOCTL_Command_struct iocommand;
2576 struct CommandList *c;
2577 char *buff = NULL;
2578 union u64bit temp64;
2579
2580 if (!argp)
2581 return -EINVAL;
2582 if (!capable(CAP_SYS_RAWIO))
2583 return -EPERM;
2584 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2585 return -EFAULT;
2586 if ((iocommand.buf_size < 1) &&
2587 (iocommand.Request.Type.Direction != XFER_NONE)) {
2588 return -EINVAL;
2589 }
2590 if (iocommand.buf_size > 0) {
2591 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2592 if (buff == NULL)
2593 return -EFAULT;
2594 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2595 /* Copy the data into the buffer we created */
2596 if (copy_from_user(buff, iocommand.buf,
2597 iocommand.buf_size)) {
2598 kfree(buff);
2599 return -EFAULT;
2600 }
2601 } else {
2602 memset(buff, 0, iocommand.buf_size);
2603 }
2604 }
2605 c = cmd_special_alloc(h);
2606 if (c == NULL) {
2607 kfree(buff);
2608 return -ENOMEM;
2609 }
2610 /* Fill in the command type */
2611 c->cmd_type = CMD_IOCTL_PEND;
2612 /* Fill in Command Header */
2613 c->Header.ReplyQueue = 0; /* unused in simple mode */
2614 if (iocommand.buf_size > 0) { /* buffer to fill */
2615 c->Header.SGList = 1;
2616 c->Header.SGTotal = 1;
2617 } else { /* no buffers to fill */
2618 c->Header.SGList = 0;
2619 c->Header.SGTotal = 0;
2620 }
2621 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2622 /* use the kernel address the cmd block for tag */
2623 c->Header.Tag.lower = c->busaddr;
2624
2625 /* Fill in Request block */
2626 memcpy(&c->Request, &iocommand.Request,
2627 sizeof(c->Request));
2628
2629 /* Fill in the scatter gather information */
2630 if (iocommand.buf_size > 0) {
2631 temp64.val = pci_map_single(h->pdev, buff,
2632 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2633 c->SG[0].Addr.lower = temp64.val32.lower;
2634 c->SG[0].Addr.upper = temp64.val32.upper;
2635 c->SG[0].Len = iocommand.buf_size;
2636 c->SG[0].Ext = 0; /* we are not chaining*/
2637 }
2638 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2639 if (iocommand.buf_size > 0)
2640 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2641 check_ioctl_unit_attention(h, c);
2642
2643 /* Copy the error information out */
2644 memcpy(&iocommand.error_info, c->err_info,
2645 sizeof(iocommand.error_info));
2646 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2647 kfree(buff);
2648 cmd_special_free(h, c);
2649 return -EFAULT;
2650 }
2651 if (iocommand.Request.Type.Direction == XFER_READ &&
2652 iocommand.buf_size > 0) {
2653 /* Copy the data out of the buffer we created */
2654 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2655 kfree(buff);
2656 cmd_special_free(h, c);
2657 return -EFAULT;
2658 }
2659 }
2660 kfree(buff);
2661 cmd_special_free(h, c);
2662 return 0;
2663 }
2664
2665 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2666 {
2667 BIG_IOCTL_Command_struct *ioc;
2668 struct CommandList *c;
2669 unsigned char **buff = NULL;
2670 int *buff_size = NULL;
2671 union u64bit temp64;
2672 BYTE sg_used = 0;
2673 int status = 0;
2674 int i;
2675 u32 left;
2676 u32 sz;
2677 BYTE __user *data_ptr;
2678
2679 if (!argp)
2680 return -EINVAL;
2681 if (!capable(CAP_SYS_RAWIO))
2682 return -EPERM;
2683 ioc = (BIG_IOCTL_Command_struct *)
2684 kmalloc(sizeof(*ioc), GFP_KERNEL);
2685 if (!ioc) {
2686 status = -ENOMEM;
2687 goto cleanup1;
2688 }
2689 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2690 status = -EFAULT;
2691 goto cleanup1;
2692 }
2693 if ((ioc->buf_size < 1) &&
2694 (ioc->Request.Type.Direction != XFER_NONE)) {
2695 status = -EINVAL;
2696 goto cleanup1;
2697 }
2698 /* Check kmalloc limits using all SGs */
2699 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2700 status = -EINVAL;
2701 goto cleanup1;
2702 }
2703 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2704 status = -EINVAL;
2705 goto cleanup1;
2706 }
2707 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2708 if (!buff) {
2709 status = -ENOMEM;
2710 goto cleanup1;
2711 }
2712 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2713 if (!buff_size) {
2714 status = -ENOMEM;
2715 goto cleanup1;
2716 }
2717 left = ioc->buf_size;
2718 data_ptr = ioc->buf;
2719 while (left) {
2720 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2721 buff_size[sg_used] = sz;
2722 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2723 if (buff[sg_used] == NULL) {
2724 status = -ENOMEM;
2725 goto cleanup1;
2726 }
2727 if (ioc->Request.Type.Direction == XFER_WRITE) {
2728 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2729 status = -ENOMEM;
2730 goto cleanup1;
2731 }
2732 } else
2733 memset(buff[sg_used], 0, sz);
2734 left -= sz;
2735 data_ptr += sz;
2736 sg_used++;
2737 }
2738 c = cmd_special_alloc(h);
2739 if (c == NULL) {
2740 status = -ENOMEM;
2741 goto cleanup1;
2742 }
2743 c->cmd_type = CMD_IOCTL_PEND;
2744 c->Header.ReplyQueue = 0;
2745 c->Header.SGList = c->Header.SGTotal = sg_used;
2746 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2747 c->Header.Tag.lower = c->busaddr;
2748 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2749 if (ioc->buf_size > 0) {
2750 int i;
2751 for (i = 0; i < sg_used; i++) {
2752 temp64.val = pci_map_single(h->pdev, buff[i],
2753 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2754 c->SG[i].Addr.lower = temp64.val32.lower;
2755 c->SG[i].Addr.upper = temp64.val32.upper;
2756 c->SG[i].Len = buff_size[i];
2757 /* we are not chaining */
2758 c->SG[i].Ext = 0;
2759 }
2760 }
2761 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2762 if (sg_used)
2763 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2764 check_ioctl_unit_attention(h, c);
2765 /* Copy the error information out */
2766 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2767 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2768 cmd_special_free(h, c);
2769 status = -EFAULT;
2770 goto cleanup1;
2771 }
2772 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
2773 /* Copy the data out of the buffer we created */
2774 BYTE __user *ptr = ioc->buf;
2775 for (i = 0; i < sg_used; i++) {
2776 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2777 cmd_special_free(h, c);
2778 status = -EFAULT;
2779 goto cleanup1;
2780 }
2781 ptr += buff_size[i];
2782 }
2783 }
2784 cmd_special_free(h, c);
2785 status = 0;
2786 cleanup1:
2787 if (buff) {
2788 for (i = 0; i < sg_used; i++)
2789 kfree(buff[i]);
2790 kfree(buff);
2791 }
2792 kfree(buff_size);
2793 kfree(ioc);
2794 return status;
2795 }
2796
2797 static void check_ioctl_unit_attention(struct ctlr_info *h,
2798 struct CommandList *c)
2799 {
2800 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2801 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2802 (void) check_for_unit_attention(h, c);
2803 }
2804 /*
2805 * ioctl
2806 */
2807 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2808 {
2809 struct ctlr_info *h;
2810 void __user *argp = (void __user *)arg;
2811
2812 h = sdev_to_hba(dev);
2813
2814 switch (cmd) {
2815 case CCISS_DEREGDISK:
2816 case CCISS_REGNEWDISK:
2817 case CCISS_REGNEWD:
2818 hpsa_scan_start(h->scsi_host);
2819 return 0;
2820 case CCISS_GETPCIINFO:
2821 return hpsa_getpciinfo_ioctl(h, argp);
2822 case CCISS_GETDRIVVER:
2823 return hpsa_getdrivver_ioctl(h, argp);
2824 case CCISS_PASSTHRU:
2825 return hpsa_passthru_ioctl(h, argp);
2826 case CCISS_BIG_PASSTHRU:
2827 return hpsa_big_passthru_ioctl(h, argp);
2828 default:
2829 return -ENOTTY;
2830 }
2831 }
2832
2833 static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2834 unsigned char *scsi3addr, u8 reset_type)
2835 {
2836 struct CommandList *c;
2837
2838 c = cmd_alloc(h);
2839 if (!c)
2840 return -ENOMEM;
2841 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2842 RAID_CTLR_LUNID, TYPE_MSG);
2843 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2844 c->waiting = NULL;
2845 enqueue_cmd_and_start_io(h, c);
2846 /* Don't wait for completion, the reset won't complete. Don't free
2847 * the command either. This is the last command we will send before
2848 * re-initializing everything, so it doesn't matter and won't leak.
2849 */
2850 return 0;
2851 }
2852
2853 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2854 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
2855 int cmd_type)
2856 {
2857 int pci_dir = XFER_NONE;
2858
2859 c->cmd_type = CMD_IOCTL_PEND;
2860 c->Header.ReplyQueue = 0;
2861 if (buff != NULL && size > 0) {
2862 c->Header.SGList = 1;
2863 c->Header.SGTotal = 1;
2864 } else {
2865 c->Header.SGList = 0;
2866 c->Header.SGTotal = 0;
2867 }
2868 c->Header.Tag.lower = c->busaddr;
2869 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2870
2871 c->Request.Type.Type = cmd_type;
2872 if (cmd_type == TYPE_CMD) {
2873 switch (cmd) {
2874 case HPSA_INQUIRY:
2875 /* are we trying to read a vital product page */
2876 if (page_code != 0) {
2877 c->Request.CDB[1] = 0x01;
2878 c->Request.CDB[2] = page_code;
2879 }
2880 c->Request.CDBLen = 6;
2881 c->Request.Type.Attribute = ATTR_SIMPLE;
2882 c->Request.Type.Direction = XFER_READ;
2883 c->Request.Timeout = 0;
2884 c->Request.CDB[0] = HPSA_INQUIRY;
2885 c->Request.CDB[4] = size & 0xFF;
2886 break;
2887 case HPSA_REPORT_LOG:
2888 case HPSA_REPORT_PHYS:
2889 /* Talking to controller so It's a physical command
2890 mode = 00 target = 0. Nothing to write.
2891 */
2892 c->Request.CDBLen = 12;
2893 c->Request.Type.Attribute = ATTR_SIMPLE;
2894 c->Request.Type.Direction = XFER_READ;
2895 c->Request.Timeout = 0;
2896 c->Request.CDB[0] = cmd;
2897 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2898 c->Request.CDB[7] = (size >> 16) & 0xFF;
2899 c->Request.CDB[8] = (size >> 8) & 0xFF;
2900 c->Request.CDB[9] = size & 0xFF;
2901 break;
2902 case HPSA_CACHE_FLUSH:
2903 c->Request.CDBLen = 12;
2904 c->Request.Type.Attribute = ATTR_SIMPLE;
2905 c->Request.Type.Direction = XFER_WRITE;
2906 c->Request.Timeout = 0;
2907 c->Request.CDB[0] = BMIC_WRITE;
2908 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2909 c->Request.CDB[7] = (size >> 8) & 0xFF;
2910 c->Request.CDB[8] = size & 0xFF;
2911 break;
2912 case TEST_UNIT_READY:
2913 c->Request.CDBLen = 6;
2914 c->Request.Type.Attribute = ATTR_SIMPLE;
2915 c->Request.Type.Direction = XFER_NONE;
2916 c->Request.Timeout = 0;
2917 break;
2918 default:
2919 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2920 BUG();
2921 return;
2922 }
2923 } else if (cmd_type == TYPE_MSG) {
2924 switch (cmd) {
2925
2926 case HPSA_DEVICE_RESET_MSG:
2927 c->Request.CDBLen = 16;
2928 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2929 c->Request.Type.Attribute = ATTR_SIMPLE;
2930 c->Request.Type.Direction = XFER_NONE;
2931 c->Request.Timeout = 0; /* Don't time out */
2932 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2933 c->Request.CDB[0] = cmd;
2934 c->Request.CDB[1] = 0x03; /* Reset target above */
2935 /* If bytes 4-7 are zero, it means reset the */
2936 /* LunID device */
2937 c->Request.CDB[4] = 0x00;
2938 c->Request.CDB[5] = 0x00;
2939 c->Request.CDB[6] = 0x00;
2940 c->Request.CDB[7] = 0x00;
2941 break;
2942
2943 default:
2944 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2945 cmd);
2946 BUG();
2947 }
2948 } else {
2949 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2950 BUG();
2951 }
2952
2953 switch (c->Request.Type.Direction) {
2954 case XFER_READ:
2955 pci_dir = PCI_DMA_FROMDEVICE;
2956 break;
2957 case XFER_WRITE:
2958 pci_dir = PCI_DMA_TODEVICE;
2959 break;
2960 case XFER_NONE:
2961 pci_dir = PCI_DMA_NONE;
2962 break;
2963 default:
2964 pci_dir = PCI_DMA_BIDIRECTIONAL;
2965 }
2966
2967 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2968
2969 return;
2970 }
2971
2972 /*
2973 * Map (physical) PCI mem into (virtual) kernel space
2974 */
2975 static void __iomem *remap_pci_mem(ulong base, ulong size)
2976 {
2977 ulong page_base = ((ulong) base) & PAGE_MASK;
2978 ulong page_offs = ((ulong) base) - page_base;
2979 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2980
2981 return page_remapped ? (page_remapped + page_offs) : NULL;
2982 }
2983
2984 /* Takes cmds off the submission queue and sends them to the hardware,
2985 * then puts them on the queue of cmds waiting for completion.
2986 */
2987 static void start_io(struct ctlr_info *h)
2988 {
2989 struct CommandList *c;
2990
2991 while (!list_empty(&h->reqQ)) {
2992 c = list_entry(h->reqQ.next, struct CommandList, list);
2993 /* can't do anything if fifo is full */
2994 if ((h->access.fifo_full(h))) {
2995 dev_warn(&h->pdev->dev, "fifo full\n");
2996 break;
2997 }
2998
2999 /* Get the first entry from the Request Q */
3000 removeQ(c);
3001 h->Qdepth--;
3002
3003 /* Tell the controller execute command */
3004 h->access.submit_command(h, c);
3005
3006 /* Put job onto the completed Q */
3007 addQ(&h->cmpQ, c);
3008 }
3009 }
3010
3011 static inline unsigned long get_next_completion(struct ctlr_info *h)
3012 {
3013 return h->access.command_completed(h);
3014 }
3015
3016 static inline bool interrupt_pending(struct ctlr_info *h)
3017 {
3018 return h->access.intr_pending(h);
3019 }
3020
3021 static inline long interrupt_not_for_us(struct ctlr_info *h)
3022 {
3023 return (h->access.intr_pending(h) == 0) ||
3024 (h->interrupts_enabled == 0);
3025 }
3026
3027 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3028 u32 raw_tag)
3029 {
3030 if (unlikely(tag_index >= h->nr_cmds)) {
3031 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3032 return 1;
3033 }
3034 return 0;
3035 }
3036
3037 static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
3038 {
3039 removeQ(c);
3040 if (likely(c->cmd_type == CMD_SCSI))
3041 complete_scsi_command(c);
3042 else if (c->cmd_type == CMD_IOCTL_PEND)
3043 complete(c->waiting);
3044 }
3045
3046 static inline u32 hpsa_tag_contains_index(u32 tag)
3047 {
3048 return tag & DIRECT_LOOKUP_BIT;
3049 }
3050
3051 static inline u32 hpsa_tag_to_index(u32 tag)
3052 {
3053 return tag >> DIRECT_LOOKUP_SHIFT;
3054 }
3055
3056
3057 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3058 {
3059 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3060 #define HPSA_SIMPLE_ERROR_BITS 0x03
3061 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3062 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3063 return tag & ~HPSA_PERF_ERROR_BITS;
3064 }
3065
3066 /* process completion of an indexed ("direct lookup") command */
3067 static inline u32 process_indexed_cmd(struct ctlr_info *h,
3068 u32 raw_tag)
3069 {
3070 u32 tag_index;
3071 struct CommandList *c;
3072
3073 tag_index = hpsa_tag_to_index(raw_tag);
3074 if (bad_tag(h, tag_index, raw_tag))
3075 return next_command(h);
3076 c = h->cmd_pool + tag_index;
3077 finish_cmd(c, raw_tag);
3078 return next_command(h);
3079 }
3080
3081 /* process completion of a non-indexed command */
3082 static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3083 u32 raw_tag)
3084 {
3085 u32 tag;
3086 struct CommandList *c = NULL;
3087
3088 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3089 list_for_each_entry(c, &h->cmpQ, list) {
3090 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3091 finish_cmd(c, raw_tag);
3092 return next_command(h);
3093 }
3094 }
3095 bad_tag(h, h->nr_cmds + 1, raw_tag);
3096 return next_command(h);
3097 }
3098
3099 /* Some controllers, like p400, will give us one interrupt
3100 * after a soft reset, even if we turned interrupts off.
3101 * Only need to check for this in the hpsa_xxx_discard_completions
3102 * functions.
3103 */
3104 static int ignore_bogus_interrupt(struct ctlr_info *h)
3105 {
3106 if (likely(!reset_devices))
3107 return 0;
3108
3109 if (likely(h->interrupts_enabled))
3110 return 0;
3111
3112 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3113 "(known firmware bug.) Ignoring.\n");
3114
3115 return 1;
3116 }
3117
3118 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3119 {
3120 struct ctlr_info *h = dev_id;
3121 unsigned long flags;
3122 u32 raw_tag;
3123
3124 if (ignore_bogus_interrupt(h))
3125 return IRQ_NONE;
3126
3127 if (interrupt_not_for_us(h))
3128 return IRQ_NONE;
3129 spin_lock_irqsave(&h->lock, flags);
3130 h->last_intr_timestamp = get_jiffies_64();
3131 while (interrupt_pending(h)) {
3132 raw_tag = get_next_completion(h);
3133 while (raw_tag != FIFO_EMPTY)
3134 raw_tag = next_command(h);
3135 }
3136 spin_unlock_irqrestore(&h->lock, flags);
3137 return IRQ_HANDLED;
3138 }
3139
3140 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3141 {
3142 struct ctlr_info *h = dev_id;
3143 unsigned long flags;
3144 u32 raw_tag;
3145
3146 if (ignore_bogus_interrupt(h))
3147 return IRQ_NONE;
3148
3149 spin_lock_irqsave(&h->lock, flags);
3150 h->last_intr_timestamp = get_jiffies_64();
3151 raw_tag = get_next_completion(h);
3152 while (raw_tag != FIFO_EMPTY)
3153 raw_tag = next_command(h);
3154 spin_unlock_irqrestore(&h->lock, flags);
3155 return IRQ_HANDLED;
3156 }
3157
3158 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
3159 {
3160 struct ctlr_info *h = dev_id;
3161 unsigned long flags;
3162 u32 raw_tag;
3163
3164 if (interrupt_not_for_us(h))
3165 return IRQ_NONE;
3166 spin_lock_irqsave(&h->lock, flags);
3167 h->last_intr_timestamp = get_jiffies_64();
3168 while (interrupt_pending(h)) {
3169 raw_tag = get_next_completion(h);
3170 while (raw_tag != FIFO_EMPTY) {
3171 if (hpsa_tag_contains_index(raw_tag))
3172 raw_tag = process_indexed_cmd(h, raw_tag);
3173 else
3174 raw_tag = process_nonindexed_cmd(h, raw_tag);
3175 }
3176 }
3177 spin_unlock_irqrestore(&h->lock, flags);
3178 return IRQ_HANDLED;
3179 }
3180
3181 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3182 {
3183 struct ctlr_info *h = dev_id;
3184 unsigned long flags;
3185 u32 raw_tag;
3186
3187 spin_lock_irqsave(&h->lock, flags);
3188 h->last_intr_timestamp = get_jiffies_64();
3189 raw_tag = get_next_completion(h);
3190 while (raw_tag != FIFO_EMPTY) {
3191 if (hpsa_tag_contains_index(raw_tag))
3192 raw_tag = process_indexed_cmd(h, raw_tag);
3193 else
3194 raw_tag = process_nonindexed_cmd(h, raw_tag);
3195 }
3196 spin_unlock_irqrestore(&h->lock, flags);
3197 return IRQ_HANDLED;
3198 }
3199
3200 /* Send a message CDB to the firmware. Careful, this only works
3201 * in simple mode, not performant mode due to the tag lookup.
3202 * We only ever use this immediately after a controller reset.
3203 */
3204 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3205 unsigned char type)
3206 {
3207 struct Command {
3208 struct CommandListHeader CommandHeader;
3209 struct RequestBlock Request;
3210 struct ErrDescriptor ErrorDescriptor;
3211 };
3212 struct Command *cmd;
3213 static const size_t cmd_sz = sizeof(*cmd) +
3214 sizeof(cmd->ErrorDescriptor);
3215 dma_addr_t paddr64;
3216 uint32_t paddr32, tag;
3217 void __iomem *vaddr;
3218 int i, err;
3219
3220 vaddr = pci_ioremap_bar(pdev, 0);
3221 if (vaddr == NULL)
3222 return -ENOMEM;
3223
3224 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3225 * CCISS commands, so they must be allocated from the lower 4GiB of
3226 * memory.
3227 */
3228 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3229 if (err) {
3230 iounmap(vaddr);
3231 return -ENOMEM;
3232 }
3233
3234 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3235 if (cmd == NULL) {
3236 iounmap(vaddr);
3237 return -ENOMEM;
3238 }
3239
3240 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3241 * although there's no guarantee, we assume that the address is at
3242 * least 4-byte aligned (most likely, it's page-aligned).
3243 */
3244 paddr32 = paddr64;
3245
3246 cmd->CommandHeader.ReplyQueue = 0;
3247 cmd->CommandHeader.SGList = 0;
3248 cmd->CommandHeader.SGTotal = 0;
3249 cmd->CommandHeader.Tag.lower = paddr32;
3250 cmd->CommandHeader.Tag.upper = 0;
3251 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3252
3253 cmd->Request.CDBLen = 16;
3254 cmd->Request.Type.Type = TYPE_MSG;
3255 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3256 cmd->Request.Type.Direction = XFER_NONE;
3257 cmd->Request.Timeout = 0; /* Don't time out */
3258 cmd->Request.CDB[0] = opcode;
3259 cmd->Request.CDB[1] = type;
3260 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3261 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3262 cmd->ErrorDescriptor.Addr.upper = 0;
3263 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3264
3265 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3266
3267 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3268 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3269 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3270 break;
3271 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3272 }
3273
3274 iounmap(vaddr);
3275
3276 /* we leak the DMA buffer here ... no choice since the controller could
3277 * still complete the command.
3278 */
3279 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3280 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3281 opcode, type);
3282 return -ETIMEDOUT;
3283 }
3284
3285 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3286
3287 if (tag & HPSA_ERROR_BIT) {
3288 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3289 opcode, type);
3290 return -EIO;
3291 }
3292
3293 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3294 opcode, type);
3295 return 0;
3296 }
3297
3298 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3299
3300 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3301 void * __iomem vaddr, u32 use_doorbell)
3302 {
3303 u16 pmcsr;
3304 int pos;
3305
3306 if (use_doorbell) {
3307 /* For everything after the P600, the PCI power state method
3308 * of resetting the controller doesn't work, so we have this
3309 * other way using the doorbell register.
3310 */
3311 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3312 writel(use_doorbell, vaddr + SA5_DOORBELL);
3313 } else { /* Try to do it the PCI power state way */
3314
3315 /* Quoting from the Open CISS Specification: "The Power
3316 * Management Control/Status Register (CSR) controls the power
3317 * state of the device. The normal operating state is D0,
3318 * CSR=00h. The software off state is D3, CSR=03h. To reset
3319 * the controller, place the interface device in D3 then to D0,
3320 * this causes a secondary PCI reset which will reset the
3321 * controller." */
3322
3323 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3324 if (pos == 0) {
3325 dev_err(&pdev->dev,
3326 "hpsa_reset_controller: "
3327 "PCI PM not supported\n");
3328 return -ENODEV;
3329 }
3330 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3331 /* enter the D3hot power management state */
3332 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3333 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3334 pmcsr |= PCI_D3hot;
3335 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3336
3337 msleep(500);
3338
3339 /* enter the D0 power management state */
3340 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3341 pmcsr |= PCI_D0;
3342 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3343
3344 /*
3345 * The P600 requires a small delay when changing states.
3346 * Otherwise we may think the board did not reset and we bail.
3347 * This for kdump only and is particular to the P600.
3348 */
3349 msleep(500);
3350 }
3351 return 0;
3352 }
3353
3354 static __devinit void init_driver_version(char *driver_version, int len)
3355 {
3356 memset(driver_version, 0, len);
3357 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3358 }
3359
3360 static __devinit int write_driver_ver_to_cfgtable(
3361 struct CfgTable __iomem *cfgtable)
3362 {
3363 char *driver_version;
3364 int i, size = sizeof(cfgtable->driver_version);
3365
3366 driver_version = kmalloc(size, GFP_KERNEL);
3367 if (!driver_version)
3368 return -ENOMEM;
3369
3370 init_driver_version(driver_version, size);
3371 for (i = 0; i < size; i++)
3372 writeb(driver_version[i], &cfgtable->driver_version[i]);
3373 kfree(driver_version);
3374 return 0;
3375 }
3376
3377 static __devinit void read_driver_ver_from_cfgtable(
3378 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3379 {
3380 int i;
3381
3382 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3383 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3384 }
3385
3386 static __devinit int controller_reset_failed(
3387 struct CfgTable __iomem *cfgtable)
3388 {
3389
3390 char *driver_ver, *old_driver_ver;
3391 int rc, size = sizeof(cfgtable->driver_version);
3392
3393 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3394 if (!old_driver_ver)
3395 return -ENOMEM;
3396 driver_ver = old_driver_ver + size;
3397
3398 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3399 * should have been changed, otherwise we know the reset failed.
3400 */
3401 init_driver_version(old_driver_ver, size);
3402 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3403 rc = !memcmp(driver_ver, old_driver_ver, size);
3404 kfree(old_driver_ver);
3405 return rc;
3406 }
3407 /* This does a hard reset of the controller using PCI power management
3408 * states or the using the doorbell register.
3409 */
3410 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3411 {
3412 u64 cfg_offset;
3413 u32 cfg_base_addr;
3414 u64 cfg_base_addr_index;
3415 void __iomem *vaddr;
3416 unsigned long paddr;
3417 u32 misc_fw_support;
3418 int rc;
3419 struct CfgTable __iomem *cfgtable;
3420 u32 use_doorbell;
3421 u32 board_id;
3422 u16 command_register;
3423
3424 /* For controllers as old as the P600, this is very nearly
3425 * the same thing as
3426 *
3427 * pci_save_state(pci_dev);
3428 * pci_set_power_state(pci_dev, PCI_D3hot);
3429 * pci_set_power_state(pci_dev, PCI_D0);
3430 * pci_restore_state(pci_dev);
3431 *
3432 * For controllers newer than the P600, the pci power state
3433 * method of resetting doesn't work so we have another way
3434 * using the doorbell register.
3435 */
3436
3437 rc = hpsa_lookup_board_id(pdev, &board_id);
3438 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3439 dev_warn(&pdev->dev, "Not resetting device.\n");
3440 return -ENODEV;
3441 }
3442
3443 /* if controller is soft- but not hard resettable... */
3444 if (!ctlr_is_hard_resettable(board_id))
3445 return -ENOTSUPP; /* try soft reset later. */
3446
3447 /* Save the PCI command register */
3448 pci_read_config_word(pdev, 4, &command_register);
3449 /* Turn the board off. This is so that later pci_restore_state()
3450 * won't turn the board on before the rest of config space is ready.
3451 */
3452 pci_disable_device(pdev);
3453 pci_save_state(pdev);
3454
3455 /* find the first memory BAR, so we can find the cfg table */
3456 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3457 if (rc)
3458 return rc;
3459 vaddr = remap_pci_mem(paddr, 0x250);
3460 if (!vaddr)
3461 return -ENOMEM;
3462
3463 /* find cfgtable in order to check if reset via doorbell is supported */
3464 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3465 &cfg_base_addr_index, &cfg_offset);
3466 if (rc)
3467 goto unmap_vaddr;
3468 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3469 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3470 if (!cfgtable) {
3471 rc = -ENOMEM;
3472 goto unmap_vaddr;
3473 }
3474 rc = write_driver_ver_to_cfgtable(cfgtable);
3475 if (rc)
3476 goto unmap_vaddr;
3477
3478 /* If reset via doorbell register is supported, use that.
3479 * There are two such methods. Favor the newest method.
3480 */
3481 misc_fw_support = readl(&cfgtable->misc_fw_support);
3482 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3483 if (use_doorbell) {
3484 use_doorbell = DOORBELL_CTLR_RESET2;
3485 } else {
3486 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3487 if (use_doorbell) {
3488 dev_warn(&pdev->dev, "Soft reset not supported. "
3489 "Firmware update is required.\n");
3490 rc = -ENOTSUPP; /* try soft reset */
3491 goto unmap_cfgtable;
3492 }
3493 }
3494
3495 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3496 if (rc)
3497 goto unmap_cfgtable;
3498
3499 pci_restore_state(pdev);
3500 rc = pci_enable_device(pdev);
3501 if (rc) {
3502 dev_warn(&pdev->dev, "failed to enable device.\n");
3503 goto unmap_cfgtable;
3504 }
3505 pci_write_config_word(pdev, 4, command_register);
3506
3507 /* Some devices (notably the HP Smart Array 5i Controller)
3508 need a little pause here */
3509 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3510
3511 /* Wait for board to become not ready, then ready. */
3512 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3513 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3514 if (rc) {
3515 dev_warn(&pdev->dev,
3516 "failed waiting for board to reset."
3517 " Will try soft reset.\n");
3518 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3519 goto unmap_cfgtable;
3520 }
3521 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3522 if (rc) {
3523 dev_warn(&pdev->dev,
3524 "failed waiting for board to become ready "
3525 "after hard reset\n");
3526 goto unmap_cfgtable;
3527 }
3528
3529 rc = controller_reset_failed(vaddr);
3530 if (rc < 0)
3531 goto unmap_cfgtable;
3532 if (rc) {
3533 dev_warn(&pdev->dev, "Unable to successfully reset "
3534 "controller. Will try soft reset.\n");
3535 rc = -ENOTSUPP;
3536 } else {
3537 dev_info(&pdev->dev, "board ready after hard reset.\n");
3538 }
3539
3540 unmap_cfgtable:
3541 iounmap(cfgtable);
3542
3543 unmap_vaddr:
3544 iounmap(vaddr);
3545 return rc;
3546 }
3547
3548 /*
3549 * We cannot read the structure directly, for portability we must use
3550 * the io functions.
3551 * This is for debug only.
3552 */
3553 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3554 {
3555 #ifdef HPSA_DEBUG
3556 int i;
3557 char temp_name[17];
3558
3559 dev_info(dev, "Controller Configuration information\n");
3560 dev_info(dev, "------------------------------------\n");
3561 for (i = 0; i < 4; i++)
3562 temp_name[i] = readb(&(tb->Signature[i]));
3563 temp_name[4] = '\0';
3564 dev_info(dev, " Signature = %s\n", temp_name);
3565 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3566 dev_info(dev, " Transport methods supported = 0x%x\n",
3567 readl(&(tb->TransportSupport)));
3568 dev_info(dev, " Transport methods active = 0x%x\n",
3569 readl(&(tb->TransportActive)));
3570 dev_info(dev, " Requested transport Method = 0x%x\n",
3571 readl(&(tb->HostWrite.TransportRequest)));
3572 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3573 readl(&(tb->HostWrite.CoalIntDelay)));
3574 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3575 readl(&(tb->HostWrite.CoalIntCount)));
3576 dev_info(dev, " Max outstanding commands = 0x%d\n",
3577 readl(&(tb->CmdsOutMax)));
3578 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3579 for (i = 0; i < 16; i++)
3580 temp_name[i] = readb(&(tb->ServerName[i]));
3581 temp_name[16] = '\0';
3582 dev_info(dev, " Server Name = %s\n", temp_name);
3583 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3584 readl(&(tb->HeartBeat)));
3585 #endif /* HPSA_DEBUG */
3586 }
3587
3588 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3589 {
3590 int i, offset, mem_type, bar_type;
3591
3592 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3593 return 0;
3594 offset = 0;
3595 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3596 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3597 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3598 offset += 4;
3599 else {
3600 mem_type = pci_resource_flags(pdev, i) &
3601 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3602 switch (mem_type) {
3603 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3604 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3605 offset += 4; /* 32 bit */
3606 break;
3607 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3608 offset += 8;
3609 break;
3610 default: /* reserved in PCI 2.2 */
3611 dev_warn(&pdev->dev,
3612 "base address is invalid\n");
3613 return -1;
3614 break;
3615 }
3616 }
3617 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3618 return i + 1;
3619 }
3620 return -1;
3621 }
3622
3623 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3624 * controllers that are capable. If not, we use IO-APIC mode.
3625 */
3626
3627 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
3628 {
3629 #ifdef CONFIG_PCI_MSI
3630 int err;
3631 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3632 {0, 2}, {0, 3}
3633 };
3634
3635 /* Some boards advertise MSI but don't really support it */
3636 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3637 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3638 goto default_int_mode;
3639 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3640 dev_info(&h->pdev->dev, "MSIX\n");
3641 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
3642 if (!err) {
3643 h->intr[0] = hpsa_msix_entries[0].vector;
3644 h->intr[1] = hpsa_msix_entries[1].vector;
3645 h->intr[2] = hpsa_msix_entries[2].vector;
3646 h->intr[3] = hpsa_msix_entries[3].vector;
3647 h->msix_vector = 1;
3648 return;
3649 }
3650 if (err > 0) {
3651 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
3652 "available\n", err);
3653 goto default_int_mode;
3654 } else {
3655 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
3656 err);
3657 goto default_int_mode;
3658 }
3659 }
3660 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3661 dev_info(&h->pdev->dev, "MSI\n");
3662 if (!pci_enable_msi(h->pdev))
3663 h->msi_vector = 1;
3664 else
3665 dev_warn(&h->pdev->dev, "MSI init failed\n");
3666 }
3667 default_int_mode:
3668 #endif /* CONFIG_PCI_MSI */
3669 /* if we get here we're going to use the default interrupt mode */
3670 h->intr[h->intr_mode] = h->pdev->irq;
3671 }
3672
3673 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3674 {
3675 int i;
3676 u32 subsystem_vendor_id, subsystem_device_id;
3677
3678 subsystem_vendor_id = pdev->subsystem_vendor;
3679 subsystem_device_id = pdev->subsystem_device;
3680 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3681 subsystem_vendor_id;
3682
3683 for (i = 0; i < ARRAY_SIZE(products); i++)
3684 if (*board_id == products[i].board_id)
3685 return i;
3686
3687 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3688 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3689 !hpsa_allow_any) {
3690 dev_warn(&pdev->dev, "unrecognized board ID: "
3691 "0x%08x, ignoring.\n", *board_id);
3692 return -ENODEV;
3693 }
3694 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3695 }
3696
3697 static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3698 {
3699 u16 command;
3700
3701 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3702 return ((command & PCI_COMMAND_MEMORY) == 0);
3703 }
3704
3705 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3706 unsigned long *memory_bar)
3707 {
3708 int i;
3709
3710 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3711 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3712 /* addressing mode bits already removed */
3713 *memory_bar = pci_resource_start(pdev, i);
3714 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3715 *memory_bar);
3716 return 0;
3717 }
3718 dev_warn(&pdev->dev, "no memory BAR found\n");
3719 return -ENODEV;
3720 }
3721
3722 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3723 void __iomem *vaddr, int wait_for_ready)
3724 {
3725 int i, iterations;
3726 u32 scratchpad;
3727 if (wait_for_ready)
3728 iterations = HPSA_BOARD_READY_ITERATIONS;
3729 else
3730 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
3731
3732 for (i = 0; i < iterations; i++) {
3733 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3734 if (wait_for_ready) {
3735 if (scratchpad == HPSA_FIRMWARE_READY)
3736 return 0;
3737 } else {
3738 if (scratchpad != HPSA_FIRMWARE_READY)
3739 return 0;
3740 }
3741 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3742 }
3743 dev_warn(&pdev->dev, "board not ready, timed out.\n");
3744 return -ENODEV;
3745 }
3746
3747 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3748 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3749 u64 *cfg_offset)
3750 {
3751 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3752 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3753 *cfg_base_addr &= (u32) 0x0000ffff;
3754 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3755 if (*cfg_base_addr_index == -1) {
3756 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3757 return -ENODEV;
3758 }
3759 return 0;
3760 }
3761
3762 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
3763 {
3764 u64 cfg_offset;
3765 u32 cfg_base_addr;
3766 u64 cfg_base_addr_index;
3767 u32 trans_offset;
3768 int rc;
3769
3770 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3771 &cfg_base_addr_index, &cfg_offset);
3772 if (rc)
3773 return rc;
3774 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
3775 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
3776 if (!h->cfgtable)
3777 return -ENOMEM;
3778 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3779 if (rc)
3780 return rc;
3781 /* Find performant mode table. */
3782 trans_offset = readl(&h->cfgtable->TransMethodOffset);
3783 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3784 cfg_base_addr_index)+cfg_offset+trans_offset,
3785 sizeof(*h->transtable));
3786 if (!h->transtable)
3787 return -ENOMEM;
3788 return 0;
3789 }
3790
3791 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3792 {
3793 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3794
3795 /* Limit commands in memory limited kdump scenario. */
3796 if (reset_devices && h->max_commands > 32)
3797 h->max_commands = 32;
3798
3799 if (h->max_commands < 16) {
3800 dev_warn(&h->pdev->dev, "Controller reports "
3801 "max supported commands of %d, an obvious lie. "
3802 "Using 16. Ensure that firmware is up to date.\n",
3803 h->max_commands);
3804 h->max_commands = 16;
3805 }
3806 }
3807
3808 /* Interrogate the hardware for some limits:
3809 * max commands, max SG elements without chaining, and with chaining,
3810 * SG chain block size, etc.
3811 */
3812 static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3813 {
3814 hpsa_get_max_perf_mode_cmds(h);
3815 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3816 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3817 /*
3818 * Limit in-command s/g elements to 32 save dma'able memory.
3819 * Howvever spec says if 0, use 31
3820 */
3821 h->max_cmd_sg_entries = 31;
3822 if (h->maxsgentries > 512) {
3823 h->max_cmd_sg_entries = 32;
3824 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3825 h->maxsgentries--; /* save one for chain pointer */
3826 } else {
3827 h->maxsgentries = 31; /* default to traditional values */
3828 h->chainsize = 0;
3829 }
3830 }
3831
3832 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3833 {
3834 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3835 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3836 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3837 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3838 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3839 return false;
3840 }
3841 return true;
3842 }
3843
3844 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3845 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3846 {
3847 #ifdef CONFIG_X86
3848 u32 prefetch;
3849
3850 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3851 prefetch |= 0x100;
3852 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3853 #endif
3854 }
3855
3856 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3857 * in a prefetch beyond physical memory.
3858 */
3859 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3860 {
3861 u32 dma_prefetch;
3862
3863 if (h->board_id != 0x3225103C)
3864 return;
3865 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3866 dma_prefetch |= 0x8000;
3867 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3868 }
3869
3870 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
3871 {
3872 int i;
3873 u32 doorbell_value;
3874 unsigned long flags;
3875
3876 /* under certain very rare conditions, this can take awhile.
3877 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3878 * as we enter this code.)
3879 */
3880 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3881 spin_lock_irqsave(&h->lock, flags);
3882 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3883 spin_unlock_irqrestore(&h->lock, flags);
3884 if (!(doorbell_value & CFGTBL_ChangeReq))
3885 break;
3886 /* delay and try again */
3887 usleep_range(10000, 20000);
3888 }
3889 }
3890
3891 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3892 {
3893 u32 trans_support;
3894
3895 trans_support = readl(&(h->cfgtable->TransportSupport));
3896 if (!(trans_support & SIMPLE_MODE))
3897 return -ENOTSUPP;
3898
3899 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3900 /* Update the field, and then ring the doorbell */
3901 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3902 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3903 hpsa_wait_for_mode_change_ack(h);
3904 print_cfg_table(&h->pdev->dev, h->cfgtable);
3905 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3906 dev_warn(&h->pdev->dev,
3907 "unable to get board into simple mode\n");
3908 return -ENODEV;
3909 }
3910 h->transMethod = CFGTBL_Trans_Simple;
3911 return 0;
3912 }
3913
3914 static int __devinit hpsa_pci_init(struct ctlr_info *h)
3915 {
3916 int prod_index, err;
3917
3918 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3919 if (prod_index < 0)
3920 return -ENODEV;
3921 h->product_name = products[prod_index].product_name;
3922 h->access = *(products[prod_index].access);
3923
3924 if (hpsa_board_disabled(h->pdev)) {
3925 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
3926 return -ENODEV;
3927 }
3928
3929 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
3930 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
3931
3932 err = pci_enable_device(h->pdev);
3933 if (err) {
3934 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
3935 return err;
3936 }
3937
3938 err = pci_request_regions(h->pdev, "hpsa");
3939 if (err) {
3940 dev_err(&h->pdev->dev,
3941 "cannot obtain PCI resources, aborting\n");
3942 return err;
3943 }
3944 hpsa_interrupt_mode(h);
3945 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3946 if (err)
3947 goto err_out_free_res;
3948 h->vaddr = remap_pci_mem(h->paddr, 0x250);
3949 if (!h->vaddr) {
3950 err = -ENOMEM;
3951 goto err_out_free_res;
3952 }
3953 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
3954 if (err)
3955 goto err_out_free_res;
3956 err = hpsa_find_cfgtables(h);
3957 if (err)
3958 goto err_out_free_res;
3959 hpsa_find_board_params(h);
3960
3961 if (!hpsa_CISS_signature_present(h)) {
3962 err = -ENODEV;
3963 goto err_out_free_res;
3964 }
3965 hpsa_enable_scsi_prefetch(h);
3966 hpsa_p600_dma_prefetch_quirk(h);
3967 err = hpsa_enter_simple_mode(h);
3968 if (err)
3969 goto err_out_free_res;
3970 return 0;
3971
3972 err_out_free_res:
3973 if (h->transtable)
3974 iounmap(h->transtable);
3975 if (h->cfgtable)
3976 iounmap(h->cfgtable);
3977 if (h->vaddr)
3978 iounmap(h->vaddr);
3979 /*
3980 * Deliberately omit pci_disable_device(): it does something nasty to
3981 * Smart Array controllers that pci_enable_device does not undo
3982 */
3983 pci_release_regions(h->pdev);
3984 return err;
3985 }
3986
3987 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3988 {
3989 int rc;
3990
3991 #define HBA_INQUIRY_BYTE_COUNT 64
3992 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3993 if (!h->hba_inquiry_data)
3994 return;
3995 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3996 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3997 if (rc != 0) {
3998 kfree(h->hba_inquiry_data);
3999 h->hba_inquiry_data = NULL;
4000 }
4001 }
4002
4003 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4004 {
4005 int rc, i;
4006
4007 if (!reset_devices)
4008 return 0;
4009
4010 /* Reset the controller with a PCI power-cycle or via doorbell */
4011 rc = hpsa_kdump_hard_reset_controller(pdev);
4012
4013 /* -ENOTSUPP here means we cannot reset the controller
4014 * but it's already (and still) up and running in
4015 * "performant mode". Or, it might be 640x, which can't reset
4016 * due to concerns about shared bbwc between 6402/6404 pair.
4017 */
4018 if (rc == -ENOTSUPP)
4019 return rc; /* just try to do the kdump anyhow. */
4020 if (rc)
4021 return -ENODEV;
4022
4023 /* Now try to get the controller to respond to a no-op */
4024 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4025 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4026 if (hpsa_noop(pdev) == 0)
4027 break;
4028 else
4029 dev_warn(&pdev->dev, "no-op failed%s\n",
4030 (i < 11 ? "; re-trying" : ""));
4031 }
4032 return 0;
4033 }
4034
4035 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4036 {
4037 h->cmd_pool_bits = kzalloc(
4038 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4039 sizeof(unsigned long), GFP_KERNEL);
4040 h->cmd_pool = pci_alloc_consistent(h->pdev,
4041 h->nr_cmds * sizeof(*h->cmd_pool),
4042 &(h->cmd_pool_dhandle));
4043 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4044 h->nr_cmds * sizeof(*h->errinfo_pool),
4045 &(h->errinfo_pool_dhandle));
4046 if ((h->cmd_pool_bits == NULL)
4047 || (h->cmd_pool == NULL)
4048 || (h->errinfo_pool == NULL)) {
4049 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4050 return -ENOMEM;
4051 }
4052 return 0;
4053 }
4054
4055 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4056 {
4057 kfree(h->cmd_pool_bits);
4058 if (h->cmd_pool)
4059 pci_free_consistent(h->pdev,
4060 h->nr_cmds * sizeof(struct CommandList),
4061 h->cmd_pool, h->cmd_pool_dhandle);
4062 if (h->errinfo_pool)
4063 pci_free_consistent(h->pdev,
4064 h->nr_cmds * sizeof(struct ErrorInfo),
4065 h->errinfo_pool,
4066 h->errinfo_pool_dhandle);
4067 }
4068
4069 static int hpsa_request_irq(struct ctlr_info *h,
4070 irqreturn_t (*msixhandler)(int, void *),
4071 irqreturn_t (*intxhandler)(int, void *))
4072 {
4073 int rc;
4074
4075 if (h->msix_vector || h->msi_vector)
4076 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4077 0, h->devname, h);
4078 else
4079 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4080 IRQF_SHARED, h->devname, h);
4081 if (rc) {
4082 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4083 h->intr[h->intr_mode], h->devname);
4084 return -ENODEV;
4085 }
4086 return 0;
4087 }
4088
4089 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4090 {
4091 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4092 HPSA_RESET_TYPE_CONTROLLER)) {
4093 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4094 return -EIO;
4095 }
4096
4097 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4098 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4099 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4100 return -1;
4101 }
4102
4103 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4104 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4105 dev_warn(&h->pdev->dev, "Board failed to become ready "
4106 "after soft reset.\n");
4107 return -1;
4108 }
4109
4110 return 0;
4111 }
4112
4113 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4114 {
4115 free_irq(h->intr[h->intr_mode], h);
4116 #ifdef CONFIG_PCI_MSI
4117 if (h->msix_vector)
4118 pci_disable_msix(h->pdev);
4119 else if (h->msi_vector)
4120 pci_disable_msi(h->pdev);
4121 #endif /* CONFIG_PCI_MSI */
4122 hpsa_free_sg_chain_blocks(h);
4123 hpsa_free_cmd_pool(h);
4124 kfree(h->blockFetchTable);
4125 pci_free_consistent(h->pdev, h->reply_pool_size,
4126 h->reply_pool, h->reply_pool_dhandle);
4127 if (h->vaddr)
4128 iounmap(h->vaddr);
4129 if (h->transtable)
4130 iounmap(h->transtable);
4131 if (h->cfgtable)
4132 iounmap(h->cfgtable);
4133 pci_release_regions(h->pdev);
4134 kfree(h);
4135 }
4136
4137 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4138 {
4139 assert_spin_locked(&lockup_detector_lock);
4140 if (!hpsa_lockup_detector)
4141 return;
4142 if (h->lockup_detected)
4143 return; /* already stopped the lockup detector */
4144 list_del(&h->lockup_list);
4145 }
4146
4147 /* Called when controller lockup detected. */
4148 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4149 {
4150 struct CommandList *c = NULL;
4151
4152 assert_spin_locked(&h->lock);
4153 /* Mark all outstanding commands as failed and complete them. */
4154 while (!list_empty(list)) {
4155 c = list_entry(list->next, struct CommandList, list);
4156 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4157 finish_cmd(c, c->Header.Tag.lower);
4158 }
4159 }
4160
4161 static void controller_lockup_detected(struct ctlr_info *h)
4162 {
4163 unsigned long flags;
4164
4165 assert_spin_locked(&lockup_detector_lock);
4166 remove_ctlr_from_lockup_detector_list(h);
4167 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4168 spin_lock_irqsave(&h->lock, flags);
4169 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4170 spin_unlock_irqrestore(&h->lock, flags);
4171 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4172 h->lockup_detected);
4173 pci_disable_device(h->pdev);
4174 spin_lock_irqsave(&h->lock, flags);
4175 fail_all_cmds_on_list(h, &h->cmpQ);
4176 fail_all_cmds_on_list(h, &h->reqQ);
4177 spin_unlock_irqrestore(&h->lock, flags);
4178 }
4179
4180 #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4181 #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4182
4183 static void detect_controller_lockup(struct ctlr_info *h)
4184 {
4185 u64 now;
4186 u32 heartbeat;
4187 unsigned long flags;
4188
4189 assert_spin_locked(&lockup_detector_lock);
4190 now = get_jiffies_64();
4191 /* If we've received an interrupt recently, we're ok. */
4192 if (time_after64(h->last_intr_timestamp +
4193 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4194 return;
4195
4196 /*
4197 * If we've already checked the heartbeat recently, we're ok.
4198 * This could happen if someone sends us a signal. We
4199 * otherwise don't care about signals in this thread.
4200 */
4201 if (time_after64(h->last_heartbeat_timestamp +
4202 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4203 return;
4204
4205 /* If heartbeat has not changed since we last looked, we're not ok. */
4206 spin_lock_irqsave(&h->lock, flags);
4207 heartbeat = readl(&h->cfgtable->HeartBeat);
4208 spin_unlock_irqrestore(&h->lock, flags);
4209 if (h->last_heartbeat == heartbeat) {
4210 controller_lockup_detected(h);
4211 return;
4212 }
4213
4214 /* We're ok. */
4215 h->last_heartbeat = heartbeat;
4216 h->last_heartbeat_timestamp = now;
4217 }
4218
4219 static int detect_controller_lockup_thread(void *notused)
4220 {
4221 struct ctlr_info *h;
4222 unsigned long flags;
4223
4224 while (1) {
4225 struct list_head *this, *tmp;
4226
4227 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4228 if (kthread_should_stop())
4229 break;
4230 spin_lock_irqsave(&lockup_detector_lock, flags);
4231 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4232 h = list_entry(this, struct ctlr_info, lockup_list);
4233 detect_controller_lockup(h);
4234 }
4235 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4236 }
4237 return 0;
4238 }
4239
4240 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4241 {
4242 unsigned long flags;
4243
4244 spin_lock_irqsave(&lockup_detector_lock, flags);
4245 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4246 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4247 }
4248
4249 static void start_controller_lockup_detector(struct ctlr_info *h)
4250 {
4251 /* Start the lockup detector thread if not already started */
4252 if (!hpsa_lockup_detector) {
4253 spin_lock_init(&lockup_detector_lock);
4254 hpsa_lockup_detector =
4255 kthread_run(detect_controller_lockup_thread,
4256 NULL, "hpsa");
4257 }
4258 if (!hpsa_lockup_detector) {
4259 dev_warn(&h->pdev->dev,
4260 "Could not start lockup detector thread\n");
4261 return;
4262 }
4263 add_ctlr_to_lockup_detector_list(h);
4264 }
4265
4266 static void stop_controller_lockup_detector(struct ctlr_info *h)
4267 {
4268 unsigned long flags;
4269
4270 spin_lock_irqsave(&lockup_detector_lock, flags);
4271 remove_ctlr_from_lockup_detector_list(h);
4272 /* If the list of ctlr's to monitor is empty, stop the thread */
4273 if (list_empty(&hpsa_ctlr_list)) {
4274 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4275 kthread_stop(hpsa_lockup_detector);
4276 spin_lock_irqsave(&lockup_detector_lock, flags);
4277 hpsa_lockup_detector = NULL;
4278 }
4279 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4280 }
4281
4282 static int __devinit hpsa_init_one(struct pci_dev *pdev,
4283 const struct pci_device_id *ent)
4284 {
4285 int dac, rc;
4286 struct ctlr_info *h;
4287 int try_soft_reset = 0;
4288 unsigned long flags;
4289
4290 if (number_of_controllers == 0)
4291 printk(KERN_INFO DRIVER_NAME "\n");
4292
4293 rc = hpsa_init_reset_devices(pdev);
4294 if (rc) {
4295 if (rc != -ENOTSUPP)
4296 return rc;
4297 /* If the reset fails in a particular way (it has no way to do
4298 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4299 * a soft reset once we get the controller configured up to the
4300 * point that it can accept a command.
4301 */
4302 try_soft_reset = 1;
4303 rc = 0;
4304 }
4305
4306 reinit_after_soft_reset:
4307
4308 /* Command structures must be aligned on a 32-byte boundary because
4309 * the 5 lower bits of the address are used by the hardware. and by
4310 * the driver. See comments in hpsa.h for more info.
4311 */
4312 #define COMMANDLIST_ALIGNMENT 32
4313 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4314 h = kzalloc(sizeof(*h), GFP_KERNEL);
4315 if (!h)
4316 return -ENOMEM;
4317
4318 h->pdev = pdev;
4319 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4320 INIT_LIST_HEAD(&h->cmpQ);
4321 INIT_LIST_HEAD(&h->reqQ);
4322 spin_lock_init(&h->lock);
4323 spin_lock_init(&h->scan_lock);
4324 rc = hpsa_pci_init(h);
4325 if (rc != 0)
4326 goto clean1;
4327
4328 sprintf(h->devname, "hpsa%d", number_of_controllers);
4329 h->ctlr = number_of_controllers;
4330 number_of_controllers++;
4331
4332 /* configure PCI DMA stuff */
4333 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4334 if (rc == 0) {
4335 dac = 1;
4336 } else {
4337 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4338 if (rc == 0) {
4339 dac = 0;
4340 } else {
4341 dev_err(&pdev->dev, "no suitable DMA available\n");
4342 goto clean1;
4343 }
4344 }
4345
4346 /* make sure the board interrupts are off */
4347 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4348
4349 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4350 goto clean2;
4351 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4352 h->devname, pdev->device,
4353 h->intr[h->intr_mode], dac ? "" : " not");
4354 if (hpsa_allocate_cmd_pool(h))
4355 goto clean4;
4356 if (hpsa_allocate_sg_chain_blocks(h))
4357 goto clean4;
4358 init_waitqueue_head(&h->scan_wait_queue);
4359 h->scan_finished = 1; /* no scan currently in progress */
4360
4361 pci_set_drvdata(pdev, h);
4362 h->ndevices = 0;
4363 h->scsi_host = NULL;
4364 spin_lock_init(&h->devlock);
4365 hpsa_put_ctlr_into_performant_mode(h);
4366
4367 /* At this point, the controller is ready to take commands.
4368 * Now, if reset_devices and the hard reset didn't work, try
4369 * the soft reset and see if that works.
4370 */
4371 if (try_soft_reset) {
4372
4373 /* This is kind of gross. We may or may not get a completion
4374 * from the soft reset command, and if we do, then the value
4375 * from the fifo may or may not be valid. So, we wait 10 secs
4376 * after the reset throwing away any completions we get during
4377 * that time. Unregister the interrupt handler and register
4378 * fake ones to scoop up any residual completions.
4379 */
4380 spin_lock_irqsave(&h->lock, flags);
4381 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4382 spin_unlock_irqrestore(&h->lock, flags);
4383 free_irq(h->intr[h->intr_mode], h);
4384 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4385 hpsa_intx_discard_completions);
4386 if (rc) {
4387 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4388 "soft reset.\n");
4389 goto clean4;
4390 }
4391
4392 rc = hpsa_kdump_soft_reset(h);
4393 if (rc)
4394 /* Neither hard nor soft reset worked, we're hosed. */
4395 goto clean4;
4396
4397 dev_info(&h->pdev->dev, "Board READY.\n");
4398 dev_info(&h->pdev->dev,
4399 "Waiting for stale completions to drain.\n");
4400 h->access.set_intr_mask(h, HPSA_INTR_ON);
4401 msleep(10000);
4402 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4403
4404 rc = controller_reset_failed(h->cfgtable);
4405 if (rc)
4406 dev_info(&h->pdev->dev,
4407 "Soft reset appears to have failed.\n");
4408
4409 /* since the controller's reset, we have to go back and re-init
4410 * everything. Easiest to just forget what we've done and do it
4411 * all over again.
4412 */
4413 hpsa_undo_allocations_after_kdump_soft_reset(h);
4414 try_soft_reset = 0;
4415 if (rc)
4416 /* don't go to clean4, we already unallocated */
4417 return -ENODEV;
4418
4419 goto reinit_after_soft_reset;
4420 }
4421
4422 /* Turn the interrupts on so we can service requests */
4423 h->access.set_intr_mask(h, HPSA_INTR_ON);
4424
4425 hpsa_hba_inquiry(h);
4426 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4427 start_controller_lockup_detector(h);
4428 return 1;
4429
4430 clean4:
4431 hpsa_free_sg_chain_blocks(h);
4432 hpsa_free_cmd_pool(h);
4433 free_irq(h->intr[h->intr_mode], h);
4434 clean2:
4435 clean1:
4436 kfree(h);
4437 return rc;
4438 }
4439
4440 static void hpsa_flush_cache(struct ctlr_info *h)
4441 {
4442 char *flush_buf;
4443 struct CommandList *c;
4444
4445 flush_buf = kzalloc(4, GFP_KERNEL);
4446 if (!flush_buf)
4447 return;
4448
4449 c = cmd_special_alloc(h);
4450 if (!c) {
4451 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4452 goto out_of_memory;
4453 }
4454 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4455 RAID_CTLR_LUNID, TYPE_CMD);
4456 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4457 if (c->err_info->CommandStatus != 0)
4458 dev_warn(&h->pdev->dev,
4459 "error flushing cache on controller\n");
4460 cmd_special_free(h, c);
4461 out_of_memory:
4462 kfree(flush_buf);
4463 }
4464
4465 static void hpsa_shutdown(struct pci_dev *pdev)
4466 {
4467 struct ctlr_info *h;
4468
4469 h = pci_get_drvdata(pdev);
4470 /* Turn board interrupts off and send the flush cache command
4471 * sendcmd will turn off interrupt, and send the flush...
4472 * To write all data in the battery backed cache to disks
4473 */
4474 hpsa_flush_cache(h);
4475 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4476 free_irq(h->intr[h->intr_mode], h);
4477 #ifdef CONFIG_PCI_MSI
4478 if (h->msix_vector)
4479 pci_disable_msix(h->pdev);
4480 else if (h->msi_vector)
4481 pci_disable_msi(h->pdev);
4482 #endif /* CONFIG_PCI_MSI */
4483 }
4484
4485 static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4486 {
4487 struct ctlr_info *h;
4488
4489 if (pci_get_drvdata(pdev) == NULL) {
4490 dev_err(&pdev->dev, "unable to remove device\n");
4491 return;
4492 }
4493 h = pci_get_drvdata(pdev);
4494 stop_controller_lockup_detector(h);
4495 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4496 hpsa_shutdown(pdev);
4497 iounmap(h->vaddr);
4498 iounmap(h->transtable);
4499 iounmap(h->cfgtable);
4500 hpsa_free_sg_chain_blocks(h);
4501 pci_free_consistent(h->pdev,
4502 h->nr_cmds * sizeof(struct CommandList),
4503 h->cmd_pool, h->cmd_pool_dhandle);
4504 pci_free_consistent(h->pdev,
4505 h->nr_cmds * sizeof(struct ErrorInfo),
4506 h->errinfo_pool, h->errinfo_pool_dhandle);
4507 pci_free_consistent(h->pdev, h->reply_pool_size,
4508 h->reply_pool, h->reply_pool_dhandle);
4509 kfree(h->cmd_pool_bits);
4510 kfree(h->blockFetchTable);
4511 kfree(h->hba_inquiry_data);
4512 /*
4513 * Deliberately omit pci_disable_device(): it does something nasty to
4514 * Smart Array controllers that pci_enable_device does not undo
4515 */
4516 pci_release_regions(pdev);
4517 pci_set_drvdata(pdev, NULL);
4518 kfree(h);
4519 }
4520
4521 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4522 __attribute__((unused)) pm_message_t state)
4523 {
4524 return -ENOSYS;
4525 }
4526
4527 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4528 {
4529 return -ENOSYS;
4530 }
4531
4532 static struct pci_driver hpsa_pci_driver = {
4533 .name = "hpsa",
4534 .probe = hpsa_init_one,
4535 .remove = __devexit_p(hpsa_remove_one),
4536 .id_table = hpsa_pci_device_id, /* id_table */
4537 .shutdown = hpsa_shutdown,
4538 .suspend = hpsa_suspend,
4539 .resume = hpsa_resume,
4540 };
4541
4542 /* Fill in bucket_map[], given nsgs (the max number of
4543 * scatter gather elements supported) and bucket[],
4544 * which is an array of 8 integers. The bucket[] array
4545 * contains 8 different DMA transfer sizes (in 16
4546 * byte increments) which the controller uses to fetch
4547 * commands. This function fills in bucket_map[], which
4548 * maps a given number of scatter gather elements to one of
4549 * the 8 DMA transfer sizes. The point of it is to allow the
4550 * controller to only do as much DMA as needed to fetch the
4551 * command, with the DMA transfer size encoded in the lower
4552 * bits of the command address.
4553 */
4554 static void calc_bucket_map(int bucket[], int num_buckets,
4555 int nsgs, int *bucket_map)
4556 {
4557 int i, j, b, size;
4558
4559 /* even a command with 0 SGs requires 4 blocks */
4560 #define MINIMUM_TRANSFER_BLOCKS 4
4561 #define NUM_BUCKETS 8
4562 /* Note, bucket_map must have nsgs+1 entries. */
4563 for (i = 0; i <= nsgs; i++) {
4564 /* Compute size of a command with i SG entries */
4565 size = i + MINIMUM_TRANSFER_BLOCKS;
4566 b = num_buckets; /* Assume the biggest bucket */
4567 /* Find the bucket that is just big enough */
4568 for (j = 0; j < 8; j++) {
4569 if (bucket[j] >= size) {
4570 b = j;
4571 break;
4572 }
4573 }
4574 /* for a command with i SG entries, use bucket b. */
4575 bucket_map[i] = b;
4576 }
4577 }
4578
4579 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4580 u32 use_short_tags)
4581 {
4582 int i;
4583 unsigned long register_value;
4584
4585 /* This is a bit complicated. There are 8 registers on
4586 * the controller which we write to to tell it 8 different
4587 * sizes of commands which there may be. It's a way of
4588 * reducing the DMA done to fetch each command. Encoded into
4589 * each command's tag are 3 bits which communicate to the controller
4590 * which of the eight sizes that command fits within. The size of
4591 * each command depends on how many scatter gather entries there are.
4592 * Each SG entry requires 16 bytes. The eight registers are programmed
4593 * with the number of 16-byte blocks a command of that size requires.
4594 * The smallest command possible requires 5 such 16 byte blocks.
4595 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4596 * blocks. Note, this only extends to the SG entries contained
4597 * within the command block, and does not extend to chained blocks
4598 * of SG elements. bft[] contains the eight values we write to
4599 * the registers. They are not evenly distributed, but have more
4600 * sizes for small commands, and fewer sizes for larger commands.
4601 */
4602 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4603 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
4604 /* 5 = 1 s/g entry or 4k
4605 * 6 = 2 s/g entry or 8k
4606 * 8 = 4 s/g entry or 16k
4607 * 10 = 6 s/g entry or 24k
4608 */
4609
4610 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4611
4612 /* Controller spec: zero out this buffer. */
4613 memset(h->reply_pool, 0, h->reply_pool_size);
4614 h->reply_pool_head = h->reply_pool;
4615
4616 bft[7] = h->max_sg_entries + 4;
4617 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4618 for (i = 0; i < 8; i++)
4619 writel(bft[i], &h->transtable->BlockFetch[i]);
4620
4621 /* size of controller ring buffer */
4622 writel(h->max_commands, &h->transtable->RepQSize);
4623 writel(1, &h->transtable->RepQCount);
4624 writel(0, &h->transtable->RepQCtrAddrLow32);
4625 writel(0, &h->transtable->RepQCtrAddrHigh32);
4626 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4627 writel(0, &h->transtable->RepQAddr0High32);
4628 writel(CFGTBL_Trans_Performant | use_short_tags,
4629 &(h->cfgtable->HostWrite.TransportRequest));
4630 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4631 hpsa_wait_for_mode_change_ack(h);
4632 register_value = readl(&(h->cfgtable->TransportActive));
4633 if (!(register_value & CFGTBL_Trans_Performant)) {
4634 dev_warn(&h->pdev->dev, "unable to get board into"
4635 " performant mode\n");
4636 return;
4637 }
4638 /* Change the access methods to the performant access methods */
4639 h->access = SA5_performant_access;
4640 h->transMethod = CFGTBL_Trans_Performant;
4641 }
4642
4643 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4644 {
4645 u32 trans_support;
4646
4647 if (hpsa_simple_mode)
4648 return;
4649
4650 trans_support = readl(&(h->cfgtable->TransportSupport));
4651 if (!(trans_support & PERFORMANT_MODE))
4652 return;
4653
4654 hpsa_get_max_perf_mode_cmds(h);
4655 h->max_sg_entries = 32;
4656 /* Performant mode ring buffer and supporting data structures */
4657 h->reply_pool_size = h->max_commands * sizeof(u64);
4658 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4659 &(h->reply_pool_dhandle));
4660
4661 /* Need a block fetch table for performant mode */
4662 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4663 sizeof(u32)), GFP_KERNEL);
4664
4665 if ((h->reply_pool == NULL)
4666 || (h->blockFetchTable == NULL))
4667 goto clean_up;
4668
4669 hpsa_enter_performant_mode(h,
4670 trans_support & CFGTBL_Trans_use_short_tags);
4671
4672 return;
4673
4674 clean_up:
4675 if (h->reply_pool)
4676 pci_free_consistent(h->pdev, h->reply_pool_size,
4677 h->reply_pool, h->reply_pool_dhandle);
4678 kfree(h->blockFetchTable);
4679 }
4680
4681 /*
4682 * This is it. Register the PCI driver information for the cards we control
4683 * the OS will call our registered routines when it finds one of our cards.
4684 */
4685 static int __init hpsa_init(void)
4686 {
4687 return pci_register_driver(&hpsa_pci_driver);
4688 }
4689
4690 static void __exit hpsa_cleanup(void)
4691 {
4692 pci_unregister_driver(&hpsa_pci_driver);
4693 }
4694
4695 module_init(hpsa_init);
4696 module_exit(hpsa_cleanup);