2 * AD7152 capacitive sensor driver supporting AD7152/3
4 * Copyright 2010-2011a Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
22 * TODO: Check compliance of calibbias with abi (units)
25 * AD7152 registers definition
28 #define AD7152_REG_STATUS 0
29 #define AD7152_REG_CH1_DATA_HIGH 1
30 #define AD7152_REG_CH2_DATA_HIGH 3
31 #define AD7152_REG_CH1_OFFS_HIGH 5
32 #define AD7152_REG_CH2_OFFS_HIGH 7
33 #define AD7152_REG_CH1_GAIN_HIGH 9
34 #define AD7152_REG_CH1_SETUP 11
35 #define AD7152_REG_CH2_GAIN_HIGH 12
36 #define AD7152_REG_CH2_SETUP 14
37 #define AD7152_REG_CFG 15
38 #define AD7152_REG_RESEVERD 16
39 #define AD7152_REG_CAPDAC_POS 17
40 #define AD7152_REG_CAPDAC_NEG 18
41 #define AD7152_REG_CFG2 26
43 /* Status Register Bit Designations (AD7152_REG_STATUS) */
44 #define AD7152_STATUS_RDY1 (1 << 0)
45 #define AD7152_STATUS_RDY2 (1 << 1)
46 #define AD7152_STATUS_C1C2 (1 << 2)
47 #define AD7152_STATUS_PWDN (1 << 7)
49 /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
50 #define AD7152_SETUP_CAPDIFF (1 << 5)
51 #define AD7152_SETUP_RANGE_2pF (0 << 6)
52 #define AD7152_SETUP_RANGE_0_5pF (1 << 6)
53 #define AD7152_SETUP_RANGE_1pF (2 << 6)
54 #define AD7152_SETUP_RANGE_4pF (3 << 6)
55 #define AD7152_SETUP_RANGE(x) ((x) << 6)
57 /* Config Register Bit Designations (AD7152_REG_CFG) */
58 #define AD7152_CONF_CH2EN (1 << 3)
59 #define AD7152_CONF_CH1EN (1 << 4)
60 #define AD7152_CONF_MODE_IDLE (0 << 0)
61 #define AD7152_CONF_MODE_CONT_CONV (1 << 0)
62 #define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
63 #define AD7152_CONF_MODE_OFFS_CAL (5 << 0)
64 #define AD7152_CONF_MODE_GAIN_CAL (6 << 0)
66 /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
67 #define AD7152_CAPDAC_DACEN (1 << 7)
68 #define AD7152_CAPDAC_DACP(x) ((x) & 0x1F)
70 /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
71 #define AD7152_CFG2_OSR(x) (((x) & 0x3) << 4)
81 * struct ad7152_chip_info - chip specifc information
84 struct ad7152_chip_info
{
85 struct i2c_client
*client
;
87 * Capacitive channel digital filter setup;
88 * conversion time/update rate setup per channel
94 static inline ssize_t
ad7152_start_calib(struct device
*dev
,
95 struct device_attribute
*attr
,
100 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
101 struct ad7152_chip_info
*chip
= iio_priv(indio_dev
);
102 struct iio_dev_attr
*this_attr
= to_iio_dev_attr(attr
);
104 int ret
, timeout
= 10;
106 ret
= strtobool(buf
, &doit
);
113 if (this_attr
->address
== 0)
114 regval
|= AD7152_CONF_CH1EN
;
116 regval
|= AD7152_CONF_CH2EN
;
118 mutex_lock(&indio_dev
->mlock
);
119 ret
= i2c_smbus_write_byte_data(chip
->client
, AD7152_REG_CFG
, regval
);
121 mutex_unlock(&indio_dev
->mlock
);
127 ret
= i2c_smbus_read_byte_data(chip
->client
, AD7152_REG_CFG
);
129 mutex_unlock(&indio_dev
->mlock
);
132 } while ((ret
== regval
) && timeout
--);
134 mutex_unlock(&indio_dev
->mlock
);
137 static ssize_t
ad7152_start_offset_calib(struct device
*dev
,
138 struct device_attribute
*attr
,
142 return ad7152_start_calib(dev
, attr
, buf
, len
,
143 AD7152_CONF_MODE_OFFS_CAL
);
145 static ssize_t
ad7152_start_gain_calib(struct device
*dev
,
146 struct device_attribute
*attr
,
150 return ad7152_start_calib(dev
, attr
, buf
, len
,
151 AD7152_CONF_MODE_GAIN_CAL
);
154 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration
,
155 S_IWUSR
, NULL
, ad7152_start_offset_calib
, 0);
156 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration
,
157 S_IWUSR
, NULL
, ad7152_start_offset_calib
, 1);
158 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration
,
159 S_IWUSR
, NULL
, ad7152_start_gain_calib
, 0);
160 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration
,
161 S_IWUSR
, NULL
, ad7152_start_gain_calib
, 1);
163 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
164 static const unsigned char ad7152_filter_rate_table
[][2] = {
165 {200, 5 + 1}, {50, 20 + 1}, {20, 50 + 1}, {17, 60 + 1},
168 static ssize_t
ad7152_show_filter_rate_setup(struct device
*dev
,
169 struct device_attribute
*attr
,
172 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
173 struct ad7152_chip_info
*chip
= iio_priv(indio_dev
);
175 return sprintf(buf
, "%d\n",
176 ad7152_filter_rate_table
[chip
->filter_rate_setup
][0]);
179 static ssize_t
ad7152_store_filter_rate_setup(struct device
*dev
,
180 struct device_attribute
*attr
,
184 struct iio_dev
*indio_dev
= dev_get_drvdata(dev
);
185 struct ad7152_chip_info
*chip
= iio_priv(indio_dev
);
189 ret
= kstrtou8(buf
, 10, &data
);
193 for (i
= 0; i
< ARRAY_SIZE(ad7152_filter_rate_table
); i
++)
194 if (data
>= ad7152_filter_rate_table
[i
][0])
197 if (i
>= ARRAY_SIZE(ad7152_filter_rate_table
))
198 i
= ARRAY_SIZE(ad7152_filter_rate_table
) - 1;
200 mutex_lock(&indio_dev
->mlock
);
201 ret
= i2c_smbus_write_byte_data(chip
->client
,
202 AD7152_REG_CFG2
, AD7152_CFG2_OSR(i
));
204 mutex_unlock(&indio_dev
->mlock
);
208 chip
->filter_rate_setup
= i
;
209 mutex_unlock(&indio_dev
->mlock
);
214 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO
| S_IWUSR
,
215 ad7152_show_filter_rate_setup
,
216 ad7152_store_filter_rate_setup
);
218 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("200 50 20 17");
220 static IIO_CONST_ATTR(in_capacitance_scale_available
,
221 "0.000061050 0.000030525 0.000015263 0.000007631");
223 static struct attribute
*ad7152_attributes
[] = {
224 &iio_dev_attr_sampling_frequency
.dev_attr
.attr
,
225 &iio_dev_attr_in_capacitance0_calibbias_calibration
.dev_attr
.attr
,
226 &iio_dev_attr_in_capacitance1_calibbias_calibration
.dev_attr
.attr
,
227 &iio_dev_attr_in_capacitance0_calibscale_calibration
.dev_attr
.attr
,
228 &iio_dev_attr_in_capacitance1_calibscale_calibration
.dev_attr
.attr
,
229 &iio_const_attr_in_capacitance_scale_available
.dev_attr
.attr
,
230 &iio_const_attr_sampling_frequency_available
.dev_attr
.attr
,
234 static const struct attribute_group ad7152_attribute_group
= {
235 .attrs
= ad7152_attributes
,
238 static const u8 ad7152_addresses
[][4] = {
239 { AD7152_REG_CH1_DATA_HIGH
, AD7152_REG_CH1_OFFS_HIGH
,
240 AD7152_REG_CH1_GAIN_HIGH
, AD7152_REG_CH1_SETUP
},
241 { AD7152_REG_CH2_DATA_HIGH
, AD7152_REG_CH2_OFFS_HIGH
,
242 AD7152_REG_CH2_GAIN_HIGH
, AD7152_REG_CH2_SETUP
},
245 /* Values are nano relative to pf base. */
246 static const int ad7152_scale_table
[] = {
247 30525, 7631, 15263, 61050
250 static int ad7152_write_raw(struct iio_dev
*indio_dev
,
251 struct iio_chan_spec
const *chan
,
256 struct ad7152_chip_info
*chip
= iio_priv(indio_dev
);
259 mutex_lock(&indio_dev
->mlock
);
262 case IIO_CHAN_INFO_CALIBSCALE
:
268 val
= (val2
* 1024) / 15625;
270 ret
= i2c_smbus_write_word_data(chip
->client
,
271 ad7152_addresses
[chan
->channel
][AD7152_GAIN
],
279 case IIO_CHAN_INFO_CALIBBIAS
:
280 if ((val
< 0) | (val
> 0xFFFF)) {
284 ret
= i2c_smbus_write_word_data(chip
->client
,
285 ad7152_addresses
[chan
->channel
][AD7152_OFFS
],
292 case IIO_CHAN_INFO_SCALE
:
297 for (i
= 0; i
< ARRAY_SIZE(ad7152_scale_table
); i
++)
298 if (val2
== ad7152_scale_table
[i
])
301 chip
->setup
[chan
->channel
] &= ~AD7152_SETUP_RANGE_4pF
;
302 chip
->setup
[chan
->channel
] |= AD7152_SETUP_RANGE(i
);
304 ret
= i2c_smbus_write_byte_data(chip
->client
,
305 ad7152_addresses
[chan
->channel
][AD7152_SETUP
],
306 chip
->setup
[chan
->channel
]);
317 mutex_unlock(&indio_dev
->mlock
);
320 static int ad7152_read_raw(struct iio_dev
*indio_dev
,
321 struct iio_chan_spec
const *chan
,
325 struct ad7152_chip_info
*chip
= iio_priv(indio_dev
);
329 mutex_lock(&indio_dev
->mlock
);
333 /* First set whether in differential mode */
335 regval
= chip
->setup
[chan
->channel
];
337 if (chan
->differential
)
338 chip
->setup
[chan
->channel
] |= AD7152_SETUP_CAPDIFF
;
340 chip
->setup
[chan
->channel
] &= ~AD7152_SETUP_CAPDIFF
;
342 if (regval
!= chip
->setup
[chan
->channel
]) {
343 ret
= i2c_smbus_write_byte_data(chip
->client
,
344 ad7152_addresses
[chan
->channel
][AD7152_SETUP
],
345 chip
->setup
[chan
->channel
]);
349 /* Make sure the channel is enabled */
350 if (chan
->channel
== 0)
351 regval
= AD7152_CONF_CH1EN
;
353 regval
= AD7152_CONF_CH2EN
;
355 /* Trigger a single read */
356 regval
|= AD7152_CONF_MODE_SINGLE_CONV
;
357 ret
= i2c_smbus_write_byte_data(chip
->client
, AD7152_REG_CFG
,
362 msleep(ad7152_filter_rate_table
[chip
->filter_rate_setup
][1]);
363 /* Now read the actual register */
364 ret
= i2c_smbus_read_word_data(chip
->client
,
365 ad7152_addresses
[chan
->channel
][AD7152_DATA
]);
370 if (chan
->differential
)
375 case IIO_CHAN_INFO_CALIBSCALE
:
377 ret
= i2c_smbus_read_word_data(chip
->client
,
378 ad7152_addresses
[chan
->channel
][AD7152_GAIN
]);
381 /* 1 + gain_val / 2^16 */
383 *val2
= (15625 * swab16(ret
)) / 1024;
385 ret
= IIO_VAL_INT_PLUS_MICRO
;
387 case IIO_CHAN_INFO_CALIBBIAS
:
388 ret
= i2c_smbus_read_word_data(chip
->client
,
389 ad7152_addresses
[chan
->channel
][AD7152_OFFS
]);
396 case IIO_CHAN_INFO_SCALE
:
397 ret
= i2c_smbus_read_byte_data(chip
->client
,
398 ad7152_addresses
[chan
->channel
][AD7152_SETUP
]);
402 *val2
= ad7152_scale_table
[ret
>> 6];
404 ret
= IIO_VAL_INT_PLUS_NANO
;
410 mutex_unlock(&indio_dev
->mlock
);
414 static int ad7152_write_raw_get_fmt(struct iio_dev
*indio_dev
,
415 struct iio_chan_spec
const *chan
,
419 case IIO_CHAN_INFO_SCALE
:
420 return IIO_VAL_INT_PLUS_NANO
;
422 return IIO_VAL_INT_PLUS_MICRO
;
426 static const struct iio_info ad7152_info
= {
427 .attrs
= &ad7152_attribute_group
,
428 .read_raw
= &ad7152_read_raw
,
429 .write_raw
= &ad7152_write_raw
,
430 .write_raw_get_fmt
= &ad7152_write_raw_get_fmt
,
431 .driver_module
= THIS_MODULE
,
434 static const struct iio_chan_spec ad7152_channels
[] = {
436 .type
= IIO_CAPACITANCE
,
439 .info_mask
= IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT
|
440 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT
|
441 IIO_CHAN_INFO_SCALE_SEPARATE_BIT
,
443 .type
= IIO_CAPACITANCE
,
448 .info_mask
= IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT
|
449 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT
|
450 IIO_CHAN_INFO_SCALE_SEPARATE_BIT
,
452 .type
= IIO_CAPACITANCE
,
455 .info_mask
= IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT
|
456 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT
|
457 IIO_CHAN_INFO_SCALE_SEPARATE_BIT
,
459 .type
= IIO_CAPACITANCE
,
464 .info_mask
= IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT
|
465 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT
|
466 IIO_CHAN_INFO_SCALE_SEPARATE_BIT
,
470 * device probe and remove
473 static int __devinit
ad7152_probe(struct i2c_client
*client
,
474 const struct i2c_device_id
*id
)
477 struct ad7152_chip_info
*chip
;
478 struct iio_dev
*indio_dev
;
480 indio_dev
= iio_allocate_device(sizeof(*chip
));
481 if (indio_dev
== NULL
) {
485 chip
= iio_priv(indio_dev
);
486 /* this is only used for device removal purposes */
487 i2c_set_clientdata(client
, indio_dev
);
489 chip
->client
= client
;
491 /* Establish that the iio_dev is a child of the i2c device */
492 indio_dev
->name
= id
->name
;
493 indio_dev
->dev
.parent
= &client
->dev
;
494 indio_dev
->info
= &ad7152_info
;
495 indio_dev
->channels
= ad7152_channels
;
496 if (id
->driver_data
== 0)
497 indio_dev
->num_channels
= ARRAY_SIZE(ad7152_channels
);
499 indio_dev
->num_channels
= 2;
500 indio_dev
->num_channels
= ARRAY_SIZE(ad7152_channels
);
501 indio_dev
->modes
= INDIO_DIRECT_MODE
;
503 ret
= iio_device_register(indio_dev
);
507 dev_err(&client
->dev
, "%s capacitive sensor registered\n", id
->name
);
512 iio_free_device(indio_dev
);
517 static int __devexit
ad7152_remove(struct i2c_client
*client
)
519 struct iio_dev
*indio_dev
= i2c_get_clientdata(client
);
521 iio_device_unregister(indio_dev
);
522 iio_free_device(indio_dev
);
527 static const struct i2c_device_id ad7152_id
[] = {
533 MODULE_DEVICE_TABLE(i2c
, ad7152_id
);
535 static struct i2c_driver ad7152_driver
= {
537 .name
= KBUILD_MODNAME
,
539 .probe
= ad7152_probe
,
540 .remove
= __devexit_p(ad7152_remove
),
541 .id_table
= ad7152_id
,
543 module_i2c_driver(ad7152_driver
);
545 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
546 MODULE_DESCRIPTION("Analog Devices AD7152/3 capacitive sensor driver");
547 MODULE_LICENSE("GPL v2");