spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / drivers / staging / iio / dac / ad5421.c
blob71ee86824763ee2ab97c80ab7d933a3208b4e60e
1 /*
2 * AD5421 Digital to analog converters driver
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
7 */
9 #include <linux/device.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
19 #include "../iio.h"
20 #include "../sysfs.h"
21 #include "../events.h"
22 #include "dac.h"
23 #include "ad5421.h"
26 #define AD5421_REG_DAC_DATA 0x1
27 #define AD5421_REG_CTRL 0x2
28 #define AD5421_REG_OFFSET 0x3
29 #define AD5421_REG_GAIN 0x4
30 /* load dac and fault shared the same register number. Writing to it will cause
31 * a dac load command, reading from it will return the fault status register */
32 #define AD5421_REG_LOAD_DAC 0x5
33 #define AD5421_REG_FAULT 0x5
34 #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
35 #define AD5421_REG_RESET 0x7
36 #define AD5421_REG_START_CONVERSION 0x8
37 #define AD5421_REG_NOOP 0x9
39 #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
40 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
41 #define AD5421_CTRL_MIN_CURRENT BIT(9)
42 #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
43 #define AD5421_CTRL_ADC_ENABLE BIT(7)
44 #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
46 #define AD5421_FAULT_SPI BIT(15)
47 #define AD5421_FAULT_PEC BIT(14)
48 #define AD5421_FAULT_OVER_CURRENT BIT(13)
49 #define AD5421_FAULT_UNDER_CURRENT BIT(12)
50 #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
51 #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
52 #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
53 #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
55 /* These bits will cause the fault pin to go high */
56 #define AD5421_FAULT_TRIGGER_IRQ \
57 (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
58 AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
60 /**
61 * struct ad5421_state - driver instance specific data
62 * @spi: spi_device
63 * @ctrl: control register cache
64 * @current_range: current range which the device is configured for
65 * @data: spi transfer buffers
66 * @fault_mask: software masking of events
68 struct ad5421_state {
69 struct spi_device *spi;
70 unsigned int ctrl;
71 enum ad5421_current_range current_range;
72 unsigned int fault_mask;
75 * DMA (thus cache coherency maintenance) requires the
76 * transfer buffers to live in their own cache lines.
78 union {
79 u32 d32;
80 u8 d8[4];
81 } data[2] ____cacheline_aligned;
84 static const struct iio_chan_spec ad5421_channels[] = {
86 .type = IIO_CURRENT,
87 .indexed = 1,
88 .output = 1,
89 .channel = 0,
90 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
91 IIO_CHAN_INFO_OFFSET_SHARED_BIT |
92 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
93 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
94 .scan_type = IIO_ST('u', 16, 16, 0),
95 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
96 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
99 .type = IIO_TEMP,
100 .channel = -1,
101 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
105 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
106 unsigned int reg, unsigned int val)
108 struct ad5421_state *st = iio_priv(indio_dev);
110 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
112 return spi_write(st->spi, &st->data[0].d8[1], 3);
115 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
116 unsigned int val)
118 int ret;
120 mutex_lock(&indio_dev->mlock);
121 ret = ad5421_write_unlocked(indio_dev, reg, val);
122 mutex_unlock(&indio_dev->mlock);
124 return ret;
127 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
129 struct ad5421_state *st = iio_priv(indio_dev);
130 struct spi_message m;
131 int ret;
132 struct spi_transfer t[] = {
134 .tx_buf = &st->data[0].d8[1],
135 .len = 3,
136 .cs_change = 1,
137 }, {
138 .rx_buf = &st->data[1].d8[1],
139 .len = 3,
143 spi_message_init(&m);
144 spi_message_add_tail(&t[0], &m);
145 spi_message_add_tail(&t[1], &m);
147 mutex_lock(&indio_dev->mlock);
149 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
151 ret = spi_sync(st->spi, &m);
152 if (ret >= 0)
153 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
155 mutex_unlock(&indio_dev->mlock);
157 return ret;
160 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
161 unsigned int clr)
163 struct ad5421_state *st = iio_priv(indio_dev);
164 unsigned int ret;
166 mutex_lock(&indio_dev->mlock);
168 st->ctrl &= ~clr;
169 st->ctrl |= set;
171 ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
173 mutex_unlock(&indio_dev->mlock);
175 return ret;
178 static irqreturn_t ad5421_fault_handler(int irq, void *data)
180 struct iio_dev *indio_dev = data;
181 struct ad5421_state *st = iio_priv(indio_dev);
182 unsigned int fault;
183 unsigned int old_fault = 0;
184 unsigned int events;
186 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
187 if (!fault)
188 return IRQ_NONE;
190 /* If we had a fault, this might mean that the DAC has lost its state
191 * and has been reset. Make sure that the control register actually
192 * contains what we expect it to contain. Otherwise the watchdog might
193 * be enabled and we get watchdog timeout faults, which will render the
194 * DAC unusable. */
195 ad5421_update_ctrl(indio_dev, 0, 0);
198 /* The fault pin stays high as long as a fault condition is present and
199 * it is not possible to mask fault conditions. For certain fault
200 * conditions for example like over-temperature it takes some time
201 * until the fault condition disappears. If we would exit the interrupt
202 * handler immediately after handling the event it would be entered
203 * again instantly. Thus we fall back to polling in case we detect that
204 * a interrupt condition is still present.
206 do {
207 /* 0xffff is a invalid value for the register and will only be
208 * read if there has been a communication error */
209 if (fault == 0xffff)
210 fault = 0;
212 /* we are only interested in new events */
213 events = (old_fault ^ fault) & fault;
214 events &= st->fault_mask;
216 if (events & AD5421_FAULT_OVER_CURRENT) {
217 iio_push_event(indio_dev,
218 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
220 IIO_EV_TYPE_THRESH,
221 IIO_EV_DIR_RISING),
222 iio_get_time_ns());
225 if (events & AD5421_FAULT_UNDER_CURRENT) {
226 iio_push_event(indio_dev,
227 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
229 IIO_EV_TYPE_THRESH,
230 IIO_EV_DIR_FALLING),
231 iio_get_time_ns());
234 if (events & AD5421_FAULT_TEMP_OVER_140) {
235 iio_push_event(indio_dev,
236 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
238 IIO_EV_TYPE_MAG,
239 IIO_EV_DIR_RISING),
240 iio_get_time_ns());
243 old_fault = fault;
244 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
246 /* still active? go to sleep for some time */
247 if (fault & AD5421_FAULT_TRIGGER_IRQ)
248 msleep(1000);
250 } while (fault & AD5421_FAULT_TRIGGER_IRQ);
253 return IRQ_HANDLED;
256 static void ad5421_get_current_min_max(struct ad5421_state *st,
257 unsigned int *min, unsigned int *max)
259 /* The current range is configured using external pins, which are
260 * usually hard-wired and not run-time switchable. */
261 switch (st->current_range) {
262 case AD5421_CURRENT_RANGE_4mA_20mA:
263 *min = 4000;
264 *max = 20000;
265 break;
266 case AD5421_CURRENT_RANGE_3mA8_21mA:
267 *min = 3800;
268 *max = 21000;
269 break;
270 case AD5421_CURRENT_RANGE_3mA2_24mA:
271 *min = 3200;
272 *max = 24000;
273 break;
274 default:
275 *min = 0;
276 *max = 1;
277 break;
281 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
283 unsigned int min, max;
285 ad5421_get_current_min_max(st, &min, &max);
286 return (min * (1 << 16)) / (max - min);
289 static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
291 unsigned int min, max;
293 ad5421_get_current_min_max(st, &min, &max);
294 return ((max - min) * 1000) / (1 << 16);
297 static int ad5421_read_raw(struct iio_dev *indio_dev,
298 struct iio_chan_spec const *chan, int *val, int *val2, long m)
300 struct ad5421_state *st = iio_priv(indio_dev);
301 int ret;
303 if (chan->type != IIO_CURRENT)
304 return -EINVAL;
306 switch (m) {
307 case 0:
308 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
309 if (ret < 0)
310 return ret;
311 *val = ret;
312 return IIO_VAL_INT;
313 case IIO_CHAN_INFO_SCALE:
314 *val = 0;
315 *val2 = ad5421_get_scale(st);
316 return IIO_VAL_INT_PLUS_MICRO;
317 case IIO_CHAN_INFO_OFFSET:
318 *val = ad5421_get_offset(st);
319 return IIO_VAL_INT;
320 case IIO_CHAN_INFO_CALIBBIAS:
321 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
322 if (ret < 0)
323 return ret;
324 *val = ret - 32768;
325 return IIO_VAL_INT;
326 case IIO_CHAN_INFO_CALIBSCALE:
327 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
328 if (ret < 0)
329 return ret;
330 *val = ret;
331 return IIO_VAL_INT;
334 return -EINVAL;
337 static int ad5421_write_raw(struct iio_dev *indio_dev,
338 struct iio_chan_spec const *chan, int val, int val2, long mask)
340 const unsigned int max_val = 1 << 16;
342 switch (mask) {
343 case 0:
344 if (val >= max_val || val < 0)
345 return -EINVAL;
347 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
348 case IIO_CHAN_INFO_CALIBBIAS:
349 val += 32768;
350 if (val >= max_val || val < 0)
351 return -EINVAL;
353 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
354 case IIO_CHAN_INFO_CALIBSCALE:
355 if (val >= max_val || val < 0)
356 return -EINVAL;
358 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
359 default:
360 break;
363 return -EINVAL;
366 static int ad5421_write_event_config(struct iio_dev *indio_dev,
367 u64 event_code, int state)
369 struct ad5421_state *st = iio_priv(indio_dev);
370 unsigned int mask;
372 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
373 case IIO_CURRENT:
374 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
375 IIO_EV_DIR_RISING)
376 mask = AD5421_FAULT_OVER_CURRENT;
377 else
378 mask = AD5421_FAULT_UNDER_CURRENT;
379 break;
380 case IIO_TEMP:
381 mask = AD5421_FAULT_TEMP_OVER_140;
382 break;
383 default:
384 return -EINVAL;
387 mutex_lock(&indio_dev->mlock);
388 if (state)
389 st->fault_mask |= mask;
390 else
391 st->fault_mask &= ~mask;
392 mutex_unlock(&indio_dev->mlock);
394 return 0;
397 static int ad5421_read_event_config(struct iio_dev *indio_dev,
398 u64 event_code)
400 struct ad5421_state *st = iio_priv(indio_dev);
401 unsigned int mask;
403 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
404 case IIO_CURRENT:
405 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
406 IIO_EV_DIR_RISING)
407 mask = AD5421_FAULT_OVER_CURRENT;
408 else
409 mask = AD5421_FAULT_UNDER_CURRENT;
410 break;
411 case IIO_TEMP:
412 mask = AD5421_FAULT_TEMP_OVER_140;
413 break;
414 default:
415 return -EINVAL;
418 return (bool)(st->fault_mask & mask);
421 static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
422 int *val)
424 int ret;
426 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
427 case IIO_CURRENT:
428 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
429 if (ret < 0)
430 return ret;
431 *val = ret;
432 break;
433 case IIO_TEMP:
434 *val = 140000;
435 break;
436 default:
437 return -EINVAL;
440 return 0;
443 static const struct iio_info ad5421_info = {
444 .read_raw = ad5421_read_raw,
445 .write_raw = ad5421_write_raw,
446 .read_event_config = ad5421_read_event_config,
447 .write_event_config = ad5421_write_event_config,
448 .read_event_value = ad5421_read_event_value,
449 .driver_module = THIS_MODULE,
452 static int __devinit ad5421_probe(struct spi_device *spi)
454 struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
455 struct iio_dev *indio_dev;
456 struct ad5421_state *st;
457 int ret;
459 indio_dev = iio_allocate_device(sizeof(*st));
460 if (indio_dev == NULL) {
461 dev_err(&spi->dev, "Failed to allocate iio device\n");
462 return -ENOMEM;
465 st = iio_priv(indio_dev);
466 spi_set_drvdata(spi, indio_dev);
468 st->spi = spi;
470 indio_dev->dev.parent = &spi->dev;
471 indio_dev->name = "ad5421";
472 indio_dev->info = &ad5421_info;
473 indio_dev->modes = INDIO_DIRECT_MODE;
474 indio_dev->channels = ad5421_channels;
475 indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
477 st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
478 AD5421_CTRL_AUTO_FAULT_READBACK;
480 if (pdata) {
481 st->current_range = pdata->current_range;
482 if (pdata->external_vref)
483 st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
484 } else {
485 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
488 /* write initial ctrl register value */
489 ad5421_update_ctrl(indio_dev, 0, 0);
491 if (spi->irq) {
492 ret = request_threaded_irq(spi->irq,
493 NULL,
494 ad5421_fault_handler,
495 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
496 "ad5421 fault",
497 indio_dev);
498 if (ret)
499 goto error_free;
502 ret = iio_device_register(indio_dev);
503 if (ret) {
504 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
505 goto error_free_irq;
508 return 0;
510 error_free_irq:
511 if (spi->irq)
512 free_irq(spi->irq, indio_dev);
513 error_free:
514 iio_free_device(indio_dev);
516 return ret;
519 static int __devexit ad5421_remove(struct spi_device *spi)
521 struct iio_dev *indio_dev = spi_get_drvdata(spi);
523 iio_device_unregister(indio_dev);
524 if (spi->irq)
525 free_irq(spi->irq, indio_dev);
526 iio_free_device(indio_dev);
528 return 0;
531 static struct spi_driver ad5421_driver = {
532 .driver = {
533 .name = "ad5421",
534 .owner = THIS_MODULE,
536 .probe = ad5421_probe,
537 .remove = __devexit_p(ad5421_remove),
540 static __init int ad5421_init(void)
542 return spi_register_driver(&ad5421_driver);
544 module_init(ad5421_init);
546 static __exit void ad5421_exit(void)
548 spi_unregister_driver(&ad5421_driver);
550 module_exit(ad5421_exit);
552 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
553 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
554 MODULE_LICENSE("GPL v2");
555 MODULE_ALIAS("spi:ad5421");