1 /* Driver for Realtek RTS51xx USB card reader
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
22 * Edwin Rong (edwin_rong@realsil.com.cn)
23 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
26 #include <linux/blkdev.h>
27 #include <linux/kthread.h>
28 #include <linux/sched.h>
29 #include <linux/workqueue.h>
34 #include "rts51x_chip.h"
35 #include "rts51x_card.h"
36 #include "rts51x_transport.h"
37 #include "rts51x_sys.h"
42 static int check_sd_speed_prior(u32 sd_speed_prior
)
46 /* Check the legality of sd_speed_prior */
47 for (i
= 0; i
< 4; i
++) {
48 u8 tmp
= (u8
) (sd_speed_prior
>> (i
* 8));
49 if ((tmp
< 0x01) || (tmp
> 0x04)) {
58 int rts51x_reset_chip(struct rts51x_chip
*chip
)
62 if (CHECK_PKG(chip
, LQFP48
)) {
63 RTS51X_WRITE_REG(chip
, CARD_PWR_CTL
, LDO3318_PWR_MASK
,
65 RTS51X_WRITE_REG(chip
, CARD_PWR_CTL
, FORCE_LDO_POWERB
,
67 RTS51X_WRITE_REG(chip
, CARD_PULL_CTL1
, 0x30, 0x10);
68 RTS51X_WRITE_REG(chip
, CARD_PULL_CTL5
, 0x03, 0x01);
69 RTS51X_WRITE_REG(chip
, CARD_PULL_CTL6
, 0x0C, 0x04);
71 if (chip
->asic_code
) {
72 RTS51X_WRITE_REG(chip
, SYS_DUMMY0
, NYET_MSAK
, NYET_EN
);
73 RTS51X_WRITE_REG(chip
, CD_DEGLITCH_WIDTH
, 0xFF, 0x08);
74 rts51x_write_register(chip
, CD_DEGLITCH_EN
, XD_CD_DEGLITCH_EN
,
76 rts51x_write_register(chip
, SD30_DRIVE_SEL
, SD30_DRIVE_MASK
,
77 chip
->option
.sd30_pad_drive
);
78 rts51x_write_register(chip
, CARD_DRIVE_SEL
, SD20_DRIVE_MASK
,
79 chip
->option
.sd20_pad_drive
);
81 rts51x_write_register(chip
, CARD_PULL_CTL5
, 0x03, 0x01);
82 if (!chip
->option
.ww_enable
) {
83 if (CHECK_PKG(chip
, LQFP48
)) {
84 rts51x_write_register(chip
, CARD_PULL_CTL3
,
86 rts51x_write_register(chip
, CARD_PULL_CTL6
,
89 rts51x_write_register(chip
, CARD_PULL_CTL1
,
91 rts51x_write_register(chip
, CARD_PULL_CTL3
,
93 rts51x_write_register(chip
, CARD_PULL_CTL6
,
98 if (chip
->option
.sd_ctl
& SUPPORT_UHS50_MMC44
) {
100 RTS51X_DEBUGP("option enable UHS50&MMC44,sd_ctl:0x%x\n",
101 chip
->option
.sd_ctl
);
103 /* if(CHECK_PID(chip, 0x0139)&&CHECK_PKG(chip, LQFP48)) */
104 if ((CHECK_PID(chip
, 0x0139) && CHECK_PKG(chip
, LQFP48
))
107 RTS51X_DEBUGP("PID enable UHS50&MMC44\n");
110 RTS51X_DEBUGP("PID disable UHS50&MMC44\n");
114 if (chip
->option
.ms_errreg_fix
&& (chip
->ic_version
> 1))
115 rts51x_write_register(chip
, 0xFD4D, 0x01, 0x01);
116 retval
= rts51x_write_phy_register(chip
, 0xC2, 0x7C);
117 if (retval
!= STATUS_SUCCESS
)
118 TRACE_RET(chip
, retval
);
120 rts51x_init_cmd(chip
);
123 rts51x_add_cmd(chip
, WRITE_REG_CMD
, CARD_GPIO
, GPIO_OE
, GPIO_OE
);
124 #ifdef LED_AUTO_BLINK
126 rts51x_add_cmd(chip
, WRITE_REG_CMD
, CARD_AUTO_BLINK
,
127 BLINK_ENABLE
| BLINK_SPEED_MASK
,
128 BLINK_ENABLE
| chip
->option
.led_blink_speed
);
130 rts51x_add_cmd(chip
, WRITE_REG_CMD
, CARD_DMA1_CTL
,
131 EXTEND_DMA1_ASYNC_SIGNAL
, EXTEND_DMA1_ASYNC_SIGNAL
);
133 retval
= rts51x_send_cmd(chip
, MODE_C
, 100);
134 if (retval
!= STATUS_SUCCESS
)
135 TRACE_RET(chip
, retval
);
137 if (chip
->asic_code
) {
138 rts51x_write_register(chip
, OCPCTL
, MS_OCP_DETECT_EN
,
140 RTS51X_DEBUGP("Enable OCP detect!\n");
143 if (chip
->option
.FT2_fast_mode
) {
144 card_power_on(chip
, SD_CARD
| MS_CARD
| XD_CARD
);
147 rts51x_clear_start_time(chip
);
149 return STATUS_SUCCESS
;
152 int rts51x_init_chip(struct rts51x_chip
*chip
)
161 chip
->card2lun
[XD_CARD
] = 0;
162 chip
->card2lun
[SD_CARD
] = 0;
163 chip
->card2lun
[MS_CARD
] = 0;
164 chip
->card_ejected
= 0;
166 chip
->lun2card
[0] = XD_CARD
| SD_CARD
| MS_CARD
;
168 chip
->option
.sdr50_tx_phase
= 0x01;
169 chip
->option
.sdr50_rx_phase
= 0x05;
170 chip
->option
.ddr50_tx_phase
= 0x09;
171 chip
->option
.ddr50_rx_phase
= 0x06; /* add for debug */
173 #ifdef CLOSE_SSC_POWER
174 rts51x_write_register(chip
, FPDCTL
, SSC_POWER_MASK
, SSC_POWER_ON
);
176 rts51x_write_register(chip
, CLK_DIV
, CLK_CHANGE
, 0x00);
178 RTS51X_SET_STAT(chip
, STAT_RUN
);
180 RTS51X_READ_REG(chip
, HW_VERSION
, &val
);
181 if ((val
& 0x0f) >= 2)
182 chip
->option
.rcc_bug_fix_en
= 0;
183 RTS51X_DEBUGP("rcc bug fix enable:%d\n", chip
->option
.rcc_bug_fix_en
);
184 RTS51X_DEBUGP("HW_VERSION: 0x%x\n", val
);
185 if (val
& FPGA_VER
) {
187 RTS51X_DEBUGP("FPGA!\n");
190 RTS51X_DEBUGP("ASIC!\n");
192 chip
->ic_version
= val
& HW_VER_MASK
;
194 if (!check_sd_speed_prior(chip
->option
.sd_speed_prior
))
195 chip
->option
.sd_speed_prior
= 0x01020403;
196 RTS51X_DEBUGP("sd_speed_prior = 0x%08x\n",
197 chip
->option
.sd_speed_prior
);
199 RTS51X_READ_REG(chip
, CARD_SHARE_MODE
, &val
);
200 if (val
& CARD_SHARE_LQFP_SEL
) {
201 chip
->package
= LQFP48
;
202 RTS51X_DEBUGP("Package: LQFP48\n");
204 chip
->package
= QFN24
;
205 RTS51X_DEBUGP("Package: QFN24\n");
208 RTS51X_READ_REG(chip
, HS_USB_STAT
, &val
);
209 if (val
& USB_HI_SPEED
) {
210 chip
->usb_speed
= USB_20
;
211 RTS51X_DEBUGP("USB High Speed\n");
213 chip
->usb_speed
= USB_11
;
214 RTS51X_DEBUGP("USB Full Speed\n");
217 RTS51X_READ_REG(chip
, CFG_MODE_1
, &val
);
220 RTS51X_DEBUGP("device is rts5179\n");
225 retval
= rts51x_reset_chip(chip
);
226 if (retval
!= STATUS_SUCCESS
)
227 TRACE_RET(chip
, STATUS_FAIL
);
229 return STATUS_SUCCESS
;
232 int rts51x_release_chip(struct rts51x_chip
*chip
)
234 xd_free_l2p_tbl(chip
);
235 ms_free_l2p_tbl(chip
);
236 chip
->card_ready
= 0;
237 return STATUS_SUCCESS
;
240 #ifndef LED_AUTO_BLINK
241 static inline void rts51x_blink_led(struct rts51x_chip
*chip
)
244 if (chip
->card_ready
) {
245 if (chip
->led_toggle_counter
<
246 chip
->option
.led_toggle_interval
) {
247 chip
->led_toggle_counter
++;
249 chip
->led_toggle_counter
= 0;
250 toggle_gpio(chip
, LED_GPIO
);
256 int rts51x_check_start_time(struct rts51x_chip
*chip
)
261 void rts51x_set_start_time(struct rts51x_chip
*chip
)
265 void rts51x_clear_start_time(struct rts51x_chip
*chip
)
269 static void rts51x_auto_delink_cmd(struct rts51x_chip
*chip
)
271 rts51x_write_register(chip
, AUTO_DELINK_EN
,
272 AUTO_DELINK
, AUTO_DELINK
);
275 static void rts51x_auto_delink_force_cmd(struct rts51x_chip
*chip
)
277 rts51x_write_register(chip
, AUTO_DELINK_EN
,
278 AUTO_DELINK
| FORCE_DELINK
,
279 AUTO_DELINK
| FORCE_DELINK
);
282 #ifdef USING_POLLING_CYCLE_DELINK
283 /* using polling cycle as delink time */
284 static void rts51x_auto_delink_polling_cycle(struct rts51x_chip
*chip
)
286 if (chip
->auto_delink_counter
<=
287 chip
->option
.delink_delay
* 2) {
288 if (chip
->auto_delink_counter
==
289 chip
->option
.delink_delay
) {
290 clear_first_install_mark(chip
);
291 if (chip
->card_exist
) {
293 if (!chip
->card_ejected
) {
294 /* if card is not ejected or safely
295 * remove,then do force delink */
296 RTS51X_DEBUGP("False card inserted,"
297 "do force delink\n");
298 rts51x_auto_delink_force_cmd(chip
);
299 chip
->auto_delink_counter
=
300 chip
->option
.delink_delay
* 2 + 1;
303 RTS51X_DEBUGP("No card inserted, do delink\n");
304 /* rts51x_write_register(chip, CARD_PWR_CTL,
305 DV3318_AUTO_PWR_OFF, 0); */
306 rts51x_auto_delink_cmd(chip
);
309 if (chip
->auto_delink_counter
==
310 chip
->option
.delink_delay
* 2) {
311 RTS51X_DEBUGP("Try to do force delink\n");
312 rts51x_auto_delink_force_cmd(chip
);
314 chip
->auto_delink_counter
++;
318 static void rts51x_auto_delink(struct rts51x_chip
*chip
)
320 rts51x_auto_delink_polling_cycle(chip
);
323 /* some of called funcs are not implemented, so comment it out */
325 /* using precise time as delink time */
326 static void rts51x_auto_delink_precise_time(struct rts51x_chip
*chip
)
330 retvalue
= rts51x_get_card_status(chip
, &chip
->card_status
);
331 /* get card CD status success and card CD not exist,
332 * then check whether delink */
333 if ((retvalue
== STATUS_SUCCESS
)
334 && (!(chip
->card_status
& (SD_CD
| MS_CD
| XD_CD
)))) {
335 if (rts51x_count_delink_time(chip
) >=
336 chip
->option
.delink_delay
) {
337 clear_first_install_mark(chip
);
338 RTS51X_DEBUGP("No card inserted, do delink\n");
339 /* sangdy2010-05-17:disable because there is error
340 * after SSC clock closed and card power
341 * has been closed before */
342 /* rts51x_write_register(chip, CARD_PWR_CTL,
343 DV3318_AUTO_PWR_OFF, 0); */
344 rts51x_auto_delink_cmd(chip
);
346 /* card CD exist and not ready, then do force delink */
347 if ((retvalue
== STATUS_SUCCESS
)
348 && (chip
->card_status
& (SD_CD
| MS_CD
| XD_CD
))) {
349 /* if card is not ejected or safely remove,
350 * then do force delink */
351 if (!chip
->card_ejected
) {
352 /* sangdy2010-11-16:polling at least 2 cycles
353 * then do force delink for card may force delink
354 * if card is extracted and insert quickly
356 if (chip
->auto_delink_counter
> 1) {
357 if (rts51x_count_delink_time(chip
) >
358 chip
->option
.delink_delay
* 2) {
359 RTS51X_DEBUGP("Try to do force"
361 rts51x_auto_delink_force_cmd(chip
);
366 chip
->auto_delink_counter
++;
369 static void rts51x_auto_delink_precise_time(struct rts51x_chip
*chip
)
374 static void rts51x_auto_delink(struct rts51x_chip
*chip
)
376 rts51x_auto_delink_precise_time(chip
);
380 void rts51x_polling_func(struct rts51x_chip
*chip
)
382 #ifdef SUPPORT_SD_LOCK
383 struct sd_info
*sd_card
= &(chip
->sd_card
);
385 if (sd_card
->sd_erase_status
) {
386 if (chip
->card_exist
& SD_CARD
) {
388 rts51x_read_register(chip
, SD_BUS_STAT
, &val
);
389 if (val
& SD_DAT0_STATUS
) {
390 /* Erase completed */
391 sd_card
->sd_erase_status
= SD_NOT_ERASE
;
392 sd_card
->sd_lock_notify
= 1;
394 /* SD card should be reinited,
395 * so we release it here. */
396 sd_cleanup_work(chip
);
397 release_sd_card(chip
);
398 chip
->card_ready
&= ~SD_CARD
;
399 chip
->card_exist
&= ~SD_CARD
;
400 chip
->rw_card
[chip
->card2lun
[SD_CARD
]] = NULL
;
401 clear_bit(chip
->card2lun
[SD_CARD
],
405 sd_card
->sd_erase_status
= SD_NOT_ERASE
;
410 rts51x_init_cards(chip
);
413 /* if OCP happen and card exist, then close card OE */
414 if ((chip
->ocp_stat
& (MS_OCP_NOW
| MS_OCP_EVER
)) &&
415 (chip
->card_exist
)) {
417 rts51x_prepare_run(chip
);
419 if (chip
->card_exist
& SD_CARD
)
420 rts51x_write_register(chip
, CARD_OE
, SD_OUTPUT_EN
, 0);
421 else if (chip
->card_exist
& MS_CARD
)
422 rts51x_write_register(chip
, CARD_OE
, MS_OUTPUT_EN
, 0);
423 else if (chip
->card_exist
& XD_CARD
)
424 rts51x_write_register(chip
, CARD_OE
, XD_OUTPUT_EN
, 0);
428 if (chip
->idle_counter
< IDLE_MAX_COUNT
) {
429 chip
->idle_counter
++;
431 if (!RTS51X_CHK_STAT(chip
, STAT_IDLE
)) {
432 RTS51X_DEBUGP("Idle state!\n");
433 RTS51X_SET_STAT(chip
, STAT_IDLE
);
434 #ifndef LED_AUTO_BLINK
435 chip
->led_toggle_counter
= 0;
437 /* Idle state, turn off LED
438 * to reduce power consumption */
439 if (chip
->option
.led_always_on
440 && (chip
->card_exist
&
441 (SD_CARD
| MS_CARD
| XD_CARD
))
442 && (!chip
->card_ejected
)) {
443 turn_on_led(chip
, LED_GPIO
);
446 rts51x_ep0_write_register(chip
,
450 turn_off_led(chip
, LED_GPIO
);
455 #ifdef CLOSE_SSC_POWER
456 if (!chip
->card_ready
) {
457 rts51x_write_register(chip
, CLK_DIV
, CLK_CHANGE
,
459 rts51x_write_register(chip
, FPDCTL
,
462 RTS51X_DEBUGP("Close SSC clock power!\n");
468 switch (RTS51X_GET_STAT(chip
)) {
470 #ifndef LED_AUTO_BLINK
471 rts51x_blink_led(chip
);
473 do_remaining_work(chip
);
483 if (chip
->option
.auto_delink_en
&& !chip
->card_ready
) {
484 rts51x_auto_delink(chip
);
486 chip
->auto_delink_counter
= 0;
487 rts51x_clear_start_time(chip
);
491 void rts51x_add_cmd(struct rts51x_chip
*chip
,
492 u8 cmd_type
, u16 reg_addr
, u8 mask
, u8 data
)
496 if (chip
->cmd_idx
< ((CMD_BUF_LEN
- CMD_OFFSET
) / 4)) {
497 i
= CMD_OFFSET
+ chip
->cmd_idx
* 4;
499 ((cmd_type
& 0x03) << 6) | (u8
) ((reg_addr
>> 8) & 0x3F);
500 chip
->cmd_buf
[i
++] = (u8
) reg_addr
;
501 chip
->cmd_buf
[i
++] = mask
;
502 chip
->cmd_buf
[i
++] = data
;
507 int rts51x_send_cmd(struct rts51x_chip
*chip
, u8 flag
, int timeout
)
511 chip
->cmd_buf
[CNT_H
] = (u8
) (chip
->cmd_idx
>> 8);
512 chip
->cmd_buf
[CNT_L
] = (u8
) (chip
->cmd_idx
);
513 chip
->cmd_buf
[STAGE_FLAG
] = flag
;
515 result
= rts51x_transfer_data_rcc(chip
, SND_BULK_PIPE(chip
),
516 (void *)(chip
->cmd_buf
),
517 chip
->cmd_idx
* 4 + CMD_OFFSET
,
518 0, NULL
, timeout
, MODE_C
);
519 if (result
!= STATUS_SUCCESS
)
520 TRACE_RET(chip
, result
);
522 return STATUS_SUCCESS
;
525 int rts51x_get_rsp(struct rts51x_chip
*chip
, int rsp_len
, int timeout
)
530 TRACE_RET(chip
, STATUS_ERROR
);
531 /* rsp_len must aligned to dword */
533 rsp_len
+= (4 - rsp_len
% 4);
535 result
= rts51x_transfer_data_rcc(chip
, RCV_BULK_PIPE(chip
),
536 (void *)chip
->rsp_buf
, rsp_len
,
537 0, NULL
, timeout
, STAGE_R
);
538 if (result
!= STATUS_SUCCESS
)
539 TRACE_RET(chip
, result
);
541 return STATUS_SUCCESS
;
544 int rts51x_get_card_status(struct rts51x_chip
*chip
, u16
* status
)
549 #ifdef GET_CARD_STATUS_USING_EPC
550 retval
= rts51x_get_epc_status(chip
, &val
);
552 if (retval
!= STATUS_SUCCESS
)
553 TRACE_RET(chip
, retval
);
555 retval
= rts51x_ctrl_transfer(chip
, RCV_CTRL_PIPE(chip
), 0x02, 0xC0,
557 if (retval
!= STATUS_SUCCESS
)
558 TRACE_RET(chip
, retval
);
564 return STATUS_SUCCESS
;
567 int rts51x_write_register(struct rts51x_chip
*chip
, u16 addr
, u8 mask
, u8 data
)
571 rts51x_init_cmd(chip
);
572 rts51x_add_cmd(chip
, WRITE_REG_CMD
, addr
, mask
, data
);
573 retval
= rts51x_send_cmd(chip
, MODE_C
, 100);
574 if (retval
!= STATUS_SUCCESS
)
575 TRACE_RET(chip
, STATUS_FAIL
);
577 return STATUS_SUCCESS
;
580 int rts51x_read_register(struct rts51x_chip
*chip
, u16 addr
, u8
* data
)
586 rts51x_init_cmd(chip
);
587 rts51x_add_cmd(chip
, READ_REG_CMD
, addr
, 0, 0);
588 retval
= rts51x_send_cmd(chip
, MODE_CR
, 100);
589 if (retval
!= STATUS_SUCCESS
)
590 TRACE_RET(chip
, STATUS_FAIL
);
592 retval
= rts51x_get_rsp(chip
, 1, 100);
594 if (retval
!= STATUS_SUCCESS
)
595 TRACE_RET(chip
, STATUS_FAIL
);
598 *data
= chip
->rsp_buf
[0];
600 return STATUS_SUCCESS
;
603 int rts51x_ep0_write_register(struct rts51x_chip
*chip
, u16 addr
, u8 mask
,
607 u16 value
= 0, index
= 0;
609 value
|= (u16
) (3 & 0x03) << 14;
610 value
|= (u16
) (addr
& 0x3FFF);
611 index
|= (u16
) mask
<< 8;
614 retval
= rts51x_ctrl_transfer(chip
, SND_CTRL_PIPE(chip
), 0x00, 0x40,
615 cpu_to_be16(value
), cpu_to_be16(index
),
617 if (retval
!= STATUS_SUCCESS
)
618 TRACE_RET(chip
, retval
);
620 return STATUS_SUCCESS
;
623 int rts51x_ep0_read_register(struct rts51x_chip
*chip
, u16 addr
, u8
* data
)
632 value
|= (u16
) (2 & 0x03) << 14;
633 value
|= (u16
) (addr
& 0x3FFF);
635 retval
= rts51x_ctrl_transfer(chip
, RCV_CTRL_PIPE(chip
), 0x00, 0xC0,
636 cpu_to_be16(value
), 0, &val
, 1, 100);
637 if (retval
!= STATUS_SUCCESS
)
638 TRACE_RET(chip
, retval
);
643 return STATUS_SUCCESS
;
646 int rts51x_seq_write_register(struct rts51x_chip
*chip
, u16 addr
, u16 len
,
650 u16 cmd_len
= len
+ 12;
653 TRACE_RET(chip
, STATUS_ERROR
);
655 cmd_len
= (cmd_len
<= CMD_BUF_LEN
) ? cmd_len
: CMD_BUF_LEN
;
657 /* cmd_len must aligned to dword */
659 cmd_len
+= (4 - cmd_len
% 4);
661 chip
->cmd_buf
[0] = 'R';
662 chip
->cmd_buf
[1] = 'T';
663 chip
->cmd_buf
[2] = 'C';
664 chip
->cmd_buf
[3] = 'R';
665 chip
->cmd_buf
[PACKET_TYPE
] = SEQ_WRITE
;
666 chip
->cmd_buf
[5] = (u8
) (len
>> 8);
667 chip
->cmd_buf
[6] = (u8
) len
;
668 chip
->cmd_buf
[STAGE_FLAG
] = 0;
669 chip
->cmd_buf
[8] = (u8
) (addr
>> 8);
670 chip
->cmd_buf
[9] = (u8
) addr
;
672 memcpy(chip
->cmd_buf
+ 12, data
, len
);
674 result
= rts51x_transfer_data_rcc(chip
, SND_BULK_PIPE(chip
),
675 (void *)(chip
->cmd_buf
), cmd_len
, 0,
677 if (result
!= STATUS_SUCCESS
)
678 TRACE_RET(chip
, result
);
680 return STATUS_SUCCESS
;
683 int rts51x_seq_read_register(struct rts51x_chip
*chip
, u16 addr
, u16 len
,
690 TRACE_RET(chip
, STATUS_ERROR
);
691 /* rsp_len must aligned to dword */
693 rsp_len
= len
+ (4 - len
% 4);
697 chip
->cmd_buf
[0] = 'R';
698 chip
->cmd_buf
[1] = 'T';
699 chip
->cmd_buf
[2] = 'C';
700 chip
->cmd_buf
[3] = 'R';
701 chip
->cmd_buf
[PACKET_TYPE
] = SEQ_READ
;
702 chip
->cmd_buf
[5] = (u8
) (rsp_len
>> 8);
703 chip
->cmd_buf
[6] = (u8
) rsp_len
;
704 chip
->cmd_buf
[STAGE_FLAG
] = STAGE_R
;
705 chip
->cmd_buf
[8] = (u8
) (addr
>> 8);
706 chip
->cmd_buf
[9] = (u8
) addr
;
708 result
= rts51x_transfer_data_rcc(chip
, SND_BULK_PIPE(chip
),
709 (void *)(chip
->cmd_buf
), 12, 0, NULL
,
711 if (result
!= STATUS_SUCCESS
)
712 TRACE_RET(chip
, result
);
714 result
= rts51x_transfer_data_rcc(chip
, RCV_BULK_PIPE(chip
),
715 (void *)data
, rsp_len
, 0, NULL
, 100,
717 if (result
!= STATUS_SUCCESS
)
718 TRACE_RET(chip
, result
);
720 return STATUS_SUCCESS
;
723 int rts51x_read_ppbuf(struct rts51x_chip
*chip
, u8
* buf
, int buf_len
)
728 TRACE_RET(chip
, STATUS_ERROR
);
731 rts51x_seq_read_register(chip
, PPBUF_BASE2
, (u16
) buf_len
, buf
);
732 if (retval
!= STATUS_SUCCESS
)
733 TRACE_RET(chip
, retval
);
735 return STATUS_SUCCESS
;
738 int rts51x_write_ppbuf(struct rts51x_chip
*chip
, u8
* buf
, int buf_len
)
743 TRACE_RET(chip
, STATUS_ERROR
);
746 rts51x_seq_write_register(chip
, PPBUF_BASE2
, (u16
) buf_len
, buf
);
747 if (retval
!= STATUS_SUCCESS
)
748 TRACE_RET(chip
, retval
);
750 return STATUS_SUCCESS
;
753 int rts51x_write_phy_register(struct rts51x_chip
*chip
, u8 addr
, u8 val
)
757 RTS51X_DEBUGP("Write 0x%x to phy register 0x%x\n", val
, addr
);
759 rts51x_init_cmd(chip
);
761 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VSTAIN
, 0xFF, val
);
762 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VCONTROL
, 0xFF, addr
& 0x0F);
763 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
764 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
765 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x01);
766 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VCONTROL
, 0xFF,
768 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
769 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
770 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x01);
772 retval
= rts51x_send_cmd(chip
, MODE_C
, 100);
773 if (retval
!= STATUS_SUCCESS
)
774 TRACE_RET(chip
, retval
);
776 return STATUS_SUCCESS
;
779 int rts51x_read_phy_register(struct rts51x_chip
*chip
, u8 addr
, u8
* val
)
783 RTS51X_DEBUGP("Read from phy register 0x%x\n", addr
);
785 rts51x_init_cmd(chip
);
787 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VCONTROL
, 0xFF, 0x07);
788 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
789 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
790 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x01);
791 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VCONTROL
, 0xFF,
793 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
794 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
795 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x01);
796 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VCONTROL
, 0xFF, addr
& 0x0F);
797 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
798 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x00);
799 rts51x_add_cmd(chip
, WRITE_REG_CMD
, HS_VLOADM
, 0xFF, 0x01);
800 rts51x_add_cmd(chip
, READ_REG_CMD
, HS_VSTAOUT
, 0, 0);
802 retval
= rts51x_send_cmd(chip
, MODE_CR
, 100);
803 if (retval
!= STATUS_SUCCESS
)
804 TRACE_RET(chip
, retval
);
806 retval
= rts51x_get_rsp(chip
, 1, 100);
808 if (retval
!= STATUS_SUCCESS
)
809 TRACE_RET(chip
, retval
);
812 *val
= chip
->rsp_buf
[0];
814 RTS51X_DEBUGP("Return value: 0x%x\n", chip
->rsp_buf
[0]);
816 return STATUS_SUCCESS
;
819 void rts51x_do_before_power_down(struct rts51x_chip
*chip
)
821 RTS51X_DEBUGP("rts51x_do_before_power_down\n");
823 rts51x_prepare_run(chip
);
825 rts51x_release_cards(chip
);
827 rts51x_ep0_write_register(chip
, CARD_GPIO
, 0x03, 0x00);
829 turn_off_led(chip
, LED_GPIO
);
832 chip
->card_exist
= 0;
834 if (chip
->asic_code
&& !chip
->option
.ww_enable
) {
835 if (CHECK_PKG(chip
, LQFP48
)) {
836 rts51x_write_register(chip
, CARD_PULL_CTL3
, 0x80, 0x00);
837 rts51x_write_register(chip
, CARD_PULL_CTL6
, 0xf0, 0x50);
839 rts51x_write_register(chip
, CARD_PULL_CTL1
, 0x30, 0x10);
840 rts51x_write_register(chip
, CARD_PULL_CTL3
, 0x80, 0x00);
841 rts51x_write_register(chip
, CARD_PULL_CTL6
, 0x0c, 0x04);
844 if (CHECK_PKG(chip
, LQFP48
))
845 rts51x_write_register(chip
, CARD_PWR_CTL
, LDO3318_PWR_MASK
,
849 void rts51x_clear_hw_error(struct rts51x_chip
*chip
)
851 rts51x_ep0_write_register(chip
, SFSM_ED
, 0xf8, 0xf8);
854 void rts51x_prepare_run(struct rts51x_chip
*chip
)
856 #ifdef CLOSE_SSC_POWER
857 if (RTS51X_CHK_STAT(chip
, STAT_IDLE
) && (!chip
->card_ready
)) {
858 rts51x_write_register(chip
, FPDCTL
, SSC_POWER_MASK
,
861 RTS51X_DEBUGP("Open SSC clock power.\n");
863 rts51x_write_register(chip
, CLK_DIV
, CLK_CHANGE
, 0x00);
867 if (chip
->option
.ss_en
&& RTS51X_CHK_STAT(chip
, STAT_SS
)) {
868 rts51x_try_to_exit_ss(chip
);
870 rts51x_init_chip(chip
);
871 rts51x_init_cards(chip
);
874 RTS51X_SET_STAT(chip
, STAT_RUN
);
879 void rts51x_trace_msg(struct rts51x_chip
*chip
, unsigned char *buf
, int clear
)
889 if (chip
->trace_msg
[chip
->msg_idx
].valid
)
890 msg_cnt
= TRACE_ITEM_CNT
;
892 msg_cnt
= chip
->msg_idx
;
893 *(ptr
++) = (u8
) (msg_cnt
>> 24);
894 *(ptr
++) = (u8
) (msg_cnt
>> 16);
895 *(ptr
++) = (u8
) (msg_cnt
>> 8);
896 *(ptr
++) = (u8
) msg_cnt
;
897 RTS51X_DEBUGP("Trace message count is %d\n", msg_cnt
);
899 for (i
= 1; i
<= msg_cnt
; i
++) {
902 idx
= chip
->msg_idx
- i
;
904 idx
+= TRACE_ITEM_CNT
;
906 *(ptr
++) = (u8
) (chip
->trace_msg
[idx
].line
>> 8);
907 *(ptr
++) = (u8
) (chip
->trace_msg
[idx
].line
);
908 for (j
= 0; j
< MSG_FUNC_LEN
; j
++)
909 *(ptr
++) = chip
->trace_msg
[idx
].func
[j
];
910 for (j
= 0; j
< MSG_FILE_LEN
; j
++)
911 *(ptr
++) = chip
->trace_msg
[idx
].file
[j
];
912 for (j
= 0; j
< TIME_VAL_LEN
; j
++)
913 *(ptr
++) = chip
->trace_msg
[idx
].timeval_buf
[j
];
918 for (i
= 0; i
< TRACE_ITEM_CNT
; i
++)
919 chip
->trace_msg
[i
].valid
= 0;
924 void rts51x_pp_status(struct rts51x_chip
*chip
, unsigned int lun
, u8
* status
,
927 struct sd_info
*sd_card
= &(chip
->sd_card
);
928 struct ms_info
*ms_card
= &(chip
->ms_card
);
929 u8 card
= get_lun_card(chip
, lun
);
931 u8 oc_now_mask
= 0, oc_ever_mask
= 0;
934 if (!status
|| (status_len
< 32))
937 status
[0] = (u8
) RTS51X_GET_PID(chip
);
938 status
[1] = (u8
) (chip
->ic_version
);
940 /* Auto delink mode */
941 if (chip
->option
.auto_delink_en
)
959 /* Over current status */
961 oc_now_mask
= MS_OCP_NOW
;
962 oc_ever_mask
= MS_OCP_EVER
;
964 if (chip
->ocp_stat
& oc_now_mask
)
966 if (chip
->ocp_stat
& oc_ever_mask
)
970 if (card
== SD_CARD
) {
971 if (CHK_SD(sd_card
)) {
972 if (CHK_SD_HCXC(sd_card
)) {
973 if (sd_card
->capacity
> 0x4000000)
982 if (CHK_SD_SDR104(sd_card
))
984 else if (CHK_SD_DDR50(sd_card
))
986 else if (CHK_SD_SDR50(sd_card
))
988 else if (CHK_SD_HS(sd_card
))
991 status
[0x0F] = 0x00; /* Normal speed */
993 if (CHK_MMC_SECTOR_MODE(sd_card
))
994 status
[0x0E] = 0x01; /* High capacity */
996 status
[0x0E] = 0x00; /* Normal capacity */
998 if (CHK_MMC_DDR52(sd_card
))
999 status
[0x0F] = 0x03; /* DDR 52M */
1000 else if (CHK_MMC_52M(sd_card
))
1001 status
[0x0F] = 0x02; /* SDR 52M */
1002 else if (CHK_MMC_26M(sd_card
))
1003 status
[0x0F] = 0x01; /* SDR 26M */
1005 status
[0x0F] = 0x00; /* Normal speed */
1007 } else if (card
== MS_CARD
) {
1008 if (CHK_MSPRO(ms_card
)) {
1009 if (CHK_MSXC(ms_card
))
1010 status
[0x0E] = 0x01; /* XC */
1012 status
[0x0E] = 0x00;
1014 if (CHK_HG8BIT(ms_card
))
1015 status
[0x0F] = 0x01;
1017 status
[0x0F] = 0x00;
1020 #ifdef SUPPORT_SD_LOCK
1021 /* SD Lock/Unlock */
1022 if (card
== SD_CARD
) {
1023 status
[0x17] = 0x80;
1024 if (sd_card
->sd_erase_status
)
1025 status
[0x17] |= 0x01; /* Under erasing */
1026 if (sd_card
->sd_lock_status
& SD_LOCKED
) {
1027 status
[0x17] |= 0x02; /* Locked */
1028 status
[0x07] |= 0x40; /* Read protected */
1030 if (sd_card
->sd_lock_status
& SD_PWD_EXIST
)
1031 status
[0x17] |= 0x04; /* Contain PWD */
1033 status
[0x17] = 0x00;
1036 RTS51X_DEBUGP("status[0x17] = 0x%x\n", status
[0x17]);
1040 * Support Magic Gate, CPRM and PhyRegister R/W */
1041 status
[0x18] = 0x8A;
1044 * Support OC LUN status & WP LUN status */
1045 status
[0x1A] = 0x28;
1048 #ifdef SUPPORT_SD_LOCK
1049 /* Support SD Lock/Unlock */
1050 status
[0x1F] = 0x01;
1054 * Support OC LUN status & WP LUN status */
1055 status
[0x1A] = 0x28;
1058 void rts51x_read_status(struct rts51x_chip
*chip
, unsigned int lun
,
1059 u8
*rts51x_status
, u8 status_len
)
1061 if (!rts51x_status
|| (status_len
< 16))
1064 rts51x_status
[0] = (u8
) (RTS51X_GET_VID(chip
) >> 8);
1065 rts51x_status
[1] = (u8
) RTS51X_GET_VID(chip
);
1068 rts51x_status
[2] = (u8
) (RTS51X_GET_PID(chip
) >> 8);
1069 rts51x_status
[3] = (u8
) RTS51X_GET_PID(chip
);
1072 rts51x_status
[4] = (u8
) lun
;
1074 /* Lun Card Number */
1075 if (chip
->card_exist
) {
1076 if (chip
->card_exist
& XD_CARD
)
1077 rts51x_status
[5] = 4; /* xD Card */
1078 else if (chip
->card_exist
& SD_CARD
)
1079 rts51x_status
[5] = 2; /* SD Card */
1080 else if (chip
->card_exist
& MS_CARD
)
1081 rts51x_status
[5] = 3; /* MS Card */
1083 rts51x_status
[5] = 7; /* Multi */
1085 rts51x_status
[5] = 7; /* Multi */
1089 rts51x_status
[6] = 1;
1092 rts51x_status
[7] = (u8
) RTS51X_GET_PID(chip
);
1093 rts51x_status
[8] = chip
->ic_version
;
1095 /* Physical Exist */
1096 if (check_card_exist(chip
, lun
))
1097 rts51x_status
[9] = 1;
1099 rts51x_status
[9] = 0;
1102 rts51x_status
[10] = 1;
1105 rts51x_status
[11] = XD_CARD
| SD_CARD
| MS_CARD
;
1108 if (check_card_ready(chip
, lun
))
1109 rts51x_status
[12] = 1;
1111 rts51x_status
[12] = 0;
1114 if (get_lun_card(chip
, lun
) == XD_CARD
) {
1115 rts51x_status
[13] = 0x40;
1116 } else if (get_lun_card(chip
, lun
) == SD_CARD
) {
1117 struct sd_info
*sd_card
= &(chip
->sd_card
);
1119 rts51x_status
[13] = 0x20;
1120 if (CHK_SD(sd_card
)) {
1121 if (CHK_SD_HCXC(sd_card
))
1122 rts51x_status
[13] |= 0x04; /* Hi capacity SD */
1123 if (CHK_SD_HS(sd_card
))
1124 rts51x_status
[13] |= 0x02; /* Hi speed SD */
1126 rts51x_status
[13] |= 0x08; /* MMC card */
1127 if (CHK_MMC_52M(sd_card
))
1128 rts51x_status
[13] |= 0x02; /* Hi speed */
1129 if (CHK_MMC_SECTOR_MODE(sd_card
))
1130 rts51x_status
[13] |= 0x04; /* Hi capacity */
1132 } else if (get_lun_card(chip
, lun
) == MS_CARD
) {
1133 struct ms_info
*ms_card
= &(chip
->ms_card
);
1135 if (CHK_MSPRO(ms_card
)) {
1136 rts51x_status
[13] = 0x38; /* MS Pro */
1137 if (CHK_HG8BIT(ms_card
))
1138 rts51x_status
[13] |= 0x04; /* HG */
1140 if (CHK_MSXC(ms_card
))
1141 rts51x_status
[13] |= 0x01; /* MSXC */
1144 rts51x_status
[13] = 0x30;
1147 rts51x_status
[13] = 0x70;
1149 /* Support OC, auto delink, vendor r/w, get bus width */
1150 rts51x_status
[14] = 0x78;
1152 rts51x_status
[15] = 0x82;
1155 int rts51x_transfer_data_rcc(struct rts51x_chip
*chip
, unsigned int pipe
,
1156 void *buf
, unsigned int len
, int use_sg
,
1157 unsigned int *act_len
, int timeout
, u8 stage_flag
)
1162 rts51x_transfer_data(chip
, pipe
, buf
, len
, use_sg
, act_len
,