include/linux/mfd/tmio.h

   1 #ifndef MFD_TMIO_H
   2 #define MFD_TMIO_H
   3
   4 #include <linux/fb.h>
   5 #include <linux/io.h>
   6 #include <linux/platform_device.h>
   7 #include <linux/pm_runtime.h>
   8
   9 #define tmio_ioread8(addr) readb(addr)
  10 #define tmio_ioread16(addr) readw(addr)
  11 #define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
  12 #define tmio_ioread32(addr) \
  13         (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
  14
  15 #define tmio_iowrite8(val, addr) writeb((val), (addr))
  16 #define tmio_iowrite16(val, addr) writew((val), (addr))
  17 #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
  18 #define tmio_iowrite32(val, addr) \
  19         do { \
  20         writew((val),       (addr)); \
  21         writew((val) >> 16, (addr) + 2); \
  22         } while (0)
  23
  24 #define CNF_CMD     0x04
  25 #define CNF_CTL_BASE   0x10
  26 #define CNF_INT_PIN  0x3d
  27 #define CNF_STOP_CLK_CTL 0x40
  28 #define CNF_GCLK_CTL 0x41
  29 #define CNF_SD_CLK_MODE 0x42
  30 #define CNF_PIN_STATUS 0x44
  31 #define CNF_PWR_CTL_1 0x48
  32 #define CNF_PWR_CTL_2 0x49
  33 #define CNF_PWR_CTL_3 0x4a
  34 #define CNF_CARD_DETECT_MODE 0x4c
  35 #define CNF_SD_SLOT 0x50
  36 #define CNF_EXT_GCLK_CTL_1 0xf0
  37 #define CNF_EXT_GCLK_CTL_2 0xf1
  38 #define CNF_EXT_GCLK_CTL_3 0xf9
  39 #define CNF_SD_LED_EN_1 0xfa
  40 #define CNF_SD_LED_EN_2 0xfe
  41
  42 #define   SDCREN 0x2   /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
  43
  44 #define sd_config_write8(base, shift, reg, val) \
  45         tmio_iowrite8((val), (base) + ((reg) << (shift)))
  46 #define sd_config_write16(base, shift, reg, val) \
  47         tmio_iowrite16((val), (base) + ((reg) << (shift)))
  48 #define sd_config_write32(base, shift, reg, val) \
  49         do { \
  50                 tmio_iowrite16((val), (base) + ((reg) << (shift)));   \
  51                 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
  52         } while (0)
  53
  54 /* tmio MMC platform flags */
  55 #define TMIO_MMC_WRPROTECT_DISABLE      (1 << 0)
  56 /*
  57  * Some controllers can support a 2-byte block size when the bus width
  58  * is configured in 4-bit mode.
  59  */
  60 #define TMIO_MMC_BLKSZ_2BYTES           (1 << 1)
  61 /*
  62  * Some controllers can support SDIO IRQ signalling.
  63  */
  64 #define TMIO_MMC_SDIO_IRQ               (1 << 2)
  65 /*
  66  * Some platforms can detect card insertion events with controller powered
  67  * down, in which case they have to call tmio_mmc_cd_wakeup() to power up the
  68  * controller and report the event to the driver.
  69  */
  70 #define TMIO_MMC_HAS_COLD_CD            (1 << 3)
  71 /*
  72  * Some controllers require waiting for the SD bus to become
  73  * idle before writing to some registers.
  74  */
  75 #define TMIO_MMC_HAS_IDLE_WAIT          (1 << 4)
  76
  77 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
  78 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
  79 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
  80 void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
  81
  82 struct tmio_mmc_dma {
  83         void *chan_priv_tx;
  84         void *chan_priv_rx;
  85         int alignment_shift;
  86 };
  87
  88 struct tmio_mmc_host;
  89
  90 /*
  91  * data for the MMC controller
  92  */
  93 struct tmio_mmc_data {
  94         unsigned int                    hclk;
  95         unsigned long                   capabilities;
  96         unsigned long                   flags;
  97         u32                             ocr_mask;       /* available voltages */
  98         struct tmio_mmc_dma             *dma;
  99         struct device                   *dev;
 100         bool                            power;
 101         void (*set_pwr)(struct platform_device *host, int state);
 102         void (*set_clk_div)(struct platform_device *host, int state);
 103         int (*get_cd)(struct platform_device *host);
 104         int (*write16_hook)(struct tmio_mmc_host *host, int addr);
 105 };
 106
 107 static inline void tmio_mmc_cd_wakeup(struct tmio_mmc_data *pdata)
 108 {
 109         if (pdata && !pdata->power) {
 110                 pdata->power = true;
 111                 pm_runtime_get(pdata->dev);
 112         }
 113 }
 114
 115 /*
 116  * data for the NAND controller
 117  */
 118 struct tmio_nand_data {
 119         struct nand_bbt_descr   *badblock_pattern;
 120         struct mtd_partition    *partition;
 121         unsigned int            num_partitions;
 122 };
 123
 124 #define FBIO_TMIO_ACC_WRITE     0x7C639300
 125 #define FBIO_TMIO_ACC_SYNC      0x7C639301
 126
 127 struct tmio_fb_data {
 128         int                     (*lcd_set_power)(struct platform_device *fb_dev,
 129                                                                 bool on);
 130         int                     (*lcd_mode)(struct platform_device *fb_dev,
 131                                         const struct fb_videomode *mode);
 132         int                     num_modes;
 133         struct fb_videomode     *modes;
 134
 135         /* in mm: size of screen */
 136         int                     height;
 137         int                     width;
 138 };
 139
 140
 141 #endif