spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / include / linux / sfi.h
blobfe817918b30e49ff96648394d99d8fc85eebaac8
1 /* sfi.h Simple Firmware Interface */
3 /*
5 This file is provided under a dual BSD/GPLv2 license. When using or
6 redistributing this file, you may do so under either license.
8 GPL LICENSE SUMMARY
10 Copyright(c) 2009 Intel Corporation. All rights reserved.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of version 2 of the GNU General Public License as
14 published by the Free Software Foundation.
16 This program is distributed in the hope that it will be useful, but
17 WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 The full GNU General Public License is included in this distribution
25 in the file called LICENSE.GPL.
27 BSD LICENSE
29 Copyright(c) 2009 Intel Corporation. All rights reserved.
31 Redistribution and use in source and binary forms, with or without
32 modification, are permitted provided that the following conditions
33 are met:
35 * Redistributions of source code must retain the above copyright
36 notice, this list of conditions and the following disclaimer.
37 * Redistributions in binary form must reproduce the above copyright
38 notice, this list of conditions and the following disclaimer in
39 the documentation and/or other materials provided with the
40 distribution.
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59 #ifndef _LINUX_SFI_H
60 #define _LINUX_SFI_H
62 /* Table signatures reserved by the SFI specification */
63 #define SFI_SIG_SYST "SYST"
64 #define SFI_SIG_FREQ "FREQ"
65 #define SFI_SIG_IDLE "IDLE"
66 #define SFI_SIG_CPUS "CPUS"
67 #define SFI_SIG_MTMR "MTMR"
68 #define SFI_SIG_MRTC "MRTC"
69 #define SFI_SIG_MMAP "MMAP"
70 #define SFI_SIG_APIC "APIC"
71 #define SFI_SIG_XSDT "XSDT"
72 #define SFI_SIG_WAKE "WAKE"
73 #define SFI_SIG_DEVS "DEVS"
74 #define SFI_SIG_GPIO "GPIO"
76 #define SFI_SIGNATURE_SIZE 4
77 #define SFI_OEM_ID_SIZE 6
78 #define SFI_OEM_TABLE_ID_SIZE 8
80 #define SFI_NAME_LEN 16
82 #define SFI_SYST_SEARCH_BEGIN 0x000E0000
83 #define SFI_SYST_SEARCH_END 0x000FFFFF
85 #define SFI_GET_NUM_ENTRIES(ptable, entry_type) \
86 ((ptable->header.len - sizeof(struct sfi_table_header)) / \
87 (sizeof(entry_type)))
89 * Table structures must be byte-packed to match the SFI specification,
90 * as they are provided by the BIOS.
92 struct sfi_table_header {
93 char sig[SFI_SIGNATURE_SIZE];
94 u32 len;
95 u8 rev;
96 u8 csum;
97 char oem_id[SFI_OEM_ID_SIZE];
98 char oem_table_id[SFI_OEM_TABLE_ID_SIZE];
99 } __packed;
101 struct sfi_table_simple {
102 struct sfi_table_header header;
103 u64 pentry[1];
104 } __packed;
106 /* Comply with UEFI spec 2.1 */
107 struct sfi_mem_entry {
108 u32 type;
109 u64 phys_start;
110 u64 virt_start;
111 u64 pages;
112 u64 attrib;
113 } __packed;
115 struct sfi_cpu_table_entry {
116 u32 apic_id;
117 } __packed;
119 struct sfi_cstate_table_entry {
120 u32 hint; /* MWAIT hint */
121 u32 latency; /* latency in ms */
122 } __packed;
124 struct sfi_apic_table_entry {
125 u64 phys_addr; /* phy base addr for APIC reg */
126 } __packed;
128 struct sfi_freq_table_entry {
129 u32 freq_mhz; /* in MHZ */
130 u32 latency; /* transition latency in ms */
131 u32 ctrl_val; /* value to write to PERF_CTL */
132 } __packed;
134 struct sfi_wake_table_entry {
135 u64 phys_addr; /* pointer to where the wake vector locates */
136 } __packed;
138 struct sfi_timer_table_entry {
139 u64 phys_addr; /* phy base addr for the timer */
140 u32 freq_hz; /* in HZ */
141 u32 irq;
142 } __packed;
144 struct sfi_rtc_table_entry {
145 u64 phys_addr; /* phy base addr for the RTC */
146 u32 irq;
147 } __packed;
149 struct sfi_device_table_entry {
150 u8 type; /* bus type, I2C, SPI or ...*/
151 #define SFI_DEV_TYPE_SPI 0
152 #define SFI_DEV_TYPE_I2C 1
153 #define SFI_DEV_TYPE_UART 2
154 #define SFI_DEV_TYPE_HSI 3
155 #define SFI_DEV_TYPE_IPC 4
157 u8 host_num; /* attached to host 0, 1...*/
158 u16 addr;
159 u8 irq;
160 u32 max_freq;
161 char name[SFI_NAME_LEN];
162 } __packed;
164 struct sfi_gpio_table_entry {
165 char controller_name[SFI_NAME_LEN];
166 u16 pin_no;
167 char pin_name[SFI_NAME_LEN];
168 } __packed;
170 typedef int (*sfi_table_handler) (struct sfi_table_header *table);
172 #ifdef CONFIG_SFI
173 extern void __init sfi_init(void);
174 extern int __init sfi_platform_init(void);
175 extern void __init sfi_init_late(void);
176 extern int sfi_table_parse(char *signature, char *oem_id, char *oem_table_id,
177 sfi_table_handler handler);
179 extern int sfi_disabled;
180 static inline void disable_sfi(void)
182 sfi_disabled = 1;
185 #else /* !CONFIG_SFI */
187 static inline void sfi_init(void)
191 static inline void sfi_init_late(void)
195 #define sfi_disabled 0
197 static inline int sfi_table_parse(char *signature, char *oem_id,
198 char *oem_table_id,
199 sfi_table_handler handler)
201 return -1;
204 #endif /* !CONFIG_SFI */
206 #endif /*_LINUX_SFI_H*/