2 * ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
4 * Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
5 * Pilo Chambert <pilo.c@wanadoo.fr>
7 * Thanks to : Anders Torger <torger@ludd.luth.se>,
8 * Henk Hesselink <henk@anda.nl>
9 * for writing the digi96-driver
10 * and RME for all informations.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 * ****************************************************************************
29 * Note #1 "Sek'd models" ................................... martin 2002-12-07
31 * Identical soundcards by Sek'd were labeled:
32 * RME Digi 32 = Sek'd Prodif 32
33 * RME Digi 32 Pro = Sek'd Prodif 96
34 * RME Digi 32/8 = Sek'd Prodif Gold
36 * ****************************************************************************
38 * Note #2 "full duplex mode" ............................... martin 2002-12-07
40 * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
41 * in this mode. Rec data and play data are using the same buffer therefore. At
42 * first you have got the playing bits in the buffer and then (after playing
43 * them) they were overwitten by the captured sound of the CS8412/14. Both
44 * modes (play/record) are running harmonically hand in hand in the same buffer
45 * and you have only one start bit plus one interrupt bit to control this
47 * This is opposite to the latter rme96 where playing and capturing is totally
48 * separated and so their full duplex mode is supported by alsa (using two
49 * start bits and two interrupts for two different buffers).
50 * But due to the wrong sequence of playing and capturing ALSA shows no solved
51 * full duplex support for the rme32 at the moment. That's bad, but I'm not
52 * able to solve it. Are you motivated enough to solve this problem now? Your
53 * patch would be welcome!
55 * ****************************************************************************
57 * "The story after the long seeking" -- tiwai
59 * Ok, the situation regarding the full duplex is now improved a bit.
60 * In the fullduplex mode (given by the module parameter), the hardware buffer
61 * is split to halves for read and write directions at the DMA pointer.
62 * That is, the half above the current DMA pointer is used for write, and
63 * the half below is used for read. To mangle this strange behavior, an
64 * software intermediate buffer is introduced. This is, of course, not good
65 * from the viewpoint of the data transfer efficiency. However, this allows
66 * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
68 * ****************************************************************************
72 #include <linux/delay.h>
73 #include <linux/gfp.h>
74 #include <linux/init.h>
75 #include <linux/interrupt.h>
76 #include <linux/pci.h>
77 #include <linux/module.h>
79 #include <sound/core.h>
80 #include <sound/info.h>
81 #include <sound/control.h>
82 #include <sound/pcm.h>
83 #include <sound/pcm_params.h>
84 #include <sound/pcm-indirect.h>
85 #include <sound/asoundef.h>
86 #include <sound/initval.h>
90 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 0-MAX */
91 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
92 static bool enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
93 static bool fullduplex
[SNDRV_CARDS
]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
95 module_param_array(index
, int, NULL
, 0444);
96 MODULE_PARM_DESC(index
, "Index value for RME Digi32 soundcard.");
97 module_param_array(id
, charp
, NULL
, 0444);
98 MODULE_PARM_DESC(id
, "ID string for RME Digi32 soundcard.");
99 module_param_array(enable
, bool, NULL
, 0444);
100 MODULE_PARM_DESC(enable
, "Enable RME Digi32 soundcard.");
101 module_param_array(fullduplex
, bool, NULL
, 0444);
102 MODULE_PARM_DESC(fullduplex
, "Support full-duplex mode.");
103 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
104 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
105 MODULE_LICENSE("GPL");
106 MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
108 /* Defines for RME Digi32 series */
109 #define RME32_SPDIF_NCHANNELS 2
111 /* Playback and capture buffer size */
112 #define RME32_BUFFER_SIZE 0x20000
115 #define RME32_IO_SIZE 0x30000
117 /* IO area offsets */
118 #define RME32_IO_DATA_BUFFER 0x0
119 #define RME32_IO_CONTROL_REGISTER 0x20000
120 #define RME32_IO_GET_POS 0x20000
121 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
122 #define RME32_IO_RESET_POS 0x20100
124 /* Write control register bits */
125 #define RME32_WCR_START (1 << 0) /* startbit */
126 #define RME32_WCR_MONO (1 << 1) /* 0=stereo, 1=mono
127 Setting the whole card to mono
128 doesn't seem to be very useful.
129 A software-solution can handle
130 full-duplex with one direction in
131 stereo and the other way in mono.
132 So, the hardware should work all
133 the time in stereo! */
134 #define RME32_WCR_MODE24 (1 << 2) /* 0=16bit, 1=32bit */
135 #define RME32_WCR_SEL (1 << 3) /* 0=input on output, 1=normal playback/capture */
136 #define RME32_WCR_FREQ_0 (1 << 4) /* frequency (play) */
137 #define RME32_WCR_FREQ_1 (1 << 5)
138 #define RME32_WCR_INP_0 (1 << 6) /* input switch */
139 #define RME32_WCR_INP_1 (1 << 7)
140 #define RME32_WCR_RESET (1 << 8) /* Reset address */
141 #define RME32_WCR_MUTE (1 << 9) /* digital mute for output */
142 #define RME32_WCR_PRO (1 << 10) /* 1=professional, 0=consumer */
143 #define RME32_WCR_DS_BM (1 << 11) /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
144 #define RME32_WCR_ADAT (1 << 12) /* Adat Mode (only Adat-Version) */
145 #define RME32_WCR_AUTOSYNC (1 << 13) /* AutoSync */
146 #define RME32_WCR_PD (1 << 14) /* DAC Reset (only PRO-Version) */
147 #define RME32_WCR_EMP (1 << 15) /* 1=Emphasis on (only PRO-Version) */
149 #define RME32_WCR_BITPOS_FREQ_0 4
150 #define RME32_WCR_BITPOS_FREQ_1 5
151 #define RME32_WCR_BITPOS_INP_0 6
152 #define RME32_WCR_BITPOS_INP_1 7
154 /* Read control register bits */
155 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
156 #define RME32_RCR_LOCK (1 << 23) /* 1=locked, 0=not locked */
157 #define RME32_RCR_ERF (1 << 26) /* 1=Error, 0=no Error */
158 #define RME32_RCR_FREQ_0 (1 << 27) /* CS841x frequency (record) */
159 #define RME32_RCR_FREQ_1 (1 << 28)
160 #define RME32_RCR_FREQ_2 (1 << 29)
161 #define RME32_RCR_KMODE (1 << 30) /* card mode: 1=PLL, 0=quartz */
162 #define RME32_RCR_IRQ (1 << 31) /* interrupt */
164 #define RME32_RCR_BITPOS_F0 27
165 #define RME32_RCR_BITPOS_F1 28
166 #define RME32_RCR_BITPOS_F2 29
169 #define RME32_INPUT_OPTICAL 0
170 #define RME32_INPUT_COAXIAL 1
171 #define RME32_INPUT_INTERNAL 2
172 #define RME32_INPUT_XLR 3
175 #define RME32_CLOCKMODE_SLAVE 0
176 #define RME32_CLOCKMODE_MASTER_32 1
177 #define RME32_CLOCKMODE_MASTER_44 2
178 #define RME32_CLOCKMODE_MASTER_48 3
180 /* Block sizes in bytes */
181 #define RME32_BLOCK_SIZE 8192
183 /* Software intermediate buffer (max) size */
184 #define RME32_MID_BUFFER_SIZE (1024*1024)
186 /* Hardware revisions */
187 #define RME32_32_REVISION 192
188 #define RME32_328_REVISION_OLD 100
189 #define RME32_328_REVISION_NEW 101
190 #define RME32_PRO_REVISION_WITH_8412 192
191 #define RME32_PRO_REVISION_WITH_8414 150
198 void __iomem
*iobase
;
200 u32 wcreg
; /* cached write control register value */
201 u32 wcreg_spdif
; /* S/PDIF setup */
202 u32 wcreg_spdif_stream
; /* S/PDIF setup (temporary) */
203 u32 rcreg
; /* cached read control register value */
205 u8 rev
; /* card revision number */
207 struct snd_pcm_substream
*playback_substream
;
208 struct snd_pcm_substream
*capture_substream
;
210 int playback_frlog
; /* log2 of framesize */
213 size_t playback_periodsize
; /* in bytes, zero if not used */
214 size_t capture_periodsize
; /* in bytes, zero if not used */
216 unsigned int fullduplex_mode
;
219 struct snd_pcm_indirect playback_pcm
;
220 struct snd_pcm_indirect capture_pcm
;
222 struct snd_card
*card
;
223 struct snd_pcm
*spdif_pcm
;
224 struct snd_pcm
*adat_pcm
;
226 struct snd_kcontrol
*spdif_ctl
;
229 static DEFINE_PCI_DEVICE_TABLE(snd_rme32_ids
) = {
230 {PCI_VDEVICE(XILINX_RME
, PCI_DEVICE_ID_RME_DIGI32
), 0,},
231 {PCI_VDEVICE(XILINX_RME
, PCI_DEVICE_ID_RME_DIGI32_8
), 0,},
232 {PCI_VDEVICE(XILINX_RME
, PCI_DEVICE_ID_RME_DIGI32_PRO
), 0,},
236 MODULE_DEVICE_TABLE(pci
, snd_rme32_ids
);
238 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
239 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
241 static int snd_rme32_playback_prepare(struct snd_pcm_substream
*substream
);
243 static int snd_rme32_capture_prepare(struct snd_pcm_substream
*substream
);
245 static int snd_rme32_pcm_trigger(struct snd_pcm_substream
*substream
, int cmd
);
247 static void snd_rme32_proc_init(struct rme32
* rme32
);
249 static int snd_rme32_create_switches(struct snd_card
*card
, struct rme32
* rme32
);
251 static inline unsigned int snd_rme32_pcm_byteptr(struct rme32
* rme32
)
253 return (readl(rme32
->iobase
+ RME32_IO_GET_POS
)
254 & RME32_RCR_AUDIO_ADDR_MASK
);
257 /* silence callback for halfduplex mode */
258 static int snd_rme32_playback_silence(struct snd_pcm_substream
*substream
, int channel
, /* not used (interleaved data) */
259 snd_pcm_uframes_t pos
,
260 snd_pcm_uframes_t count
)
262 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
263 count
<<= rme32
->playback_frlog
;
264 pos
<<= rme32
->playback_frlog
;
265 memset_io(rme32
->iobase
+ RME32_IO_DATA_BUFFER
+ pos
, 0, count
);
269 /* copy callback for halfduplex mode */
270 static int snd_rme32_playback_copy(struct snd_pcm_substream
*substream
, int channel
, /* not used (interleaved data) */
271 snd_pcm_uframes_t pos
,
272 void __user
*src
, snd_pcm_uframes_t count
)
274 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
275 count
<<= rme32
->playback_frlog
;
276 pos
<<= rme32
->playback_frlog
;
277 if (copy_from_user_toio(rme32
->iobase
+ RME32_IO_DATA_BUFFER
+ pos
,
283 /* copy callback for halfduplex mode */
284 static int snd_rme32_capture_copy(struct snd_pcm_substream
*substream
, int channel
, /* not used (interleaved data) */
285 snd_pcm_uframes_t pos
,
286 void __user
*dst
, snd_pcm_uframes_t count
)
288 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
289 count
<<= rme32
->capture_frlog
;
290 pos
<<= rme32
->capture_frlog
;
291 if (copy_to_user_fromio(dst
,
292 rme32
->iobase
+ RME32_IO_DATA_BUFFER
+ pos
,
299 * SPDIF I/O capabilities (half-duplex mode)
301 static struct snd_pcm_hardware snd_rme32_spdif_info
= {
302 .info
= (SNDRV_PCM_INFO_MMAP_IOMEM
|
303 SNDRV_PCM_INFO_MMAP_VALID
|
304 SNDRV_PCM_INFO_INTERLEAVED
|
305 SNDRV_PCM_INFO_PAUSE
|
306 SNDRV_PCM_INFO_SYNC_START
),
307 .formats
= (SNDRV_PCM_FMTBIT_S16_LE
|
308 SNDRV_PCM_FMTBIT_S32_LE
),
309 .rates
= (SNDRV_PCM_RATE_32000
|
310 SNDRV_PCM_RATE_44100
|
311 SNDRV_PCM_RATE_48000
),
316 .buffer_bytes_max
= RME32_BUFFER_SIZE
,
317 .period_bytes_min
= RME32_BLOCK_SIZE
,
318 .period_bytes_max
= RME32_BLOCK_SIZE
,
319 .periods_min
= RME32_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
320 .periods_max
= RME32_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
325 * ADAT I/O capabilities (half-duplex mode)
327 static struct snd_pcm_hardware snd_rme32_adat_info
=
329 .info
= (SNDRV_PCM_INFO_MMAP_IOMEM
|
330 SNDRV_PCM_INFO_MMAP_VALID
|
331 SNDRV_PCM_INFO_INTERLEAVED
|
332 SNDRV_PCM_INFO_PAUSE
|
333 SNDRV_PCM_INFO_SYNC_START
),
334 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
335 .rates
= (SNDRV_PCM_RATE_44100
|
336 SNDRV_PCM_RATE_48000
),
341 .buffer_bytes_max
= RME32_BUFFER_SIZE
,
342 .period_bytes_min
= RME32_BLOCK_SIZE
,
343 .period_bytes_max
= RME32_BLOCK_SIZE
,
344 .periods_min
= RME32_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
345 .periods_max
= RME32_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
350 * SPDIF I/O capabilities (full-duplex mode)
352 static struct snd_pcm_hardware snd_rme32_spdif_fd_info
= {
353 .info
= (SNDRV_PCM_INFO_MMAP
|
354 SNDRV_PCM_INFO_MMAP_VALID
|
355 SNDRV_PCM_INFO_INTERLEAVED
|
356 SNDRV_PCM_INFO_PAUSE
|
357 SNDRV_PCM_INFO_SYNC_START
),
358 .formats
= (SNDRV_PCM_FMTBIT_S16_LE
|
359 SNDRV_PCM_FMTBIT_S32_LE
),
360 .rates
= (SNDRV_PCM_RATE_32000
|
361 SNDRV_PCM_RATE_44100
|
362 SNDRV_PCM_RATE_48000
),
367 .buffer_bytes_max
= RME32_MID_BUFFER_SIZE
,
368 .period_bytes_min
= RME32_BLOCK_SIZE
,
369 .period_bytes_max
= RME32_BLOCK_SIZE
,
371 .periods_max
= RME32_MID_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
376 * ADAT I/O capabilities (full-duplex mode)
378 static struct snd_pcm_hardware snd_rme32_adat_fd_info
=
380 .info
= (SNDRV_PCM_INFO_MMAP
|
381 SNDRV_PCM_INFO_MMAP_VALID
|
382 SNDRV_PCM_INFO_INTERLEAVED
|
383 SNDRV_PCM_INFO_PAUSE
|
384 SNDRV_PCM_INFO_SYNC_START
),
385 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
386 .rates
= (SNDRV_PCM_RATE_44100
|
387 SNDRV_PCM_RATE_48000
),
392 .buffer_bytes_max
= RME32_MID_BUFFER_SIZE
,
393 .period_bytes_min
= RME32_BLOCK_SIZE
,
394 .period_bytes_max
= RME32_BLOCK_SIZE
,
396 .periods_max
= RME32_MID_BUFFER_SIZE
/ RME32_BLOCK_SIZE
,
400 static void snd_rme32_reset_dac(struct rme32
*rme32
)
402 writel(rme32
->wcreg
| RME32_WCR_PD
,
403 rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
404 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
407 static int snd_rme32_playback_getrate(struct rme32
* rme32
)
411 rate
= ((rme32
->wcreg
>> RME32_WCR_BITPOS_FREQ_0
) & 1) +
412 (((rme32
->wcreg
>> RME32_WCR_BITPOS_FREQ_1
) & 1) << 1);
426 return (rme32
->wcreg
& RME32_WCR_DS_BM
) ? rate
<< 1 : rate
;
429 static int snd_rme32_capture_getrate(struct rme32
* rme32
, int *is_adat
)
434 if (rme32
->rcreg
& RME32_RCR_LOCK
) {
438 if (rme32
->rcreg
& RME32_RCR_ERF
) {
443 n
= ((rme32
->rcreg
>> RME32_RCR_BITPOS_F0
) & 1) +
444 (((rme32
->rcreg
>> RME32_RCR_BITPOS_F1
) & 1) << 1) +
445 (((rme32
->rcreg
>> RME32_RCR_BITPOS_F2
) & 1) << 2);
447 if (RME32_PRO_WITH_8414(rme32
))
448 switch (n
) { /* supporting the CS8414 */
468 switch (n
) { /* supporting the CS8412 */
491 static int snd_rme32_playback_setrate(struct rme32
* rme32
, int rate
)
495 ds
= rme32
->wcreg
& RME32_WCR_DS_BM
;
498 rme32
->wcreg
&= ~RME32_WCR_DS_BM
;
499 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) &
503 rme32
->wcreg
&= ~RME32_WCR_DS_BM
;
504 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_1
) &
508 rme32
->wcreg
&= ~RME32_WCR_DS_BM
;
509 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) |
513 if (rme32
->pci
->device
!= PCI_DEVICE_ID_RME_DIGI32_PRO
)
515 rme32
->wcreg
|= RME32_WCR_DS_BM
;
516 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) &
520 if (rme32
->pci
->device
!= PCI_DEVICE_ID_RME_DIGI32_PRO
)
522 rme32
->wcreg
|= RME32_WCR_DS_BM
;
523 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_1
) &
527 if (rme32
->pci
->device
!= PCI_DEVICE_ID_RME_DIGI32_PRO
)
529 rme32
->wcreg
|= RME32_WCR_DS_BM
;
530 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) |
536 if ((!ds
&& rme32
->wcreg
& RME32_WCR_DS_BM
) ||
537 (ds
&& !(rme32
->wcreg
& RME32_WCR_DS_BM
)))
539 /* change to/from double-speed: reset the DAC (if available) */
540 snd_rme32_reset_dac(rme32
);
542 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
547 static int snd_rme32_setclockmode(struct rme32
* rme32
, int mode
)
550 case RME32_CLOCKMODE_SLAVE
:
552 rme32
->wcreg
= (rme32
->wcreg
& ~RME32_WCR_FREQ_0
) &
555 case RME32_CLOCKMODE_MASTER_32
:
556 /* Internal 32.0kHz */
557 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) &
560 case RME32_CLOCKMODE_MASTER_44
:
561 /* Internal 44.1kHz */
562 rme32
->wcreg
= (rme32
->wcreg
& ~RME32_WCR_FREQ_0
) |
565 case RME32_CLOCKMODE_MASTER_48
:
566 /* Internal 48.0kHz */
567 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_FREQ_0
) |
573 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
577 static int snd_rme32_getclockmode(struct rme32
* rme32
)
579 return ((rme32
->wcreg
>> RME32_WCR_BITPOS_FREQ_0
) & 1) +
580 (((rme32
->wcreg
>> RME32_WCR_BITPOS_FREQ_1
) & 1) << 1);
583 static int snd_rme32_setinputtype(struct rme32
* rme32
, int type
)
586 case RME32_INPUT_OPTICAL
:
587 rme32
->wcreg
= (rme32
->wcreg
& ~RME32_WCR_INP_0
) &
590 case RME32_INPUT_COAXIAL
:
591 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_INP_0
) &
594 case RME32_INPUT_INTERNAL
:
595 rme32
->wcreg
= (rme32
->wcreg
& ~RME32_WCR_INP_0
) |
598 case RME32_INPUT_XLR
:
599 rme32
->wcreg
= (rme32
->wcreg
| RME32_WCR_INP_0
) |
605 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
609 static int snd_rme32_getinputtype(struct rme32
* rme32
)
611 return ((rme32
->wcreg
>> RME32_WCR_BITPOS_INP_0
) & 1) +
612 (((rme32
->wcreg
>> RME32_WCR_BITPOS_INP_1
) & 1) << 1);
616 snd_rme32_setframelog(struct rme32
* rme32
, int n_channels
, int is_playback
)
620 if (n_channels
== 2) {
623 /* assume 8 channels */
627 frlog
+= (rme32
->wcreg
& RME32_WCR_MODE24
) ? 2 : 1;
628 rme32
->playback_frlog
= frlog
;
630 frlog
+= (rme32
->wcreg
& RME32_WCR_MODE24
) ? 2 : 1;
631 rme32
->capture_frlog
= frlog
;
635 static int snd_rme32_setformat(struct rme32
* rme32
, int format
)
638 case SNDRV_PCM_FORMAT_S16_LE
:
639 rme32
->wcreg
&= ~RME32_WCR_MODE24
;
641 case SNDRV_PCM_FORMAT_S32_LE
:
642 rme32
->wcreg
|= RME32_WCR_MODE24
;
647 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
652 snd_rme32_playback_hw_params(struct snd_pcm_substream
*substream
,
653 struct snd_pcm_hw_params
*params
)
655 int err
, rate
, dummy
;
656 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
657 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
659 if (rme32
->fullduplex_mode
) {
660 err
= snd_pcm_lib_malloc_pages(substream
, params_buffer_bytes(params
));
664 runtime
->dma_area
= (void __force
*)(rme32
->iobase
+
665 RME32_IO_DATA_BUFFER
);
666 runtime
->dma_addr
= rme32
->port
+ RME32_IO_DATA_BUFFER
;
667 runtime
->dma_bytes
= RME32_BUFFER_SIZE
;
670 spin_lock_irq(&rme32
->lock
);
671 if ((rme32
->rcreg
& RME32_RCR_KMODE
) &&
672 (rate
= snd_rme32_capture_getrate(rme32
, &dummy
)) > 0) {
674 if ((int)params_rate(params
) != rate
) {
675 spin_unlock_irq(&rme32
->lock
);
678 } else if ((err
= snd_rme32_playback_setrate(rme32
, params_rate(params
))) < 0) {
679 spin_unlock_irq(&rme32
->lock
);
682 if ((err
= snd_rme32_setformat(rme32
, params_format(params
))) < 0) {
683 spin_unlock_irq(&rme32
->lock
);
687 snd_rme32_setframelog(rme32
, params_channels(params
), 1);
688 if (rme32
->capture_periodsize
!= 0) {
689 if (params_period_size(params
) << rme32
->playback_frlog
!= rme32
->capture_periodsize
) {
690 spin_unlock_irq(&rme32
->lock
);
694 rme32
->playback_periodsize
= params_period_size(params
) << rme32
->playback_frlog
;
696 if ((rme32
->wcreg
& RME32_WCR_ADAT
) == 0) {
697 rme32
->wcreg
&= ~(RME32_WCR_PRO
| RME32_WCR_EMP
);
698 rme32
->wcreg
|= rme32
->wcreg_spdif_stream
;
699 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
701 spin_unlock_irq(&rme32
->lock
);
707 snd_rme32_capture_hw_params(struct snd_pcm_substream
*substream
,
708 struct snd_pcm_hw_params
*params
)
710 int err
, isadat
, rate
;
711 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
712 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
714 if (rme32
->fullduplex_mode
) {
715 err
= snd_pcm_lib_malloc_pages(substream
, params_buffer_bytes(params
));
719 runtime
->dma_area
= (void __force
*)rme32
->iobase
+
720 RME32_IO_DATA_BUFFER
;
721 runtime
->dma_addr
= rme32
->port
+ RME32_IO_DATA_BUFFER
;
722 runtime
->dma_bytes
= RME32_BUFFER_SIZE
;
725 spin_lock_irq(&rme32
->lock
);
726 /* enable AutoSync for record-preparing */
727 rme32
->wcreg
|= RME32_WCR_AUTOSYNC
;
728 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
730 if ((err
= snd_rme32_setformat(rme32
, params_format(params
))) < 0) {
731 spin_unlock_irq(&rme32
->lock
);
734 if ((err
= snd_rme32_playback_setrate(rme32
, params_rate(params
))) < 0) {
735 spin_unlock_irq(&rme32
->lock
);
738 if ((rate
= snd_rme32_capture_getrate(rme32
, &isadat
)) > 0) {
739 if ((int)params_rate(params
) != rate
) {
740 spin_unlock_irq(&rme32
->lock
);
743 if ((isadat
&& runtime
->hw
.channels_min
== 2) ||
744 (!isadat
&& runtime
->hw
.channels_min
== 8)) {
745 spin_unlock_irq(&rme32
->lock
);
749 /* AutoSync off for recording */
750 rme32
->wcreg
&= ~RME32_WCR_AUTOSYNC
;
751 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
753 snd_rme32_setframelog(rme32
, params_channels(params
), 0);
754 if (rme32
->playback_periodsize
!= 0) {
755 if (params_period_size(params
) << rme32
->capture_frlog
!=
756 rme32
->playback_periodsize
) {
757 spin_unlock_irq(&rme32
->lock
);
761 rme32
->capture_periodsize
=
762 params_period_size(params
) << rme32
->capture_frlog
;
763 spin_unlock_irq(&rme32
->lock
);
768 static int snd_rme32_pcm_hw_free(struct snd_pcm_substream
*substream
)
770 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
771 if (! rme32
->fullduplex_mode
)
773 return snd_pcm_lib_free_pages(substream
);
776 static void snd_rme32_pcm_start(struct rme32
* rme32
, int from_pause
)
779 writel(0, rme32
->iobase
+ RME32_IO_RESET_POS
);
782 rme32
->wcreg
|= RME32_WCR_START
;
783 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
786 static void snd_rme32_pcm_stop(struct rme32
* rme32
, int to_pause
)
789 * Check if there is an unconfirmed IRQ, if so confirm it, or else
790 * the hardware will not stop generating interrupts
792 rme32
->rcreg
= readl(rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
793 if (rme32
->rcreg
& RME32_RCR_IRQ
) {
794 writel(0, rme32
->iobase
+ RME32_IO_CONFIRM_ACTION_IRQ
);
796 rme32
->wcreg
&= ~RME32_WCR_START
;
797 if (rme32
->wcreg
& RME32_WCR_SEL
)
798 rme32
->wcreg
|= RME32_WCR_MUTE
;
799 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
801 writel(0, rme32
->iobase
+ RME32_IO_RESET_POS
);
804 static irqreturn_t
snd_rme32_interrupt(int irq
, void *dev_id
)
806 struct rme32
*rme32
= (struct rme32
*) dev_id
;
808 rme32
->rcreg
= readl(rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
809 if (!(rme32
->rcreg
& RME32_RCR_IRQ
)) {
812 if (rme32
->capture_substream
) {
813 snd_pcm_period_elapsed(rme32
->capture_substream
);
815 if (rme32
->playback_substream
) {
816 snd_pcm_period_elapsed(rme32
->playback_substream
);
818 writel(0, rme32
->iobase
+ RME32_IO_CONFIRM_ACTION_IRQ
);
823 static unsigned int period_bytes
[] = { RME32_BLOCK_SIZE
};
826 static struct snd_pcm_hw_constraint_list hw_constraints_period_bytes
= {
827 .count
= ARRAY_SIZE(period_bytes
),
828 .list
= period_bytes
,
832 static void snd_rme32_set_buffer_constraint(struct rme32
*rme32
, struct snd_pcm_runtime
*runtime
)
834 if (! rme32
->fullduplex_mode
) {
835 snd_pcm_hw_constraint_minmax(runtime
,
836 SNDRV_PCM_HW_PARAM_BUFFER_BYTES
,
837 RME32_BUFFER_SIZE
, RME32_BUFFER_SIZE
);
838 snd_pcm_hw_constraint_list(runtime
, 0,
839 SNDRV_PCM_HW_PARAM_PERIOD_BYTES
,
840 &hw_constraints_period_bytes
);
844 static int snd_rme32_playback_spdif_open(struct snd_pcm_substream
*substream
)
847 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
848 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
850 snd_pcm_set_sync(substream
);
852 spin_lock_irq(&rme32
->lock
);
853 if (rme32
->playback_substream
!= NULL
) {
854 spin_unlock_irq(&rme32
->lock
);
857 rme32
->wcreg
&= ~RME32_WCR_ADAT
;
858 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
859 rme32
->playback_substream
= substream
;
860 spin_unlock_irq(&rme32
->lock
);
862 if (rme32
->fullduplex_mode
)
863 runtime
->hw
= snd_rme32_spdif_fd_info
;
865 runtime
->hw
= snd_rme32_spdif_info
;
866 if (rme32
->pci
->device
== PCI_DEVICE_ID_RME_DIGI32_PRO
) {
867 runtime
->hw
.rates
|= SNDRV_PCM_RATE_64000
| SNDRV_PCM_RATE_88200
| SNDRV_PCM_RATE_96000
;
868 runtime
->hw
.rate_max
= 96000;
870 if ((rme32
->rcreg
& RME32_RCR_KMODE
) &&
871 (rate
= snd_rme32_capture_getrate(rme32
, &dummy
)) > 0) {
873 runtime
->hw
.rates
= snd_pcm_rate_to_rate_bit(rate
);
874 runtime
->hw
.rate_min
= rate
;
875 runtime
->hw
.rate_max
= rate
;
878 snd_rme32_set_buffer_constraint(rme32
, runtime
);
880 rme32
->wcreg_spdif_stream
= rme32
->wcreg_spdif
;
881 rme32
->spdif_ctl
->vd
[0].access
&= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
882 snd_ctl_notify(rme32
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
883 SNDRV_CTL_EVENT_MASK_INFO
, &rme32
->spdif_ctl
->id
);
887 static int snd_rme32_capture_spdif_open(struct snd_pcm_substream
*substream
)
890 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
891 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
893 snd_pcm_set_sync(substream
);
895 spin_lock_irq(&rme32
->lock
);
896 if (rme32
->capture_substream
!= NULL
) {
897 spin_unlock_irq(&rme32
->lock
);
900 rme32
->capture_substream
= substream
;
901 spin_unlock_irq(&rme32
->lock
);
903 if (rme32
->fullduplex_mode
)
904 runtime
->hw
= snd_rme32_spdif_fd_info
;
906 runtime
->hw
= snd_rme32_spdif_info
;
907 if (RME32_PRO_WITH_8414(rme32
)) {
908 runtime
->hw
.rates
|= SNDRV_PCM_RATE_88200
| SNDRV_PCM_RATE_96000
;
909 runtime
->hw
.rate_max
= 96000;
911 if ((rate
= snd_rme32_capture_getrate(rme32
, &isadat
)) > 0) {
915 runtime
->hw
.rates
= snd_pcm_rate_to_rate_bit(rate
);
916 runtime
->hw
.rate_min
= rate
;
917 runtime
->hw
.rate_max
= rate
;
920 snd_rme32_set_buffer_constraint(rme32
, runtime
);
926 snd_rme32_playback_adat_open(struct snd_pcm_substream
*substream
)
929 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
930 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
932 snd_pcm_set_sync(substream
);
934 spin_lock_irq(&rme32
->lock
);
935 if (rme32
->playback_substream
!= NULL
) {
936 spin_unlock_irq(&rme32
->lock
);
939 rme32
->wcreg
|= RME32_WCR_ADAT
;
940 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
941 rme32
->playback_substream
= substream
;
942 spin_unlock_irq(&rme32
->lock
);
944 if (rme32
->fullduplex_mode
)
945 runtime
->hw
= snd_rme32_adat_fd_info
;
947 runtime
->hw
= snd_rme32_adat_info
;
948 if ((rme32
->rcreg
& RME32_RCR_KMODE
) &&
949 (rate
= snd_rme32_capture_getrate(rme32
, &dummy
)) > 0) {
951 runtime
->hw
.rates
= snd_pcm_rate_to_rate_bit(rate
);
952 runtime
->hw
.rate_min
= rate
;
953 runtime
->hw
.rate_max
= rate
;
956 snd_rme32_set_buffer_constraint(rme32
, runtime
);
961 snd_rme32_capture_adat_open(struct snd_pcm_substream
*substream
)
964 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
965 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
967 if (rme32
->fullduplex_mode
)
968 runtime
->hw
= snd_rme32_adat_fd_info
;
970 runtime
->hw
= snd_rme32_adat_info
;
971 if ((rate
= snd_rme32_capture_getrate(rme32
, &isadat
)) > 0) {
975 runtime
->hw
.rates
= snd_pcm_rate_to_rate_bit(rate
);
976 runtime
->hw
.rate_min
= rate
;
977 runtime
->hw
.rate_max
= rate
;
980 snd_pcm_set_sync(substream
);
982 spin_lock_irq(&rme32
->lock
);
983 if (rme32
->capture_substream
!= NULL
) {
984 spin_unlock_irq(&rme32
->lock
);
987 rme32
->capture_substream
= substream
;
988 spin_unlock_irq(&rme32
->lock
);
990 snd_rme32_set_buffer_constraint(rme32
, runtime
);
994 static int snd_rme32_playback_close(struct snd_pcm_substream
*substream
)
996 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
999 spin_lock_irq(&rme32
->lock
);
1000 rme32
->playback_substream
= NULL
;
1001 rme32
->playback_periodsize
= 0;
1002 spdif
= (rme32
->wcreg
& RME32_WCR_ADAT
) == 0;
1003 spin_unlock_irq(&rme32
->lock
);
1005 rme32
->spdif_ctl
->vd
[0].access
|= SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
1006 snd_ctl_notify(rme32
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
1007 SNDRV_CTL_EVENT_MASK_INFO
,
1008 &rme32
->spdif_ctl
->id
);
1013 static int snd_rme32_capture_close(struct snd_pcm_substream
*substream
)
1015 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1017 spin_lock_irq(&rme32
->lock
);
1018 rme32
->capture_substream
= NULL
;
1019 rme32
->capture_periodsize
= 0;
1020 spin_unlock(&rme32
->lock
);
1024 static int snd_rme32_playback_prepare(struct snd_pcm_substream
*substream
)
1026 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1028 spin_lock_irq(&rme32
->lock
);
1029 if (rme32
->fullduplex_mode
) {
1030 memset(&rme32
->playback_pcm
, 0, sizeof(rme32
->playback_pcm
));
1031 rme32
->playback_pcm
.hw_buffer_size
= RME32_BUFFER_SIZE
;
1032 rme32
->playback_pcm
.sw_buffer_size
= snd_pcm_lib_buffer_bytes(substream
);
1034 writel(0, rme32
->iobase
+ RME32_IO_RESET_POS
);
1036 if (rme32
->wcreg
& RME32_WCR_SEL
)
1037 rme32
->wcreg
&= ~RME32_WCR_MUTE
;
1038 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
1039 spin_unlock_irq(&rme32
->lock
);
1043 static int snd_rme32_capture_prepare(struct snd_pcm_substream
*substream
)
1045 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1047 spin_lock_irq(&rme32
->lock
);
1048 if (rme32
->fullduplex_mode
) {
1049 memset(&rme32
->capture_pcm
, 0, sizeof(rme32
->capture_pcm
));
1050 rme32
->capture_pcm
.hw_buffer_size
= RME32_BUFFER_SIZE
;
1051 rme32
->capture_pcm
.hw_queue_size
= RME32_BUFFER_SIZE
/ 2;
1052 rme32
->capture_pcm
.sw_buffer_size
= snd_pcm_lib_buffer_bytes(substream
);
1054 writel(0, rme32
->iobase
+ RME32_IO_RESET_POS
);
1056 spin_unlock_irq(&rme32
->lock
);
1061 snd_rme32_pcm_trigger(struct snd_pcm_substream
*substream
, int cmd
)
1063 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1064 struct snd_pcm_substream
*s
;
1066 spin_lock(&rme32
->lock
);
1067 snd_pcm_group_for_each_entry(s
, substream
) {
1068 if (s
!= rme32
->playback_substream
&&
1069 s
!= rme32
->capture_substream
)
1072 case SNDRV_PCM_TRIGGER_START
:
1073 rme32
->running
|= (1 << s
->stream
);
1074 if (rme32
->fullduplex_mode
) {
1075 /* remember the current DMA position */
1076 if (s
== rme32
->playback_substream
) {
1077 rme32
->playback_pcm
.hw_io
=
1078 rme32
->playback_pcm
.hw_data
= snd_rme32_pcm_byteptr(rme32
);
1080 rme32
->capture_pcm
.hw_io
=
1081 rme32
->capture_pcm
.hw_data
= snd_rme32_pcm_byteptr(rme32
);
1085 case SNDRV_PCM_TRIGGER_STOP
:
1086 rme32
->running
&= ~(1 << s
->stream
);
1089 snd_pcm_trigger_done(s
, substream
);
1092 /* prefill playback buffer */
1093 if (cmd
== SNDRV_PCM_TRIGGER_START
&& rme32
->fullduplex_mode
) {
1094 snd_pcm_group_for_each_entry(s
, substream
) {
1095 if (s
== rme32
->playback_substream
) {
1103 case SNDRV_PCM_TRIGGER_START
:
1104 if (rme32
->running
&& ! RME32_ISWORKING(rme32
))
1105 snd_rme32_pcm_start(rme32
, 0);
1107 case SNDRV_PCM_TRIGGER_STOP
:
1108 if (! rme32
->running
&& RME32_ISWORKING(rme32
))
1109 snd_rme32_pcm_stop(rme32
, 0);
1111 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
1112 if (rme32
->running
&& RME32_ISWORKING(rme32
))
1113 snd_rme32_pcm_stop(rme32
, 1);
1115 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
1116 if (rme32
->running
&& ! RME32_ISWORKING(rme32
))
1117 snd_rme32_pcm_start(rme32
, 1);
1120 spin_unlock(&rme32
->lock
);
1124 /* pointer callback for halfduplex mode */
1125 static snd_pcm_uframes_t
1126 snd_rme32_playback_pointer(struct snd_pcm_substream
*substream
)
1128 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1129 return snd_rme32_pcm_byteptr(rme32
) >> rme32
->playback_frlog
;
1132 static snd_pcm_uframes_t
1133 snd_rme32_capture_pointer(struct snd_pcm_substream
*substream
)
1135 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1136 return snd_rme32_pcm_byteptr(rme32
) >> rme32
->capture_frlog
;
1140 /* ack and pointer callbacks for fullduplex mode */
1141 static void snd_rme32_pb_trans_copy(struct snd_pcm_substream
*substream
,
1142 struct snd_pcm_indirect
*rec
, size_t bytes
)
1144 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1145 memcpy_toio(rme32
->iobase
+ RME32_IO_DATA_BUFFER
+ rec
->hw_data
,
1146 substream
->runtime
->dma_area
+ rec
->sw_data
, bytes
);
1149 static int snd_rme32_playback_fd_ack(struct snd_pcm_substream
*substream
)
1151 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1152 struct snd_pcm_indirect
*rec
, *cprec
;
1154 rec
= &rme32
->playback_pcm
;
1155 cprec
= &rme32
->capture_pcm
;
1156 spin_lock(&rme32
->lock
);
1157 rec
->hw_queue_size
= RME32_BUFFER_SIZE
;
1158 if (rme32
->running
& (1 << SNDRV_PCM_STREAM_CAPTURE
))
1159 rec
->hw_queue_size
-= cprec
->hw_ready
;
1160 spin_unlock(&rme32
->lock
);
1161 snd_pcm_indirect_playback_transfer(substream
, rec
,
1162 snd_rme32_pb_trans_copy
);
1166 static void snd_rme32_cp_trans_copy(struct snd_pcm_substream
*substream
,
1167 struct snd_pcm_indirect
*rec
, size_t bytes
)
1169 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1170 memcpy_fromio(substream
->runtime
->dma_area
+ rec
->sw_data
,
1171 rme32
->iobase
+ RME32_IO_DATA_BUFFER
+ rec
->hw_data
,
1175 static int snd_rme32_capture_fd_ack(struct snd_pcm_substream
*substream
)
1177 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1178 snd_pcm_indirect_capture_transfer(substream
, &rme32
->capture_pcm
,
1179 snd_rme32_cp_trans_copy
);
1183 static snd_pcm_uframes_t
1184 snd_rme32_playback_fd_pointer(struct snd_pcm_substream
*substream
)
1186 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1187 return snd_pcm_indirect_playback_pointer(substream
, &rme32
->playback_pcm
,
1188 snd_rme32_pcm_byteptr(rme32
));
1191 static snd_pcm_uframes_t
1192 snd_rme32_capture_fd_pointer(struct snd_pcm_substream
*substream
)
1194 struct rme32
*rme32
= snd_pcm_substream_chip(substream
);
1195 return snd_pcm_indirect_capture_pointer(substream
, &rme32
->capture_pcm
,
1196 snd_rme32_pcm_byteptr(rme32
));
1199 /* for halfduplex mode */
1200 static struct snd_pcm_ops snd_rme32_playback_spdif_ops
= {
1201 .open
= snd_rme32_playback_spdif_open
,
1202 .close
= snd_rme32_playback_close
,
1203 .ioctl
= snd_pcm_lib_ioctl
,
1204 .hw_params
= snd_rme32_playback_hw_params
,
1205 .hw_free
= snd_rme32_pcm_hw_free
,
1206 .prepare
= snd_rme32_playback_prepare
,
1207 .trigger
= snd_rme32_pcm_trigger
,
1208 .pointer
= snd_rme32_playback_pointer
,
1209 .copy
= snd_rme32_playback_copy
,
1210 .silence
= snd_rme32_playback_silence
,
1211 .mmap
= snd_pcm_lib_mmap_iomem
,
1214 static struct snd_pcm_ops snd_rme32_capture_spdif_ops
= {
1215 .open
= snd_rme32_capture_spdif_open
,
1216 .close
= snd_rme32_capture_close
,
1217 .ioctl
= snd_pcm_lib_ioctl
,
1218 .hw_params
= snd_rme32_capture_hw_params
,
1219 .hw_free
= snd_rme32_pcm_hw_free
,
1220 .prepare
= snd_rme32_capture_prepare
,
1221 .trigger
= snd_rme32_pcm_trigger
,
1222 .pointer
= snd_rme32_capture_pointer
,
1223 .copy
= snd_rme32_capture_copy
,
1224 .mmap
= snd_pcm_lib_mmap_iomem
,
1227 static struct snd_pcm_ops snd_rme32_playback_adat_ops
= {
1228 .open
= snd_rme32_playback_adat_open
,
1229 .close
= snd_rme32_playback_close
,
1230 .ioctl
= snd_pcm_lib_ioctl
,
1231 .hw_params
= snd_rme32_playback_hw_params
,
1232 .prepare
= snd_rme32_playback_prepare
,
1233 .trigger
= snd_rme32_pcm_trigger
,
1234 .pointer
= snd_rme32_playback_pointer
,
1235 .copy
= snd_rme32_playback_copy
,
1236 .silence
= snd_rme32_playback_silence
,
1237 .mmap
= snd_pcm_lib_mmap_iomem
,
1240 static struct snd_pcm_ops snd_rme32_capture_adat_ops
= {
1241 .open
= snd_rme32_capture_adat_open
,
1242 .close
= snd_rme32_capture_close
,
1243 .ioctl
= snd_pcm_lib_ioctl
,
1244 .hw_params
= snd_rme32_capture_hw_params
,
1245 .prepare
= snd_rme32_capture_prepare
,
1246 .trigger
= snd_rme32_pcm_trigger
,
1247 .pointer
= snd_rme32_capture_pointer
,
1248 .copy
= snd_rme32_capture_copy
,
1249 .mmap
= snd_pcm_lib_mmap_iomem
,
1252 /* for fullduplex mode */
1253 static struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops
= {
1254 .open
= snd_rme32_playback_spdif_open
,
1255 .close
= snd_rme32_playback_close
,
1256 .ioctl
= snd_pcm_lib_ioctl
,
1257 .hw_params
= snd_rme32_playback_hw_params
,
1258 .hw_free
= snd_rme32_pcm_hw_free
,
1259 .prepare
= snd_rme32_playback_prepare
,
1260 .trigger
= snd_rme32_pcm_trigger
,
1261 .pointer
= snd_rme32_playback_fd_pointer
,
1262 .ack
= snd_rme32_playback_fd_ack
,
1265 static struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops
= {
1266 .open
= snd_rme32_capture_spdif_open
,
1267 .close
= snd_rme32_capture_close
,
1268 .ioctl
= snd_pcm_lib_ioctl
,
1269 .hw_params
= snd_rme32_capture_hw_params
,
1270 .hw_free
= snd_rme32_pcm_hw_free
,
1271 .prepare
= snd_rme32_capture_prepare
,
1272 .trigger
= snd_rme32_pcm_trigger
,
1273 .pointer
= snd_rme32_capture_fd_pointer
,
1274 .ack
= snd_rme32_capture_fd_ack
,
1277 static struct snd_pcm_ops snd_rme32_playback_adat_fd_ops
= {
1278 .open
= snd_rme32_playback_adat_open
,
1279 .close
= snd_rme32_playback_close
,
1280 .ioctl
= snd_pcm_lib_ioctl
,
1281 .hw_params
= snd_rme32_playback_hw_params
,
1282 .prepare
= snd_rme32_playback_prepare
,
1283 .trigger
= snd_rme32_pcm_trigger
,
1284 .pointer
= snd_rme32_playback_fd_pointer
,
1285 .ack
= snd_rme32_playback_fd_ack
,
1288 static struct snd_pcm_ops snd_rme32_capture_adat_fd_ops
= {
1289 .open
= snd_rme32_capture_adat_open
,
1290 .close
= snd_rme32_capture_close
,
1291 .ioctl
= snd_pcm_lib_ioctl
,
1292 .hw_params
= snd_rme32_capture_hw_params
,
1293 .prepare
= snd_rme32_capture_prepare
,
1294 .trigger
= snd_rme32_pcm_trigger
,
1295 .pointer
= snd_rme32_capture_fd_pointer
,
1296 .ack
= snd_rme32_capture_fd_ack
,
1299 static void snd_rme32_free(void *private_data
)
1301 struct rme32
*rme32
= (struct rme32
*) private_data
;
1303 if (rme32
== NULL
) {
1306 if (rme32
->irq
>= 0) {
1307 snd_rme32_pcm_stop(rme32
, 0);
1308 free_irq(rme32
->irq
, (void *) rme32
);
1311 if (rme32
->iobase
) {
1312 iounmap(rme32
->iobase
);
1313 rme32
->iobase
= NULL
;
1316 pci_release_regions(rme32
->pci
);
1319 pci_disable_device(rme32
->pci
);
1322 static void snd_rme32_free_spdif_pcm(struct snd_pcm
*pcm
)
1324 struct rme32
*rme32
= (struct rme32
*) pcm
->private_data
;
1325 rme32
->spdif_pcm
= NULL
;
1329 snd_rme32_free_adat_pcm(struct snd_pcm
*pcm
)
1331 struct rme32
*rme32
= (struct rme32
*) pcm
->private_data
;
1332 rme32
->adat_pcm
= NULL
;
1335 static int __devinit
snd_rme32_create(struct rme32
* rme32
)
1337 struct pci_dev
*pci
= rme32
->pci
;
1341 spin_lock_init(&rme32
->lock
);
1343 if ((err
= pci_enable_device(pci
)) < 0)
1346 if ((err
= pci_request_regions(pci
, "RME32")) < 0)
1348 rme32
->port
= pci_resource_start(rme32
->pci
, 0);
1350 rme32
->iobase
= ioremap_nocache(rme32
->port
, RME32_IO_SIZE
);
1351 if (!rme32
->iobase
) {
1352 snd_printk(KERN_ERR
"unable to remap memory region 0x%lx-0x%lx\n",
1353 rme32
->port
, rme32
->port
+ RME32_IO_SIZE
- 1);
1357 if (request_irq(pci
->irq
, snd_rme32_interrupt
, IRQF_SHARED
,
1358 KBUILD_MODNAME
, rme32
)) {
1359 snd_printk(KERN_ERR
"unable to grab IRQ %d\n", pci
->irq
);
1362 rme32
->irq
= pci
->irq
;
1364 /* read the card's revision number */
1365 pci_read_config_byte(pci
, 8, &rme32
->rev
);
1367 /* set up ALSA pcm device for S/PDIF */
1368 if ((err
= snd_pcm_new(rme32
->card
, "Digi32 IEC958", 0, 1, 1, &rme32
->spdif_pcm
)) < 0) {
1371 rme32
->spdif_pcm
->private_data
= rme32
;
1372 rme32
->spdif_pcm
->private_free
= snd_rme32_free_spdif_pcm
;
1373 strcpy(rme32
->spdif_pcm
->name
, "Digi32 IEC958");
1374 if (rme32
->fullduplex_mode
) {
1375 snd_pcm_set_ops(rme32
->spdif_pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
1376 &snd_rme32_playback_spdif_fd_ops
);
1377 snd_pcm_set_ops(rme32
->spdif_pcm
, SNDRV_PCM_STREAM_CAPTURE
,
1378 &snd_rme32_capture_spdif_fd_ops
);
1379 snd_pcm_lib_preallocate_pages_for_all(rme32
->spdif_pcm
, SNDRV_DMA_TYPE_CONTINUOUS
,
1380 snd_dma_continuous_data(GFP_KERNEL
),
1381 0, RME32_MID_BUFFER_SIZE
);
1382 rme32
->spdif_pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
1384 snd_pcm_set_ops(rme32
->spdif_pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
1385 &snd_rme32_playback_spdif_ops
);
1386 snd_pcm_set_ops(rme32
->spdif_pcm
, SNDRV_PCM_STREAM_CAPTURE
,
1387 &snd_rme32_capture_spdif_ops
);
1388 rme32
->spdif_pcm
->info_flags
= SNDRV_PCM_INFO_HALF_DUPLEX
;
1391 /* set up ALSA pcm device for ADAT */
1392 if ((pci
->device
== PCI_DEVICE_ID_RME_DIGI32
) ||
1393 (pci
->device
== PCI_DEVICE_ID_RME_DIGI32_PRO
)) {
1394 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1395 rme32
->adat_pcm
= NULL
;
1398 if ((err
= snd_pcm_new(rme32
->card
, "Digi32 ADAT", 1,
1399 1, 1, &rme32
->adat_pcm
)) < 0)
1403 rme32
->adat_pcm
->private_data
= rme32
;
1404 rme32
->adat_pcm
->private_free
= snd_rme32_free_adat_pcm
;
1405 strcpy(rme32
->adat_pcm
->name
, "Digi32 ADAT");
1406 if (rme32
->fullduplex_mode
) {
1407 snd_pcm_set_ops(rme32
->adat_pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
1408 &snd_rme32_playback_adat_fd_ops
);
1409 snd_pcm_set_ops(rme32
->adat_pcm
, SNDRV_PCM_STREAM_CAPTURE
,
1410 &snd_rme32_capture_adat_fd_ops
);
1411 snd_pcm_lib_preallocate_pages_for_all(rme32
->adat_pcm
, SNDRV_DMA_TYPE_CONTINUOUS
,
1412 snd_dma_continuous_data(GFP_KERNEL
),
1413 0, RME32_MID_BUFFER_SIZE
);
1414 rme32
->adat_pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
1416 snd_pcm_set_ops(rme32
->adat_pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
1417 &snd_rme32_playback_adat_ops
);
1418 snd_pcm_set_ops(rme32
->adat_pcm
, SNDRV_PCM_STREAM_CAPTURE
,
1419 &snd_rme32_capture_adat_ops
);
1420 rme32
->adat_pcm
->info_flags
= SNDRV_PCM_INFO_HALF_DUPLEX
;
1425 rme32
->playback_periodsize
= 0;
1426 rme32
->capture_periodsize
= 0;
1428 /* make sure playback/capture is stopped, if by some reason active */
1429 snd_rme32_pcm_stop(rme32
, 0);
1432 snd_rme32_reset_dac(rme32
);
1434 /* reset buffer pointer */
1435 writel(0, rme32
->iobase
+ RME32_IO_RESET_POS
);
1437 /* set default values in registers */
1438 rme32
->wcreg
= RME32_WCR_SEL
| /* normal playback */
1439 RME32_WCR_INP_0
| /* input select */
1440 RME32_WCR_MUTE
; /* muting on */
1441 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
1444 /* init switch interface */
1445 if ((err
= snd_rme32_create_switches(rme32
->card
, rme32
)) < 0) {
1449 /* init proc interface */
1450 snd_rme32_proc_init(rme32
);
1452 rme32
->capture_substream
= NULL
;
1453 rme32
->playback_substream
= NULL
;
1463 snd_rme32_proc_read(struct snd_info_entry
* entry
, struct snd_info_buffer
*buffer
)
1466 struct rme32
*rme32
= (struct rme32
*) entry
->private_data
;
1468 rme32
->rcreg
= readl(rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
1470 snd_iprintf(buffer
, rme32
->card
->longname
);
1471 snd_iprintf(buffer
, " (index #%d)\n", rme32
->card
->number
+ 1);
1473 snd_iprintf(buffer
, "\nGeneral settings\n");
1474 if (rme32
->fullduplex_mode
)
1475 snd_iprintf(buffer
, " Full-duplex mode\n");
1477 snd_iprintf(buffer
, " Half-duplex mode\n");
1478 if (RME32_PRO_WITH_8414(rme32
)) {
1479 snd_iprintf(buffer
, " receiver: CS8414\n");
1481 snd_iprintf(buffer
, " receiver: CS8412\n");
1483 if (rme32
->wcreg
& RME32_WCR_MODE24
) {
1484 snd_iprintf(buffer
, " format: 24 bit");
1486 snd_iprintf(buffer
, " format: 16 bit");
1488 if (rme32
->wcreg
& RME32_WCR_MONO
) {
1489 snd_iprintf(buffer
, ", Mono\n");
1491 snd_iprintf(buffer
, ", Stereo\n");
1494 snd_iprintf(buffer
, "\nInput settings\n");
1495 switch (snd_rme32_getinputtype(rme32
)) {
1496 case RME32_INPUT_OPTICAL
:
1497 snd_iprintf(buffer
, " input: optical");
1499 case RME32_INPUT_COAXIAL
:
1500 snd_iprintf(buffer
, " input: coaxial");
1502 case RME32_INPUT_INTERNAL
:
1503 snd_iprintf(buffer
, " input: internal");
1505 case RME32_INPUT_XLR
:
1506 snd_iprintf(buffer
, " input: XLR");
1509 if (snd_rme32_capture_getrate(rme32
, &n
) < 0) {
1510 snd_iprintf(buffer
, "\n sample rate: no valid signal\n");
1513 snd_iprintf(buffer
, " (8 channels)\n");
1515 snd_iprintf(buffer
, " (2 channels)\n");
1517 snd_iprintf(buffer
, " sample rate: %d Hz\n",
1518 snd_rme32_capture_getrate(rme32
, &n
));
1521 snd_iprintf(buffer
, "\nOutput settings\n");
1522 if (rme32
->wcreg
& RME32_WCR_SEL
) {
1523 snd_iprintf(buffer
, " output signal: normal playback");
1525 snd_iprintf(buffer
, " output signal: same as input");
1527 if (rme32
->wcreg
& RME32_WCR_MUTE
) {
1528 snd_iprintf(buffer
, " (muted)\n");
1530 snd_iprintf(buffer
, "\n");
1533 /* master output frequency */
1535 ((!(rme32
->wcreg
& RME32_WCR_FREQ_0
))
1536 && (!(rme32
->wcreg
& RME32_WCR_FREQ_1
)))) {
1537 snd_iprintf(buffer
, " sample rate: %d Hz\n",
1538 snd_rme32_playback_getrate(rme32
));
1540 if (rme32
->rcreg
& RME32_RCR_KMODE
) {
1541 snd_iprintf(buffer
, " sample clock source: AutoSync\n");
1543 snd_iprintf(buffer
, " sample clock source: Internal\n");
1545 if (rme32
->wcreg
& RME32_WCR_PRO
) {
1546 snd_iprintf(buffer
, " format: AES/EBU (professional)\n");
1548 snd_iprintf(buffer
, " format: IEC958 (consumer)\n");
1550 if (rme32
->wcreg
& RME32_WCR_EMP
) {
1551 snd_iprintf(buffer
, " emphasis: on\n");
1553 snd_iprintf(buffer
, " emphasis: off\n");
1557 static void __devinit
snd_rme32_proc_init(struct rme32
* rme32
)
1559 struct snd_info_entry
*entry
;
1561 if (! snd_card_proc_new(rme32
->card
, "rme32", &entry
))
1562 snd_info_set_text_ops(entry
, rme32
, snd_rme32_proc_read
);
1569 #define snd_rme32_info_loopback_control snd_ctl_boolean_mono_info
1572 snd_rme32_get_loopback_control(struct snd_kcontrol
*kcontrol
,
1573 struct snd_ctl_elem_value
*ucontrol
)
1575 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1577 spin_lock_irq(&rme32
->lock
);
1578 ucontrol
->value
.integer
.value
[0] =
1579 rme32
->wcreg
& RME32_WCR_SEL
? 0 : 1;
1580 spin_unlock_irq(&rme32
->lock
);
1584 snd_rme32_put_loopback_control(struct snd_kcontrol
*kcontrol
,
1585 struct snd_ctl_elem_value
*ucontrol
)
1587 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1591 val
= ucontrol
->value
.integer
.value
[0] ? 0 : RME32_WCR_SEL
;
1592 spin_lock_irq(&rme32
->lock
);
1593 val
= (rme32
->wcreg
& ~RME32_WCR_SEL
) | val
;
1594 change
= val
!= rme32
->wcreg
;
1595 if (ucontrol
->value
.integer
.value
[0])
1596 val
&= ~RME32_WCR_MUTE
;
1598 val
|= RME32_WCR_MUTE
;
1600 writel(val
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
1601 spin_unlock_irq(&rme32
->lock
);
1606 snd_rme32_info_inputtype_control(struct snd_kcontrol
*kcontrol
,
1607 struct snd_ctl_elem_info
*uinfo
)
1609 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1610 static char *texts
[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1612 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1614 switch (rme32
->pci
->device
) {
1615 case PCI_DEVICE_ID_RME_DIGI32
:
1616 case PCI_DEVICE_ID_RME_DIGI32_8
:
1617 uinfo
->value
.enumerated
.items
= 3;
1619 case PCI_DEVICE_ID_RME_DIGI32_PRO
:
1620 uinfo
->value
.enumerated
.items
= 4;
1626 if (uinfo
->value
.enumerated
.item
>
1627 uinfo
->value
.enumerated
.items
- 1) {
1628 uinfo
->value
.enumerated
.item
=
1629 uinfo
->value
.enumerated
.items
- 1;
1631 strcpy(uinfo
->value
.enumerated
.name
,
1632 texts
[uinfo
->value
.enumerated
.item
]);
1636 snd_rme32_get_inputtype_control(struct snd_kcontrol
*kcontrol
,
1637 struct snd_ctl_elem_value
*ucontrol
)
1639 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1640 unsigned int items
= 3;
1642 spin_lock_irq(&rme32
->lock
);
1643 ucontrol
->value
.enumerated
.item
[0] = snd_rme32_getinputtype(rme32
);
1645 switch (rme32
->pci
->device
) {
1646 case PCI_DEVICE_ID_RME_DIGI32
:
1647 case PCI_DEVICE_ID_RME_DIGI32_8
:
1650 case PCI_DEVICE_ID_RME_DIGI32_PRO
:
1657 if (ucontrol
->value
.enumerated
.item
[0] >= items
) {
1658 ucontrol
->value
.enumerated
.item
[0] = items
- 1;
1661 spin_unlock_irq(&rme32
->lock
);
1665 snd_rme32_put_inputtype_control(struct snd_kcontrol
*kcontrol
,
1666 struct snd_ctl_elem_value
*ucontrol
)
1668 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1670 int change
, items
= 3;
1672 switch (rme32
->pci
->device
) {
1673 case PCI_DEVICE_ID_RME_DIGI32
:
1674 case PCI_DEVICE_ID_RME_DIGI32_8
:
1677 case PCI_DEVICE_ID_RME_DIGI32_PRO
:
1684 val
= ucontrol
->value
.enumerated
.item
[0] % items
;
1686 spin_lock_irq(&rme32
->lock
);
1687 change
= val
!= (unsigned int)snd_rme32_getinputtype(rme32
);
1688 snd_rme32_setinputtype(rme32
, val
);
1689 spin_unlock_irq(&rme32
->lock
);
1694 snd_rme32_info_clockmode_control(struct snd_kcontrol
*kcontrol
,
1695 struct snd_ctl_elem_info
*uinfo
)
1697 static char *texts
[4] = { "AutoSync",
1700 "Internal 48.0kHz" };
1702 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1704 uinfo
->value
.enumerated
.items
= 4;
1705 if (uinfo
->value
.enumerated
.item
> 3) {
1706 uinfo
->value
.enumerated
.item
= 3;
1708 strcpy(uinfo
->value
.enumerated
.name
,
1709 texts
[uinfo
->value
.enumerated
.item
]);
1713 snd_rme32_get_clockmode_control(struct snd_kcontrol
*kcontrol
,
1714 struct snd_ctl_elem_value
*ucontrol
)
1716 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1718 spin_lock_irq(&rme32
->lock
);
1719 ucontrol
->value
.enumerated
.item
[0] = snd_rme32_getclockmode(rme32
);
1720 spin_unlock_irq(&rme32
->lock
);
1724 snd_rme32_put_clockmode_control(struct snd_kcontrol
*kcontrol
,
1725 struct snd_ctl_elem_value
*ucontrol
)
1727 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1731 val
= ucontrol
->value
.enumerated
.item
[0] % 3;
1732 spin_lock_irq(&rme32
->lock
);
1733 change
= val
!= (unsigned int)snd_rme32_getclockmode(rme32
);
1734 snd_rme32_setclockmode(rme32
, val
);
1735 spin_unlock_irq(&rme32
->lock
);
1739 static u32
snd_rme32_convert_from_aes(struct snd_aes_iec958
* aes
)
1742 val
|= (aes
->status
[0] & IEC958_AES0_PROFESSIONAL
) ? RME32_WCR_PRO
: 0;
1743 if (val
& RME32_WCR_PRO
)
1744 val
|= (aes
->status
[0] & IEC958_AES0_PRO_EMPHASIS_5015
) ? RME32_WCR_EMP
: 0;
1746 val
|= (aes
->status
[0] & IEC958_AES0_CON_EMPHASIS_5015
) ? RME32_WCR_EMP
: 0;
1750 static void snd_rme32_convert_to_aes(struct snd_aes_iec958
* aes
, u32 val
)
1752 aes
->status
[0] = ((val
& RME32_WCR_PRO
) ? IEC958_AES0_PROFESSIONAL
: 0);
1753 if (val
& RME32_WCR_PRO
)
1754 aes
->status
[0] |= (val
& RME32_WCR_EMP
) ? IEC958_AES0_PRO_EMPHASIS_5015
: 0;
1756 aes
->status
[0] |= (val
& RME32_WCR_EMP
) ? IEC958_AES0_CON_EMPHASIS_5015
: 0;
1759 static int snd_rme32_control_spdif_info(struct snd_kcontrol
*kcontrol
,
1760 struct snd_ctl_elem_info
*uinfo
)
1762 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1767 static int snd_rme32_control_spdif_get(struct snd_kcontrol
*kcontrol
,
1768 struct snd_ctl_elem_value
*ucontrol
)
1770 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1772 snd_rme32_convert_to_aes(&ucontrol
->value
.iec958
,
1773 rme32
->wcreg_spdif
);
1777 static int snd_rme32_control_spdif_put(struct snd_kcontrol
*kcontrol
,
1778 struct snd_ctl_elem_value
*ucontrol
)
1780 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1784 val
= snd_rme32_convert_from_aes(&ucontrol
->value
.iec958
);
1785 spin_lock_irq(&rme32
->lock
);
1786 change
= val
!= rme32
->wcreg_spdif
;
1787 rme32
->wcreg_spdif
= val
;
1788 spin_unlock_irq(&rme32
->lock
);
1792 static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol
*kcontrol
,
1793 struct snd_ctl_elem_info
*uinfo
)
1795 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1800 static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol
*kcontrol
,
1801 struct snd_ctl_elem_value
*
1804 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1806 snd_rme32_convert_to_aes(&ucontrol
->value
.iec958
,
1807 rme32
->wcreg_spdif_stream
);
1811 static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol
*kcontrol
,
1812 struct snd_ctl_elem_value
*
1815 struct rme32
*rme32
= snd_kcontrol_chip(kcontrol
);
1819 val
= snd_rme32_convert_from_aes(&ucontrol
->value
.iec958
);
1820 spin_lock_irq(&rme32
->lock
);
1821 change
= val
!= rme32
->wcreg_spdif_stream
;
1822 rme32
->wcreg_spdif_stream
= val
;
1823 rme32
->wcreg
&= ~(RME32_WCR_PRO
| RME32_WCR_EMP
);
1824 rme32
->wcreg
|= val
;
1825 writel(rme32
->wcreg
, rme32
->iobase
+ RME32_IO_CONTROL_REGISTER
);
1826 spin_unlock_irq(&rme32
->lock
);
1830 static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol
*kcontrol
,
1831 struct snd_ctl_elem_info
*uinfo
)
1833 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1838 static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol
*kcontrol
,
1839 struct snd_ctl_elem_value
*
1842 ucontrol
->value
.iec958
.status
[0] = kcontrol
->private_value
;
1846 static struct snd_kcontrol_new snd_rme32_controls
[] = {
1848 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1849 .name
= SNDRV_CTL_NAME_IEC958("", PLAYBACK
, DEFAULT
),
1850 .info
= snd_rme32_control_spdif_info
,
1851 .get
= snd_rme32_control_spdif_get
,
1852 .put
= snd_rme32_control_spdif_put
1855 .access
= SNDRV_CTL_ELEM_ACCESS_READWRITE
| SNDRV_CTL_ELEM_ACCESS_INACTIVE
,
1856 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1857 .name
= SNDRV_CTL_NAME_IEC958("", PLAYBACK
, PCM_STREAM
),
1858 .info
= snd_rme32_control_spdif_stream_info
,
1859 .get
= snd_rme32_control_spdif_stream_get
,
1860 .put
= snd_rme32_control_spdif_stream_put
1863 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
1864 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1865 .name
= SNDRV_CTL_NAME_IEC958("", PLAYBACK
, CON_MASK
),
1866 .info
= snd_rme32_control_spdif_mask_info
,
1867 .get
= snd_rme32_control_spdif_mask_get
,
1868 .private_value
= IEC958_AES0_PROFESSIONAL
| IEC958_AES0_CON_EMPHASIS
1871 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
1872 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1873 .name
= SNDRV_CTL_NAME_IEC958("", PLAYBACK
, PRO_MASK
),
1874 .info
= snd_rme32_control_spdif_mask_info
,
1875 .get
= snd_rme32_control_spdif_mask_get
,
1876 .private_value
= IEC958_AES0_PROFESSIONAL
| IEC958_AES0_PRO_EMPHASIS
1879 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
1880 .name
= "Input Connector",
1881 .info
= snd_rme32_info_inputtype_control
,
1882 .get
= snd_rme32_get_inputtype_control
,
1883 .put
= snd_rme32_put_inputtype_control
1886 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
1887 .name
= "Loopback Input",
1888 .info
= snd_rme32_info_loopback_control
,
1889 .get
= snd_rme32_get_loopback_control
,
1890 .put
= snd_rme32_put_loopback_control
1893 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
1894 .name
= "Sample Clock Source",
1895 .info
= snd_rme32_info_clockmode_control
,
1896 .get
= snd_rme32_get_clockmode_control
,
1897 .put
= snd_rme32_put_clockmode_control
1901 static int snd_rme32_create_switches(struct snd_card
*card
, struct rme32
* rme32
)
1904 struct snd_kcontrol
*kctl
;
1906 for (idx
= 0; idx
< (int)ARRAY_SIZE(snd_rme32_controls
); idx
++) {
1907 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_rme32_controls
[idx
], rme32
))) < 0)
1909 if (idx
== 1) /* IEC958 (S/PDIF) Stream */
1910 rme32
->spdif_ctl
= kctl
;
1917 * Card initialisation
1920 static void snd_rme32_card_free(struct snd_card
*card
)
1922 snd_rme32_free(card
->private_data
);
1925 static int __devinit
1926 snd_rme32_probe(struct pci_dev
*pci
, const struct pci_device_id
*pci_id
)
1929 struct rme32
*rme32
;
1930 struct snd_card
*card
;
1933 if (dev
>= SNDRV_CARDS
) {
1941 err
= snd_card_create(index
[dev
], id
[dev
], THIS_MODULE
,
1942 sizeof(struct rme32
), &card
);
1945 card
->private_free
= snd_rme32_card_free
;
1946 rme32
= (struct rme32
*) card
->private_data
;
1949 snd_card_set_dev(card
, &pci
->dev
);
1950 if (fullduplex
[dev
])
1951 rme32
->fullduplex_mode
= 1;
1952 if ((err
= snd_rme32_create(rme32
)) < 0) {
1953 snd_card_free(card
);
1957 strcpy(card
->driver
, "Digi32");
1958 switch (rme32
->pci
->device
) {
1959 case PCI_DEVICE_ID_RME_DIGI32
:
1960 strcpy(card
->shortname
, "RME Digi32");
1962 case PCI_DEVICE_ID_RME_DIGI32_8
:
1963 strcpy(card
->shortname
, "RME Digi32/8");
1965 case PCI_DEVICE_ID_RME_DIGI32_PRO
:
1966 strcpy(card
->shortname
, "RME Digi32 PRO");
1969 sprintf(card
->longname
, "%s (Rev. %d) at 0x%lx, irq %d",
1970 card
->shortname
, rme32
->rev
, rme32
->port
, rme32
->irq
);
1972 if ((err
= snd_card_register(card
)) < 0) {
1973 snd_card_free(card
);
1976 pci_set_drvdata(pci
, card
);
1981 static void __devexit
snd_rme32_remove(struct pci_dev
*pci
)
1983 snd_card_free(pci_get_drvdata(pci
));
1984 pci_set_drvdata(pci
, NULL
);
1987 static struct pci_driver driver
= {
1988 .name
= KBUILD_MODNAME
,
1989 .id_table
= snd_rme32_ids
,
1990 .probe
= snd_rme32_probe
,
1991 .remove
= __devexit_p(snd_rme32_remove
),
1994 static int __init
alsa_card_rme32_init(void)
1996 return pci_register_driver(&driver
);
1999 static void __exit
alsa_card_rme32_exit(void)
2001 pci_unregister_driver(&driver
);
2004 module_init(alsa_card_rme32_init
)
2005 module_exit(alsa_card_rme32_exit
)