spi-topcliff-pch: add recovery processing in case wait-event timeout
[zen-stable.git] / sound / pcmcia / vx / vxpocket.h
blob13d658c1a2167b9b62f3ebedf1249f2f7405a2f8
1 /*
2 * Driver for Digigram VXpocket soundcards
4 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef __VXPOCKET_H
22 #define __VXPOCKET_H
24 #include <sound/vx_core.h>
26 #include <pcmcia/cistpl.h>
27 #include <pcmcia/ds.h>
29 struct snd_vxpocket {
31 struct vx_core core;
33 unsigned long port;
35 int mic_level; /* analog mic level (or boost) */
37 unsigned int regCDSP; /* current CDSP register */
38 unsigned int regDIALOG; /* current DIALOG register */
40 int index; /* card index */
42 /* pcmcia stuff */
43 struct pcmcia_device *p_dev;
46 extern struct snd_vx_ops snd_vxpocket_ops;
48 void vx_set_mic_boost(struct vx_core *chip, int boost);
49 void vx_set_mic_level(struct vx_core *chip, int level);
51 int vxp_add_mic_controls(struct vx_core *chip);
53 /* Constants used to access the CDSP register (0x08). */
54 #define CDSP_MAGIC 0xA7 /* magic value (for read) */
55 /* for write */
56 #define VXP_CDSP_CLOCKIN_SEL_MASK 0x80 /* 0 (internal), 1 (AES/EBU) */
57 #define VXP_CDSP_DATAIN_SEL_MASK 0x40 /* 0 (analog), 1 (UER) */
58 #define VXP_CDSP_SMPTE_SEL_MASK 0x20
59 #define VXP_CDSP_RESERVED_MASK 0x10
60 #define VXP_CDSP_MIC_SEL_MASK 0x08
61 #define VXP_CDSP_VALID_IRQ_MASK 0x04
62 #define VXP_CDSP_CODEC_RESET_MASK 0x02
63 #define VXP_CDSP_DSP_RESET_MASK 0x01
64 /* VXPOCKET 240/440 */
65 #define P24_CDSP_MICS_SEL_MASK 0x18
66 #define P24_CDSP_MIC20_SEL_MASK 0x10
67 #define P24_CDSP_MIC38_SEL_MASK 0x08
69 /* Constants used to access the MEMIRQ register (0x0C). */
70 #define P44_MEMIRQ_MASTER_SLAVE_SEL_MASK 0x08
71 #define P44_MEMIRQ_SYNCED_ALONE_SEL_MASK 0x04
72 #define P44_MEMIRQ_WCLK_OUT_IN_SEL_MASK 0x02 /* Not used */
73 #define P44_MEMIRQ_WCLK_UER_SEL_MASK 0x01 /* Not used */
75 /* Micro levels (0x0C) */
77 /* Constants used to access the DIALOG register (0x0D). */
78 #define VXP_DLG_XILINX_REPROG_MASK 0x80 /* W */
79 #define VXP_DLG_DATA_XICOR_MASK 0x80 /* R */
80 #define VXP_DLG_RESERVED4_0_MASK 0x40
81 #define VXP_DLG_RESERVED2_0_MASK 0x20
82 #define VXP_DLG_RESERVED1_0_MASK 0x10
83 #define VXP_DLG_DMAWRITE_SEL_MASK 0x08 /* W */
84 #define VXP_DLG_DMAREAD_SEL_MASK 0x04 /* W */
85 #define VXP_DLG_MEMIRQ_MASK 0x02 /* R */
86 #define VXP_DLG_DMA16_SEL_MASK 0x02 /* W */
87 #define VXP_DLG_ACK_MEMIRQ_MASK 0x01 /* R/W */
90 #endif /* __VXPOCKET_H */