sound/soc/codecs/wm8988.c

   1 /*
   2  * wm8988.c -- WM8988 ALSA SoC audio driver
   3  *
   4  * Copyright 2009 Wolfson Microelectronics plc
   5  * Copyright 2005 Openedhand Ltd.
   6  *
   7  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/init.h>
  17 #include <linux/delay.h>
  18 #include <linux/pm.h>
  19 #include <linux/i2c.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/slab.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/tlv.h>
  26 #include <sound/soc.h>
  27 #include <sound/initval.h>
  28
  29 #include "wm8988.h"
  30
  31 /*
  32  * wm8988 register cache
  33  * We can't read the WM8988 register space when we
  34  * are using 2 wire for device control, so we cache them instead.
  35  */
  36 static const u16 wm8988_reg[] = {
  37         0x0097, 0x0097, 0x0079, 0x0079,  /*  0 */
  38         0x0000, 0x0008, 0x0000, 0x000a,  /*  4 */
  39         0x0000, 0x0000, 0x00ff, 0x00ff,  /*  8 */
  40         0x000f, 0x000f, 0x0000, 0x0000,  /* 12 */
  41         0x0000, 0x007b, 0x0000, 0x0032,  /* 16 */
  42         0x0000, 0x00c3, 0x00c3, 0x00c0,  /* 20 */
  43         0x0000, 0x0000, 0x0000, 0x0000,  /* 24 */
  44         0x0000, 0x0000, 0x0000, 0x0000,  /* 28 */
  45         0x0000, 0x0000, 0x0050, 0x0050,  /* 32 */
  46         0x0050, 0x0050, 0x0050, 0x0050,  /* 36 */
  47         0x0079, 0x0079, 0x0079,          /* 40 */
  48 };
  49
  50 /* codec private data */
  51 struct wm8988_priv {
  52         unsigned int sysclk;
  53         enum snd_soc_control_type control_type;
  54         struct snd_pcm_hw_constraint_list *sysclk_constraints;
  55 };
  56
  57 #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
  58
  59 /*
  60  * WM8988 Controls
  61  */
  62
  63 static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  64 static const struct soc_enum bass_boost =
  65         SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  66
  67 static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  68 static const struct soc_enum bass_filter =
  69         SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  70
  71 static const char *treble_txt[] = {"8kHz", "4kHz"};
  72 static const struct soc_enum treble =
  73         SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  74
  75 static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  76 static const struct soc_enum stereo_3d_lc =
  77         SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  78
  79 static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  80 static const struct soc_enum stereo_3d_uc =
  81         SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  82
  83 static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  84 static const struct soc_enum stereo_3d_func =
  85         SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  86
  87 static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  88 static const struct soc_enum alc_func =
  89         SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  90
  91 static const char *ng_type_txt[] = {"Constant PGA Gain",
  92                                     "Mute ADC Output"};
  93 static const struct soc_enum ng_type =
  94         SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  95
  96 static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  97 static const struct soc_enum deemph =
  98         SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  99
 100 static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
 101                                    "L + R Invert"};
 102 static const struct soc_enum adcpol =
 103         SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
 104
 105 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
 106 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
 107 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
 108 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
 109 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
 110
 111 static const struct snd_kcontrol_new wm8988_snd_controls[] = {
 112
 113 SOC_ENUM("Bass Boost", bass_boost),
 114 SOC_ENUM("Bass Filter", bass_filter),
 115 SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
 116
 117 SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
 118 SOC_ENUM("Treble Cut-off", treble),
 119
 120 SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
 121 SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
 122 SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
 123 SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
 124 SOC_ENUM("3D Mode", stereo_3d_func),
 125
 126 SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
 127 SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
 128 SOC_ENUM("ALC Capture Function", alc_func),
 129 SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
 130 SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
 131 SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
 132 SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
 133 SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
 134 SOC_ENUM("ALC Capture NG Type", ng_type),
 135 SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
 136
 137 SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
 138
 139 SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
 140                  0, 255, 0, adc_tlv),
 141 SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
 142                  0, 63, 0, pga_tlv),
 143 SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
 144 SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
 145
 146 SOC_ENUM("Playback De-emphasis", deemph),
 147
 148 SOC_ENUM("Capture Polarity", adcpol),
 149 SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
 150 SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
 151
 152 SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
 153
 154 SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
 155                bypass_tlv),
 156 SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
 157                bypass_tlv),
 158 SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
 159                bypass_tlv),
 160 SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
 161                bypass_tlv),
 162
 163 SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
 164              WM8988_ROUT1V, 7, 1, 0),
 165 SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
 166                  0, 127, 0, out_tlv),
 167
 168 SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
 169              WM8988_ROUT2V, 7, 1, 0),
 170 SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
 171                  0, 127, 0, out_tlv),
 172
 173 };
 174
 175 /*
 176  * DAPM Controls
 177  */
 178
 179 static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
 180                               struct snd_kcontrol *kcontrol, int event)
 181 {
 182         struct snd_soc_codec *codec = w->codec;
 183         u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
 184
 185         /* Use the DAC to gate LRC if active, otherwise use ADC */
 186         if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
 187                 adctl2 &= ~0x4;
 188         else
 189                 adctl2 |= 0x4;
 190
 191         return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
 192 }
 193
 194 static const char *wm8988_line_texts[] = {
 195         "Line 1", "Line 2", "PGA", "Differential"};
 196
 197 static const unsigned int wm8988_line_values[] = {
 198         0, 1, 3, 4};
 199
 200 static const struct soc_enum wm8988_lline_enum =
 201         SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
 202                               ARRAY_SIZE(wm8988_line_texts),
 203                               wm8988_line_texts,
 204                               wm8988_line_values);
 205 static const struct snd_kcontrol_new wm8988_left_line_controls =
 206         SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
 207
 208 static const struct soc_enum wm8988_rline_enum =
 209         SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
 210                               ARRAY_SIZE(wm8988_line_texts),
 211                               wm8988_line_texts,
 212                               wm8988_line_values);
 213 static const struct snd_kcontrol_new wm8988_right_line_controls =
 214         SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
 215
 216 /* Left Mixer */
 217 static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
 218         SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
 219         SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
 220         SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
 221         SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
 222 };
 223
 224 /* Right Mixer */
 225 static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
 226         SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
 227         SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
 228         SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
 229         SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
 230 };
 231
 232 static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
 233 static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
 234
 235 /* Left PGA Mux */
 236 static const struct soc_enum wm8988_lpga_enum =
 237         SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
 238                               ARRAY_SIZE(wm8988_pga_sel),
 239                               wm8988_pga_sel,
 240                               wm8988_pga_val);
 241 static const struct snd_kcontrol_new wm8988_left_pga_controls =
 242         SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
 243
 244 /* Right PGA Mux */
 245 static const struct soc_enum wm8988_rpga_enum =
 246         SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
 247                               ARRAY_SIZE(wm8988_pga_sel),
 248                               wm8988_pga_sel,
 249                               wm8988_pga_val);
 250 static const struct snd_kcontrol_new wm8988_right_pga_controls =
 251         SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
 252
 253 /* Differential Mux */
 254 static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
 255 static const struct soc_enum diffmux =
 256         SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
 257 static const struct snd_kcontrol_new wm8988_diffmux_controls =
 258         SOC_DAPM_ENUM("Route", diffmux);
 259
 260 /* Mono ADC Mux */
 261 static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
 262         "Mono (Right)", "Digital Mono"};
 263 static const struct soc_enum monomux =
 264         SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
 265 static const struct snd_kcontrol_new wm8988_monomux_controls =
 266         SOC_DAPM_ENUM("Route", monomux);
 267
 268 static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
 269         SND_SOC_DAPM_SUPPLY("Mic Bias", WM8988_PWR1, 1, 0, NULL, 0),
 270
 271         SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
 272                 &wm8988_diffmux_controls),
 273         SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
 274                 &wm8988_monomux_controls),
 275         SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
 276                 &wm8988_monomux_controls),
 277
 278         SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
 279                 &wm8988_left_pga_controls),
 280         SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
 281                 &wm8988_right_pga_controls),
 282
 283         SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
 284                 &wm8988_left_line_controls),
 285         SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
 286                 &wm8988_right_line_controls),
 287
 288         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
 289         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
 290
 291         SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
 292         SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
 293
 294         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
 295                 &wm8988_left_mixer_controls[0],
 296                 ARRAY_SIZE(wm8988_left_mixer_controls)),
 297         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
 298                 &wm8988_right_mixer_controls[0],
 299                 ARRAY_SIZE(wm8988_right_mixer_controls)),
 300
 301         SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
 302         SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
 303         SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
 304         SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
 305
 306         SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
 307
 308         SND_SOC_DAPM_OUTPUT("LOUT1"),
 309         SND_SOC_DAPM_OUTPUT("ROUT1"),
 310         SND_SOC_DAPM_OUTPUT("LOUT2"),
 311         SND_SOC_DAPM_OUTPUT("ROUT2"),
 312         SND_SOC_DAPM_OUTPUT("VREF"),
 313
 314         SND_SOC_DAPM_INPUT("LINPUT1"),
 315         SND_SOC_DAPM_INPUT("LINPUT2"),
 316         SND_SOC_DAPM_INPUT("RINPUT1"),
 317         SND_SOC_DAPM_INPUT("RINPUT2"),
 318 };
 319
 320 static const struct snd_soc_dapm_route audio_map[] = {
 321
 322         { "Left Line Mux", "Line 1", "LINPUT1" },
 323         { "Left Line Mux", "Line 2", "LINPUT2" },
 324         { "Left Line Mux", "PGA", "Left PGA Mux" },
 325         { "Left Line Mux", "Differential", "Differential Mux" },
 326
 327         { "Right Line Mux", "Line 1", "RINPUT1" },
 328         { "Right Line Mux", "Line 2", "RINPUT2" },
 329         { "Right Line Mux", "PGA", "Right PGA Mux" },
 330         { "Right Line Mux", "Differential", "Differential Mux" },
 331
 332         { "Left PGA Mux", "Line 1", "LINPUT1" },
 333         { "Left PGA Mux", "Line 2", "LINPUT2" },
 334         { "Left PGA Mux", "Differential", "Differential Mux" },
 335
 336         { "Right PGA Mux", "Line 1", "RINPUT1" },
 337         { "Right PGA Mux", "Line 2", "RINPUT2" },
 338         { "Right PGA Mux", "Differential", "Differential Mux" },
 339
 340         { "Differential Mux", "Line 1", "LINPUT1" },
 341         { "Differential Mux", "Line 1", "RINPUT1" },
 342         { "Differential Mux", "Line 2", "LINPUT2" },
 343         { "Differential Mux", "Line 2", "RINPUT2" },
 344
 345         { "Left ADC Mux", "Stereo", "Left PGA Mux" },
 346         { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
 347         { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
 348
 349         { "Right ADC Mux", "Stereo", "Right PGA Mux" },
 350         { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
 351         { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
 352
 353         { "Left ADC", NULL, "Left ADC Mux" },
 354         { "Right ADC", NULL, "Right ADC Mux" },
 355
 356         { "Left Line Mux", "Line 1", "LINPUT1" },
 357         { "Left Line Mux", "Line 2", "LINPUT2" },
 358         { "Left Line Mux", "PGA", "Left PGA Mux" },
 359         { "Left Line Mux", "Differential", "Differential Mux" },
 360
 361         { "Right Line Mux", "Line 1", "RINPUT1" },
 362         { "Right Line Mux", "Line 2", "RINPUT2" },
 363         { "Right Line Mux", "PGA", "Right PGA Mux" },
 364         { "Right Line Mux", "Differential", "Differential Mux" },
 365
 366         { "Left Mixer", "Playback Switch", "Left DAC" },
 367         { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
 368         { "Left Mixer", "Right Playback Switch", "Right DAC" },
 369         { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
 370
 371         { "Right Mixer", "Left Playback Switch", "Left DAC" },
 372         { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
 373         { "Right Mixer", "Playback Switch", "Right DAC" },
 374         { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
 375
 376         { "Left Out 1", NULL, "Left Mixer" },
 377         { "LOUT1", NULL, "Left Out 1" },
 378         { "Right Out 1", NULL, "Right Mixer" },
 379         { "ROUT1", NULL, "Right Out 1" },
 380
 381         { "Left Out 2", NULL, "Left Mixer" },
 382         { "LOUT2", NULL, "Left Out 2" },
 383         { "Right Out 2", NULL, "Right Mixer" },
 384         { "ROUT2", NULL, "Right Out 2" },
 385 };
 386
 387 struct _coeff_div {
 388         u32 mclk;
 389         u32 rate;
 390         u16 fs;
 391         u8 sr:5;
 392         u8 usb:1;
 393 };
 394
 395 /* codec hifi mclk clock divider coefficients */
 396 static const struct _coeff_div coeff_div[] = {
 397         /* 8k */
 398         {12288000, 8000, 1536, 0x6, 0x0},
 399         {11289600, 8000, 1408, 0x16, 0x0},
 400         {18432000, 8000, 2304, 0x7, 0x0},
 401         {16934400, 8000, 2112, 0x17, 0x0},
 402         {12000000, 8000, 1500, 0x6, 0x1},
 403
 404         /* 11.025k */
 405         {11289600, 11025, 1024, 0x18, 0x0},
 406         {16934400, 11025, 1536, 0x19, 0x0},
 407         {12000000, 11025, 1088, 0x19, 0x1},
 408
 409         /* 16k */
 410         {12288000, 16000, 768, 0xa, 0x0},
 411         {18432000, 16000, 1152, 0xb, 0x0},
 412         {12000000, 16000, 750, 0xa, 0x1},
 413
 414         /* 22.05k */
 415         {11289600, 22050, 512, 0x1a, 0x0},
 416         {16934400, 22050, 768, 0x1b, 0x0},
 417         {12000000, 22050, 544, 0x1b, 0x1},
 418
 419         /* 32k */
 420         {12288000, 32000, 384, 0xc, 0x0},
 421         {18432000, 32000, 576, 0xd, 0x0},
 422         {12000000, 32000, 375, 0xa, 0x1},
 423
 424         /* 44.1k */
 425         {11289600, 44100, 256, 0x10, 0x0},
 426         {16934400, 44100, 384, 0x11, 0x0},
 427         {12000000, 44100, 272, 0x11, 0x1},
 428
 429         /* 48k */
 430         {12288000, 48000, 256, 0x0, 0x0},
 431         {18432000, 48000, 384, 0x1, 0x0},
 432         {12000000, 48000, 250, 0x0, 0x1},
 433
 434         /* 88.2k */
 435         {11289600, 88200, 128, 0x1e, 0x0},
 436         {16934400, 88200, 192, 0x1f, 0x0},
 437         {12000000, 88200, 136, 0x1f, 0x1},
 438
 439         /* 96k */
 440         {12288000, 96000, 128, 0xe, 0x0},
 441         {18432000, 96000, 192, 0xf, 0x0},
 442         {12000000, 96000, 125, 0xe, 0x1},
 443 };
 444
 445 static inline int get_coeff(int mclk, int rate)
 446 {
 447         int i;
 448
 449         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 450                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 451                         return i;
 452         }
 453
 454         return -EINVAL;
 455 }
 456
 457 /* The set of rates we can generate from the above for each SYSCLK */
 458
 459 static unsigned int rates_12288[] = {
 460         8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
 461 };
 462
 463 static struct snd_pcm_hw_constraint_list constraints_12288 = {
 464         .count  = ARRAY_SIZE(rates_12288),
 465         .list   = rates_12288,
 466 };
 467
 468 static unsigned int rates_112896[] = {
 469         8000, 11025, 22050, 44100,
 470 };
 471
 472 static struct snd_pcm_hw_constraint_list constraints_112896 = {
 473         .count  = ARRAY_SIZE(rates_112896),
 474         .list   = rates_112896,
 475 };
 476
 477 static unsigned int rates_12[] = {
 478         8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
 479         48000, 88235, 96000,
 480 };
 481
 482 static struct snd_pcm_hw_constraint_list constraints_12 = {
 483         .count  = ARRAY_SIZE(rates_12),
 484         .list   = rates_12,
 485 };
 486
 487 /*
 488  * Note that this should be called from init rather than from hw_params.
 489  */
 490 static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 491                 int clk_id, unsigned int freq, int dir)
 492 {
 493         struct snd_soc_codec *codec = codec_dai->codec;
 494         struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
 495
 496         switch (freq) {
 497         case 11289600:
 498         case 18432000:
 499         case 22579200:
 500         case 36864000:
 501                 wm8988->sysclk_constraints = &constraints_112896;
 502                 wm8988->sysclk = freq;
 503                 return 0;
 504
 505         case 12288000:
 506         case 16934400:
 507         case 24576000:
 508         case 33868800:
 509                 wm8988->sysclk_constraints = &constraints_12288;
 510                 wm8988->sysclk = freq;
 511                 return 0;
 512
 513         case 12000000:
 514         case 24000000:
 515                 wm8988->sysclk_constraints = &constraints_12;
 516                 wm8988->sysclk = freq;
 517                 return 0;
 518         }
 519         return -EINVAL;
 520 }
 521
 522 static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
 523                 unsigned int fmt)
 524 {
 525         struct snd_soc_codec *codec = codec_dai->codec;
 526         u16 iface = 0;
 527
 528         /* set master/slave audio interface */
 529         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 530         case SND_SOC_DAIFMT_CBM_CFM:
 531                 iface = 0x0040;
 532                 break;
 533         case SND_SOC_DAIFMT_CBS_CFS:
 534                 break;
 535         default:
 536                 return -EINVAL;
 537         }
 538
 539         /* interface format */
 540         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 541         case SND_SOC_DAIFMT_I2S:
 542                 iface |= 0x0002;
 543                 break;
 544         case SND_SOC_DAIFMT_RIGHT_J:
 545                 break;
 546         case SND_SOC_DAIFMT_LEFT_J:
 547                 iface |= 0x0001;
 548                 break;
 549         case SND_SOC_DAIFMT_DSP_A:
 550                 iface |= 0x0003;
 551                 break;
 552         case SND_SOC_DAIFMT_DSP_B:
 553                 iface |= 0x0013;
 554                 break;
 555         default:
 556                 return -EINVAL;
 557         }
 558
 559         /* clock inversion */
 560         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 561         case SND_SOC_DAIFMT_NB_NF:
 562                 break;
 563         case SND_SOC_DAIFMT_IB_IF:
 564                 iface |= 0x0090;
 565                 break;
 566         case SND_SOC_DAIFMT_IB_NF:
 567                 iface |= 0x0080;
 568                 break;
 569         case SND_SOC_DAIFMT_NB_IF:
 570                 iface |= 0x0010;
 571                 break;
 572         default:
 573                 return -EINVAL;
 574         }
 575
 576         snd_soc_write(codec, WM8988_IFACE, iface);
 577         return 0;
 578 }
 579
 580 static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
 581                               struct snd_soc_dai *dai)
 582 {
 583         struct snd_soc_codec *codec = dai->codec;
 584         struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
 585
 586         /* The set of sample rates that can be supported depends on the
 587          * MCLK supplied to the CODEC - enforce this.
 588          */
 589         if (!wm8988->sysclk) {
 590                 dev_err(codec->dev,
 591                         "No MCLK configured, call set_sysclk() on init\n");
 592                 return -EINVAL;
 593         }
 594
 595         snd_pcm_hw_constraint_list(substream->runtime, 0,
 596                                    SNDRV_PCM_HW_PARAM_RATE,
 597                                    wm8988->sysclk_constraints);
 598
 599         return 0;
 600 }
 601
 602 static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
 603                                 struct snd_pcm_hw_params *params,
 604                                 struct snd_soc_dai *dai)
 605 {
 606         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 607         struct snd_soc_codec *codec = rtd->codec;
 608         struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
 609         u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
 610         u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
 611         int coeff;
 612
 613         coeff = get_coeff(wm8988->sysclk, params_rate(params));
 614         if (coeff < 0) {
 615                 coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
 616                 srate |= 0x40;
 617         }
 618         if (coeff < 0) {
 619                 dev_err(codec->dev,
 620                         "Unable to configure sample rate %dHz with %dHz MCLK\n",
 621                         params_rate(params), wm8988->sysclk);
 622                 return coeff;
 623         }
 624
 625         /* bit size */
 626         switch (params_format(params)) {
 627         case SNDRV_PCM_FORMAT_S16_LE:
 628                 break;
 629         case SNDRV_PCM_FORMAT_S20_3LE:
 630                 iface |= 0x0004;
 631                 break;
 632         case SNDRV_PCM_FORMAT_S24_LE:
 633                 iface |= 0x0008;
 634                 break;
 635         case SNDRV_PCM_FORMAT_S32_LE:
 636                 iface |= 0x000c;
 637                 break;
 638         }
 639
 640         /* set iface & srate */
 641         snd_soc_write(codec, WM8988_IFACE, iface);
 642         if (coeff >= 0)
 643                 snd_soc_write(codec, WM8988_SRATE, srate |
 644                         (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
 645
 646         return 0;
 647 }
 648
 649 static int wm8988_mute(struct snd_soc_dai *dai, int mute)
 650 {
 651         struct snd_soc_codec *codec = dai->codec;
 652         u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
 653
 654         if (mute)
 655                 snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
 656         else
 657                 snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
 658         return 0;
 659 }
 660
 661 static int wm8988_set_bias_level(struct snd_soc_codec *codec,
 662                                  enum snd_soc_bias_level level)
 663 {
 664         u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
 665
 666         switch (level) {
 667         case SND_SOC_BIAS_ON:
 668                 break;
 669
 670         case SND_SOC_BIAS_PREPARE:
 671                 /* VREF, VMID=2x50k, digital enabled */
 672                 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
 673                 break;
 674
 675         case SND_SOC_BIAS_STANDBY:
 676                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
 677                         snd_soc_cache_sync(codec);
 678
 679                         /* VREF, VMID=2x5k */
 680                         snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
 681
 682                         /* Charge caps */
 683                         msleep(100);
 684                 }
 685
 686                 /* VREF, VMID=2*500k, digital stopped */
 687                 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
 688                 break;
 689
 690         case SND_SOC_BIAS_OFF:
 691                 snd_soc_write(codec, WM8988_PWR1, 0x0000);
 692                 break;
 693         }
 694         codec->dapm.bias_level = level;
 695         return 0;
 696 }
 697
 698 #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
 699
 700 #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 701         SNDRV_PCM_FMTBIT_S24_LE)
 702
 703 static const struct snd_soc_dai_ops wm8988_ops = {
 704         .startup = wm8988_pcm_startup,
 705         .hw_params = wm8988_pcm_hw_params,
 706         .set_fmt = wm8988_set_dai_fmt,
 707         .set_sysclk = wm8988_set_dai_sysclk,
 708         .digital_mute = wm8988_mute,
 709 };
 710
 711 static struct snd_soc_dai_driver wm8988_dai = {
 712         .name = "wm8988-hifi",
 713         .playback = {
 714                 .stream_name = "Playback",
 715                 .channels_min = 1,
 716                 .channels_max = 2,
 717                 .rates = WM8988_RATES,
 718                 .formats = WM8988_FORMATS,
 719         },
 720         .capture = {
 721                 .stream_name = "Capture",
 722                 .channels_min = 1,
 723                 .channels_max = 2,
 724                 .rates = WM8988_RATES,
 725                 .formats = WM8988_FORMATS,
 726          },
 727         .ops = &wm8988_ops,
 728         .symmetric_rates = 1,
 729 };
 730
 731 static int wm8988_suspend(struct snd_soc_codec *codec)
 732 {
 733         wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
 734         return 0;
 735 }
 736
 737 static int wm8988_resume(struct snd_soc_codec *codec)
 738 {
 739         wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 740         return 0;
 741 }
 742
 743 static int wm8988_probe(struct snd_soc_codec *codec)
 744 {
 745         struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
 746         struct snd_soc_dapm_context *dapm = &codec->dapm;
 747         int ret = 0;
 748
 749         ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8988->control_type);
 750         if (ret < 0) {
 751                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
 752                 return ret;
 753         }
 754
 755         ret = wm8988_reset(codec);
 756         if (ret < 0) {
 757                 dev_err(codec->dev, "Failed to issue reset\n");
 758                 return ret;
 759         }
 760
 761         /* set the update bits (we always update left then right) */
 762         snd_soc_update_bits(codec, WM8988_RADC, 0x0100, 0x0100);
 763         snd_soc_update_bits(codec, WM8988_RDAC, 0x0100, 0x0100);
 764         snd_soc_update_bits(codec, WM8988_ROUT1V, 0x0100, 0x0100);
 765         snd_soc_update_bits(codec, WM8988_ROUT2V, 0x0100, 0x0100);
 766         snd_soc_update_bits(codec, WM8988_RINVOL, 0x0100, 0x0100);
 767
 768         wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 769
 770         snd_soc_add_controls(codec, wm8988_snd_controls,
 771                                 ARRAY_SIZE(wm8988_snd_controls));
 772         snd_soc_dapm_new_controls(dapm, wm8988_dapm_widgets,
 773                                   ARRAY_SIZE(wm8988_dapm_widgets));
 774         snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
 775
 776         return 0;
 777 }
 778
 779 static int wm8988_remove(struct snd_soc_codec *codec)
 780 {
 781         wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
 782         return 0;
 783 }
 784
 785 static struct snd_soc_codec_driver soc_codec_dev_wm8988 = {
 786         .probe =        wm8988_probe,
 787         .remove =       wm8988_remove,
 788         .suspend =      wm8988_suspend,
 789         .resume =       wm8988_resume,
 790         .set_bias_level = wm8988_set_bias_level,
 791         .reg_cache_size = ARRAY_SIZE(wm8988_reg),
 792         .reg_word_size = sizeof(u16),
 793         .reg_cache_default = wm8988_reg,
 794 };
 795
 796 #if defined(CONFIG_SPI_MASTER)
 797 static int __devinit wm8988_spi_probe(struct spi_device *spi)
 798 {
 799         struct wm8988_priv *wm8988;
 800         int ret;
 801
 802         wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
 803         if (wm8988 == NULL)
 804                 return -ENOMEM;
 805
 806         wm8988->control_type = SND_SOC_SPI;
 807         spi_set_drvdata(spi, wm8988);
 808
 809         ret = snd_soc_register_codec(&spi->dev,
 810                         &soc_codec_dev_wm8988, &wm8988_dai, 1);
 811         if (ret < 0)
 812                 kfree(wm8988);
 813         return ret;
 814 }
 815
 816 static int __devexit wm8988_spi_remove(struct spi_device *spi)
 817 {
 818         snd_soc_unregister_codec(&spi->dev);
 819         kfree(spi_get_drvdata(spi));
 820         return 0;
 821 }
 822
 823 static struct spi_driver wm8988_spi_driver = {
 824         .driver = {
 825                 .name   = "wm8988",
 826                 .owner  = THIS_MODULE,
 827         },
 828         .probe          = wm8988_spi_probe,
 829         .remove         = __devexit_p(wm8988_spi_remove),
 830 };
 831 #endif /* CONFIG_SPI_MASTER */
 832
 833 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 834 static __devinit int wm8988_i2c_probe(struct i2c_client *i2c,
 835                                       const struct i2c_device_id *id)
 836 {
 837         struct wm8988_priv *wm8988;
 838         int ret;
 839
 840         wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
 841         if (wm8988 == NULL)
 842                 return -ENOMEM;
 843
 844         i2c_set_clientdata(i2c, wm8988);
 845         wm8988->control_type = SND_SOC_I2C;
 846
 847         ret =  snd_soc_register_codec(&i2c->dev,
 848                         &soc_codec_dev_wm8988, &wm8988_dai, 1);
 849         if (ret < 0)
 850                 kfree(wm8988);
 851         return ret;
 852 }
 853
 854 static __devexit int wm8988_i2c_remove(struct i2c_client *client)
 855 {
 856         snd_soc_unregister_codec(&client->dev);
 857         kfree(i2c_get_clientdata(client));
 858         return 0;
 859 }
 860
 861 static const struct i2c_device_id wm8988_i2c_id[] = {
 862         { "wm8988", 0 },
 863         { }
 864 };
 865 MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
 866
 867 static struct i2c_driver wm8988_i2c_driver = {
 868         .driver = {
 869                 .name = "wm8988-codec",
 870                 .owner = THIS_MODULE,
 871         },
 872         .probe =    wm8988_i2c_probe,
 873         .remove =   __devexit_p(wm8988_i2c_remove),
 874         .id_table = wm8988_i2c_id,
 875 };
 876 #endif
 877
 878 static int __init wm8988_modinit(void)
 879 {
 880         int ret = 0;
 881 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 882         ret = i2c_add_driver(&wm8988_i2c_driver);
 883         if (ret != 0) {
 884                 printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n",
 885                        ret);
 886         }
 887 #endif
 888 #if defined(CONFIG_SPI_MASTER)
 889         ret = spi_register_driver(&wm8988_spi_driver);
 890         if (ret != 0) {
 891                 printk(KERN_ERR "Failed to register WM8988 SPI driver: %d\n",
 892                        ret);
 893         }
 894 #endif
 895         return ret;
 896 }
 897 module_init(wm8988_modinit);
 898
 899 static void __exit wm8988_exit(void)
 900 {
 901 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 902         i2c_del_driver(&wm8988_i2c_driver);
 903 #endif
 904 #if defined(CONFIG_SPI_MASTER)
 905         spi_unregister_driver(&wm8988_spi_driver);
 906 #endif
 907 }
 908 module_exit(wm8988_exit);
 909
 910
 911 MODULE_DESCRIPTION("ASoC WM8988 driver");
 912 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 913 MODULE_LICENSE("GPL");