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Revert "gma500: Fix dependencies"
[zen-stable.git] / drivers / net / atl1c / atl1c_main.c
blob1269ba5d6e56d67b75d244d0bb89e8948d08a251
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
52 /* required last entry */
53 { 0 }
54 };
55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
57 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
58 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(ATL1C_DRV_VERSION);
61
62 static int atl1c_stop_mac(struct atl1c_hw *hw);
63 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
64 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
65 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
66 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
67 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
68 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
69 int *work_done, int work_to_do);
70 static int atl1c_up(struct atl1c_adapter *adapter);
71 static void atl1c_down(struct atl1c_adapter *adapter);
72
73 static const u16 atl1c_pay_load_size[] = {
74 128, 256, 512, 1024, 2048, 4096,
75 };
76
77 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
78 {
79 REG_MB_RFD0_PROD_IDX,
80 REG_MB_RFD1_PROD_IDX,
81 REG_MB_RFD2_PROD_IDX,
82 REG_MB_RFD3_PROD_IDX
83 };
84
85 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
86 {
87 REG_RFD0_HEAD_ADDR_LO,
88 REG_RFD1_HEAD_ADDR_LO,
89 REG_RFD2_HEAD_ADDR_LO,
90 REG_RFD3_HEAD_ADDR_LO
91 };
92
93 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
94 {
95 REG_RRD0_HEAD_ADDR_LO,
96 REG_RRD1_HEAD_ADDR_LO,
97 REG_RRD2_HEAD_ADDR_LO,
98 REG_RRD3_HEAD_ADDR_LO
99 };
100
101 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
102 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
103 static void atl1c_pcie_patch(struct atl1c_hw *hw)
104 {
105 u32 data;
106
107 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
108 data |= PCIE_PHYMISC_FORCE_RCV_DET;
109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
110
111 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
112 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
113
114 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
115 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
116 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
117 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
118 PCIE_PHYMISC2_SERDES_TH_SHIFT);
119 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
120 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
121 }
122 }
123
124 /* FIXME: no need any more ? */
125 /*
126 * atl1c_init_pcie - init PCIE module
127 */
128 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
129 {
130 u32 data;
131 u32 pci_cmd;
132 struct pci_dev *pdev = hw->adapter->pdev;
133
134 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
135 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
136 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
137 PCI_COMMAND_IO);
138 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
139
140 /*
141 * Clear any PowerSaveing Settings
142 */
143 pci_enable_wake(pdev, PCI_D3hot, 0);
144 pci_enable_wake(pdev, PCI_D3cold, 0);
145
146 /*
147 * Mask some pcie error bits
148 */
149 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
150 data &= ~PCIE_UC_SERVRITY_DLP;
151 data &= ~PCIE_UC_SERVRITY_FCP;
152 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
153
154 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
155 data &= ~LTSSM_ID_EN_WRO;
156 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
157
158 atl1c_pcie_patch(hw);
159 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
160 atl1c_disable_l0s_l1(hw);
161 if (flag & ATL1C_PCIE_PHY_RESET)
162 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
163 else
164 AT_WRITE_REG(hw, REG_GPHY_CTRL,
165 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
166
167 msleep(5);
168 }
169
170 /*
171 * atl1c_irq_enable - Enable default interrupt generation settings
172 * @adapter: board private structure
173 */
174 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
175 {
176 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
177 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
178 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
179 AT_WRITE_FLUSH(&adapter->hw);
180 }
181 }
182
183 /*
184 * atl1c_irq_disable - Mask off interrupt generation on the NIC
185 * @adapter: board private structure
186 */
187 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
188 {
189 atomic_inc(&adapter->irq_sem);
190 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
191 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
192 AT_WRITE_FLUSH(&adapter->hw);
193 synchronize_irq(adapter->pdev->irq);
194 }
195
196 /*
197 * atl1c_irq_reset - reset interrupt confiure on the NIC
198 * @adapter: board private structure
199 */
200 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
201 {
202 atomic_set(&adapter->irq_sem, 1);
203 atl1c_irq_enable(adapter);
204 }
205
206 /*
207 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
208 * of the idle status register until the device is actually idle
209 */
210 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
211 {
212 int timeout;
213 u32 data;
214
215 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
216 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
217 if ((data & IDLE_STATUS_MASK) == 0)
218 return 0;
219 msleep(1);
220 }
221 return data;
222 }
223
224 /*
225 * atl1c_phy_config - Timer Call-back
226 * @data: pointer to netdev cast into an unsigned long
227 */
228 static void atl1c_phy_config(unsigned long data)
229 {
230 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
231 struct atl1c_hw *hw = &adapter->hw;
232 unsigned long flags;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 atl1c_restart_autoneg(hw);
236 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
237 }
238
239 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
240 {
241 WARN_ON(in_interrupt());
242 atl1c_down(adapter);
243 atl1c_up(adapter);
244 clear_bit(__AT_RESETTING, &adapter->flags);
245 }
246
247 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
248 {
249 struct atl1c_hw *hw = &adapter->hw;
250 struct net_device *netdev = adapter->netdev;
251 struct pci_dev *pdev = adapter->pdev;
252 int err;
253 unsigned long flags;
254 u16 speed, duplex, phy_data;
255
256 spin_lock_irqsave(&adapter->mdio_lock, flags);
257 /* MII_BMSR must read twise */
258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
260 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
261
262 if ((phy_data & BMSR_LSTATUS) == 0) {
263 /* link down */
264 hw->hibernate = true;
265 if (atl1c_stop_mac(hw) != 0)
266 if (netif_msg_hw(adapter))
267 dev_warn(&pdev->dev, "stop mac failed\n");
268 atl1c_set_aspm(hw, false);
269 netif_carrier_off(netdev);
270 netif_stop_queue(netdev);
271 atl1c_phy_reset(hw);
272 atl1c_phy_init(&adapter->hw);
273 } else {
274 /* Link Up */
275 hw->hibernate = false;
276 spin_lock_irqsave(&adapter->mdio_lock, flags);
277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
278 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
279 if (unlikely(err))
280 return;
281 /* link result is our setting */
282 if (adapter->link_speed != speed ||
283 adapter->link_duplex != duplex) {
284 adapter->link_speed = speed;
285 adapter->link_duplex = duplex;
286 atl1c_set_aspm(hw, true);
287 atl1c_enable_tx_ctrl(hw);
288 atl1c_enable_rx_ctrl(hw);
289 atl1c_setup_mac_ctrl(adapter);
290 if (netif_msg_link(adapter))
291 dev_info(&pdev->dev,
292 "%s: %s NIC Link is Up<%d Mbps %s>\n",
293 atl1c_driver_name, netdev->name,
294 adapter->link_speed,
295 adapter->link_duplex == FULL_DUPLEX ?
296 "Full Duplex" : "Half Duplex");
297 }
298 if (!netif_carrier_ok(netdev))
299 netif_carrier_on(netdev);
300 }
301 }
302
303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
304 {
305 struct net_device *netdev = adapter->netdev;
306 struct pci_dev *pdev = adapter->pdev;
307 u16 phy_data;
308 u16 link_up;
309
310 spin_lock(&adapter->mdio_lock);
311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
313 spin_unlock(&adapter->mdio_lock);
314 link_up = phy_data & BMSR_LSTATUS;
315 /* notify upper layer link down ASAP */
316 if (!link_up) {
317 if (netif_carrier_ok(netdev)) {
318 /* old link state: Up */
319 netif_carrier_off(netdev);
320 if (netif_msg_link(adapter))
321 dev_info(&pdev->dev,
322 "%s: %s NIC Link is Down\n",
323 atl1c_driver_name, netdev->name);
324 adapter->link_speed = SPEED_0;
325 }
326 }
327
328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
329 schedule_work(&adapter->common_task);
330 }
331
332 static void atl1c_common_task(struct work_struct *work)
333 {
334 struct atl1c_adapter *adapter;
335 struct net_device *netdev;
336
337 adapter = container_of(work, struct atl1c_adapter, common_task);
338 netdev = adapter->netdev;
339
340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
341 netif_device_detach(netdev);
342 atl1c_down(adapter);
343 atl1c_up(adapter);
344 netif_device_attach(netdev);
345 }
346
347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
348 &adapter->work_event))
349 atl1c_check_link_status(adapter);
350 }
351
352
353 static void atl1c_del_timer(struct atl1c_adapter *adapter)
354 {
355 del_timer_sync(&adapter->phy_config_timer);
356 }
357
358
359 /*
360 * atl1c_tx_timeout - Respond to a Tx Hang
361 * @netdev: network interface device structure
362 */
363 static void atl1c_tx_timeout(struct net_device *netdev)
364 {
365 struct atl1c_adapter *adapter = netdev_priv(netdev);
366
367 /* Do the reset outside of interrupt context */
368 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
369 schedule_work(&adapter->common_task);
370 }
371
372 /*
373 * atl1c_set_multi - Multicast and Promiscuous mode set
374 * @netdev: network interface device structure
375 *
376 * The set_multi entry point is called whenever the multicast address
377 * list or the network interface flags are updated. This routine is
378 * responsible for configuring the hardware for proper multicast,
379 * promiscuous mode, and all-multi behavior.
380 */
381 static void atl1c_set_multi(struct net_device *netdev)
382 {
383 struct atl1c_adapter *adapter = netdev_priv(netdev);
384 struct atl1c_hw *hw = &adapter->hw;
385 struct netdev_hw_addr *ha;
386 u32 mac_ctrl_data;
387 u32 hash_value;
388
389 /* Check for Promiscuous and All Multicast modes */
390 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
391
392 if (netdev->flags & IFF_PROMISC) {
393 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
394 } else if (netdev->flags & IFF_ALLMULTI) {
395 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
396 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
397 } else {
398 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
399 }
400
401 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
402
403 /* clear the old settings from the multicast hash table */
404 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
405 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
406
407 /* comoute mc addresses' hash value ,and put it into hash table */
408 netdev_for_each_mc_addr(ha, netdev) {
409 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
410 atl1c_hash_set(hw, hash_value);
411 }
412 }
413
414 static void atl1c_vlan_rx_register(struct net_device *netdev,
415 struct vlan_group *grp)
416 {
417 struct atl1c_adapter *adapter = netdev_priv(netdev);
418 struct pci_dev *pdev = adapter->pdev;
419 u32 mac_ctrl_data = 0;
420
421 if (netif_msg_pktdata(adapter))
422 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
423
424 atl1c_irq_disable(adapter);
425
426 adapter->vlgrp = grp;
427 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
428
429 if (grp) {
430 /* enable VLAN tag insert/strip */
431 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
432 } else {
433 /* disable VLAN tag insert/strip */
434 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
435 }
436
437 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
438 atl1c_irq_enable(adapter);
439 }
440
441 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
442 {
443 struct pci_dev *pdev = adapter->pdev;
444
445 if (netif_msg_pktdata(adapter))
446 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
447 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
448 }
449 /*
450 * atl1c_set_mac - Change the Ethernet Address of the NIC
451 * @netdev: network interface device structure
452 * @p: pointer to an address structure
453 *
454 * Returns 0 on success, negative on failure
455 */
456 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
457 {
458 struct atl1c_adapter *adapter = netdev_priv(netdev);
459 struct sockaddr *addr = p;
460
461 if (!is_valid_ether_addr(addr->sa_data))
462 return -EADDRNOTAVAIL;
463
464 if (netif_running(netdev))
465 return -EBUSY;
466
467 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
468 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
469
470 atl1c_hw_set_mac_addr(&adapter->hw);
471
472 return 0;
473 }
474
475 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
476 struct net_device *dev)
477 {
478 int mtu = dev->mtu;
479
480 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
481 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
482 }
483
484 static u32 atl1c_fix_features(struct net_device *netdev, u32 features)
485 {
486 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
487 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
488
489 return features;
490 }
491
492 /*
493 * atl1c_change_mtu - Change the Maximum Transfer Unit
494 * @netdev: network interface device structure
495 * @new_mtu: new value for maximum frame size
496 *
497 * Returns 0 on success, negative on failure
498 */
499 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
500 {
501 struct atl1c_adapter *adapter = netdev_priv(netdev);
502 int old_mtu = netdev->mtu;
503 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
504
505 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
506 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
507 if (netif_msg_link(adapter))
508 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
509 return -EINVAL;
510 }
511 /* set MTU */
512 if (old_mtu != new_mtu && netif_running(netdev)) {
513 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
514 msleep(1);
515 netdev->mtu = new_mtu;
516 adapter->hw.max_frame_size = new_mtu;
517 atl1c_set_rxbufsize(adapter, netdev);
518 atl1c_down(adapter);
519 netdev_update_features(netdev);
520 atl1c_up(adapter);
521 clear_bit(__AT_RESETTING, &adapter->flags);
522 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
523 u32 phy_data;
524
525 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
526 phy_data |= 0x10000000;
527 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
528 }
529
530 }
531 return 0;
532 }
533
534 /*
535 * caller should hold mdio_lock
536 */
537 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
538 {
539 struct atl1c_adapter *adapter = netdev_priv(netdev);
540 u16 result;
541
542 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
543 return result;
544 }
545
546 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
547 int reg_num, int val)
548 {
549 struct atl1c_adapter *adapter = netdev_priv(netdev);
550
551 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
552 }
553
554 /*
555 * atl1c_mii_ioctl -
556 * @netdev:
557 * @ifreq:
558 * @cmd:
559 */
560 static int atl1c_mii_ioctl(struct net_device *netdev,
561 struct ifreq *ifr, int cmd)
562 {
563 struct atl1c_adapter *adapter = netdev_priv(netdev);
564 struct pci_dev *pdev = adapter->pdev;
565 struct mii_ioctl_data *data = if_mii(ifr);
566 unsigned long flags;
567 int retval = 0;
568
569 if (!netif_running(netdev))
570 return -EINVAL;
571
572 spin_lock_irqsave(&adapter->mdio_lock, flags);
573 switch (cmd) {
574 case SIOCGMIIPHY:
575 data->phy_id = 0;
576 break;
577
578 case SIOCGMIIREG:
579 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
580 &data->val_out)) {
581 retval = -EIO;
582 goto out;
583 }
584 break;
585
586 case SIOCSMIIREG:
587 if (data->reg_num & ~(0x1F)) {
588 retval = -EFAULT;
589 goto out;
590 }
591
592 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
593 data->reg_num, data->val_in);
594 if (atl1c_write_phy_reg(&adapter->hw,
595 data->reg_num, data->val_in)) {
596 retval = -EIO;
597 goto out;
598 }
599 break;
600
601 default:
602 retval = -EOPNOTSUPP;
603 break;
604 }
605 out:
606 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
607 return retval;
608 }
609
610 /*
611 * atl1c_ioctl -
612 * @netdev:
613 * @ifreq:
614 * @cmd:
615 */
616 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
617 {
618 switch (cmd) {
619 case SIOCGMIIPHY:
620 case SIOCGMIIREG:
621 case SIOCSMIIREG:
622 return atl1c_mii_ioctl(netdev, ifr, cmd);
623 default:
624 return -EOPNOTSUPP;
625 }
626 }
627
628 /*
629 * atl1c_alloc_queues - Allocate memory for all rings
630 * @adapter: board private structure to initialize
631 *
632 */
633 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
634 {
635 return 0;
636 }
637
638 static void atl1c_set_mac_type(struct atl1c_hw *hw)
639 {
640 switch (hw->device_id) {
641 case PCI_DEVICE_ID_ATTANSIC_L2C:
642 hw->nic_type = athr_l2c;
643 break;
644 case PCI_DEVICE_ID_ATTANSIC_L1C:
645 hw->nic_type = athr_l1c;
646 break;
647 case PCI_DEVICE_ID_ATHEROS_L2C_B:
648 hw->nic_type = athr_l2c_b;
649 break;
650 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
651 hw->nic_type = athr_l2c_b2;
652 break;
653 case PCI_DEVICE_ID_ATHEROS_L1D:
654 hw->nic_type = athr_l1d;
655 break;
656 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
657 hw->nic_type = athr_l1d_2;
658 break;
659 default:
660 break;
661 }
662 }
663
664 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
665 {
666 u32 phy_status_data;
667 u32 link_ctrl_data;
668
669 atl1c_set_mac_type(hw);
670 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
671 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
672
673 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
674 ATL1C_TXQ_MODE_ENHANCE;
675 if (link_ctrl_data & LINK_CTRL_L0S_EN)
676 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
677 if (link_ctrl_data & LINK_CTRL_L1_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
680 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
681 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
682
683 if (hw->nic_type == athr_l1c ||
684 hw->nic_type == athr_l1d ||
685 hw->nic_type == athr_l1d_2)
686 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
687 return 0;
688 }
689 /*
690 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
691 * @adapter: board private structure to initialize
692 *
693 * atl1c_sw_init initializes the Adapter private data structure.
694 * Fields are initialized based on PCI device information and
695 * OS network device settings (MTU size).
696 */
697 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
698 {
699 struct atl1c_hw *hw = &adapter->hw;
700 struct pci_dev *pdev = adapter->pdev;
701 u32 revision;
702
703
704 adapter->wol = 0;
705 device_set_wakeup_enable(&pdev->dev, false);
706 adapter->link_speed = SPEED_0;
707 adapter->link_duplex = FULL_DUPLEX;
708 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
709 adapter->tpd_ring[0].count = 1024;
710 adapter->rfd_ring[0].count = 512;
711
712 hw->vendor_id = pdev->vendor;
713 hw->device_id = pdev->device;
714 hw->subsystem_vendor_id = pdev->subsystem_vendor;
715 hw->subsystem_id = pdev->subsystem_device;
716 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
717 hw->revision_id = revision & 0xFF;
718 /* before link up, we assume hibernate is true */
719 hw->hibernate = true;
720 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
721 if (atl1c_setup_mac_funcs(hw) != 0) {
722 dev_err(&pdev->dev, "set mac function pointers failed\n");
723 return -1;
724 }
725 hw->intr_mask = IMR_NORMAL_MASK;
726 hw->phy_configured = false;
727 hw->preamble_len = 7;
728 hw->max_frame_size = adapter->netdev->mtu;
729 if (adapter->num_rx_queues < 2) {
730 hw->rss_type = atl1c_rss_disable;
731 hw->rss_mode = atl1c_rss_mode_disable;
732 } else {
733 hw->rss_type = atl1c_rss_ipv4;
734 hw->rss_mode = atl1c_rss_mul_que_mul_int;
735 hw->rss_hash_bits = 16;
736 }
737 hw->autoneg_advertised = ADVERTISED_Autoneg;
738 hw->indirect_tab = 0xE4E4E4E4;
739 hw->base_cpu = 0;
740
741 hw->ict = 50000; /* 100ms */
742 hw->smb_timer = 200000; /* 400ms */
743 hw->cmb_tpd = 4;
744 hw->cmb_tx_timer = 1; /* 2 us */
745 hw->rx_imt = 200;
746 hw->tx_imt = 1000;
747
748 hw->tpd_burst = 5;
749 hw->rfd_burst = 8;
750 hw->dma_order = atl1c_dma_ord_out;
751 hw->dmar_block = atl1c_dma_req_1024;
752 hw->dmaw_block = atl1c_dma_req_1024;
753 hw->dmar_dly_cnt = 15;
754 hw->dmaw_dly_cnt = 4;
755
756 if (atl1c_alloc_queues(adapter)) {
757 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
758 return -ENOMEM;
759 }
760 /* TODO */
761 atl1c_set_rxbufsize(adapter, adapter->netdev);
762 atomic_set(&adapter->irq_sem, 1);
763 spin_lock_init(&adapter->mdio_lock);
764 spin_lock_init(&adapter->tx_lock);
765 set_bit(__AT_DOWN, &adapter->flags);
766
767 return 0;
768 }
769
770 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
771 struct atl1c_buffer *buffer_info, int in_irq)
772 {
773 u16 pci_driection;
774 if (buffer_info->flags & ATL1C_BUFFER_FREE)
775 return;
776 if (buffer_info->dma) {
777 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
778 pci_driection = PCI_DMA_FROMDEVICE;
779 else
780 pci_driection = PCI_DMA_TODEVICE;
781
782 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
783 pci_unmap_single(pdev, buffer_info->dma,
784 buffer_info->length, pci_driection);
785 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
786 pci_unmap_page(pdev, buffer_info->dma,
787 buffer_info->length, pci_driection);
788 }
789 if (buffer_info->skb) {
790 if (in_irq)
791 dev_kfree_skb_irq(buffer_info->skb);
792 else
793 dev_kfree_skb(buffer_info->skb);
794 }
795 buffer_info->dma = 0;
796 buffer_info->skb = NULL;
797 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
798 }
799 /*
800 * atl1c_clean_tx_ring - Free Tx-skb
801 * @adapter: board private structure
802 */
803 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
804 enum atl1c_trans_queue type)
805 {
806 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
807 struct atl1c_buffer *buffer_info;
808 struct pci_dev *pdev = adapter->pdev;
809 u16 index, ring_count;
810
811 ring_count = tpd_ring->count;
812 for (index = 0; index < ring_count; index++) {
813 buffer_info = &tpd_ring->buffer_info[index];
814 atl1c_clean_buffer(pdev, buffer_info, 0);
815 }
816
817 /* Zero out Tx-buffers */
818 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
819 ring_count);
820 atomic_set(&tpd_ring->next_to_clean, 0);
821 tpd_ring->next_to_use = 0;
822 }
823
824 /*
825 * atl1c_clean_rx_ring - Free rx-reservation skbs
826 * @adapter: board private structure
827 */
828 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
829 {
830 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
831 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
832 struct atl1c_buffer *buffer_info;
833 struct pci_dev *pdev = adapter->pdev;
834 int i, j;
835
836 for (i = 0; i < adapter->num_rx_queues; i++) {
837 for (j = 0; j < rfd_ring[i].count; j++) {
838 buffer_info = &rfd_ring[i].buffer_info[j];
839 atl1c_clean_buffer(pdev, buffer_info, 0);
840 }
841 /* zero out the descriptor ring */
842 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
843 rfd_ring[i].next_to_clean = 0;
844 rfd_ring[i].next_to_use = 0;
845 rrd_ring[i].next_to_use = 0;
846 rrd_ring[i].next_to_clean = 0;
847 }
848 }
849
850 /*
851 * Read / Write Ptr Initialize:
852 */
853 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
854 {
855 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
856 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
857 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
858 struct atl1c_buffer *buffer_info;
859 int i, j;
860
861 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
862 tpd_ring[i].next_to_use = 0;
863 atomic_set(&tpd_ring[i].next_to_clean, 0);
864 buffer_info = tpd_ring[i].buffer_info;
865 for (j = 0; j < tpd_ring->count; j++)
866 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
867 ATL1C_BUFFER_FREE);
868 }
869 for (i = 0; i < adapter->num_rx_queues; i++) {
870 rfd_ring[i].next_to_use = 0;
871 rfd_ring[i].next_to_clean = 0;
872 rrd_ring[i].next_to_use = 0;
873 rrd_ring[i].next_to_clean = 0;
874 for (j = 0; j < rfd_ring[i].count; j++) {
875 buffer_info = &rfd_ring[i].buffer_info[j];
876 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
877 }
878 }
879 }
880
881 /*
882 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
883 * @adapter: board private structure
884 *
885 * Free all transmit software resources
886 */
887 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
888 {
889 struct pci_dev *pdev = adapter->pdev;
890
891 pci_free_consistent(pdev, adapter->ring_header.size,
892 adapter->ring_header.desc,
893 adapter->ring_header.dma);
894 adapter->ring_header.desc = NULL;
895
896 /* Note: just free tdp_ring.buffer_info,
897 * it contain rfd_ring.buffer_info, do not double free */
898 if (adapter->tpd_ring[0].buffer_info) {
899 kfree(adapter->tpd_ring[0].buffer_info);
900 adapter->tpd_ring[0].buffer_info = NULL;
901 }
902 }
903
904 /*
905 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
906 * @adapter: board private structure
907 *
908 * Return 0 on success, negative on failure
909 */
910 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
911 {
912 struct pci_dev *pdev = adapter->pdev;
913 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
914 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
915 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
916 struct atl1c_ring_header *ring_header = &adapter->ring_header;
917 int num_rx_queues = adapter->num_rx_queues;
918 int size;
919 int i;
920 int count = 0;
921 int rx_desc_count = 0;
922 u32 offset = 0;
923
924 rrd_ring[0].count = rfd_ring[0].count;
925 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
926 tpd_ring[i].count = tpd_ring[0].count;
927
928 for (i = 1; i < adapter->num_rx_queues; i++)
929 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
930
931 /* 2 tpd queue, one high priority queue,
932 * another normal priority queue */
933 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
934 rfd_ring->count * num_rx_queues);
935 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
936 if (unlikely(!tpd_ring->buffer_info)) {
937 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
938 size);
939 goto err_nomem;
940 }
941 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
942 tpd_ring[i].buffer_info =
943 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
944 count += tpd_ring[i].count;
945 }
946
947 for (i = 0; i < num_rx_queues; i++) {
948 rfd_ring[i].buffer_info =
949 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
950 count += rfd_ring[i].count;
951 rx_desc_count += rfd_ring[i].count;
952 }
953 /*
954 * real ring DMA buffer
955 * each ring/block may need up to 8 bytes for alignment, hence the
956 * additional bytes tacked onto the end.
957 */
958 ring_header->size = size =
959 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
960 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
961 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
962 sizeof(struct atl1c_hw_stats) +
963 8 * 4 + 8 * 2 * num_rx_queues;
964
965 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
966 &ring_header->dma);
967 if (unlikely(!ring_header->desc)) {
968 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
969 goto err_nomem;
970 }
971 memset(ring_header->desc, 0, ring_header->size);
972 /* init TPD ring */
973
974 tpd_ring[0].dma = roundup(ring_header->dma, 8);
975 offset = tpd_ring[0].dma - ring_header->dma;
976 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
977 tpd_ring[i].dma = ring_header->dma + offset;
978 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
979 tpd_ring[i].size =
980 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
981 offset += roundup(tpd_ring[i].size, 8);
982 }
983 /* init RFD ring */
984 for (i = 0; i < num_rx_queues; i++) {
985 rfd_ring[i].dma = ring_header->dma + offset;
986 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
987 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
988 rfd_ring[i].count;
989 offset += roundup(rfd_ring[i].size, 8);
990 }
991
992 /* init RRD ring */
993 for (i = 0; i < num_rx_queues; i++) {
994 rrd_ring[i].dma = ring_header->dma + offset;
995 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
996 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
997 rrd_ring[i].count;
998 offset += roundup(rrd_ring[i].size, 8);
999 }
1000
1001 adapter->smb.dma = ring_header->dma + offset;
1002 adapter->smb.smb = (u8 *)ring_header->desc + offset;
1003 return 0;
1004
1005 err_nomem:
1006 kfree(tpd_ring->buffer_info);
1007 return -ENOMEM;
1008 }
1009
1010 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1011 {
1012 struct atl1c_hw *hw = &adapter->hw;
1013 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
1014 adapter->rfd_ring;
1015 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
1016 adapter->rrd_ring;
1017 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1018 adapter->tpd_ring;
1019 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
1020 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
1021 int i;
1022 u32 data;
1023
1024 /* TPD */
1025 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1026 (u32)((tpd_ring[atl1c_trans_normal].dma &
1027 AT_DMA_HI_ADDR_MASK) >> 32));
1028 /* just enable normal priority TX queue */
1029 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
1030 (u32)(tpd_ring[atl1c_trans_normal].dma &
1031 AT_DMA_LO_ADDR_MASK));
1032 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
1033 (u32)(tpd_ring[atl1c_trans_high].dma &
1034 AT_DMA_LO_ADDR_MASK));
1035 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1036 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1037
1038
1039 /* RFD */
1040 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1041 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1042 for (i = 0; i < adapter->num_rx_queues; i++)
1043 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
1044 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1045
1046 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1047 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1048 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1049 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1050
1051 /* RRD */
1052 for (i = 0; i < adapter->num_rx_queues; i++)
1053 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1054 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1055 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1056 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1057
1058 /* CMB */
1059 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1060
1061 /* SMB */
1062 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1063 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1064 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1065 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1066 if (hw->nic_type == athr_l2c_b) {
1067 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1068 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1069 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1070 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1071 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1072 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1073 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1074 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1075 }
1076 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1077 /* Power Saving for L2c_B */
1078 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1079 data |= SERDES_MAC_CLK_SLOWDOWN;
1080 data |= SERDES_PYH_CLK_SLOWDOWN;
1081 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1082 }
1083 /* Load all of base address above */
1084 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1085 }
1086
1087 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1088 {
1089 struct atl1c_hw *hw = &adapter->hw;
1090 u32 dev_ctrl_data;
1091 u32 max_pay_load;
1092 u16 tx_offload_thresh;
1093 u32 txq_ctrl_data;
1094 u32 max_pay_load_data;
1095
1096 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1097 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1098 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1099 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1100 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1101 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1102 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
1103 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1104 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1105 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1106
1107 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1108 TXQ_NUM_TPD_BURST_SHIFT;
1109 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1110 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1111 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
1112 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1113 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1114 max_pay_load_data >>= 1;
1115 txq_ctrl_data |= max_pay_load_data;
1116
1117 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1118 }
1119
1120 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1121 {
1122 struct atl1c_hw *hw = &adapter->hw;
1123 u32 rxq_ctrl_data;
1124
1125 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1126 RXQ_RFD_BURST_NUM_SHIFT;
1127
1128 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1129 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1130 if (hw->rss_type == atl1c_rss_ipv4)
1131 rxq_ctrl_data |= RSS_HASH_IPV4;
1132 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1133 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1134 if (hw->rss_type == atl1c_rss_ipv6)
1135 rxq_ctrl_data |= RSS_HASH_IPV6;
1136 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1137 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1138 if (hw->rss_type != atl1c_rss_disable)
1139 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1140
1141 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1142 RSS_MODE_SHIFT;
1143 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1144 RSS_HASH_BITS_SHIFT;
1145 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1146 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
1147 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1148
1149 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1150 }
1151
1152 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1153 {
1154 struct atl1c_hw *hw = &adapter->hw;
1155
1156 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1157 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1158 }
1159
1160 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1161 {
1162 struct atl1c_hw *hw = &adapter->hw;
1163 u32 dma_ctrl_data;
1164
1165 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1166 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1167 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1168 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1169 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1170 else
1171 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1172
1173 switch (hw->dma_order) {
1174 case atl1c_dma_ord_in:
1175 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1176 break;
1177 case atl1c_dma_ord_enh:
1178 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1179 break;
1180 case atl1c_dma_ord_out:
1181 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1182 break;
1183 default:
1184 break;
1185 }
1186
1187 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1188 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1189 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1190 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1191 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1192 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1193 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1194 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1195
1196 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1197 }
1198
1199 /*
1200 * Stop the mac, transmit and receive units
1201 * hw - Struct containing variables accessed by shared code
1202 * return : 0 or idle status (if error)
1203 */
1204 static int atl1c_stop_mac(struct atl1c_hw *hw)
1205 {
1206 u32 data;
1207
1208 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1209 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1210 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1211 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1212
1213 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1214 data &= ~TXQ_CTRL_EN;
1215 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1216
1217 atl1c_wait_until_idle(hw);
1218
1219 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1220 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1221 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1222
1223 return (int)atl1c_wait_until_idle(hw);
1224 }
1225
1226 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1227 {
1228 u32 data;
1229
1230 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1231 switch (hw->adapter->num_rx_queues) {
1232 case 4:
1233 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1234 break;
1235 case 3:
1236 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1237 break;
1238 case 2:
1239 data |= RXQ1_CTRL_EN;
1240 break;
1241 default:
1242 break;
1243 }
1244 data |= RXQ_CTRL_EN;
1245 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1246 }
1247
1248 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1249 {
1250 u32 data;
1251
1252 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1253 data |= TXQ_CTRL_EN;
1254 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1255 }
1256
1257 /*
1258 * Reset the transmit and receive units; mask and clear all interrupts.
1259 * hw - Struct containing variables accessed by shared code
1260 * return : 0 or idle status (if error)
1261 */
1262 static int atl1c_reset_mac(struct atl1c_hw *hw)
1263 {
1264 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1265 struct pci_dev *pdev = adapter->pdev;
1266 u32 master_ctrl_data = 0;
1267
1268 AT_WRITE_REG(hw, REG_IMR, 0);
1269 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1270
1271 atl1c_stop_mac(hw);
1272 /*
1273 * Issue Soft Reset to the MAC. This will reset the chip's
1274 * transmit, receive, DMA. It will not effect
1275 * the current PCI configuration. The global reset bit is self-
1276 * clearing, and should clear within a microsecond.
1277 */
1278 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1279 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1280 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1281 & 0xFFFF));
1282
1283 AT_WRITE_FLUSH(hw);
1284 msleep(10);
1285 /* Wait at least 10ms for All module to be Idle */
1286
1287 if (atl1c_wait_until_idle(hw)) {
1288 dev_err(&pdev->dev,
1289 "MAC state machine can't be idle since"
1290 " disabled for 10ms second\n");
1291 return -1;
1292 }
1293 return 0;
1294 }
1295
1296 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1297 {
1298 u32 pm_ctrl_data;
1299
1300 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1301 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1302 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1303 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1304 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1305 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1306 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1307 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1308
1309 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1310 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1311 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1312 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1313 }
1314
1315 /*
1316 * Set ASPM state.
1317 * Enable/disable L0s/L1 depend on link state.
1318 */
1319 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1320 {
1321 u32 pm_ctrl_data;
1322 u32 link_ctrl_data;
1323 u32 link_l1_timer = 0xF;
1324
1325 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1326 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1327
1328 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1329 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1330 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1331 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1332 PM_CTRL_LCKDET_TIMER_SHIFT);
1333 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
1334
1335 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1336 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1337 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1338 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1339 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
1340 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1341 }
1342
1343 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1344
1345 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1346 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1347 PM_CTRL_PM_REQ_TIMER_SHIFT);
1348 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1349 PM_CTRL_PM_REQ_TIMER_SHIFT;
1350 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1351 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1352 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1353 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1354 }
1355 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1356 if (linkup) {
1357 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1358 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1359 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1360 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1361 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1362 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1363
1364 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1365 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1366 if (hw->nic_type == athr_l2c_b)
1367 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1368 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1369 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1370 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1371 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1372 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1373 if (hw->adapter->link_speed == SPEED_100 ||
1374 hw->adapter->link_speed == SPEED_1000) {
1375 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1376 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1377 if (hw->nic_type == athr_l2c_b)
1378 link_l1_timer = 7;
1379 else if (hw->nic_type == athr_l2c_b2 ||
1380 hw->nic_type == athr_l1d_2)
1381 link_l1_timer = 4;
1382 pm_ctrl_data |= link_l1_timer <<
1383 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1384 }
1385 } else {
1386 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1387 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1388 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1389 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1390 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1391 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1392
1393 }
1394 } else {
1395 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1396 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1397 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1398 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1399
1400 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1401 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1402 else
1403 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1404 }
1405 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1406
1407 return;
1408 }
1409
1410 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1411 {
1412 struct atl1c_hw *hw = &adapter->hw;
1413 struct net_device *netdev = adapter->netdev;
1414 u32 mac_ctrl_data;
1415
1416 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1417 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1418
1419 if (adapter->link_duplex == FULL_DUPLEX) {
1420 hw->mac_duplex = true;
1421 mac_ctrl_data |= MAC_CTRL_DUPLX;
1422 }
1423
1424 if (adapter->link_speed == SPEED_1000)
1425 hw->mac_speed = atl1c_mac_speed_1000;
1426 else
1427 hw->mac_speed = atl1c_mac_speed_10_100;
1428
1429 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1430 MAC_CTRL_SPEED_SHIFT;
1431
1432 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1433 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1434 MAC_CTRL_PRMLEN_SHIFT);
1435
1436 if (adapter->vlgrp)
1437 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1438
1439 mac_ctrl_data |= MAC_CTRL_BC_EN;
1440 if (netdev->flags & IFF_PROMISC)
1441 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1442 if (netdev->flags & IFF_ALLMULTI)
1443 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1444
1445 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1446 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1447 hw->nic_type == athr_l1d_2) {
1448 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1449 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1450 }
1451 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1452 }
1453
1454 /*
1455 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1456 * @adapter: board private structure
1457 *
1458 * Configure the Tx /Rx unit of the MAC after a reset.
1459 */
1460 static int atl1c_configure(struct atl1c_adapter *adapter)
1461 {
1462 struct atl1c_hw *hw = &adapter->hw;
1463 u32 master_ctrl_data = 0;
1464 u32 intr_modrt_data;
1465 u32 data;
1466
1467 /* clear interrupt status */
1468 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1469 /* Clear any WOL status */
1470 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1471 /* set Interrupt Clear Timer
1472 * HW will enable self to assert interrupt event to system after
1473 * waiting x-time for software to notify it accept interrupt.
1474 */
1475
1476 data = CLK_GATING_EN_ALL;
1477 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1478 if (hw->nic_type == athr_l2c_b)
1479 data &= ~CLK_GATING_RXMAC_EN;
1480 } else
1481 data = 0;
1482 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1483
1484 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1485 hw->ict & INT_RETRIG_TIMER_MASK);
1486
1487 atl1c_configure_des_ring(adapter);
1488
1489 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1490 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1491 IRQ_MODRT_TX_TIMER_SHIFT;
1492 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1493 IRQ_MODRT_RX_TIMER_SHIFT;
1494 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1495 master_ctrl_data |=
1496 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1497 }
1498
1499 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1500 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1501
1502 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1503 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1504
1505 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1506 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1507 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1508 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1509 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1510 }
1511
1512 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1513 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1514 hw->smb_timer & SMB_STAT_TIMER_MASK);
1515 /* set MTU */
1516 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1517 VLAN_HLEN + ETH_FCS_LEN);
1518 /* HDS, disable */
1519 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1520
1521 atl1c_configure_tx(adapter);
1522 atl1c_configure_rx(adapter);
1523 atl1c_configure_rss(adapter);
1524 atl1c_configure_dma(adapter);
1525
1526 return 0;
1527 }
1528
1529 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1530 {
1531 u16 hw_reg_addr = 0;
1532 unsigned long *stats_item = NULL;
1533 u32 data;
1534
1535 /* update rx status */
1536 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1537 stats_item = &adapter->hw_stats.rx_ok;
1538 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1539 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1540 *stats_item += data;
1541 stats_item++;
1542 hw_reg_addr += 4;
1543 }
1544 /* update tx status */
1545 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1546 stats_item = &adapter->hw_stats.tx_ok;
1547 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1548 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1549 *stats_item += data;
1550 stats_item++;
1551 hw_reg_addr += 4;
1552 }
1553 }
1554
1555 /*
1556 * atl1c_get_stats - Get System Network Statistics
1557 * @netdev: network interface device structure
1558 *
1559 * Returns the address of the device statistics structure.
1560 * The statistics are actually updated from the timer callback.
1561 */
1562 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1563 {
1564 struct atl1c_adapter *adapter = netdev_priv(netdev);
1565 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1566 struct net_device_stats *net_stats = &netdev->stats;
1567
1568 atl1c_update_hw_stats(adapter);
1569 net_stats->rx_packets = hw_stats->rx_ok;
1570 net_stats->tx_packets = hw_stats->tx_ok;
1571 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1572 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1573 net_stats->multicast = hw_stats->rx_mcast;
1574 net_stats->collisions = hw_stats->tx_1_col +
1575 hw_stats->tx_2_col * 2 +
1576 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1577 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1578 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1579 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1580 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1581 net_stats->rx_length_errors = hw_stats->rx_len_err;
1582 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1583 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1584 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1585
1586 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1587
1588 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1589 hw_stats->tx_underrun + hw_stats->tx_trunc;
1590 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1591 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1592 net_stats->tx_window_errors = hw_stats->tx_late_col;
1593
1594 return net_stats;
1595 }
1596
1597 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1598 {
1599 u16 phy_data;
1600
1601 spin_lock(&adapter->mdio_lock);
1602 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1603 spin_unlock(&adapter->mdio_lock);
1604 }
1605
1606 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1607 enum atl1c_trans_queue type)
1608 {
1609 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1610 &adapter->tpd_ring[type];
1611 struct atl1c_buffer *buffer_info;
1612 struct pci_dev *pdev = adapter->pdev;
1613 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1614 u16 hw_next_to_clean;
1615 u16 shift;
1616 u32 data;
1617
1618 if (type == atl1c_trans_high)
1619 shift = MB_HTPD_CONS_IDX_SHIFT;
1620 else
1621 shift = MB_NTPD_CONS_IDX_SHIFT;
1622
1623 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1624 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1625
1626 while (next_to_clean != hw_next_to_clean) {
1627 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1628 atl1c_clean_buffer(pdev, buffer_info, 1);
1629 if (++next_to_clean == tpd_ring->count)
1630 next_to_clean = 0;
1631 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1632 }
1633
1634 if (netif_queue_stopped(adapter->netdev) &&
1635 netif_carrier_ok(adapter->netdev)) {
1636 netif_wake_queue(adapter->netdev);
1637 }
1638
1639 return true;
1640 }
1641
1642 /*
1643 * atl1c_intr - Interrupt Handler
1644 * @irq: interrupt number
1645 * @data: pointer to a network interface device structure
1646 * @pt_regs: CPU registers structure
1647 */
1648 static irqreturn_t atl1c_intr(int irq, void *data)
1649 {
1650 struct net_device *netdev = data;
1651 struct atl1c_adapter *adapter = netdev_priv(netdev);
1652 struct pci_dev *pdev = adapter->pdev;
1653 struct atl1c_hw *hw = &adapter->hw;
1654 int max_ints = AT_MAX_INT_WORK;
1655 int handled = IRQ_NONE;
1656 u32 status;
1657 u32 reg_data;
1658
1659 do {
1660 AT_READ_REG(hw, REG_ISR, &reg_data);
1661 status = reg_data & hw->intr_mask;
1662
1663 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1664 if (max_ints != AT_MAX_INT_WORK)
1665 handled = IRQ_HANDLED;
1666 break;
1667 }
1668 /* link event */
1669 if (status & ISR_GPHY)
1670 atl1c_clear_phy_int(adapter);
1671 /* Ack ISR */
1672 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1673 if (status & ISR_RX_PKT) {
1674 if (likely(napi_schedule_prep(&adapter->napi))) {
1675 hw->intr_mask &= ~ISR_RX_PKT;
1676 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1677 __napi_schedule(&adapter->napi);
1678 }
1679 }
1680 if (status & ISR_TX_PKT)
1681 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1682
1683 handled = IRQ_HANDLED;
1684 /* check if PCIE PHY Link down */
1685 if (status & ISR_ERROR) {
1686 if (netif_msg_hw(adapter))
1687 dev_err(&pdev->dev,
1688 "atl1c hardware error (status = 0x%x)\n",
1689 status & ISR_ERROR);
1690 /* reset MAC */
1691 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
1692 schedule_work(&adapter->common_task);
1693 return IRQ_HANDLED;
1694 }
1695
1696 if (status & ISR_OVER)
1697 if (netif_msg_intr(adapter))
1698 dev_warn(&pdev->dev,
1699 "TX/RX overflow (status = 0x%x)\n",
1700 status & ISR_OVER);
1701
1702 /* link event */
1703 if (status & (ISR_GPHY | ISR_MANUAL)) {
1704 netdev->stats.tx_carrier_errors++;
1705 atl1c_link_chg_event(adapter);
1706 break;
1707 }
1708
1709 } while (--max_ints > 0);
1710 /* re-enable Interrupt*/
1711 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1712 return handled;
1713 }
1714
1715 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1716 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1717 {
1718 /*
1719 * The pid field in RRS in not correct sometimes, so we
1720 * cannot figure out if the packet is fragmented or not,
1721 * so we tell the KERNEL CHECKSUM_NONE
1722 */
1723 skb_checksum_none_assert(skb);
1724 }
1725
1726 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1727 {
1728 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1729 struct pci_dev *pdev = adapter->pdev;
1730 struct atl1c_buffer *buffer_info, *next_info;
1731 struct sk_buff *skb;
1732 void *vir_addr = NULL;
1733 u16 num_alloc = 0;
1734 u16 rfd_next_to_use, next_next;
1735 struct atl1c_rx_free_desc *rfd_desc;
1736
1737 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1738 if (++next_next == rfd_ring->count)
1739 next_next = 0;
1740 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1741 next_info = &rfd_ring->buffer_info[next_next];
1742
1743 while (next_info->flags & ATL1C_BUFFER_FREE) {
1744 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1745
1746 skb = dev_alloc_skb(adapter->rx_buffer_len);
1747 if (unlikely(!skb)) {
1748 if (netif_msg_rx_err(adapter))
1749 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1750 break;
1751 }
1752
1753 /*
1754 * Make buffer alignment 2 beyond a 16 byte boundary
1755 * this will result in a 16 byte aligned IP header after
1756 * the 14 byte MAC header is removed
1757 */
1758 vir_addr = skb->data;
1759 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1760 buffer_info->skb = skb;
1761 buffer_info->length = adapter->rx_buffer_len;
1762 buffer_info->dma = pci_map_single(pdev, vir_addr,
1763 buffer_info->length,
1764 PCI_DMA_FROMDEVICE);
1765 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1766 ATL1C_PCIMAP_FROMDEVICE);
1767 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1768 rfd_next_to_use = next_next;
1769 if (++next_next == rfd_ring->count)
1770 next_next = 0;
1771 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1772 next_info = &rfd_ring->buffer_info[next_next];
1773 num_alloc++;
1774 }
1775
1776 if (num_alloc) {
1777 /* TODO: update mailbox here */
1778 wmb();
1779 rfd_ring->next_to_use = rfd_next_to_use;
1780 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1781 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1782 }
1783
1784 return num_alloc;
1785 }
1786
1787 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1788 struct atl1c_recv_ret_status *rrs, u16 num)
1789 {
1790 u16 i;
1791 /* the relationship between rrd and rfd is one map one */
1792 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1793 rrd_ring->next_to_clean)) {
1794 rrs->word3 &= ~RRS_RXD_UPDATED;
1795 if (++rrd_ring->next_to_clean == rrd_ring->count)
1796 rrd_ring->next_to_clean = 0;
1797 }
1798 }
1799
1800 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1801 struct atl1c_recv_ret_status *rrs, u16 num)
1802 {
1803 u16 i;
1804 u16 rfd_index;
1805 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1806
1807 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1808 RRS_RX_RFD_INDEX_MASK;
1809 for (i = 0; i < num; i++) {
1810 buffer_info[rfd_index].skb = NULL;
1811 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1812 ATL1C_BUFFER_FREE);
1813 if (++rfd_index == rfd_ring->count)
1814 rfd_index = 0;
1815 }
1816 rfd_ring->next_to_clean = rfd_index;
1817 }
1818
1819 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1820 int *work_done, int work_to_do)
1821 {
1822 u16 rfd_num, rfd_index;
1823 u16 count = 0;
1824 u16 length;
1825 struct pci_dev *pdev = adapter->pdev;
1826 struct net_device *netdev = adapter->netdev;
1827 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1828 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1829 struct sk_buff *skb;
1830 struct atl1c_recv_ret_status *rrs;
1831 struct atl1c_buffer *buffer_info;
1832
1833 while (1) {
1834 if (*work_done >= work_to_do)
1835 break;
1836 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1837 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1838 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1839 RRS_RX_RFD_CNT_MASK;
1840 if (unlikely(rfd_num != 1))
1841 /* TODO support mul rfd*/
1842 if (netif_msg_rx_err(adapter))
1843 dev_warn(&pdev->dev,
1844 "Multi rfd not support yet!\n");
1845 goto rrs_checked;
1846 } else {
1847 break;
1848 }
1849 rrs_checked:
1850 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1851 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1852 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1853 if (netif_msg_rx_err(adapter))
1854 dev_warn(&pdev->dev,
1855 "wrong packet! rrs word3 is %x\n",
1856 rrs->word3);
1857 continue;
1858 }
1859
1860 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1861 RRS_PKT_SIZE_MASK);
1862 /* Good Receive */
1863 if (likely(rfd_num == 1)) {
1864 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1865 RRS_RX_RFD_INDEX_MASK;
1866 buffer_info = &rfd_ring->buffer_info[rfd_index];
1867 pci_unmap_single(pdev, buffer_info->dma,
1868 buffer_info->length, PCI_DMA_FROMDEVICE);
1869 skb = buffer_info->skb;
1870 } else {
1871 /* TODO */
1872 if (netif_msg_rx_err(adapter))
1873 dev_warn(&pdev->dev,
1874 "Multi rfd not support yet!\n");
1875 break;
1876 }
1877 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1878 skb_put(skb, length - ETH_FCS_LEN);
1879 skb->protocol = eth_type_trans(skb, netdev);
1880 atl1c_rx_checksum(adapter, skb, rrs);
1881 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1882 u16 vlan;
1883
1884 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1885 vlan = le16_to_cpu(vlan);
1886 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1887 } else
1888 netif_receive_skb(skb);
1889
1890 (*work_done)++;
1891 count++;
1892 }
1893 if (count)
1894 atl1c_alloc_rx_buffer(adapter, que);
1895 }
1896
1897 /*
1898 * atl1c_clean - NAPI Rx polling callback
1899 * @adapter: board private structure
1900 */
1901 static int atl1c_clean(struct napi_struct *napi, int budget)
1902 {
1903 struct atl1c_adapter *adapter =
1904 container_of(napi, struct atl1c_adapter, napi);
1905 int work_done = 0;
1906
1907 /* Keep link state information with original netdev */
1908 if (!netif_carrier_ok(adapter->netdev))
1909 goto quit_polling;
1910 /* just enable one RXQ */
1911 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1912
1913 if (work_done < budget) {
1914 quit_polling:
1915 napi_complete(napi);
1916 adapter->hw.intr_mask |= ISR_RX_PKT;
1917 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1918 }
1919 return work_done;
1920 }
1921
1922 #ifdef CONFIG_NET_POLL_CONTROLLER
1923
1924 /*
1925 * Polling 'interrupt' - used by things like netconsole to send skbs
1926 * without having to re-enable interrupts. It's not called while
1927 * the interrupt routine is executing.
1928 */
1929 static void atl1c_netpoll(struct net_device *netdev)
1930 {
1931 struct atl1c_adapter *adapter = netdev_priv(netdev);
1932
1933 disable_irq(adapter->pdev->irq);
1934 atl1c_intr(adapter->pdev->irq, netdev);
1935 enable_irq(adapter->pdev->irq);
1936 }
1937 #endif
1938
1939 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1940 {
1941 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1942 u16 next_to_use = 0;
1943 u16 next_to_clean = 0;
1944
1945 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1946 next_to_use = tpd_ring->next_to_use;
1947
1948 return (u16)(next_to_clean > next_to_use) ?
1949 (next_to_clean - next_to_use - 1) :
1950 (tpd_ring->count + next_to_clean - next_to_use - 1);
1951 }
1952
1953 /*
1954 * get next usable tpd
1955 * Note: should call atl1c_tdp_avail to make sure
1956 * there is enough tpd to use
1957 */
1958 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1959 enum atl1c_trans_queue type)
1960 {
1961 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1962 struct atl1c_tpd_desc *tpd_desc;
1963 u16 next_to_use = 0;
1964
1965 next_to_use = tpd_ring->next_to_use;
1966 if (++tpd_ring->next_to_use == tpd_ring->count)
1967 tpd_ring->next_to_use = 0;
1968 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1969 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1970 return tpd_desc;
1971 }
1972
1973 static struct atl1c_buffer *
1974 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1975 {
1976 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1977
1978 return &tpd_ring->buffer_info[tpd -
1979 (struct atl1c_tpd_desc *)tpd_ring->desc];
1980 }
1981
1982 /* Calculate the transmit packet descript needed*/
1983 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1984 {
1985 u16 tpd_req;
1986 u16 proto_hdr_len = 0;
1987
1988 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1989
1990 if (skb_is_gso(skb)) {
1991 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1992 if (proto_hdr_len < skb_headlen(skb))
1993 tpd_req++;
1994 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1995 tpd_req++;
1996 }
1997 return tpd_req;
1998 }
1999
2000 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2001 struct sk_buff *skb,
2002 struct atl1c_tpd_desc **tpd,
2003 enum atl1c_trans_queue type)
2004 {
2005 struct pci_dev *pdev = adapter->pdev;
2006 u8 hdr_len;
2007 u32 real_len;
2008 unsigned short offload_type;
2009 int err;
2010
2011 if (skb_is_gso(skb)) {
2012 if (skb_header_cloned(skb)) {
2013 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2014 if (unlikely(err))
2015 return -1;
2016 }
2017 offload_type = skb_shinfo(skb)->gso_type;
2018
2019 if (offload_type & SKB_GSO_TCPV4) {
2020 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2021 + ntohs(ip_hdr(skb)->tot_len));
2022
2023 if (real_len < skb->len)
2024 pskb_trim(skb, real_len);
2025
2026 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2027 if (unlikely(skb->len == hdr_len)) {
2028 /* only xsum need */
2029 if (netif_msg_tx_queued(adapter))
2030 dev_warn(&pdev->dev,
2031 "IPV4 tso with zero data??\n");
2032 goto check_sum;
2033 } else {
2034 ip_hdr(skb)->check = 0;
2035 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2036 ip_hdr(skb)->saddr,
2037 ip_hdr(skb)->daddr,
2038 0, IPPROTO_TCP, 0);
2039 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2040 }
2041 }
2042
2043 if (offload_type & SKB_GSO_TCPV6) {
2044 struct atl1c_tpd_ext_desc *etpd =
2045 *(struct atl1c_tpd_ext_desc **)(tpd);
2046
2047 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2048 *tpd = atl1c_get_tpd(adapter, type);
2049 ipv6_hdr(skb)->payload_len = 0;
2050 /* check payload == 0 byte ? */
2051 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2052 if (unlikely(skb->len == hdr_len)) {
2053 /* only xsum need */
2054 if (netif_msg_tx_queued(adapter))
2055 dev_warn(&pdev->dev,
2056 "IPV6 tso with zero data??\n");
2057 goto check_sum;
2058 } else
2059 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2060 &ipv6_hdr(skb)->saddr,
2061 &ipv6_hdr(skb)->daddr,
2062 0, IPPROTO_TCP, 0);
2063 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2064 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2065 etpd->pkt_len = cpu_to_le32(skb->len);
2066 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2067 }
2068
2069 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2070 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2071 TPD_TCPHDR_OFFSET_SHIFT;
2072 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2073 TPD_MSS_SHIFT;
2074 return 0;
2075 }
2076
2077 check_sum:
2078 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2079 u8 css, cso;
2080 cso = skb_checksum_start_offset(skb);
2081
2082 if (unlikely(cso & 0x1)) {
2083 if (netif_msg_tx_err(adapter))
2084 dev_err(&adapter->pdev->dev,
2085 "payload offset should not an event number\n");
2086 return -1;
2087 } else {
2088 css = cso + skb->csum_offset;
2089
2090 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2091 TPD_PLOADOFFSET_SHIFT;
2092 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2093 TPD_CCSUM_OFFSET_SHIFT;
2094 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2095 }
2096 }
2097 return 0;
2098 }
2099
2100 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2101 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2102 enum atl1c_trans_queue type)
2103 {
2104 struct atl1c_tpd_desc *use_tpd = NULL;
2105 struct atl1c_buffer *buffer_info = NULL;
2106 u16 buf_len = skb_headlen(skb);
2107 u16 map_len = 0;
2108 u16 mapped_len = 0;
2109 u16 hdr_len = 0;
2110 u16 nr_frags;
2111 u16 f;
2112 int tso;
2113
2114 nr_frags = skb_shinfo(skb)->nr_frags;
2115 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2116 if (tso) {
2117 /* TSO */
2118 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2119 use_tpd = tpd;
2120
2121 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2122 buffer_info->length = map_len;
2123 buffer_info->dma = pci_map_single(adapter->pdev,
2124 skb->data, hdr_len, PCI_DMA_TODEVICE);
2125 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2126 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2127 ATL1C_PCIMAP_TODEVICE);
2128 mapped_len += map_len;
2129 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2130 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2131 }
2132
2133 if (mapped_len < buf_len) {
2134 /* mapped_len == 0, means we should use the first tpd,
2135 which is given by caller */
2136 if (mapped_len == 0)
2137 use_tpd = tpd;
2138 else {
2139 use_tpd = atl1c_get_tpd(adapter, type);
2140 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2141 }
2142 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2143 buffer_info->length = buf_len - mapped_len;
2144 buffer_info->dma =
2145 pci_map_single(adapter->pdev, skb->data + mapped_len,
2146 buffer_info->length, PCI_DMA_TODEVICE);
2147 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2148 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2149 ATL1C_PCIMAP_TODEVICE);
2150 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2151 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2152 }
2153
2154 for (f = 0; f < nr_frags; f++) {
2155 struct skb_frag_struct *frag;
2156
2157 frag = &skb_shinfo(skb)->frags[f];
2158
2159 use_tpd = atl1c_get_tpd(adapter, type);
2160 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2161
2162 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2163 buffer_info->length = frag->size;
2164 buffer_info->dma =
2165 pci_map_page(adapter->pdev, frag->page,
2166 frag->page_offset,
2167 buffer_info->length,
2168 PCI_DMA_TODEVICE);
2169 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2170 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2171 ATL1C_PCIMAP_TODEVICE);
2172 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2173 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2174 }
2175
2176 /* The last tpd */
2177 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2178 /* The last buffer info contain the skb address,
2179 so it will be free after unmap */
2180 buffer_info->skb = skb;
2181 }
2182
2183 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2184 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2185 {
2186 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2187 u32 prod_data;
2188
2189 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2190 switch (type) {
2191 case atl1c_trans_high:
2192 prod_data &= 0xFFFF0000;
2193 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2194 break;
2195 case atl1c_trans_normal:
2196 prod_data &= 0x0000FFFF;
2197 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2198 break;
2199 default:
2200 break;
2201 }
2202 wmb();
2203 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2204 }
2205
2206 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2207 struct net_device *netdev)
2208 {
2209 struct atl1c_adapter *adapter = netdev_priv(netdev);
2210 unsigned long flags;
2211 u16 tpd_req = 1;
2212 struct atl1c_tpd_desc *tpd;
2213 enum atl1c_trans_queue type = atl1c_trans_normal;
2214
2215 if (test_bit(__AT_DOWN, &adapter->flags)) {
2216 dev_kfree_skb_any(skb);
2217 return NETDEV_TX_OK;
2218 }
2219
2220 tpd_req = atl1c_cal_tpd_req(skb);
2221 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2222 if (netif_msg_pktdata(adapter))
2223 dev_info(&adapter->pdev->dev, "tx locked\n");
2224 return NETDEV_TX_LOCKED;
2225 }
2226 if (skb->mark == 0x01)
2227 type = atl1c_trans_high;
2228 else
2229 type = atl1c_trans_normal;
2230
2231 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2232 /* no enough descriptor, just stop queue */
2233 netif_stop_queue(netdev);
2234 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2235 return NETDEV_TX_BUSY;
2236 }
2237
2238 tpd = atl1c_get_tpd(adapter, type);
2239
2240 /* do TSO and check sum */
2241 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2242 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2243 dev_kfree_skb_any(skb);
2244 return NETDEV_TX_OK;
2245 }
2246
2247 if (unlikely(vlan_tx_tag_present(skb))) {
2248 u16 vlan = vlan_tx_tag_get(skb);
2249 __le16 tag;
2250
2251 vlan = cpu_to_le16(vlan);
2252 AT_VLAN_TO_TAG(vlan, tag);
2253 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2254 tpd->vlan_tag = tag;
2255 }
2256
2257 if (skb_network_offset(skb) != ETH_HLEN)
2258 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2259
2260 atl1c_tx_map(adapter, skb, tpd, type);
2261 atl1c_tx_queue(adapter, skb, tpd, type);
2262
2263 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2264 return NETDEV_TX_OK;
2265 }
2266
2267 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2268 {
2269 struct net_device *netdev = adapter->netdev;
2270
2271 free_irq(adapter->pdev->irq, netdev);
2272
2273 if (adapter->have_msi)
2274 pci_disable_msi(adapter->pdev);
2275 }
2276
2277 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2278 {
2279 struct pci_dev *pdev = adapter->pdev;
2280 struct net_device *netdev = adapter->netdev;
2281 int flags = 0;
2282 int err = 0;
2283
2284 adapter->have_msi = true;
2285 err = pci_enable_msi(adapter->pdev);
2286 if (err) {
2287 if (netif_msg_ifup(adapter))
2288 dev_err(&pdev->dev,
2289 "Unable to allocate MSI interrupt Error: %d\n",
2290 err);
2291 adapter->have_msi = false;
2292 } else
2293 netdev->irq = pdev->irq;
2294
2295 if (!adapter->have_msi)
2296 flags |= IRQF_SHARED;
2297 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2298 netdev->name, netdev);
2299 if (err) {
2300 if (netif_msg_ifup(adapter))
2301 dev_err(&pdev->dev,
2302 "Unable to allocate interrupt Error: %d\n",
2303 err);
2304 if (adapter->have_msi)
2305 pci_disable_msi(adapter->pdev);
2306 return err;
2307 }
2308 if (netif_msg_ifup(adapter))
2309 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2310 return err;
2311 }
2312
2313 static int atl1c_up(struct atl1c_adapter *adapter)
2314 {
2315 struct net_device *netdev = adapter->netdev;
2316 int num;
2317 int err;
2318 int i;
2319
2320 netif_carrier_off(netdev);
2321 atl1c_init_ring_ptrs(adapter);
2322 atl1c_set_multi(netdev);
2323 atl1c_restore_vlan(adapter);
2324
2325 for (i = 0; i < adapter->num_rx_queues; i++) {
2326 num = atl1c_alloc_rx_buffer(adapter, i);
2327 if (unlikely(num == 0)) {
2328 err = -ENOMEM;
2329 goto err_alloc_rx;
2330 }
2331 }
2332
2333 if (atl1c_configure(adapter)) {
2334 err = -EIO;
2335 goto err_up;
2336 }
2337
2338 err = atl1c_request_irq(adapter);
2339 if (unlikely(err))
2340 goto err_up;
2341
2342 clear_bit(__AT_DOWN, &adapter->flags);
2343 napi_enable(&adapter->napi);
2344 atl1c_irq_enable(adapter);
2345 atl1c_check_link_status(adapter);
2346 netif_start_queue(netdev);
2347 return err;
2348
2349 err_up:
2350 err_alloc_rx:
2351 atl1c_clean_rx_ring(adapter);
2352 return err;
2353 }
2354
2355 static void atl1c_down(struct atl1c_adapter *adapter)
2356 {
2357 struct net_device *netdev = adapter->netdev;
2358
2359 atl1c_del_timer(adapter);
2360 adapter->work_event = 0; /* clear all event */
2361 /* signal that we're down so the interrupt handler does not
2362 * reschedule our watchdog timer */
2363 set_bit(__AT_DOWN, &adapter->flags);
2364 netif_carrier_off(netdev);
2365 napi_disable(&adapter->napi);
2366 atl1c_irq_disable(adapter);
2367 atl1c_free_irq(adapter);
2368 /* reset MAC to disable all RX/TX */
2369 atl1c_reset_mac(&adapter->hw);
2370 msleep(1);
2371
2372 adapter->link_speed = SPEED_0;
2373 adapter->link_duplex = -1;
2374 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2375 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2376 atl1c_clean_rx_ring(adapter);
2377 }
2378
2379 /*
2380 * atl1c_open - Called when a network interface is made active
2381 * @netdev: network interface device structure
2382 *
2383 * Returns 0 on success, negative value on failure
2384 *
2385 * The open entry point is called when a network interface is made
2386 * active by the system (IFF_UP). At this point all resources needed
2387 * for transmit and receive operations are allocated, the interrupt
2388 * handler is registered with the OS, the watchdog timer is started,
2389 * and the stack is notified that the interface is ready.
2390 */
2391 static int atl1c_open(struct net_device *netdev)
2392 {
2393 struct atl1c_adapter *adapter = netdev_priv(netdev);
2394 int err;
2395
2396 /* disallow open during test */
2397 if (test_bit(__AT_TESTING, &adapter->flags))
2398 return -EBUSY;
2399
2400 /* allocate rx/tx dma buffer & descriptors */
2401 err = atl1c_setup_ring_resources(adapter);
2402 if (unlikely(err))
2403 return err;
2404
2405 err = atl1c_up(adapter);
2406 if (unlikely(err))
2407 goto err_up;
2408
2409 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2410 u32 phy_data;
2411
2412 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2413 phy_data |= MDIO_AP_EN;
2414 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2415 }
2416 return 0;
2417
2418 err_up:
2419 atl1c_free_irq(adapter);
2420 atl1c_free_ring_resources(adapter);
2421 atl1c_reset_mac(&adapter->hw);
2422 return err;
2423 }
2424
2425 /*
2426 * atl1c_close - Disables a network interface
2427 * @netdev: network interface device structure
2428 *
2429 * Returns 0, this is not allowed to fail
2430 *
2431 * The close entry point is called when an interface is de-activated
2432 * by the OS. The hardware is still under the drivers control, but
2433 * needs to be disabled. A global MAC reset is issued to stop the
2434 * hardware, and all transmit and receive resources are freed.
2435 */
2436 static int atl1c_close(struct net_device *netdev)
2437 {
2438 struct atl1c_adapter *adapter = netdev_priv(netdev);
2439
2440 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2441 atl1c_down(adapter);
2442 atl1c_free_ring_resources(adapter);
2443 return 0;
2444 }
2445
2446 static int atl1c_suspend(struct device *dev)
2447 {
2448 struct pci_dev *pdev = to_pci_dev(dev);
2449 struct net_device *netdev = pci_get_drvdata(pdev);
2450 struct atl1c_adapter *adapter = netdev_priv(netdev);
2451 struct atl1c_hw *hw = &adapter->hw;
2452 u32 mac_ctrl_data = 0;
2453 u32 master_ctrl_data = 0;
2454 u32 wol_ctrl_data = 0;
2455 u16 mii_intr_status_data = 0;
2456 u32 wufc = adapter->wol;
2457
2458 atl1c_disable_l0s_l1(hw);
2459 if (netif_running(netdev)) {
2460 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2461 atl1c_down(adapter);
2462 }
2463 netif_device_detach(netdev);
2464
2465 if (wufc)
2466 if (atl1c_phy_power_saving(hw) != 0)
2467 dev_dbg(&pdev->dev, "phy power saving failed");
2468
2469 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2470 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2471
2472 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2473 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2474 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2475 MAC_CTRL_PRMLEN_MASK) <<
2476 MAC_CTRL_PRMLEN_SHIFT);
2477 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2478 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2479
2480 if (wufc) {
2481 mac_ctrl_data |= MAC_CTRL_RX_EN;
2482 if (adapter->link_speed == SPEED_1000 ||
2483 adapter->link_speed == SPEED_0) {
2484 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2485 MAC_CTRL_SPEED_SHIFT;
2486 mac_ctrl_data |= MAC_CTRL_DUPLX;
2487 } else
2488 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2489 MAC_CTRL_SPEED_SHIFT;
2490
2491 if (adapter->link_duplex == DUPLEX_FULL)
2492 mac_ctrl_data |= MAC_CTRL_DUPLX;
2493
2494 /* turn on magic packet wol */
2495 if (wufc & AT_WUFC_MAG)
2496 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2497
2498 if (wufc & AT_WUFC_LNKC) {
2499 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2500 /* only link up can wake up */
2501 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2502 dev_dbg(&pdev->dev, "%s: read write phy "
2503 "register failed.\n",
2504 atl1c_driver_name);
2505 }
2506 }
2507 /* clear phy interrupt */
2508 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2509 /* Config MAC Ctrl register */
2510 if (adapter->vlgrp)
2511 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2512
2513 /* magic packet maybe Broadcast&multicast&Unicast frame */
2514 if (wufc & AT_WUFC_MAG)
2515 mac_ctrl_data |= MAC_CTRL_BC_EN;
2516
2517 dev_dbg(&pdev->dev,
2518 "%s: suspend MAC=0x%x\n",
2519 atl1c_driver_name, mac_ctrl_data);
2520 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2521 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2522 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2523
2524 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2525 GPHY_CTRL_EXT_RESET);
2526 } else {
2527 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2528 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2529 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2530 mac_ctrl_data |= MAC_CTRL_DUPLX;
2531 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2532 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2533 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2534 hw->phy_configured = false; /* re-init PHY when resume */
2535 }
2536
2537 return 0;
2538 }
2539
2540 #ifdef CONFIG_PM_SLEEP
2541 static int atl1c_resume(struct device *dev)
2542 {
2543 struct pci_dev *pdev = to_pci_dev(dev);
2544 struct net_device *netdev = pci_get_drvdata(pdev);
2545 struct atl1c_adapter *adapter = netdev_priv(netdev);
2546
2547 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2548 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2549 ATL1C_PCIE_PHY_RESET);
2550
2551 atl1c_phy_reset(&adapter->hw);
2552 atl1c_reset_mac(&adapter->hw);
2553 atl1c_phy_init(&adapter->hw);
2554
2555 #if 0
2556 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2557 pm_data &= ~PM_CTRLSTAT_PME_EN;
2558 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2559 #endif
2560
2561 netif_device_attach(netdev);
2562 if (netif_running(netdev))
2563 atl1c_up(adapter);
2564
2565 return 0;
2566 }
2567 #endif
2568
2569 static void atl1c_shutdown(struct pci_dev *pdev)
2570 {
2571 struct net_device *netdev = pci_get_drvdata(pdev);
2572 struct atl1c_adapter *adapter = netdev_priv(netdev);
2573
2574 atl1c_suspend(&pdev->dev);
2575 pci_wake_from_d3(pdev, adapter->wol);
2576 pci_set_power_state(pdev, PCI_D3hot);
2577 }
2578
2579 static const struct net_device_ops atl1c_netdev_ops = {
2580 .ndo_open = atl1c_open,
2581 .ndo_stop = atl1c_close,
2582 .ndo_validate_addr = eth_validate_addr,
2583 .ndo_start_xmit = atl1c_xmit_frame,
2584 .ndo_set_mac_address = atl1c_set_mac_addr,
2585 .ndo_set_multicast_list = atl1c_set_multi,
2586 .ndo_change_mtu = atl1c_change_mtu,
2587 .ndo_fix_features = atl1c_fix_features,
2588 .ndo_do_ioctl = atl1c_ioctl,
2589 .ndo_tx_timeout = atl1c_tx_timeout,
2590 .ndo_get_stats = atl1c_get_stats,
2591 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2592 #ifdef CONFIG_NET_POLL_CONTROLLER
2593 .ndo_poll_controller = atl1c_netpoll,
2594 #endif
2595 };
2596
2597 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2598 {
2599 SET_NETDEV_DEV(netdev, &pdev->dev);
2600 pci_set_drvdata(pdev, netdev);
2601
2602 netdev->irq = pdev->irq;
2603 netdev->netdev_ops = &atl1c_netdev_ops;
2604 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2605 atl1c_set_ethtool_ops(netdev);
2606
2607 /* TODO: add when ready */
2608 netdev->hw_features = NETIF_F_SG |
2609 NETIF_F_HW_CSUM |
2610 NETIF_F_HW_VLAN_TX |
2611 NETIF_F_TSO |
2612 NETIF_F_TSO6;
2613 netdev->features = netdev->hw_features |
2614 NETIF_F_HW_VLAN_RX;
2615 return 0;
2616 }
2617
2618 /*
2619 * atl1c_probe - Device Initialization Routine
2620 * @pdev: PCI device information struct
2621 * @ent: entry in atl1c_pci_tbl
2622 *
2623 * Returns 0 on success, negative on failure
2624 *
2625 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2626 * The OS initialization, configuring of the adapter private structure,
2627 * and a hardware reset occur.
2628 */
2629 static int __devinit atl1c_probe(struct pci_dev *pdev,
2630 const struct pci_device_id *ent)
2631 {
2632 struct net_device *netdev;
2633 struct atl1c_adapter *adapter;
2634 static int cards_found;
2635
2636 int err = 0;
2637
2638 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2639 err = pci_enable_device_mem(pdev);
2640 if (err) {
2641 dev_err(&pdev->dev, "cannot enable PCI device\n");
2642 return err;
2643 }
2644
2645 /*
2646 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2647 * shared register for the high 32 bits, so only a single, aligned,
2648 * 4 GB physical address range can be used at a time.
2649 *
2650 * Supporting 64-bit DMA on this hardware is more trouble than it's
2651 * worth. It is far easier to limit to 32-bit DMA than update
2652 * various kernel subsystems to support the mechanics required by a
2653 * fixed-high-32-bit system.
2654 */
2655 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2656 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2657 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2658 goto err_dma;
2659 }
2660
2661 err = pci_request_regions(pdev, atl1c_driver_name);
2662 if (err) {
2663 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2664 goto err_pci_reg;
2665 }
2666
2667 pci_set_master(pdev);
2668
2669 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2670 if (netdev == NULL) {
2671 err = -ENOMEM;
2672 dev_err(&pdev->dev, "etherdev alloc failed\n");
2673 goto err_alloc_etherdev;
2674 }
2675
2676 err = atl1c_init_netdev(netdev, pdev);
2677 if (err) {
2678 dev_err(&pdev->dev, "init netdevice failed\n");
2679 goto err_init_netdev;
2680 }
2681 adapter = netdev_priv(netdev);
2682 adapter->bd_number = cards_found;
2683 adapter->netdev = netdev;
2684 adapter->pdev = pdev;
2685 adapter->hw.adapter = adapter;
2686 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2687 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2688 if (!adapter->hw.hw_addr) {
2689 err = -EIO;
2690 dev_err(&pdev->dev, "cannot map device registers\n");
2691 goto err_ioremap;
2692 }
2693 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2694
2695 /* init mii data */
2696 adapter->mii.dev = netdev;
2697 adapter->mii.mdio_read = atl1c_mdio_read;
2698 adapter->mii.mdio_write = atl1c_mdio_write;
2699 adapter->mii.phy_id_mask = 0x1f;
2700 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2701 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2702 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2703 (unsigned long)adapter);
2704 /* setup the private structure */
2705 err = atl1c_sw_init(adapter);
2706 if (err) {
2707 dev_err(&pdev->dev, "net device private data init failed\n");
2708 goto err_sw_init;
2709 }
2710 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2711 ATL1C_PCIE_PHY_RESET);
2712
2713 /* Init GPHY as early as possible due to power saving issue */
2714 atl1c_phy_reset(&adapter->hw);
2715
2716 err = atl1c_reset_mac(&adapter->hw);
2717 if (err) {
2718 err = -EIO;
2719 goto err_reset;
2720 }
2721
2722 /* reset the controller to
2723 * put the device in a known good starting state */
2724 err = atl1c_phy_init(&adapter->hw);
2725 if (err) {
2726 err = -EIO;
2727 goto err_reset;
2728 }
2729 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2730 err = -EIO;
2731 dev_err(&pdev->dev, "get mac address failed\n");
2732 goto err_eeprom;
2733 }
2734 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2735 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2736 if (netif_msg_probe(adapter))
2737 dev_dbg(&pdev->dev, "mac address : %pM\n",
2738 adapter->hw.mac_addr);
2739
2740 atl1c_hw_set_mac_addr(&adapter->hw);
2741 INIT_WORK(&adapter->common_task, atl1c_common_task);
2742 adapter->work_event = 0;
2743 err = register_netdev(netdev);
2744 if (err) {
2745 dev_err(&pdev->dev, "register netdevice failed\n");
2746 goto err_register;
2747 }
2748
2749 if (netif_msg_probe(adapter))
2750 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2751 cards_found++;
2752 return 0;
2753
2754 err_reset:
2755 err_register:
2756 err_sw_init:
2757 err_eeprom:
2758 iounmap(adapter->hw.hw_addr);
2759 err_init_netdev:
2760 err_ioremap:
2761 free_netdev(netdev);
2762 err_alloc_etherdev:
2763 pci_release_regions(pdev);
2764 err_pci_reg:
2765 err_dma:
2766 pci_disable_device(pdev);
2767 return err;
2768 }
2769
2770 /*
2771 * atl1c_remove - Device Removal Routine
2772 * @pdev: PCI device information struct
2773 *
2774 * atl1c_remove is called by the PCI subsystem to alert the driver
2775 * that it should release a PCI device. The could be caused by a
2776 * Hot-Plug event, or because the driver is going to be removed from
2777 * memory.
2778 */
2779 static void __devexit atl1c_remove(struct pci_dev *pdev)
2780 {
2781 struct net_device *netdev = pci_get_drvdata(pdev);
2782 struct atl1c_adapter *adapter = netdev_priv(netdev);
2783
2784 unregister_netdev(netdev);
2785 atl1c_phy_disable(&adapter->hw);
2786
2787 iounmap(adapter->hw.hw_addr);
2788
2789 pci_release_regions(pdev);
2790 pci_disable_device(pdev);
2791 free_netdev(netdev);
2792 }
2793
2794 /*
2795 * atl1c_io_error_detected - called when PCI error is detected
2796 * @pdev: Pointer to PCI device
2797 * @state: The current pci connection state
2798 *
2799 * This function is called after a PCI bus error affecting
2800 * this device has been detected.
2801 */
2802 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2803 pci_channel_state_t state)
2804 {
2805 struct net_device *netdev = pci_get_drvdata(pdev);
2806 struct atl1c_adapter *adapter = netdev_priv(netdev);
2807
2808 netif_device_detach(netdev);
2809
2810 if (state == pci_channel_io_perm_failure)
2811 return PCI_ERS_RESULT_DISCONNECT;
2812
2813 if (netif_running(netdev))
2814 atl1c_down(adapter);
2815
2816 pci_disable_device(pdev);
2817
2818 /* Request a slot slot reset. */
2819 return PCI_ERS_RESULT_NEED_RESET;
2820 }
2821
2822 /*
2823 * atl1c_io_slot_reset - called after the pci bus has been reset.
2824 * @pdev: Pointer to PCI device
2825 *
2826 * Restart the card from scratch, as if from a cold-boot. Implementation
2827 * resembles the first-half of the e1000_resume routine.
2828 */
2829 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2830 {
2831 struct net_device *netdev = pci_get_drvdata(pdev);
2832 struct atl1c_adapter *adapter = netdev_priv(netdev);
2833
2834 if (pci_enable_device(pdev)) {
2835 if (netif_msg_hw(adapter))
2836 dev_err(&pdev->dev,
2837 "Cannot re-enable PCI device after reset\n");
2838 return PCI_ERS_RESULT_DISCONNECT;
2839 }
2840 pci_set_master(pdev);
2841
2842 pci_enable_wake(pdev, PCI_D3hot, 0);
2843 pci_enable_wake(pdev, PCI_D3cold, 0);
2844
2845 atl1c_reset_mac(&adapter->hw);
2846
2847 return PCI_ERS_RESULT_RECOVERED;
2848 }
2849
2850 /*
2851 * atl1c_io_resume - called when traffic can start flowing again.
2852 * @pdev: Pointer to PCI device
2853 *
2854 * This callback is called when the error recovery driver tells us that
2855 * its OK to resume normal operation. Implementation resembles the
2856 * second-half of the atl1c_resume routine.
2857 */
2858 static void atl1c_io_resume(struct pci_dev *pdev)
2859 {
2860 struct net_device *netdev = pci_get_drvdata(pdev);
2861 struct atl1c_adapter *adapter = netdev_priv(netdev);
2862
2863 if (netif_running(netdev)) {
2864 if (atl1c_up(adapter)) {
2865 if (netif_msg_hw(adapter))
2866 dev_err(&pdev->dev,
2867 "Cannot bring device back up after reset\n");
2868 return;
2869 }
2870 }
2871
2872 netif_device_attach(netdev);
2873 }
2874
2875 static struct pci_error_handlers atl1c_err_handler = {
2876 .error_detected = atl1c_io_error_detected,
2877 .slot_reset = atl1c_io_slot_reset,
2878 .resume = atl1c_io_resume,
2879 };
2880
2881 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2882
2883 static struct pci_driver atl1c_driver = {
2884 .name = atl1c_driver_name,
2885 .id_table = atl1c_pci_tbl,
2886 .probe = atl1c_probe,
2887 .remove = __devexit_p(atl1c_remove),
2888 .shutdown = atl1c_shutdown,
2889 .err_handler = &atl1c_err_handler,
2890 .driver.pm = &atl1c_pm_ops,
2891 };
2892
2893 /*
2894 * atl1c_init_module - Driver Registration Routine
2895 *
2896 * atl1c_init_module is the first routine called when the driver is
2897 * loaded. All it does is register with the PCI subsystem.
2898 */
2899 static int __init atl1c_init_module(void)
2900 {
2901 return pci_register_driver(&atl1c_driver);
2902 }
2903
2904 /*
2905 * atl1c_exit_module - Driver Exit Cleanup Routine
2906 *
2907 * atl1c_exit_module is called just before the driver is removed
2908 * from memory.
2909 */
2910 static void __exit atl1c_exit_module(void)
2911 {
2912 pci_unregister_driver(&atl1c_driver);
2913 }
2914
2915 module_init(atl1c_init_module);
2916 module_exit(atl1c_exit_module);