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hugetlb: make unmap_ref_private multi-size-aware
[zen-stable.git] / drivers / ata / pata_via.c
blob681169c9c6409d4514b1f68195e98c1d96e626e6
1 /*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 *
5 * Documentation
6 * Most chipset documentation available under NDA only
7 *
8 * VIA version guide
9 * VIA VT82C561 - early design, uses ata_generic currently
10 * VIA VT82C576 - MWDMA, 33Mhz
11 * VIA VT82C586 - MWDMA, 33Mhz
12 * VIA VT82C586a - Added UDMA to 33Mhz
13 * VIA VT82C586b - UDMA33
14 * VIA VT82C596a - Nonfunctional UDMA66
15 * VIA VT82C596b - Working UDMA66
16 * VIA VT82C686 - Nonfunctional UDMA66
17 * VIA VT82C686a - Working UDMA66
18 * VIA VT82C686b - Updated to UDMA100
19 * VIA VT8231 - UDMA100
20 * VIA VT8233 - UDMA100
21 * VIA VT8233a - UDMA133
22 * VIA VT8233c - UDMA100
23 * VIA VT8235 - UDMA133
24 * VIA VT8237 - UDMA133
25 * VIA VT8237S - UDMA133
26 * VIA VT8251 - UDMA133
27 *
28 * Most registers remain compatible across chips. Others start reserved
29 * and acquire sensible semantics if set to 1 (eg cable detect). A few
30 * exceptions exist, notably around the FIFO settings.
31 *
32 * One additional quirk of the VIA design is that like ALi they use few
33 * PCI IDs for a lot of chips.
34 *
35 * Based heavily on:
36 *
37 * Version 3.38
38 *
39 * VIA IDE driver for Linux. Supported southbridges:
40 *
41 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
42 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
43 * vt8235, vt8237
44 *
45 * Copyright (c) 2000-2002 Vojtech Pavlik
46 *
47 * Based on the work of:
48 * Michel Aubry
49 * Jeff Garzik
50 * Andre Hedrick
51
52 */
53
54 #include <linux/kernel.h>
55 #include <linux/module.h>
56 #include <linux/pci.h>
57 #include <linux/init.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <scsi/scsi_host.h>
61 #include <linux/libata.h>
62 #include <linux/dmi.h>
63
64 #define DRV_NAME "pata_via"
65 #define DRV_VERSION "0.3.3"
66
67 /*
68 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
69 * driver.
70 */
71
72 enum {
73 VIA_UDMA = 0x007,
74 VIA_UDMA_NONE = 0x000,
75 VIA_UDMA_33 = 0x001,
76 VIA_UDMA_66 = 0x002,
77 VIA_UDMA_100 = 0x003,
78 VIA_UDMA_133 = 0x004,
79 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
80 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
81 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
82 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
83 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
84 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
85 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
86 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
87 };
88
89 /*
90 * VIA SouthBridge chips.
91 */
92
93 static const struct via_isa_bridge {
94 const char *name;
95 u16 id;
96 u8 rev_min;
97 u8 rev_max;
98 u16 flags;
99 } via_isa_bridges[] = {
100 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
101 VIA_BAD_AST | VIA_SATA_PATA },
102 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
103 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
105 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
106 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
110 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
111 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
113 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
114 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
115 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
116 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
117 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
121 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
122 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
123 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
124 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
125 { NULL }
126 };
127
128
129 /*
130 * Cable special cases
131 */
132
133 static const struct dmi_system_id cable_dmi_table[] = {
134 {
135 .ident = "Acer Ferrari 3400",
136 .matches = {
137 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
138 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
139 },
140 },
141 { }
142 };
143
144 static int via_cable_override(struct pci_dev *pdev)
145 {
146 /* Systems by DMI */
147 if (dmi_check_system(cable_dmi_table))
148 return 1;
149 /* Arima W730-K8/Targa Visionary 811/... */
150 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
151 return 1;
152 return 0;
153 }
154
155
156 /**
157 * via_cable_detect - cable detection
158 * @ap: ATA port
159 *
160 * Perform cable detection. Actually for the VIA case the BIOS
161 * already did this for us. We read the values provided by the
162 * BIOS. If you are using an 8235 in a non-PC configuration you
163 * may need to update this code.
164 *
165 * Hotplug also impacts on this.
166 */
167
168 static int via_cable_detect(struct ata_port *ap) {
169 const struct via_isa_bridge *config = ap->host->private_data;
170 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
171 u32 ata66;
172
173 if (via_cable_override(pdev))
174 return ATA_CBL_PATA40_SHORT;
175
176 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
177 return ATA_CBL_SATA;
178
179 /* Early chips are 40 wire */
180 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
181 return ATA_CBL_PATA40;
182 /* UDMA 66 chips have only drive side logic */
183 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
184 return ATA_CBL_PATA_UNK;
185 /* UDMA 100 or later */
186 pci_read_config_dword(pdev, 0x50, &ata66);
187 /* Check both the drive cable reporting bits, we might not have
188 two drives */
189 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
190 return ATA_CBL_PATA80;
191 /* Check with ACPI so we can spot BIOS reported SATA bridges */
192 if (ata_acpi_init_gtm(ap) &&
193 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
194 return ATA_CBL_PATA80;
195 return ATA_CBL_PATA40;
196 }
197
198 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
199 {
200 struct ata_port *ap = link->ap;
201 const struct via_isa_bridge *config = ap->host->private_data;
202
203 if (!(config->flags & VIA_NO_ENABLES)) {
204 static const struct pci_bits via_enable_bits[] = {
205 { 0x40, 1, 0x02, 0x02 },
206 { 0x40, 1, 0x01, 0x01 }
207 };
208 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
209 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
210 return -ENOENT;
211 }
212
213 return ata_sff_prereset(link, deadline);
214 }
215
216
217 /**
218 * via_do_set_mode - set initial PIO mode data
219 * @ap: ATA interface
220 * @adev: ATA device
221 * @mode: ATA mode being programmed
222 * @tdiv: Clocks per PCI clock
223 * @set_ast: Set to program address setup
224 * @udma_type: UDMA mode/format of registers
225 *
226 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
227 * support in order to compute modes.
228 *
229 * FIXME: Hotplug will require we serialize multiple mode changes
230 * on the two channels.
231 */
232
233 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
234 {
235 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
236 struct ata_device *peer = ata_dev_pair(adev);
237 struct ata_timing t, p;
238 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
239 unsigned long T = 1000000000 / via_clock;
240 unsigned long UT = T/tdiv;
241 int ut;
242 int offset = 3 - (2*ap->port_no) - adev->devno;
243
244 /* Calculate the timing values we require */
245 ata_timing_compute(adev, mode, &t, T, UT);
246
247 /* We share 8bit timing so we must merge the constraints */
248 if (peer) {
249 if (peer->pio_mode) {
250 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
251 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
252 }
253 }
254
255 /* Address setup is programmable but breaks on UDMA133 setups */
256 if (set_ast) {
257 u8 setup; /* 2 bits per drive */
258 int shift = 2 * offset;
259
260 pci_read_config_byte(pdev, 0x4C, &setup);
261 setup &= ~(3 << shift);
262 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
263 pci_write_config_byte(pdev, 0x4C, setup);
264 }
265
266 /* Load the PIO mode bits */
267 pci_write_config_byte(pdev, 0x4F - ap->port_no,
268 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
269 pci_write_config_byte(pdev, 0x48 + offset,
270 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
271
272 /* Load the UDMA bits according to type */
273 switch(udma_type) {
274 default:
275 /* BUG() ? */
276 /* fall through */
277 case 33:
278 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
279 break;
280 case 66:
281 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
282 break;
283 case 100:
284 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
285 break;
286 case 133:
287 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
288 break;
289 }
290
291 /* Set UDMA unless device is not UDMA capable */
292 if (udma_type && t.udma) {
293 u8 cable80_status;
294
295 /* Get 80-wire cable detection bit */
296 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
297 cable80_status &= 0x10;
298
299 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
300 }
301 }
302
303 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
304 {
305 const struct via_isa_bridge *config = ap->host->private_data;
306 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
307 int mode = config->flags & VIA_UDMA;
308 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
309 static u8 udma[5] = { 0, 33, 66, 100, 133 };
310
311 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
312 }
313
314 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
315 {
316 const struct via_isa_bridge *config = ap->host->private_data;
317 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
318 int mode = config->flags & VIA_UDMA;
319 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
320 static u8 udma[5] = { 0, 33, 66, 100, 133 };
321
322 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
323 }
324
325 /**
326 * via_tf_load - send taskfile registers to host controller
327 * @ap: Port to which output is sent
328 * @tf: ATA taskfile register set
329 *
330 * Outputs ATA taskfile to standard ATA host controller.
331 *
332 * Note: This is to fix the internal bug of via chipsets, which
333 * will reset the device register after changing the IEN bit on
334 * ctl register
335 */
336 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
337 {
338 struct ata_taskfile tmp_tf;
339
340 if (ap->ctl != ap->last_ctl && !(tf->flags & ATA_TFLAG_DEVICE)) {
341 tmp_tf = *tf;
342 tmp_tf.flags |= ATA_TFLAG_DEVICE;
343 tf = &tmp_tf;
344 }
345 ata_sff_tf_load(ap, tf);
346 }
347
348 static struct scsi_host_template via_sht = {
349 ATA_BMDMA_SHT(DRV_NAME),
350 };
351
352 static struct ata_port_operations via_port_ops = {
353 .inherits = &ata_bmdma_port_ops,
354 .cable_detect = via_cable_detect,
355 .set_piomode = via_set_piomode,
356 .set_dmamode = via_set_dmamode,
357 .prereset = via_pre_reset,
358 .sff_tf_load = via_tf_load,
359 };
360
361 static struct ata_port_operations via_port_ops_noirq = {
362 .inherits = &via_port_ops,
363 .sff_data_xfer = ata_sff_data_xfer_noirq,
364 };
365
366 /**
367 * via_config_fifo - set up the FIFO
368 * @pdev: PCI device
369 * @flags: configuration flags
370 *
371 * Set the FIFO properties for this device if necessary. Used both on
372 * set up and on and the resume path
373 */
374
375 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
376 {
377 u8 enable;
378
379 /* 0x40 low bits indicate enabled channels */
380 pci_read_config_byte(pdev, 0x40 , &enable);
381 enable &= 3;
382
383 if (flags & VIA_SET_FIFO) {
384 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
385 u8 fifo;
386
387 pci_read_config_byte(pdev, 0x43, &fifo);
388
389 /* Clear PREQ# until DDACK# for errata */
390 if (flags & VIA_BAD_PREQ)
391 fifo &= 0x7F;
392 else
393 fifo &= 0x9f;
394 /* Turn on FIFO for enabled channels */
395 fifo |= fifo_setting[enable];
396 pci_write_config_byte(pdev, 0x43, fifo);
397 }
398 }
399
400 /**
401 * via_init_one - discovery callback
402 * @pdev: PCI device
403 * @id: PCI table info
404 *
405 * A VIA IDE interface has been discovered. Figure out what revision
406 * and perform configuration work before handing it to the ATA layer
407 */
408
409 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
410 {
411 /* Early VIA without UDMA support */
412 static const struct ata_port_info via_mwdma_info = {
413 .flags = ATA_FLAG_SLAVE_POSS,
414 .pio_mask = 0x1f,
415 .mwdma_mask = 0x07,
416 .port_ops = &via_port_ops
417 };
418 /* Ditto with IRQ masking required */
419 static const struct ata_port_info via_mwdma_info_borked = {
420 .flags = ATA_FLAG_SLAVE_POSS,
421 .pio_mask = 0x1f,
422 .mwdma_mask = 0x07,
423 .port_ops = &via_port_ops_noirq,
424 };
425 /* VIA UDMA 33 devices (and borked 66) */
426 static const struct ata_port_info via_udma33_info = {
427 .flags = ATA_FLAG_SLAVE_POSS,
428 .pio_mask = 0x1f,
429 .mwdma_mask = 0x07,
430 .udma_mask = ATA_UDMA2,
431 .port_ops = &via_port_ops
432 };
433 /* VIA UDMA 66 devices */
434 static const struct ata_port_info via_udma66_info = {
435 .flags = ATA_FLAG_SLAVE_POSS,
436 .pio_mask = 0x1f,
437 .mwdma_mask = 0x07,
438 .udma_mask = ATA_UDMA4,
439 .port_ops = &via_port_ops
440 };
441 /* VIA UDMA 100 devices */
442 static const struct ata_port_info via_udma100_info = {
443 .flags = ATA_FLAG_SLAVE_POSS,
444 .pio_mask = 0x1f,
445 .mwdma_mask = 0x07,
446 .udma_mask = ATA_UDMA5,
447 .port_ops = &via_port_ops
448 };
449 /* UDMA133 with bad AST (All current 133) */
450 static const struct ata_port_info via_udma133_info = {
451 .flags = ATA_FLAG_SLAVE_POSS,
452 .pio_mask = 0x1f,
453 .mwdma_mask = 0x07,
454 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
455 .port_ops = &via_port_ops
456 };
457 const struct ata_port_info *ppi[] = { NULL, NULL };
458 struct pci_dev *isa = NULL;
459 const struct via_isa_bridge *config;
460 static int printed_version;
461 u8 enable;
462 u32 timing;
463 int rc;
464
465 if (!printed_version++)
466 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
467
468 rc = pcim_enable_device(pdev);
469 if (rc)
470 return rc;
471
472 /* To find out how the IDE will behave and what features we
473 actually have to look at the bridge not the IDE controller */
474 for (config = via_isa_bridges; config->id; config++)
475 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
476 !!(config->flags & VIA_BAD_ID),
477 config->id, NULL))) {
478
479 if (isa->revision >= config->rev_min &&
480 isa->revision <= config->rev_max)
481 break;
482 pci_dev_put(isa);
483 }
484
485 if (!config->id) {
486 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
487 return -ENODEV;
488 }
489 pci_dev_put(isa);
490
491 if (!(config->flags & VIA_NO_ENABLES)) {
492 /* 0x40 low bits indicate enabled channels */
493 pci_read_config_byte(pdev, 0x40 , &enable);
494 enable &= 3;
495 if (enable == 0)
496 return -ENODEV;
497 }
498
499 /* Initialise the FIFO for the enabled channels. */
500 via_config_fifo(pdev, config->flags);
501
502 /* Clock set up */
503 switch(config->flags & VIA_UDMA) {
504 case VIA_UDMA_NONE:
505 if (config->flags & VIA_NO_UNMASK)
506 ppi[0] = &via_mwdma_info_borked;
507 else
508 ppi[0] = &via_mwdma_info;
509 break;
510 case VIA_UDMA_33:
511 ppi[0] = &via_udma33_info;
512 break;
513 case VIA_UDMA_66:
514 ppi[0] = &via_udma66_info;
515 /* The 66 MHz devices require we enable the clock */
516 pci_read_config_dword(pdev, 0x50, &timing);
517 timing |= 0x80008;
518 pci_write_config_dword(pdev, 0x50, timing);
519 break;
520 case VIA_UDMA_100:
521 ppi[0] = &via_udma100_info;
522 break;
523 case VIA_UDMA_133:
524 ppi[0] = &via_udma133_info;
525 break;
526 default:
527 WARN_ON(1);
528 return -ENODEV;
529 }
530
531 if (config->flags & VIA_BAD_CLK66) {
532 /* Disable the 66MHz clock on problem devices */
533 pci_read_config_dword(pdev, 0x50, &timing);
534 timing &= ~0x80008;
535 pci_write_config_dword(pdev, 0x50, timing);
536 }
537
538 /* We have established the device type, now fire it up */
539 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config);
540 }
541
542 #ifdef CONFIG_PM
543 /**
544 * via_reinit_one - reinit after resume
545 * @pdev; PCI device
546 *
547 * Called when the VIA PATA device is resumed. We must then
548 * reconfigure the fifo and other setup we may have altered. In
549 * addition the kernel needs to have the resume methods on PCI
550 * quirk supported.
551 */
552
553 static int via_reinit_one(struct pci_dev *pdev)
554 {
555 u32 timing;
556 struct ata_host *host = dev_get_drvdata(&pdev->dev);
557 const struct via_isa_bridge *config = host->private_data;
558 int rc;
559
560 rc = ata_pci_device_do_resume(pdev);
561 if (rc)
562 return rc;
563
564 via_config_fifo(pdev, config->flags);
565
566 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
567 /* The 66 MHz devices require we enable the clock */
568 pci_read_config_dword(pdev, 0x50, &timing);
569 timing |= 0x80008;
570 pci_write_config_dword(pdev, 0x50, timing);
571 }
572 if (config->flags & VIA_BAD_CLK66) {
573 /* Disable the 66MHz clock on problem devices */
574 pci_read_config_dword(pdev, 0x50, &timing);
575 timing &= ~0x80008;
576 pci_write_config_dword(pdev, 0x50, timing);
577 }
578
579 ata_host_resume(host);
580 return 0;
581 }
582 #endif
583
584 static const struct pci_device_id via[] = {
585 { PCI_VDEVICE(VIA, 0x0571), },
586 { PCI_VDEVICE(VIA, 0x0581), },
587 { PCI_VDEVICE(VIA, 0x1571), },
588 { PCI_VDEVICE(VIA, 0x3164), },
589 { PCI_VDEVICE(VIA, 0x5324), },
590
591 { },
592 };
593
594 static struct pci_driver via_pci_driver = {
595 .name = DRV_NAME,
596 .id_table = via,
597 .probe = via_init_one,
598 .remove = ata_pci_remove_one,
599 #ifdef CONFIG_PM
600 .suspend = ata_pci_device_suspend,
601 .resume = via_reinit_one,
602 #endif
603 };
604
605 static int __init via_init(void)
606 {
607 return pci_register_driver(&via_pci_driver);
608 }
609
610 static void __exit via_exit(void)
611 {
612 pci_unregister_driver(&via_pci_driver);
613 }
614
615 MODULE_AUTHOR("Alan Cox");
616 MODULE_DESCRIPTION("low-level driver for VIA PATA");
617 MODULE_LICENSE("GPL");
618 MODULE_DEVICE_TABLE(pci, via);
619 MODULE_VERSION(DRV_VERSION);
620
621 module_init(via_init);
622 module_exit(via_exit);