drivers/video/pxafb.h

   1 #ifndef __PXAFB_H__
   2 #define __PXAFB_H__
   3
   4 /*
   5  * linux/drivers/video/pxafb.h
   6  *    -- Intel PXA250/210 LCD Controller Frame Buffer Device
   7  *
   8  *  Copyright (C) 1999 Eric A. Thomas.
   9  *  Copyright (C) 2004 Jean-Frederic Clere.
  10  *  Copyright (C) 2004 Ian Campbell.
  11  *  Copyright (C) 2004 Jeff Lackey.
  12  *   Based on sa1100fb.c Copyright (C) 1999 Eric A. Thomas
  13  *  which in turn is
  14  *   Based on acornfb.c Copyright (C) Russell King.
  15  *
  16  *  2001-08-03: Cliff Brake <cbrake@acclent.com>
  17  *       - ported SA1100 code to PXA
  18  *
  19  * This file is subject to the terms and conditions of the GNU General Public
  20  * License.  See the file COPYING in the main directory of this archive
  21  * for more details.
  22  */
  23
  24 /* PXA LCD DMA descriptor */
  25 struct pxafb_dma_descriptor {
  26         unsigned int fdadr;
  27         unsigned int fsadr;
  28         unsigned int fidr;
  29         unsigned int ldcmd;
  30 };
  31
  32 enum {
  33         PAL_NONE        = -1,
  34         PAL_BASE        = 0,
  35         PAL_OV1         = 1,
  36         PAL_OV2         = 2,
  37         PAL_MAX,
  38 };
  39
  40 enum {
  41         DMA_BASE        = 0,
  42         DMA_UPPER       = 0,
  43         DMA_LOWER       = 1,
  44         DMA_OV1         = 1,
  45         DMA_OV2_Y       = 2,
  46         DMA_OV2_Cb      = 3,
  47         DMA_OV2_Cr      = 4,
  48         DMA_CURSOR      = 5,
  49         DMA_CMD         = 6,
  50         DMA_MAX,
  51 };
  52
  53 /* maximum palette size - 256 entries, each 4 bytes long */
  54 #define PALETTE_SIZE    (256 * 4)
  55 #define CMD_BUFF_SIZE   (1024 * 50)
  56
  57 struct pxafb_dma_buff {
  58         unsigned char palette[PAL_MAX * PALETTE_SIZE];
  59         uint16_t cmd_buff[CMD_BUFF_SIZE];
  60         struct pxafb_dma_descriptor pal_desc[PAL_MAX];
  61         struct pxafb_dma_descriptor dma_desc[DMA_MAX];
  62 };
  63
  64 struct pxafb_info {
  65         struct fb_info          fb;
  66         struct device           *dev;
  67         struct clk              *clk;
  68
  69         void __iomem            *mmio_base;
  70
  71         struct pxafb_dma_buff   *dma_buff;
  72         dma_addr_t              dma_buff_phys;
  73         dma_addr_t              fdadr[DMA_MAX];
  74
  75         /*
  76          * These are the addresses we mapped
  77          * the framebuffer memory region to.
  78          */
  79         /* raw memory addresses */
  80         dma_addr_t              map_dma;        /* physical */
  81         u_char *                map_cpu;        /* virtual */
  82         u_int                   map_size;
  83
  84         /* addresses of pieces placed in raw buffer */
  85         u_char *                screen_cpu;     /* virtual address of frame buffer */
  86         dma_addr_t              screen_dma;     /* physical address of frame buffer */
  87         u16 *                   palette_cpu;    /* virtual address of palette memory */
  88         u_int                   palette_size;
  89         ssize_t                 video_offset;
  90
  91         u_int                   lccr0;
  92         u_int                   lccr3;
  93         u_int                   lccr4;
  94         u_int                   cmap_inverse:1,
  95                                 cmap_static:1,
  96                                 unused:30;
  97
  98         u_int                   reg_lccr0;
  99         u_int                   reg_lccr1;
 100         u_int                   reg_lccr2;
 101         u_int                   reg_lccr3;
 102         u_int                   reg_lccr4;
 103         u_int                   reg_cmdcr;
 104
 105         unsigned long   hsync_time;
 106
 107         volatile u_char         state;
 108         volatile u_char         task_state;
 109         struct mutex            ctrlr_lock;
 110         wait_queue_head_t       ctrlr_wait;
 111         struct work_struct      task;
 112
 113         struct completion       disable_done;
 114
 115 #ifdef CONFIG_FB_PXA_SMARTPANEL
 116         uint16_t                *smart_cmds;
 117         size_t                  n_smart_cmds;
 118         struct completion       command_done;
 119         struct completion       refresh_done;
 120         struct task_struct      *smart_thread;
 121 #endif
 122
 123 #ifdef CONFIG_CPU_FREQ
 124         struct notifier_block   freq_transition;
 125         struct notifier_block   freq_policy;
 126 #endif
 127 };
 128
 129 #define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
 130
 131 /*
 132  * These are the actions for set_ctrlr_state
 133  */
 134 #define C_DISABLE               (0)
 135 #define C_ENABLE                (1)
 136 #define C_DISABLE_CLKCHANGE     (2)
 137 #define C_ENABLE_CLKCHANGE      (3)
 138 #define C_REENABLE              (4)
 139 #define C_DISABLE_PM            (5)
 140 #define C_ENABLE_PM             (6)
 141 #define C_STARTUP               (7)
 142
 143 #define PXA_NAME        "PXA"
 144
 145 /*
 146  * Minimum X and Y resolutions
 147  */
 148 #define MIN_XRES        64
 149 #define MIN_YRES        64
 150
 151 #endif /* __PXAFB_H__ */